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authorOlof Johansson <olof@lixom.net>2016-11-17 20:47:44 -0500
committerOlof Johansson <olof@lixom.net>2016-11-17 20:47:44 -0500
commit56d027b41791238a21c1e00159f26641ca3dc121 (patch)
tree13a62f9727d3489cd032b5700eb0ff98c53c3a72
parent42494501f58da60728ec10c34e98f74a7a61dcc6 (diff)
parentd1193df9c3cbce699d07c352bb3c055cd827db4d (diff)
Merge tag 'lpc32xx-cleanup-v4.10' of https://github.com/sylemieux/linux-lpc32xx into next/soc
NXP LPC32xx ARM SoC cleanup for v4.10 This includes a few cleanup changes: * remove unused header file mach/irqs.h; * remove unused header file clock.h. * tag 'lpc32xx-cleanup-v4.10' of https://github.com/sylemieux/linux-lpc32xx: ARM: lpc32xx: remove unused header file clock.h ARM: lpc32xx: remove unused header file mach/irqs.h Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--arch/arm/mach-lpc32xx/clock.h38
-rw-r--r--arch/arm/mach-lpc32xx/common.h1
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/irqs.h117
-rw-r--r--arch/arm/mach-lpc32xx/pm.c1
4 files changed, 0 insertions, 157 deletions
diff --git a/arch/arm/mach-lpc32xx/clock.h b/arch/arm/mach-lpc32xx/clock.h
deleted file mode 100644
index c0a8434307f7..000000000000
--- a/arch/arm/mach-lpc32xx/clock.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * arch/arm/mach-lpc32xx/clock.h
3 *
4 * Author: Kevin Wells <kevin.wells@nxp.com>
5 *
6 * Copyright (C) 2010 NXP Semiconductors
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#ifndef __LPC32XX_CLOCK_H
20#define __LPC32XX_CLOCK_H
21
22struct clk {
23 struct list_head node;
24 struct clk *parent;
25 u32 rate;
26 u32 usecount;
27
28 int (*set_rate) (struct clk *, unsigned long);
29 unsigned long (*round_rate) (struct clk *, unsigned long);
30 unsigned long (*get_rate) (struct clk *clk);
31 int (*enable) (struct clk *, int);
32
33 /* Register address and bit mask for simple clocks */
34 void __iomem *enable_reg;
35 u32 enable_mask;
36};
37
38#endif
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 30c9e64fc65b..02575c2444e4 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -24,7 +24,6 @@
24/* 24/*
25 * Other arch specific structures and functions 25 * Other arch specific structures and functions
26 */ 26 */
27extern void __init lpc32xx_init_irq(void);
28extern void __init lpc32xx_map_io(void); 27extern void __init lpc32xx_map_io(void);
29extern void __init lpc32xx_serial_init(void); 28extern void __init lpc32xx_serial_init(void);
30 29
diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h
deleted file mode 100644
index 00190535df90..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/irqs.h
+++ /dev/null
@@ -1,117 +0,0 @@
1/*
2 * arch/arm/mach-lpc32xx/include/mach/irqs.h
3 *
4 * Author: Kevin Wells <kevin.wells@nxp.com>
5 *
6 * Copyright (C) 2010 NXP Semiconductors
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#ifndef __ASM_ARM_ARCH_IRQS_H
20#define __ASM_ARM_ARCH_IRQS_H
21
22#define LPC32XX_SIC1_IRQ(n) (32 + (n))
23#define LPC32XX_SIC2_IRQ(n) (64 + (n))
24
25/*
26 * MIC interrupts
27 */
28#define IRQ_LPC32XX_SUB1IRQ 0
29#define IRQ_LPC32XX_SUB2IRQ 1
30#define IRQ_LPC32XX_PWM3 3
31#define IRQ_LPC32XX_PWM4 4
32#define IRQ_LPC32XX_HSTIMER 5
33#define IRQ_LPC32XX_WATCH 6
34#define IRQ_LPC32XX_UART_IIR3 7
35#define IRQ_LPC32XX_UART_IIR4 8
36#define IRQ_LPC32XX_UART_IIR5 9
37#define IRQ_LPC32XX_UART_IIR6 10
38#define IRQ_LPC32XX_FLASH 11
39#define IRQ_LPC32XX_SD1 13
40#define IRQ_LPC32XX_LCD 14
41#define IRQ_LPC32XX_SD0 15
42#define IRQ_LPC32XX_TIMER0 16
43#define IRQ_LPC32XX_TIMER1 17
44#define IRQ_LPC32XX_TIMER2 18
45#define IRQ_LPC32XX_TIMER3 19
46#define IRQ_LPC32XX_SSP0 20
47#define IRQ_LPC32XX_SSP1 21
48#define IRQ_LPC32XX_I2S0 22
49#define IRQ_LPC32XX_I2S1 23
50#define IRQ_LPC32XX_UART_IIR7 24
51#define IRQ_LPC32XX_UART_IIR2 25
52#define IRQ_LPC32XX_UART_IIR1 26
53#define IRQ_LPC32XX_MSTIMER 27
54#define IRQ_LPC32XX_DMA 28
55#define IRQ_LPC32XX_ETHERNET 29
56#define IRQ_LPC32XX_SUB1FIQ 30
57#define IRQ_LPC32XX_SUB2FIQ 31
58
59/*
60 * SIC1 interrupts start at offset 32
61 */
62#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
63#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
64#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
65#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
66#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
67#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
68#define IRQ_LPC32XX_SPI2 LPC32XX_SIC1_IRQ(12)
69#define IRQ_LPC32XX_PLLUSB LPC32XX_SIC1_IRQ(13)
70#define IRQ_LPC32XX_PLLHCLK LPC32XX_SIC1_IRQ(14)
71#define IRQ_LPC32XX_PLL397 LPC32XX_SIC1_IRQ(17)
72#define IRQ_LPC32XX_I2C_2 LPC32XX_SIC1_IRQ(18)
73#define IRQ_LPC32XX_I2C_1 LPC32XX_SIC1_IRQ(19)
74#define IRQ_LPC32XX_RTC LPC32XX_SIC1_IRQ(20)
75#define IRQ_LPC32XX_KEY LPC32XX_SIC1_IRQ(22)
76#define IRQ_LPC32XX_SPI1 LPC32XX_SIC1_IRQ(23)
77#define IRQ_LPC32XX_SW LPC32XX_SIC1_IRQ(24)
78#define IRQ_LPC32XX_USB_OTG_TIMER LPC32XX_SIC1_IRQ(25)
79#define IRQ_LPC32XX_USB_OTG_ATX LPC32XX_SIC1_IRQ(26)
80#define IRQ_LPC32XX_USB_HOST LPC32XX_SIC1_IRQ(27)
81#define IRQ_LPC32XX_USB_DEV_DMA LPC32XX_SIC1_IRQ(28)
82#define IRQ_LPC32XX_USB_DEV_LP LPC32XX_SIC1_IRQ(29)
83#define IRQ_LPC32XX_USB_DEV_HP LPC32XX_SIC1_IRQ(30)
84#define IRQ_LPC32XX_USB_I2C LPC32XX_SIC1_IRQ(31)
85
86/*
87 * SIC2 interrupts start at offset 64
88 */
89#define IRQ_LPC32XX_GPIO_00 LPC32XX_SIC2_IRQ(0)
90#define IRQ_LPC32XX_GPIO_01 LPC32XX_SIC2_IRQ(1)
91#define IRQ_LPC32XX_GPIO_02 LPC32XX_SIC2_IRQ(2)
92#define IRQ_LPC32XX_GPIO_03 LPC32XX_SIC2_IRQ(3)
93#define IRQ_LPC32XX_GPIO_04 LPC32XX_SIC2_IRQ(4)
94#define IRQ_LPC32XX_GPIO_05 LPC32XX_SIC2_IRQ(5)
95#define IRQ_LPC32XX_SPI2_DATAIN LPC32XX_SIC2_IRQ(6)
96#define IRQ_LPC32XX_U2_HCTS LPC32XX_SIC2_IRQ(7)
97#define IRQ_LPC32XX_P0_P1_IRQ LPC32XX_SIC2_IRQ(8)
98#define IRQ_LPC32XX_GPI_08 LPC32XX_SIC2_IRQ(9)
99#define IRQ_LPC32XX_GPI_09 LPC32XX_SIC2_IRQ(10)
100#define IRQ_LPC32XX_GPI_19 LPC32XX_SIC2_IRQ(11)
101#define IRQ_LPC32XX_U7_HCTS LPC32XX_SIC2_IRQ(12)
102#define IRQ_LPC32XX_GPI_07 LPC32XX_SIC2_IRQ(15)
103#define IRQ_LPC32XX_SDIO LPC32XX_SIC2_IRQ(18)
104#define IRQ_LPC32XX_U5_RX LPC32XX_SIC2_IRQ(19)
105#define IRQ_LPC32XX_SPI1_DATAIN LPC32XX_SIC2_IRQ(20)
106#define IRQ_LPC32XX_GPI_00 LPC32XX_SIC2_IRQ(22)
107#define IRQ_LPC32XX_GPI_01 LPC32XX_SIC2_IRQ(23)
108#define IRQ_LPC32XX_GPI_02 LPC32XX_SIC2_IRQ(24)
109#define IRQ_LPC32XX_GPI_03 LPC32XX_SIC2_IRQ(25)
110#define IRQ_LPC32XX_GPI_04 LPC32XX_SIC2_IRQ(26)
111#define IRQ_LPC32XX_GPI_05 LPC32XX_SIC2_IRQ(27)
112#define IRQ_LPC32XX_GPI_06 LPC32XX_SIC2_IRQ(28)
113#define IRQ_LPC32XX_SYSCLK LPC32XX_SIC2_IRQ(31)
114
115#define LPC32XX_NR_IRQS 96
116
117#endif
diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c
index 207e81275ff0..62471570d586 100644
--- a/arch/arm/mach-lpc32xx/pm.c
+++ b/arch/arm/mach-lpc32xx/pm.c
@@ -73,7 +73,6 @@
73#include <mach/hardware.h> 73#include <mach/hardware.h>
74#include <mach/platform.h> 74#include <mach/platform.h>
75#include "common.h" 75#include "common.h"
76#include "clock.h"
77 76
78#define TEMP_IRAM_AREA IO_ADDRESS(LPC32XX_IRAM_BASE) 77#define TEMP_IRAM_AREA IO_ADDRESS(LPC32XX_IRAM_BASE)
79 78
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-25 02:44:05 -0400