diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-09-13 13:56:00 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-09-13 13:56:00 -0400 |
commit | 561a8eb3e1d219f415597c76dae44b530b7f961a (patch) | |
tree | dbeb3fc432535bd0b921cebaad32ad078d8c2c56 | |
parent | 2818d0d759bc3d763d834097292006d2da3271df (diff) | |
parent | b4be271cebb6f8b475f8bf2199091be8fe4c4278 (diff) |
Merge tag 'rtc-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Pull RTC updates from Alexandre Belloni:
"Subsystem:
- remove .open() and .release() RTC ops
- constify i2c_device_id
New driver:
- Realtek RTD1295
- Android emulator (goldfish) RTC
Drivers:
- ds1307: Beginning of a huge cleanup
- s35390a: handle invalid RTC time
- sun6i: external oscillator gate support"
* tag 'rtc-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (40 commits)
rtc: ds1307: use octal permissions
rtc: ds1307: fix braces
rtc: ds1307: fix alignments and blank lines
rtc: ds1307: use BIT
rtc: ds1307: use u32
rtc: ds1307: use sizeof
rtc: ds1307: remove regs member
rtc: Add Realtek RTD1295
dt-bindings: rtc: Add Realtek RTD1295
rtc: sun6i: Add support for the external oscillator gate
rtc: goldfish: Add RTC driver for Android emulator
dt-bindings: Add device tree binding for Goldfish RTC driver
rtc: ds1307: add basic support for ds1341 chip
rtc: ds1307: remove member nvram_offset from struct ds1307
rtc: ds1307: factor out offset to struct chip_desc
rtc: ds1307: factor out rtc_ops to struct chip_desc
rtc: ds1307: factor out irq_handler to struct chip_desc
rtc: ds1307: improve irq setup
rtc: ds1307: constify struct chip_desc variables
rtc: ds1307: improve trickle charger initialization
...
26 files changed, 953 insertions, 485 deletions
diff --git a/Documentation/devicetree/bindings/power/wakeup-source.txt b/Documentation/devicetree/bindings/power/wakeup-source.txt index 963c6dfd484d..3c81f78b5c27 100644 --- a/Documentation/devicetree/bindings/power/wakeup-source.txt +++ b/Documentation/devicetree/bindings/power/wakeup-source.txt | |||
@@ -20,13 +20,12 @@ List of legacy properties and respective binding document | |||
20 | 1. "enable-sdio-wakeup" Documentation/devicetree/bindings/mmc/mmc.txt | 20 | 1. "enable-sdio-wakeup" Documentation/devicetree/bindings/mmc/mmc.txt |
21 | 2. "gpio-key,wakeup" Documentation/devicetree/bindings/input/gpio-keys{,-polled}.txt | 21 | 2. "gpio-key,wakeup" Documentation/devicetree/bindings/input/gpio-keys{,-polled}.txt |
22 | 3. "has-tpo" Documentation/devicetree/bindings/rtc/rtc-opal.txt | 22 | 3. "has-tpo" Documentation/devicetree/bindings/rtc/rtc-opal.txt |
23 | 4. "isil,irq2-can-wakeup-machine" Documentation/devicetree/bindings/rtc/isil,isl12057.txt | 23 | 4. "linux,wakeup" Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt |
24 | 5. "linux,wakeup" Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt | ||
25 | Documentation/devicetree/bindings/mfd/tc3589x.txt | 24 | Documentation/devicetree/bindings/mfd/tc3589x.txt |
26 | Documentation/devicetree/bindings/input/ads7846.txt | 25 | Documentation/devicetree/bindings/input/ads7846.txt |
27 | 6. "linux,keypad-wakeup" Documentation/devicetree/bindings/input/qcom,pm8xxx-keypad.txt | 26 | 5. "linux,keypad-wakeup" Documentation/devicetree/bindings/input/qcom,pm8xxx-keypad.txt |
28 | 7. "linux,input-wakeup" Documentation/devicetree/bindings/input/samsung-keypad.txt | 27 | 6. "linux,input-wakeup" Documentation/devicetree/bindings/input/samsung-keypad.txt |
29 | 8. "nvidia,wakeup-source" Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt | 28 | 7. "nvidia,wakeup-source" Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt |
30 | 29 | ||
31 | Examples | 30 | Examples |
32 | -------- | 31 | -------- |
diff --git a/Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt b/Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt new file mode 100644 index 000000000000..634312dd95ca --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt | |||
@@ -0,0 +1,17 @@ | |||
1 | Android Goldfish RTC | ||
2 | |||
3 | Android Goldfish RTC device used by Android emulator. | ||
4 | |||
5 | Required properties: | ||
6 | |||
7 | - compatible : should contain "google,goldfish-rtc" | ||
8 | - reg : <registers mapping> | ||
9 | - interrupts : <interrupt mapping> | ||
10 | |||
11 | Example: | ||
12 | |||
13 | goldfish_timer@9020000 { | ||
14 | compatible = "google,goldfish-rtc"; | ||
15 | reg = <0x9020000 0x1000>; | ||
16 | interrupts = <0x3>; | ||
17 | }; | ||
diff --git a/Documentation/devicetree/bindings/rtc/isil,isl12057.txt b/Documentation/devicetree/bindings/rtc/isil,isl12057.txt index cf83e0940302..fbbdd92e5af9 100644 --- a/Documentation/devicetree/bindings/rtc/isil,isl12057.txt +++ b/Documentation/devicetree/bindings/rtc/isil,isl12057.txt | |||
@@ -24,7 +24,6 @@ Optional properties: | |||
24 | 24 | ||
25 | - "wakeup-source": mark the chip as a wakeup source, independently of | 25 | - "wakeup-source": mark the chip as a wakeup source, independently of |
26 | the availability of an IRQ line connected to the SoC. | 26 | the availability of an IRQ line connected to the SoC. |
27 | (Legacy property supported: "isil,irq2-can-wakeup-machine") | ||
28 | 27 | ||
29 | - "interrupt-parent", "interrupts": for passing the interrupt line | 28 | - "interrupt-parent", "interrupts": for passing the interrupt line |
30 | of the SoC connected to IRQ#2 of the RTC chip. | 29 | of the SoC connected to IRQ#2 of the RTC chip. |
diff --git a/Documentation/devicetree/bindings/rtc/realtek,rtd119x.txt b/Documentation/devicetree/bindings/rtc/realtek,rtd119x.txt new file mode 100644 index 000000000000..bbf1ccb5df31 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/realtek,rtd119x.txt | |||
@@ -0,0 +1,16 @@ | |||
1 | Realtek RTD129x Real-Time Clock | ||
2 | =============================== | ||
3 | |||
4 | Required properties: | ||
5 | - compatible : Should be "realtek,rtd1295-rtc" | ||
6 | - reg : Specifies the physical base address and size | ||
7 | - clocks : Specifies the clock gate | ||
8 | |||
9 | |||
10 | Example: | ||
11 | |||
12 | rtc@9801b600 { | ||
13 | compatible = "realtek,rtd1295-clk"; | ||
14 | reg = <0x9801b600 0x100>; | ||
15 | clocks = <&clkc RTD1295_CLK_EN_MISC_RTC>; | ||
16 | }; | ||
diff --git a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt index 945934918b71..d5e26d313f62 100644 --- a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt +++ b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt | |||
@@ -10,7 +10,7 @@ Required properties: | |||
10 | 10 | ||
11 | Required properties for new device trees | 11 | Required properties for new device trees |
12 | - clocks : phandle to the 32kHz external oscillator | 12 | - clocks : phandle to the 32kHz external oscillator |
13 | - clock-output-names : name of the LOSC clock created | 13 | - clock-output-names : names of the LOSC and its external output clocks created |
14 | - #clock-cells : must be equals to 1. The RTC provides two clocks: the | 14 | - #clock-cells : must be equals to 1. The RTC provides two clocks: the |
15 | LOSC and its external output, with index 0 and 1 | 15 | LOSC and its external output, with index 0 and 1 |
16 | respectively. | 16 | respectively. |
@@ -21,7 +21,7 @@ rtc: rtc@01f00000 { | |||
21 | compatible = "allwinner,sun6i-a31-rtc"; | 21 | compatible = "allwinner,sun6i-a31-rtc"; |
22 | reg = <0x01f00000 0x54>; | 22 | reg = <0x01f00000 0x54>; |
23 | interrupts = <0 40 4>, <0 41 4>; | 23 | interrupts = <0 40 4>, <0 41 4>; |
24 | clock-output-names = "osc32k"; | 24 | clock-output-names = "osc32k", "osc32k-out"; |
25 | clocks = <&ext_osc32k>; | 25 | clocks = <&ext_osc32k>; |
26 | #clock-cells = <1>; | 26 | #clock-cells = <1>; |
27 | }; | 27 | }; |
diff --git a/MAINTAINERS b/MAINTAINERS index f46a3225e398..048586a2a9be 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -855,6 +855,12 @@ S: Supported | |||
855 | F: drivers/android/ | 855 | F: drivers/android/ |
856 | F: drivers/staging/android/ | 856 | F: drivers/staging/android/ |
857 | 857 | ||
858 | ANDROID GOLDFISH RTC DRIVER | ||
859 | M: Miodrag Dinic <miodrag.dinic@imgtec.com> | ||
860 | S: Supported | ||
861 | F: Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt | ||
862 | F: drivers/rtc/rtc-goldfish.c | ||
863 | |||
858 | ANDROID ION DRIVER | 864 | ANDROID ION DRIVER |
859 | M: Laura Abbott <labbott@redhat.com> | 865 | M: Laura Abbott <labbott@redhat.com> |
860 | M: Sumit Semwal <sumit.semwal@linaro.org> | 866 | M: Sumit Semwal <sumit.semwal@linaro.org> |
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 72419ac2c52a..e0e58f3b1420 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
@@ -227,14 +227,14 @@ config RTC_DRV_AS3722 | |||
227 | will be called rtc-as3722. | 227 | will be called rtc-as3722. |
228 | 228 | ||
229 | config RTC_DRV_DS1307 | 229 | config RTC_DRV_DS1307 |
230 | tristate "Dallas/Maxim DS1307/37/38/39/40, ST M41T00, EPSON RX-8025, ISL12057" | 230 | tristate "Dallas/Maxim DS1307/37/38/39/40/41, ST M41T00, EPSON RX-8025, ISL12057" |
231 | help | 231 | help |
232 | If you say yes here you get support for various compatible RTC | 232 | If you say yes here you get support for various compatible RTC |
233 | chips (often with battery backup) connected with I2C. This driver | 233 | chips (often with battery backup) connected with I2C. This driver |
234 | should handle DS1307, DS1337, DS1338, DS1339, DS1340, ST M41T00, | 234 | should handle DS1307, DS1337, DS1338, DS1339, DS1340, DS1341, |
235 | EPSON RX-8025, Intersil ISL12057 and probably other chips. In some | 235 | ST M41T00, EPSON RX-8025, Intersil ISL12057 and probably other chips. |
236 | cases the RTC must already have been initialized (by manufacturing or | 236 | In some cases the RTC must already have been initialized (by |
237 | a bootloader). | 237 | manufacturing or a bootloader). |
238 | 238 | ||
239 | The first seven registers on these chips hold an RTC, and other | 239 | The first seven registers on these chips hold an RTC, and other |
240 | registers may add features such as NVRAM, a trickle charger for | 240 | registers may add features such as NVRAM, a trickle charger for |
@@ -371,11 +371,11 @@ config RTC_DRV_MAX77686 | |||
371 | will be called rtc-max77686. | 371 | will be called rtc-max77686. |
372 | 372 | ||
373 | config RTC_DRV_RK808 | 373 | config RTC_DRV_RK808 |
374 | tristate "Rockchip RK808/RK818 RTC" | 374 | tristate "Rockchip RK805/RK808/RK818 RTC" |
375 | depends on MFD_RK808 | 375 | depends on MFD_RK808 |
376 | help | 376 | help |
377 | If you say yes here you will get support for the | 377 | If you say yes here you will get support for the |
378 | RTC of RK808 and RK818 PMIC. | 378 | RTC of RK805, RK808 and RK818 PMIC. |
379 | 379 | ||
380 | This driver can also be built as a module. If so, the module | 380 | This driver can also be built as a module. If so, the module |
381 | will be called rk808-rtc. | 381 | will be called rk808-rtc. |
@@ -1765,6 +1765,14 @@ config RTC_DRV_CPCAP | |||
1765 | Say y here for CPCAP rtc found on some Motorola phones | 1765 | Say y here for CPCAP rtc found on some Motorola phones |
1766 | and tablets such as Droid 4. | 1766 | and tablets such as Droid 4. |
1767 | 1767 | ||
1768 | config RTC_DRV_RTD119X | ||
1769 | bool "Realtek RTD129x RTC" | ||
1770 | depends on ARCH_REALTEK || COMPILE_TEST | ||
1771 | default ARCH_REALTEK | ||
1772 | help | ||
1773 | If you say yes here, you get support for the RTD1295 SoC | ||
1774 | Real Time Clock. | ||
1775 | |||
1768 | comment "HID Sensor RTC drivers" | 1776 | comment "HID Sensor RTC drivers" |
1769 | 1777 | ||
1770 | config RTC_DRV_HID_SENSOR_TIME | 1778 | config RTC_DRV_HID_SENSOR_TIME |
@@ -1780,5 +1788,13 @@ config RTC_DRV_HID_SENSOR_TIME | |||
1780 | If this driver is compiled as a module, it will be named | 1788 | If this driver is compiled as a module, it will be named |
1781 | rtc-hid-sensor-time. | 1789 | rtc-hid-sensor-time. |
1782 | 1790 | ||
1791 | config RTC_DRV_GOLDFISH | ||
1792 | tristate "Goldfish Real Time Clock" | ||
1793 | depends on MIPS && (GOLDFISH || COMPILE_TEST) | ||
1794 | help | ||
1795 | Say yes to enable RTC driver for the Goldfish based virtual platform. | ||
1796 | |||
1797 | Goldfish is a code name for the virtual platform developed by Google | ||
1798 | for Android emulation. | ||
1783 | 1799 | ||
1784 | endif # RTC_CLASS | 1800 | endif # RTC_CLASS |
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index acd366b41c85..7230014c92af 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile | |||
@@ -131,6 +131,7 @@ obj-$(CONFIG_RTC_DRV_RP5C01) += rtc-rp5c01.o | |||
131 | obj-$(CONFIG_RTC_DRV_RS5C313) += rtc-rs5c313.o | 131 | obj-$(CONFIG_RTC_DRV_RS5C313) += rtc-rs5c313.o |
132 | obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o | 132 | obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o |
133 | obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o | 133 | obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o |
134 | obj-$(CONFIG_RTC_DRV_RTD119X) += rtc-rtd119x.o | ||
134 | obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o | 135 | obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o |
135 | obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o | 136 | obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o |
136 | obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o | 137 | obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o |
@@ -170,3 +171,4 @@ obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o | |||
170 | obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o | 171 | obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o |
171 | obj-$(CONFIG_RTC_DRV_XGENE) += rtc-xgene.o | 172 | obj-$(CONFIG_RTC_DRV_XGENE) += rtc-xgene.o |
172 | obj-$(CONFIG_RTC_DRV_ZYNQMP) += rtc-zynqmp.o | 173 | obj-$(CONFIG_RTC_DRV_ZYNQMP) += rtc-zynqmp.o |
174 | obj-$(CONFIG_RTC_DRV_GOLDFISH) += rtc-goldfish.o | ||
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c index 794bc4fa4937..00efe24a6063 100644 --- a/drivers/rtc/rtc-dev.c +++ b/drivers/rtc/rtc-dev.c | |||
@@ -24,28 +24,19 @@ static dev_t rtc_devt; | |||
24 | 24 | ||
25 | static int rtc_dev_open(struct inode *inode, struct file *file) | 25 | static int rtc_dev_open(struct inode *inode, struct file *file) |
26 | { | 26 | { |
27 | int err; | ||
28 | struct rtc_device *rtc = container_of(inode->i_cdev, | 27 | struct rtc_device *rtc = container_of(inode->i_cdev, |
29 | struct rtc_device, char_dev); | 28 | struct rtc_device, char_dev); |
30 | const struct rtc_class_ops *ops = rtc->ops; | ||
31 | 29 | ||
32 | if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags)) | 30 | if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags)) |
33 | return -EBUSY; | 31 | return -EBUSY; |
34 | 32 | ||
35 | file->private_data = rtc; | 33 | file->private_data = rtc; |
36 | 34 | ||
37 | err = ops->open ? ops->open(rtc->dev.parent) : 0; | 35 | spin_lock_irq(&rtc->irq_lock); |
38 | if (err == 0) { | 36 | rtc->irq_data = 0; |
39 | spin_lock_irq(&rtc->irq_lock); | 37 | spin_unlock_irq(&rtc->irq_lock); |
40 | rtc->irq_data = 0; | ||
41 | spin_unlock_irq(&rtc->irq_lock); | ||
42 | |||
43 | return 0; | ||
44 | } | ||
45 | 38 | ||
46 | /* something has gone wrong */ | 39 | return 0; |
47 | clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags); | ||
48 | return err; | ||
49 | } | 40 | } |
50 | 41 | ||
51 | #ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL | 42 | #ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL |
@@ -438,9 +429,6 @@ static int rtc_dev_release(struct inode *inode, struct file *file) | |||
438 | rtc_update_irq_enable(rtc, 0); | 429 | rtc_update_irq_enable(rtc, 0); |
439 | rtc_irq_set_state(rtc, NULL, 0); | 430 | rtc_irq_set_state(rtc, NULL, 0); |
440 | 431 | ||
441 | if (rtc->ops->release) | ||
442 | rtc->ops->release(rtc->dev.parent); | ||
443 | |||
444 | clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags); | 432 | clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags); |
445 | return 0; | 433 | return 0; |
446 | } | 434 | } |
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c index 4b43aa62fbc7..e7d9215c9201 100644 --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c | |||
@@ -39,6 +39,7 @@ enum ds_type { | |||
39 | ds_1338, | 39 | ds_1338, |
40 | ds_1339, | 40 | ds_1339, |
41 | ds_1340, | 41 | ds_1340, |
42 | ds_1341, | ||
42 | ds_1388, | 43 | ds_1388, |
43 | ds_3231, | 44 | ds_3231, |
44 | m41t0, | 45 | m41t0, |
@@ -50,7 +51,6 @@ enum ds_type { | |||
50 | /* rs5c372 too? different address... */ | 51 | /* rs5c372 too? different address... */ |
51 | }; | 52 | }; |
52 | 53 | ||
53 | |||
54 | /* RTC registers don't differ much, except for the century flag */ | 54 | /* RTC registers don't differ much, except for the century flag */ |
55 | #define DS1307_REG_SECS 0x00 /* 00-59 */ | 55 | #define DS1307_REG_SECS 0x00 /* 00-59 */ |
56 | # define DS1307_BIT_CH 0x80 | 56 | # define DS1307_BIT_CH 0x80 |
@@ -113,11 +113,7 @@ enum ds_type { | |||
113 | # define RX8025_BIT_VDET 0x40 | 113 | # define RX8025_BIT_VDET 0x40 |
114 | # define RX8025_BIT_XST 0x20 | 114 | # define RX8025_BIT_XST 0x20 |
115 | 115 | ||
116 | |||
117 | struct ds1307 { | 116 | struct ds1307 { |
118 | u8 offset; /* register's offset */ | ||
119 | u8 regs[11]; | ||
120 | u16 nvram_offset; | ||
121 | struct nvmem_config nvmem_cfg; | 117 | struct nvmem_config nvmem_cfg; |
122 | enum ds_type type; | 118 | enum ds_type type; |
123 | unsigned long flags; | 119 | unsigned long flags; |
@@ -126,7 +122,6 @@ struct ds1307 { | |||
126 | struct device *dev; | 122 | struct device *dev; |
127 | struct regmap *regmap; | 123 | struct regmap *regmap; |
128 | const char *name; | 124 | const char *name; |
129 | int irq; | ||
130 | struct rtc_device *rtc; | 125 | struct rtc_device *rtc; |
131 | #ifdef CONFIG_COMMON_CLK | 126 | #ifdef CONFIG_COMMON_CLK |
132 | struct clk_hw clks[2]; | 127 | struct clk_hw clks[2]; |
@@ -137,18 +132,47 @@ struct chip_desc { | |||
137 | unsigned alarm:1; | 132 | unsigned alarm:1; |
138 | u16 nvram_offset; | 133 | u16 nvram_offset; |
139 | u16 nvram_size; | 134 | u16 nvram_size; |
135 | u8 offset; /* register's offset */ | ||
140 | u8 century_reg; | 136 | u8 century_reg; |
141 | u8 century_enable_bit; | 137 | u8 century_enable_bit; |
142 | u8 century_bit; | 138 | u8 century_bit; |
139 | u8 bbsqi_bit; | ||
140 | irq_handler_t irq_handler; | ||
141 | const struct rtc_class_ops *rtc_ops; | ||
143 | u16 trickle_charger_reg; | 142 | u16 trickle_charger_reg; |
144 | u8 trickle_charger_setup; | 143 | u8 (*do_trickle_setup)(struct ds1307 *, u32, |
145 | u8 (*do_trickle_setup)(struct ds1307 *, uint32_t, | ||
146 | bool); | 144 | bool); |
147 | }; | 145 | }; |
148 | 146 | ||
149 | static u8 do_trickle_setup_ds1339(struct ds1307 *, uint32_t ohms, bool diode); | 147 | static int ds1307_get_time(struct device *dev, struct rtc_time *t); |
148 | static int ds1307_set_time(struct device *dev, struct rtc_time *t); | ||
149 | static u8 do_trickle_setup_ds1339(struct ds1307 *, u32 ohms, bool diode); | ||
150 | static irqreturn_t rx8130_irq(int irq, void *dev_id); | ||
151 | static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t); | ||
152 | static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t); | ||
153 | static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled); | ||
154 | static irqreturn_t mcp794xx_irq(int irq, void *dev_id); | ||
155 | static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t); | ||
156 | static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t); | ||
157 | static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled); | ||
150 | 158 | ||
151 | static struct chip_desc chips[last_ds_type] = { | 159 | static const struct rtc_class_ops rx8130_rtc_ops = { |
160 | .read_time = ds1307_get_time, | ||
161 | .set_time = ds1307_set_time, | ||
162 | .read_alarm = rx8130_read_alarm, | ||
163 | .set_alarm = rx8130_set_alarm, | ||
164 | .alarm_irq_enable = rx8130_alarm_irq_enable, | ||
165 | }; | ||
166 | |||
167 | static const struct rtc_class_ops mcp794xx_rtc_ops = { | ||
168 | .read_time = ds1307_get_time, | ||
169 | .set_time = ds1307_set_time, | ||
170 | .read_alarm = mcp794xx_read_alarm, | ||
171 | .set_alarm = mcp794xx_set_alarm, | ||
172 | .alarm_irq_enable = mcp794xx_alarm_irq_enable, | ||
173 | }; | ||
174 | |||
175 | static const struct chip_desc chips[last_ds_type] = { | ||
152 | [ds_1307] = { | 176 | [ds_1307] = { |
153 | .nvram_offset = 8, | 177 | .nvram_offset = 8, |
154 | .nvram_size = 56, | 178 | .nvram_size = 56, |
@@ -170,6 +194,7 @@ static struct chip_desc chips[last_ds_type] = { | |||
170 | .alarm = 1, | 194 | .alarm = 1, |
171 | .century_reg = DS1307_REG_MONTH, | 195 | .century_reg = DS1307_REG_MONTH, |
172 | .century_bit = DS1337_BIT_CENTURY, | 196 | .century_bit = DS1337_BIT_CENTURY, |
197 | .bbsqi_bit = DS1339_BIT_BBSQI, | ||
173 | .trickle_charger_reg = 0x10, | 198 | .trickle_charger_reg = 0x10, |
174 | .do_trickle_setup = &do_trickle_setup_ds1339, | 199 | .do_trickle_setup = &do_trickle_setup_ds1339, |
175 | }, | 200 | }, |
@@ -179,25 +204,36 @@ static struct chip_desc chips[last_ds_type] = { | |||
179 | .century_bit = DS1340_BIT_CENTURY, | 204 | .century_bit = DS1340_BIT_CENTURY, |
180 | .trickle_charger_reg = 0x08, | 205 | .trickle_charger_reg = 0x08, |
181 | }, | 206 | }, |
207 | [ds_1341] = { | ||
208 | .century_reg = DS1307_REG_MONTH, | ||
209 | .century_bit = DS1337_BIT_CENTURY, | ||
210 | }, | ||
182 | [ds_1388] = { | 211 | [ds_1388] = { |
212 | .offset = 1, | ||
183 | .trickle_charger_reg = 0x0a, | 213 | .trickle_charger_reg = 0x0a, |
184 | }, | 214 | }, |
185 | [ds_3231] = { | 215 | [ds_3231] = { |
186 | .alarm = 1, | 216 | .alarm = 1, |
187 | .century_reg = DS1307_REG_MONTH, | 217 | .century_reg = DS1307_REG_MONTH, |
188 | .century_bit = DS1337_BIT_CENTURY, | 218 | .century_bit = DS1337_BIT_CENTURY, |
219 | .bbsqi_bit = DS3231_BIT_BBSQW, | ||
189 | }, | 220 | }, |
190 | [rx_8130] = { | 221 | [rx_8130] = { |
191 | .alarm = 1, | 222 | .alarm = 1, |
192 | /* this is battery backed SRAM */ | 223 | /* this is battery backed SRAM */ |
193 | .nvram_offset = 0x20, | 224 | .nvram_offset = 0x20, |
194 | .nvram_size = 4, /* 32bit (4 word x 8 bit) */ | 225 | .nvram_size = 4, /* 32bit (4 word x 8 bit) */ |
226 | .offset = 0x10, | ||
227 | .irq_handler = rx8130_irq, | ||
228 | .rtc_ops = &rx8130_rtc_ops, | ||
195 | }, | 229 | }, |
196 | [mcp794xx] = { | 230 | [mcp794xx] = { |
197 | .alarm = 1, | 231 | .alarm = 1, |
198 | /* this is battery backed SRAM */ | 232 | /* this is battery backed SRAM */ |
199 | .nvram_offset = 0x20, | 233 | .nvram_offset = 0x20, |
200 | .nvram_size = 0x40, | 234 | .nvram_size = 0x40, |
235 | .irq_handler = mcp794xx_irq, | ||
236 | .rtc_ops = &mcp794xx_rtc_ops, | ||
201 | }, | 237 | }, |
202 | }; | 238 | }; |
203 | 239 | ||
@@ -209,6 +245,7 @@ static const struct i2c_device_id ds1307_id[] = { | |||
209 | { "ds1339", ds_1339 }, | 245 | { "ds1339", ds_1339 }, |
210 | { "ds1388", ds_1388 }, | 246 | { "ds1388", ds_1388 }, |
211 | { "ds1340", ds_1340 }, | 247 | { "ds1340", ds_1340 }, |
248 | { "ds1341", ds_1341 }, | ||
212 | { "ds3231", ds_3231 }, | 249 | { "ds3231", ds_3231 }, |
213 | { "m41t0", m41t0 }, | 250 | { "m41t0", m41t0 }, |
214 | { "m41t00", m41t00 }, | 251 | { "m41t00", m41t00 }, |
@@ -253,6 +290,10 @@ static const struct of_device_id ds1307_of_match[] = { | |||
253 | .data = (void *)ds_1340 | 290 | .data = (void *)ds_1340 |
254 | }, | 291 | }, |
255 | { | 292 | { |
293 | .compatible = "dallas,ds1341", | ||
294 | .data = (void *)ds_1341 | ||
295 | }, | ||
296 | { | ||
256 | .compatible = "maxim,ds3231", | 297 | .compatible = "maxim,ds3231", |
257 | .data = (void *)ds_3231 | 298 | .data = (void *)ds_3231 |
258 | }, | 299 | }, |
@@ -298,6 +339,7 @@ static const struct acpi_device_id ds1307_acpi_ids[] = { | |||
298 | { .id = "DS1339", .driver_data = ds_1339 }, | 339 | { .id = "DS1339", .driver_data = ds_1339 }, |
299 | { .id = "DS1388", .driver_data = ds_1388 }, | 340 | { .id = "DS1388", .driver_data = ds_1388 }, |
300 | { .id = "DS1340", .driver_data = ds_1340 }, | 341 | { .id = "DS1340", .driver_data = ds_1340 }, |
342 | { .id = "DS1341", .driver_data = ds_1341 }, | ||
301 | { .id = "DS3231", .driver_data = ds_3231 }, | 343 | { .id = "DS3231", .driver_data = ds_3231 }, |
302 | { .id = "M41T0", .driver_data = m41t0 }, | 344 | { .id = "M41T0", .driver_data = m41t0 }, |
303 | { .id = "M41T00", .driver_data = m41t00 }, | 345 | { .id = "M41T00", .driver_data = m41t00 }, |
@@ -352,34 +394,36 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t) | |||
352 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | 394 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
353 | int tmp, ret; | 395 | int tmp, ret; |
354 | const struct chip_desc *chip = &chips[ds1307->type]; | 396 | const struct chip_desc *chip = &chips[ds1307->type]; |
397 | u8 regs[7]; | ||
355 | 398 | ||
356 | /* read the RTC date and time registers all at once */ | 399 | /* read the RTC date and time registers all at once */ |
357 | ret = regmap_bulk_read(ds1307->regmap, ds1307->offset, ds1307->regs, 7); | 400 | ret = regmap_bulk_read(ds1307->regmap, chip->offset, regs, |
401 | sizeof(regs)); | ||
358 | if (ret) { | 402 | if (ret) { |
359 | dev_err(dev, "%s error %d\n", "read", ret); | 403 | dev_err(dev, "%s error %d\n", "read", ret); |
360 | return ret; | 404 | return ret; |
361 | } | 405 | } |
362 | 406 | ||
363 | dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs); | 407 | dev_dbg(dev, "%s: %7ph\n", "read", regs); |
364 | 408 | ||
365 | /* if oscillator fail bit is set, no data can be trusted */ | 409 | /* if oscillator fail bit is set, no data can be trusted */ |
366 | if (ds1307->type == m41t0 && | 410 | if (ds1307->type == m41t0 && |
367 | ds1307->regs[DS1307_REG_MIN] & M41T0_BIT_OF) { | 411 | regs[DS1307_REG_MIN] & M41T0_BIT_OF) { |
368 | dev_warn_once(dev, "oscillator failed, set time!\n"); | 412 | dev_warn_once(dev, "oscillator failed, set time!\n"); |
369 | return -EINVAL; | 413 | return -EINVAL; |
370 | } | 414 | } |
371 | 415 | ||
372 | t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f); | 416 | t->tm_sec = bcd2bin(regs[DS1307_REG_SECS] & 0x7f); |
373 | t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f); | 417 | t->tm_min = bcd2bin(regs[DS1307_REG_MIN] & 0x7f); |
374 | tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; | 418 | tmp = regs[DS1307_REG_HOUR] & 0x3f; |
375 | t->tm_hour = bcd2bin(tmp); | 419 | t->tm_hour = bcd2bin(tmp); |
376 | t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; | 420 | t->tm_wday = bcd2bin(regs[DS1307_REG_WDAY] & 0x07) - 1; |
377 | t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | 421 | t->tm_mday = bcd2bin(regs[DS1307_REG_MDAY] & 0x3f); |
378 | tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; | 422 | tmp = regs[DS1307_REG_MONTH] & 0x1f; |
379 | t->tm_mon = bcd2bin(tmp) - 1; | 423 | t->tm_mon = bcd2bin(tmp) - 1; |
380 | t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100; | 424 | t->tm_year = bcd2bin(regs[DS1307_REG_YEAR]) + 100; |
381 | 425 | ||
382 | if (ds1307->regs[chip->century_reg] & chip->century_bit && | 426 | if (regs[chip->century_reg] & chip->century_bit && |
383 | IS_ENABLED(CONFIG_RTC_DRV_DS1307_CENTURY)) | 427 | IS_ENABLED(CONFIG_RTC_DRV_DS1307_CENTURY)) |
384 | t->tm_year += 100; | 428 | t->tm_year += 100; |
385 | 429 | ||
@@ -399,7 +443,7 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t) | |||
399 | const struct chip_desc *chip = &chips[ds1307->type]; | 443 | const struct chip_desc *chip = &chips[ds1307->type]; |
400 | int result; | 444 | int result; |
401 | int tmp; | 445 | int tmp; |
402 | u8 *buf = ds1307->regs; | 446 | u8 regs[7]; |
403 | 447 | ||
404 | dev_dbg(dev, "%s secs=%d, mins=%d, " | 448 | dev_dbg(dev, "%s secs=%d, mins=%d, " |
405 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | 449 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", |
@@ -418,35 +462,36 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t) | |||
418 | return -EINVAL; | 462 | return -EINVAL; |
419 | #endif | 463 | #endif |
420 | 464 | ||
421 | buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec); | 465 | regs[DS1307_REG_SECS] = bin2bcd(t->tm_sec); |
422 | buf[DS1307_REG_MIN] = bin2bcd(t->tm_min); | 466 | regs[DS1307_REG_MIN] = bin2bcd(t->tm_min); |
423 | buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); | 467 | regs[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); |
424 | buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); | 468 | regs[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); |
425 | buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); | 469 | regs[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); |
426 | buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); | 470 | regs[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); |
427 | 471 | ||
428 | /* assume 20YY not 19YY */ | 472 | /* assume 20YY not 19YY */ |
429 | tmp = t->tm_year - 100; | 473 | tmp = t->tm_year - 100; |
430 | buf[DS1307_REG_YEAR] = bin2bcd(tmp); | 474 | regs[DS1307_REG_YEAR] = bin2bcd(tmp); |
431 | 475 | ||
432 | if (chip->century_enable_bit) | 476 | if (chip->century_enable_bit) |
433 | buf[chip->century_reg] |= chip->century_enable_bit; | 477 | regs[chip->century_reg] |= chip->century_enable_bit; |
434 | if (t->tm_year > 199 && chip->century_bit) | 478 | if (t->tm_year > 199 && chip->century_bit) |
435 | buf[chip->century_reg] |= chip->century_bit; | 479 | regs[chip->century_reg] |= chip->century_bit; |
436 | 480 | ||
437 | if (ds1307->type == mcp794xx) { | 481 | if (ds1307->type == mcp794xx) { |
438 | /* | 482 | /* |
439 | * these bits were cleared when preparing the date/time | 483 | * these bits were cleared when preparing the date/time |
440 | * values and need to be set again before writing the | 484 | * values and need to be set again before writing the |
441 | * buffer out to the device. | 485 | * regsfer out to the device. |
442 | */ | 486 | */ |
443 | buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST; | 487 | regs[DS1307_REG_SECS] |= MCP794XX_BIT_ST; |
444 | buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN; | 488 | regs[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN; |
445 | } | 489 | } |
446 | 490 | ||
447 | dev_dbg(dev, "%s: %7ph\n", "write", buf); | 491 | dev_dbg(dev, "%s: %7ph\n", "write", regs); |
448 | 492 | ||
449 | result = regmap_bulk_write(ds1307->regmap, ds1307->offset, buf, 7); | 493 | result = regmap_bulk_write(ds1307->regmap, chip->offset, regs, |
494 | sizeof(regs)); | ||
450 | if (result) { | 495 | if (result) { |
451 | dev_err(dev, "%s error %d\n", "write", result); | 496 | dev_err(dev, "%s error %d\n", "write", result); |
452 | return result; | 497 | return result; |
@@ -458,33 +503,34 @@ static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
458 | { | 503 | { |
459 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | 504 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
460 | int ret; | 505 | int ret; |
506 | u8 regs[9]; | ||
461 | 507 | ||
462 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | 508 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
463 | return -EINVAL; | 509 | return -EINVAL; |
464 | 510 | ||
465 | /* read all ALARM1, ALARM2, and status registers at once */ | 511 | /* read all ALARM1, ALARM2, and status registers at once */ |
466 | ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, | 512 | ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, |
467 | ds1307->regs, 9); | 513 | regs, sizeof(regs)); |
468 | if (ret) { | 514 | if (ret) { |
469 | dev_err(dev, "%s error %d\n", "alarm read", ret); | 515 | dev_err(dev, "%s error %d\n", "alarm read", ret); |
470 | return ret; | 516 | return ret; |
471 | } | 517 | } |
472 | 518 | ||
473 | dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read", | 519 | dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read", |
474 | &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]); | 520 | ®s[0], ®s[4], ®s[7]); |
475 | 521 | ||
476 | /* | 522 | /* |
477 | * report alarm time (ALARM1); assume 24 hour and day-of-month modes, | 523 | * report alarm time (ALARM1); assume 24 hour and day-of-month modes, |
478 | * and that all four fields are checked matches | 524 | * and that all four fields are checked matches |
479 | */ | 525 | */ |
480 | t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); | 526 | t->time.tm_sec = bcd2bin(regs[0] & 0x7f); |
481 | t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); | 527 | t->time.tm_min = bcd2bin(regs[1] & 0x7f); |
482 | t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); | 528 | t->time.tm_hour = bcd2bin(regs[2] & 0x3f); |
483 | t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); | 529 | t->time.tm_mday = bcd2bin(regs[3] & 0x3f); |
484 | 530 | ||
485 | /* ... and status */ | 531 | /* ... and status */ |
486 | t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); | 532 | t->enabled = !!(regs[7] & DS1337_BIT_A1IE); |
487 | t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); | 533 | t->pending = !!(regs[8] & DS1337_BIT_A1I); |
488 | 534 | ||
489 | dev_dbg(dev, "%s secs=%d, mins=%d, " | 535 | dev_dbg(dev, "%s secs=%d, mins=%d, " |
490 | "hours=%d, mday=%d, enabled=%d, pending=%d\n", | 536 | "hours=%d, mday=%d, enabled=%d, pending=%d\n", |
@@ -498,7 +544,7 @@ static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
498 | static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) | 544 | static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
499 | { | 545 | { |
500 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | 546 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
501 | unsigned char *buf = ds1307->regs; | 547 | unsigned char regs[9]; |
502 | u8 control, status; | 548 | u8 control, status; |
503 | int ret; | 549 | int ret; |
504 | 550 | ||
@@ -512,33 +558,35 @@ static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
512 | t->enabled, t->pending); | 558 | t->enabled, t->pending); |
513 | 559 | ||
514 | /* read current status of both alarms and the chip */ | 560 | /* read current status of both alarms and the chip */ |
515 | ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, buf, 9); | 561 | ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs, |
562 | sizeof(regs)); | ||
516 | if (ret) { | 563 | if (ret) { |
517 | dev_err(dev, "%s error %d\n", "alarm write", ret); | 564 | dev_err(dev, "%s error %d\n", "alarm write", ret); |
518 | return ret; | 565 | return ret; |
519 | } | 566 | } |
520 | control = ds1307->regs[7]; | 567 | control = regs[7]; |
521 | status = ds1307->regs[8]; | 568 | status = regs[8]; |
522 | 569 | ||
523 | dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)", | 570 | dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)", |
524 | &ds1307->regs[0], &ds1307->regs[4], control, status); | 571 | ®s[0], ®s[4], control, status); |
525 | 572 | ||
526 | /* set ALARM1, using 24 hour and day-of-month modes */ | 573 | /* set ALARM1, using 24 hour and day-of-month modes */ |
527 | buf[0] = bin2bcd(t->time.tm_sec); | 574 | regs[0] = bin2bcd(t->time.tm_sec); |
528 | buf[1] = bin2bcd(t->time.tm_min); | 575 | regs[1] = bin2bcd(t->time.tm_min); |
529 | buf[2] = bin2bcd(t->time.tm_hour); | 576 | regs[2] = bin2bcd(t->time.tm_hour); |
530 | buf[3] = bin2bcd(t->time.tm_mday); | 577 | regs[3] = bin2bcd(t->time.tm_mday); |
531 | 578 | ||
532 | /* set ALARM2 to non-garbage */ | 579 | /* set ALARM2 to non-garbage */ |
533 | buf[4] = 0; | 580 | regs[4] = 0; |
534 | buf[5] = 0; | 581 | regs[5] = 0; |
535 | buf[6] = 0; | 582 | regs[6] = 0; |
536 | 583 | ||
537 | /* disable alarms */ | 584 | /* disable alarms */ |
538 | buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); | 585 | regs[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); |
539 | buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); | 586 | regs[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); |
540 | 587 | ||
541 | ret = regmap_bulk_write(ds1307->regmap, DS1339_REG_ALARM1_SECS, buf, 9); | 588 | ret = regmap_bulk_write(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs, |
589 | sizeof(regs)); | ||
542 | if (ret) { | 590 | if (ret) { |
543 | dev_err(dev, "can't set alarm time\n"); | 591 | dev_err(dev, "can't set alarm time\n"); |
544 | return ret; | 592 | return ret; |
@@ -547,8 +595,8 @@ static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
547 | /* optionally enable ALARM1 */ | 595 | /* optionally enable ALARM1 */ |
548 | if (t->enabled) { | 596 | if (t->enabled) { |
549 | dev_dbg(dev, "alarm IRQ armed\n"); | 597 | dev_dbg(dev, "alarm IRQ armed\n"); |
550 | buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ | 598 | regs[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ |
551 | regmap_write(ds1307->regmap, DS1337_REG_CONTROL, buf[7]); | 599 | regmap_write(ds1307->regmap, DS1337_REG_CONTROL, regs[7]); |
552 | } | 600 | } |
553 | 601 | ||
554 | return 0; | 602 | return 0; |
@@ -584,11 +632,11 @@ static const struct rtc_class_ops ds13xx_rtc_ops = { | |||
584 | #define RX8130_REG_ALARM_HOUR 0x08 | 632 | #define RX8130_REG_ALARM_HOUR 0x08 |
585 | #define RX8130_REG_ALARM_WEEK_OR_DAY 0x09 | 633 | #define RX8130_REG_ALARM_WEEK_OR_DAY 0x09 |
586 | #define RX8130_REG_EXTENSION 0x0c | 634 | #define RX8130_REG_EXTENSION 0x0c |
587 | #define RX8130_REG_EXTENSION_WADA (1 << 3) | 635 | #define RX8130_REG_EXTENSION_WADA BIT(3) |
588 | #define RX8130_REG_FLAG 0x0d | 636 | #define RX8130_REG_FLAG 0x0d |
589 | #define RX8130_REG_FLAG_AF (1 << 3) | 637 | #define RX8130_REG_FLAG_AF BIT(3) |
590 | #define RX8130_REG_CONTROL0 0x0e | 638 | #define RX8130_REG_CONTROL0 0x0e |
591 | #define RX8130_REG_CONTROL0_AIE (1 << 3) | 639 | #define RX8130_REG_CONTROL0_AIE BIT(3) |
592 | 640 | ||
593 | static irqreturn_t rx8130_irq(int irq, void *dev_id) | 641 | static irqreturn_t rx8130_irq(int irq, void *dev_id) |
594 | { | 642 | { |
@@ -600,7 +648,8 @@ static irqreturn_t rx8130_irq(int irq, void *dev_id) | |||
600 | mutex_lock(lock); | 648 | mutex_lock(lock); |
601 | 649 | ||
602 | /* Read control registers. */ | 650 | /* Read control registers. */ |
603 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3); | 651 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
652 | sizeof(ctl)); | ||
604 | if (ret < 0) | 653 | if (ret < 0) |
605 | goto out; | 654 | goto out; |
606 | if (!(ctl[1] & RX8130_REG_FLAG_AF)) | 655 | if (!(ctl[1] & RX8130_REG_FLAG_AF)) |
@@ -608,7 +657,8 @@ static irqreturn_t rx8130_irq(int irq, void *dev_id) | |||
608 | ctl[1] &= ~RX8130_REG_FLAG_AF; | 657 | ctl[1] &= ~RX8130_REG_FLAG_AF; |
609 | ctl[2] &= ~RX8130_REG_CONTROL0_AIE; | 658 | ctl[2] &= ~RX8130_REG_CONTROL0_AIE; |
610 | 659 | ||
611 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3); | 660 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
661 | sizeof(ctl)); | ||
612 | if (ret < 0) | 662 | if (ret < 0) |
613 | goto out; | 663 | goto out; |
614 | 664 | ||
@@ -630,12 +680,14 @@ static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
630 | return -EINVAL; | 680 | return -EINVAL; |
631 | 681 | ||
632 | /* Read alarm registers. */ | 682 | /* Read alarm registers. */ |
633 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, 3); | 683 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, |
684 | sizeof(ald)); | ||
634 | if (ret < 0) | 685 | if (ret < 0) |
635 | return ret; | 686 | return ret; |
636 | 687 | ||
637 | /* Read control registers. */ | 688 | /* Read control registers. */ |
638 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3); | 689 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
690 | sizeof(ctl)); | ||
639 | if (ret < 0) | 691 | if (ret < 0) |
640 | return ret; | 692 | return ret; |
641 | 693 | ||
@@ -676,7 +728,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
676 | t->enabled, t->pending); | 728 | t->enabled, t->pending); |
677 | 729 | ||
678 | /* Read control registers. */ | 730 | /* Read control registers. */ |
679 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3); | 731 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
732 | sizeof(ctl)); | ||
680 | if (ret < 0) | 733 | if (ret < 0) |
681 | return ret; | 734 | return ret; |
682 | 735 | ||
@@ -684,7 +737,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
684 | ctl[1] |= RX8130_REG_FLAG_AF; | 737 | ctl[1] |= RX8130_REG_FLAG_AF; |
685 | ctl[2] &= ~RX8130_REG_CONTROL0_AIE; | 738 | ctl[2] &= ~RX8130_REG_CONTROL0_AIE; |
686 | 739 | ||
687 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3); | 740 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
741 | sizeof(ctl)); | ||
688 | if (ret < 0) | 742 | if (ret < 0) |
689 | return ret; | 743 | return ret; |
690 | 744 | ||
@@ -693,7 +747,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
693 | ald[1] = bin2bcd(t->time.tm_hour); | 747 | ald[1] = bin2bcd(t->time.tm_hour); |
694 | ald[2] = bin2bcd(t->time.tm_mday); | 748 | ald[2] = bin2bcd(t->time.tm_mday); |
695 | 749 | ||
696 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, 3); | 750 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, |
751 | sizeof(ald)); | ||
697 | if (ret < 0) | 752 | if (ret < 0) |
698 | return ret; | 753 | return ret; |
699 | 754 | ||
@@ -702,7 +757,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
702 | 757 | ||
703 | ctl[2] |= RX8130_REG_CONTROL0_AIE; | 758 | ctl[2] |= RX8130_REG_CONTROL0_AIE; |
704 | 759 | ||
705 | return regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3); | 760 | return regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
761 | sizeof(ctl)); | ||
706 | } | 762 | } |
707 | 763 | ||
708 | static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled) | 764 | static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled) |
@@ -725,14 +781,6 @@ static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled) | |||
725 | return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, reg); | 781 | return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, reg); |
726 | } | 782 | } |
727 | 783 | ||
728 | static const struct rtc_class_ops rx8130_rtc_ops = { | ||
729 | .read_time = ds1307_get_time, | ||
730 | .set_time = ds1307_set_time, | ||
731 | .read_alarm = rx8130_read_alarm, | ||
732 | .set_alarm = rx8130_set_alarm, | ||
733 | .alarm_irq_enable = rx8130_alarm_irq_enable, | ||
734 | }; | ||
735 | |||
736 | /*----------------------------------------------------------------------*/ | 784 | /*----------------------------------------------------------------------*/ |
737 | 785 | ||
738 | /* | 786 | /* |
@@ -748,11 +796,11 @@ static const struct rtc_class_ops rx8130_rtc_ops = { | |||
748 | #define MCP794XX_REG_ALARM0_CTRL 0x0d | 796 | #define MCP794XX_REG_ALARM0_CTRL 0x0d |
749 | #define MCP794XX_REG_ALARM1_BASE 0x11 | 797 | #define MCP794XX_REG_ALARM1_BASE 0x11 |
750 | #define MCP794XX_REG_ALARM1_CTRL 0x14 | 798 | #define MCP794XX_REG_ALARM1_CTRL 0x14 |
751 | # define MCP794XX_BIT_ALMX_IF (1 << 3) | 799 | # define MCP794XX_BIT_ALMX_IF BIT(3) |
752 | # define MCP794XX_BIT_ALMX_C0 (1 << 4) | 800 | # define MCP794XX_BIT_ALMX_C0 BIT(4) |
753 | # define MCP794XX_BIT_ALMX_C1 (1 << 5) | 801 | # define MCP794XX_BIT_ALMX_C1 BIT(5) |
754 | # define MCP794XX_BIT_ALMX_C2 (1 << 6) | 802 | # define MCP794XX_BIT_ALMX_C2 BIT(6) |
755 | # define MCP794XX_BIT_ALMX_POL (1 << 7) | 803 | # define MCP794XX_BIT_ALMX_POL BIT(7) |
756 | # define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \ | 804 | # define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \ |
757 | MCP794XX_BIT_ALMX_C1 | \ | 805 | MCP794XX_BIT_ALMX_C1 | \ |
758 | MCP794XX_BIT_ALMX_C2) | 806 | MCP794XX_BIT_ALMX_C2) |
@@ -793,37 +841,38 @@ out: | |||
793 | static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t) | 841 | static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
794 | { | 842 | { |
795 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | 843 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
796 | u8 *regs = ds1307->regs; | 844 | u8 regs[10]; |
797 | int ret; | 845 | int ret; |
798 | 846 | ||
799 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | 847 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
800 | return -EINVAL; | 848 | return -EINVAL; |
801 | 849 | ||
802 | /* Read control and alarm 0 registers. */ | 850 | /* Read control and alarm 0 registers. */ |
803 | ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, 10); | 851 | ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, |
852 | sizeof(regs)); | ||
804 | if (ret) | 853 | if (ret) |
805 | return ret; | 854 | return ret; |
806 | 855 | ||
807 | t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN); | 856 | t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN); |
808 | 857 | ||
809 | /* Report alarm 0 time assuming 24-hour and day-of-month modes. */ | 858 | /* Report alarm 0 time assuming 24-hour and day-of-month modes. */ |
810 | t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f); | 859 | t->time.tm_sec = bcd2bin(regs[3] & 0x7f); |
811 | t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f); | 860 | t->time.tm_min = bcd2bin(regs[4] & 0x7f); |
812 | t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f); | 861 | t->time.tm_hour = bcd2bin(regs[5] & 0x3f); |
813 | t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1; | 862 | t->time.tm_wday = bcd2bin(regs[6] & 0x7) - 1; |
814 | t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f); | 863 | t->time.tm_mday = bcd2bin(regs[7] & 0x3f); |
815 | t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1; | 864 | t->time.tm_mon = bcd2bin(regs[8] & 0x1f) - 1; |
816 | t->time.tm_year = -1; | 865 | t->time.tm_year = -1; |
817 | t->time.tm_yday = -1; | 866 | t->time.tm_yday = -1; |
818 | t->time.tm_isdst = -1; | 867 | t->time.tm_isdst = -1; |
819 | 868 | ||
820 | dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " | 869 | dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " |
821 | "enabled=%d polarity=%d irq=%d match=%d\n", __func__, | 870 | "enabled=%d polarity=%d irq=%d match=%lu\n", __func__, |
822 | t->time.tm_sec, t->time.tm_min, t->time.tm_hour, | 871 | t->time.tm_sec, t->time.tm_min, t->time.tm_hour, |
823 | t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled, | 872 | t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled, |
824 | !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL), | 873 | !!(regs[6] & MCP794XX_BIT_ALMX_POL), |
825 | !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF), | 874 | !!(regs[6] & MCP794XX_BIT_ALMX_IF), |
826 | (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4); | 875 | (regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4); |
827 | 876 | ||
828 | return 0; | 877 | return 0; |
829 | } | 878 | } |
@@ -831,7 +880,7 @@ static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
831 | static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t) | 880 | static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
832 | { | 881 | { |
833 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | 882 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
834 | unsigned char *regs = ds1307->regs; | 883 | unsigned char regs[10]; |
835 | int ret; | 884 | int ret; |
836 | 885 | ||
837 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | 886 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
@@ -844,7 +893,8 @@ static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
844 | t->enabled, t->pending); | 893 | t->enabled, t->pending); |
845 | 894 | ||
846 | /* Read control and alarm 0 registers. */ | 895 | /* Read control and alarm 0 registers. */ |
847 | ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, 10); | 896 | ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, |
897 | sizeof(regs)); | ||
848 | if (ret) | 898 | if (ret) |
849 | return ret; | 899 | return ret; |
850 | 900 | ||
@@ -863,7 +913,8 @@ static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
863 | /* Disable interrupt. We will not enable until completely programmed */ | 913 | /* Disable interrupt. We will not enable until completely programmed */ |
864 | regs[0] &= ~MCP794XX_BIT_ALM0_EN; | 914 | regs[0] &= ~MCP794XX_BIT_ALM0_EN; |
865 | 915 | ||
866 | ret = regmap_bulk_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs, 10); | 916 | ret = regmap_bulk_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs, |
917 | sizeof(regs)); | ||
867 | if (ret) | 918 | if (ret) |
868 | return ret; | 919 | return ret; |
869 | 920 | ||
@@ -885,22 +936,15 @@ static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled) | |||
885 | enabled ? MCP794XX_BIT_ALM0_EN : 0); | 936 | enabled ? MCP794XX_BIT_ALM0_EN : 0); |
886 | } | 937 | } |
887 | 938 | ||
888 | static const struct rtc_class_ops mcp794xx_rtc_ops = { | ||
889 | .read_time = ds1307_get_time, | ||
890 | .set_time = ds1307_set_time, | ||
891 | .read_alarm = mcp794xx_read_alarm, | ||
892 | .set_alarm = mcp794xx_set_alarm, | ||
893 | .alarm_irq_enable = mcp794xx_alarm_irq_enable, | ||
894 | }; | ||
895 | |||
896 | /*----------------------------------------------------------------------*/ | 939 | /*----------------------------------------------------------------------*/ |
897 | 940 | ||
898 | static int ds1307_nvram_read(void *priv, unsigned int offset, void *val, | 941 | static int ds1307_nvram_read(void *priv, unsigned int offset, void *val, |
899 | size_t bytes) | 942 | size_t bytes) |
900 | { | 943 | { |
901 | struct ds1307 *ds1307 = priv; | 944 | struct ds1307 *ds1307 = priv; |
945 | const struct chip_desc *chip = &chips[ds1307->type]; | ||
902 | 946 | ||
903 | return regmap_bulk_read(ds1307->regmap, ds1307->nvram_offset + offset, | 947 | return regmap_bulk_read(ds1307->regmap, chip->nvram_offset + offset, |
904 | val, bytes); | 948 | val, bytes); |
905 | } | 949 | } |
906 | 950 | ||
@@ -908,15 +952,16 @@ static int ds1307_nvram_write(void *priv, unsigned int offset, void *val, | |||
908 | size_t bytes) | 952 | size_t bytes) |
909 | { | 953 | { |
910 | struct ds1307 *ds1307 = priv; | 954 | struct ds1307 *ds1307 = priv; |
955 | const struct chip_desc *chip = &chips[ds1307->type]; | ||
911 | 956 | ||
912 | return regmap_bulk_write(ds1307->regmap, ds1307->nvram_offset + offset, | 957 | return regmap_bulk_write(ds1307->regmap, chip->nvram_offset + offset, |
913 | val, bytes); | 958 | val, bytes); |
914 | } | 959 | } |
915 | 960 | ||
916 | /*----------------------------------------------------------------------*/ | 961 | /*----------------------------------------------------------------------*/ |
917 | 962 | ||
918 | static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307, | 963 | static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307, |
919 | uint32_t ohms, bool diode) | 964 | u32 ohms, bool diode) |
920 | { | 965 | { |
921 | u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE : | 966 | u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE : |
922 | DS1307_TRICKLE_CHARGER_NO_DIODE; | 967 | DS1307_TRICKLE_CHARGER_NO_DIODE; |
@@ -939,23 +984,23 @@ static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307, | |||
939 | return setup; | 984 | return setup; |
940 | } | 985 | } |
941 | 986 | ||
942 | static void ds1307_trickle_init(struct ds1307 *ds1307, | 987 | static u8 ds1307_trickle_init(struct ds1307 *ds1307, |
943 | struct chip_desc *chip) | 988 | const struct chip_desc *chip) |
944 | { | 989 | { |
945 | uint32_t ohms = 0; | 990 | u32 ohms; |
946 | bool diode = true; | 991 | bool diode = true; |
947 | 992 | ||
948 | if (!chip->do_trickle_setup) | 993 | if (!chip->do_trickle_setup) |
949 | goto out; | 994 | return 0; |
995 | |||
950 | if (device_property_read_u32(ds1307->dev, "trickle-resistor-ohms", | 996 | if (device_property_read_u32(ds1307->dev, "trickle-resistor-ohms", |
951 | &ohms)) | 997 | &ohms)) |
952 | goto out; | 998 | return 0; |
999 | |||
953 | if (device_property_read_bool(ds1307->dev, "trickle-diode-disable")) | 1000 | if (device_property_read_bool(ds1307->dev, "trickle-diode-disable")) |
954 | diode = false; | 1001 | diode = false; |
955 | chip->trickle_charger_setup = chip->do_trickle_setup(ds1307, | 1002 | |
956 | ohms, diode); | 1003 | return chip->do_trickle_setup(ds1307, ohms, diode); |
957 | out: | ||
958 | return; | ||
959 | } | 1004 | } |
960 | 1005 | ||
961 | /*----------------------------------------------------------------------*/ | 1006 | /*----------------------------------------------------------------------*/ |
@@ -995,7 +1040,7 @@ static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC) | |||
995 | } | 1040 | } |
996 | 1041 | ||
997 | static ssize_t ds3231_hwmon_show_temp(struct device *dev, | 1042 | static ssize_t ds3231_hwmon_show_temp(struct device *dev, |
998 | struct device_attribute *attr, char *buf) | 1043 | struct device_attribute *attr, char *buf) |
999 | { | 1044 | { |
1000 | int ret; | 1045 | int ret; |
1001 | s32 temp; | 1046 | s32 temp; |
@@ -1006,8 +1051,8 @@ static ssize_t ds3231_hwmon_show_temp(struct device *dev, | |||
1006 | 1051 | ||
1007 | return sprintf(buf, "%d\n", temp); | 1052 | return sprintf(buf, "%d\n", temp); |
1008 | } | 1053 | } |
1009 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp, | 1054 | static SENSOR_DEVICE_ATTR(temp1_input, 0444, ds3231_hwmon_show_temp, |
1010 | NULL, 0); | 1055 | NULL, 0); |
1011 | 1056 | ||
1012 | static struct attribute *ds3231_hwmon_attrs[] = { | 1057 | static struct attribute *ds3231_hwmon_attrs[] = { |
1013 | &sensor_dev_attr_temp1_input.dev_attr.attr, | 1058 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
@@ -1023,7 +1068,8 @@ static void ds1307_hwmon_register(struct ds1307 *ds1307) | |||
1023 | return; | 1068 | return; |
1024 | 1069 | ||
1025 | dev = devm_hwmon_device_register_with_groups(ds1307->dev, ds1307->name, | 1070 | dev = devm_hwmon_device_register_with_groups(ds1307->dev, ds1307->name, |
1026 | ds1307, ds3231_hwmon_groups); | 1071 | ds1307, |
1072 | ds3231_hwmon_groups); | ||
1027 | if (IS_ERR(dev)) { | 1073 | if (IS_ERR(dev)) { |
1028 | dev_warn(ds1307->dev, "unable to register hwmon device %ld\n", | 1074 | dev_warn(ds1307->dev, "unable to register hwmon device %ld\n", |
1029 | PTR_ERR(dev)); | 1075 | PTR_ERR(dev)); |
@@ -1095,7 +1141,7 @@ static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw, | |||
1095 | } | 1141 | } |
1096 | 1142 | ||
1097 | static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate, | 1143 | static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate, |
1098 | unsigned long *prate) | 1144 | unsigned long *prate) |
1099 | { | 1145 | { |
1100 | int i; | 1146 | int i; |
1101 | 1147 | ||
@@ -1108,7 +1154,7 @@ static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate, | |||
1108 | } | 1154 | } |
1109 | 1155 | ||
1110 | static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate, | 1156 | static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate, |
1111 | unsigned long parent_rate) | 1157 | unsigned long parent_rate) |
1112 | { | 1158 | { |
1113 | struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw); | 1159 | struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw); |
1114 | int control = 0; | 1160 | int control = 0; |
@@ -1168,7 +1214,7 @@ static const struct clk_ops ds3231_clk_sqw_ops = { | |||
1168 | }; | 1214 | }; |
1169 | 1215 | ||
1170 | static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw, | 1216 | static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw, |
1171 | unsigned long parent_rate) | 1217 | unsigned long parent_rate) |
1172 | { | 1218 | { |
1173 | return 32768; | 1219 | return 32768; |
1174 | } | 1220 | } |
@@ -1259,7 +1305,7 @@ static int ds3231_clks_register(struct ds1307 *ds1307) | |||
1259 | 1305 | ||
1260 | /* optional override of the clockname */ | 1306 | /* optional override of the clockname */ |
1261 | of_property_read_string_index(node, "clock-output-names", i, | 1307 | of_property_read_string_index(node, "clock-output-names", i, |
1262 | &init.name); | 1308 | &init.name); |
1263 | ds1307->clks[i].init = &init; | 1309 | ds1307->clks[i].init = &init; |
1264 | 1310 | ||
1265 | onecell->clks[i] = devm_clk_register(ds1307->dev, | 1311 | onecell->clks[i] = devm_clk_register(ds1307->dev, |
@@ -1309,22 +1355,14 @@ static int ds1307_probe(struct i2c_client *client, | |||
1309 | struct ds1307 *ds1307; | 1355 | struct ds1307 *ds1307; |
1310 | int err = -ENODEV; | 1356 | int err = -ENODEV; |
1311 | int tmp, wday; | 1357 | int tmp, wday; |
1312 | struct chip_desc *chip; | 1358 | const struct chip_desc *chip; |
1313 | bool want_irq = false; | 1359 | bool want_irq; |
1314 | bool ds1307_can_wakeup_device = false; | 1360 | bool ds1307_can_wakeup_device = false; |
1315 | unsigned char *buf; | 1361 | unsigned char regs[8]; |
1316 | struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev); | 1362 | struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev); |
1317 | struct rtc_time tm; | 1363 | struct rtc_time tm; |
1318 | unsigned long timestamp; | 1364 | unsigned long timestamp; |
1319 | 1365 | u8 trickle_charger_setup = 0; | |
1320 | irq_handler_t irq_handler = ds1307_irq; | ||
1321 | |||
1322 | static const int bbsqi_bitpos[] = { | ||
1323 | [ds_1337] = 0, | ||
1324 | [ds_1339] = DS1339_BIT_BBSQI, | ||
1325 | [ds_3231] = DS3231_BIT_BBSQW, | ||
1326 | }; | ||
1327 | const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops; | ||
1328 | 1366 | ||
1329 | ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL); | 1367 | ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL); |
1330 | if (!ds1307) | 1368 | if (!ds1307) |
@@ -1333,7 +1371,6 @@ static int ds1307_probe(struct i2c_client *client, | |||
1333 | dev_set_drvdata(&client->dev, ds1307); | 1371 | dev_set_drvdata(&client->dev, ds1307); |
1334 | ds1307->dev = &client->dev; | 1372 | ds1307->dev = &client->dev; |
1335 | ds1307->name = client->name; | 1373 | ds1307->name = client->name; |
1336 | ds1307->irq = client->irq; | ||
1337 | 1374 | ||
1338 | ds1307->regmap = devm_regmap_init_i2c(client, ®map_config); | 1375 | ds1307->regmap = devm_regmap_init_i2c(client, ®map_config); |
1339 | if (IS_ERR(ds1307->regmap)) { | 1376 | if (IS_ERR(ds1307->regmap)) { |
@@ -1361,23 +1398,22 @@ static int ds1307_probe(struct i2c_client *client, | |||
1361 | ds1307->type = acpi_id->driver_data; | 1398 | ds1307->type = acpi_id->driver_data; |
1362 | } | 1399 | } |
1363 | 1400 | ||
1401 | want_irq = client->irq > 0 && chip->alarm; | ||
1402 | |||
1364 | if (!pdata) | 1403 | if (!pdata) |
1365 | ds1307_trickle_init(ds1307, chip); | 1404 | trickle_charger_setup = ds1307_trickle_init(ds1307, chip); |
1366 | else if (pdata->trickle_charger_setup) | 1405 | else if (pdata->trickle_charger_setup) |
1367 | chip->trickle_charger_setup = pdata->trickle_charger_setup; | 1406 | trickle_charger_setup = pdata->trickle_charger_setup; |
1368 | 1407 | ||
1369 | if (chip->trickle_charger_setup && chip->trickle_charger_reg) { | 1408 | if (trickle_charger_setup && chip->trickle_charger_reg) { |
1409 | trickle_charger_setup |= DS13XX_TRICKLE_CHARGER_MAGIC; | ||
1370 | dev_dbg(ds1307->dev, | 1410 | dev_dbg(ds1307->dev, |
1371 | "writing trickle charger info 0x%x to 0x%x\n", | 1411 | "writing trickle charger info 0x%x to 0x%x\n", |
1372 | DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup, | 1412 | trickle_charger_setup, chip->trickle_charger_reg); |
1373 | chip->trickle_charger_reg); | ||
1374 | regmap_write(ds1307->regmap, chip->trickle_charger_reg, | 1413 | regmap_write(ds1307->regmap, chip->trickle_charger_reg, |
1375 | DS13XX_TRICKLE_CHARGER_MAGIC | | 1414 | trickle_charger_setup); |
1376 | chip->trickle_charger_setup); | ||
1377 | } | 1415 | } |
1378 | 1416 | ||
1379 | buf = ds1307->regs; | ||
1380 | |||
1381 | #ifdef CONFIG_OF | 1417 | #ifdef CONFIG_OF |
1382 | /* | 1418 | /* |
1383 | * For devices with no IRQ directly connected to the SoC, the RTC chip | 1419 | * For devices with no IRQ directly connected to the SoC, the RTC chip |
@@ -1387,31 +1423,27 @@ static int ds1307_probe(struct i2c_client *client, | |||
1387 | * This will guarantee the 'wakealarm' sysfs entry is available on the device, | 1423 | * This will guarantee the 'wakealarm' sysfs entry is available on the device, |
1388 | * if supported by the RTC. | 1424 | * if supported by the RTC. |
1389 | */ | 1425 | */ |
1390 | if (of_property_read_bool(client->dev.of_node, "wakeup-source")) { | 1426 | if (chip->alarm && of_property_read_bool(client->dev.of_node, |
1391 | ds1307_can_wakeup_device = true; | 1427 | "wakeup-source")) |
1392 | } | ||
1393 | /* Intersil ISL12057 DT backward compatibility */ | ||
1394 | if (of_property_read_bool(client->dev.of_node, | ||
1395 | "isil,irq2-can-wakeup-machine")) { | ||
1396 | ds1307_can_wakeup_device = true; | 1428 | ds1307_can_wakeup_device = true; |
1397 | } | ||
1398 | #endif | 1429 | #endif |
1399 | 1430 | ||
1400 | switch (ds1307->type) { | 1431 | switch (ds1307->type) { |
1401 | case ds_1337: | 1432 | case ds_1337: |
1402 | case ds_1339: | 1433 | case ds_1339: |
1434 | case ds_1341: | ||
1403 | case ds_3231: | 1435 | case ds_3231: |
1404 | /* get registers that the "rtc" read below won't read... */ | 1436 | /* get registers that the "rtc" read below won't read... */ |
1405 | err = regmap_bulk_read(ds1307->regmap, DS1337_REG_CONTROL, | 1437 | err = regmap_bulk_read(ds1307->regmap, DS1337_REG_CONTROL, |
1406 | buf, 2); | 1438 | regs, 2); |
1407 | if (err) { | 1439 | if (err) { |
1408 | dev_dbg(ds1307->dev, "read error %d\n", err); | 1440 | dev_dbg(ds1307->dev, "read error %d\n", err); |
1409 | goto exit; | 1441 | goto exit; |
1410 | } | 1442 | } |
1411 | 1443 | ||
1412 | /* oscillator off? turn it on, so clock can tick. */ | 1444 | /* oscillator off? turn it on, so clock can tick. */ |
1413 | if (ds1307->regs[0] & DS1337_BIT_nEOSC) | 1445 | if (regs[0] & DS1337_BIT_nEOSC) |
1414 | ds1307->regs[0] &= ~DS1337_BIT_nEOSC; | 1446 | regs[0] &= ~DS1337_BIT_nEOSC; |
1415 | 1447 | ||
1416 | /* | 1448 | /* |
1417 | * Using IRQ or defined as wakeup-source? | 1449 | * Using IRQ or defined as wakeup-source? |
@@ -1419,114 +1451,92 @@ static int ds1307_probe(struct i2c_client *client, | |||
1419 | * For some variants, be sure alarms can trigger when we're | 1451 | * For some variants, be sure alarms can trigger when we're |
1420 | * running on Vbackup (BBSQI/BBSQW) | 1452 | * running on Vbackup (BBSQI/BBSQW) |
1421 | */ | 1453 | */ |
1422 | if (chip->alarm && (ds1307->irq > 0 || | 1454 | if (want_irq || ds1307_can_wakeup_device) { |
1423 | ds1307_can_wakeup_device)) { | 1455 | regs[0] |= DS1337_BIT_INTCN | chip->bbsqi_bit; |
1424 | ds1307->regs[0] |= DS1337_BIT_INTCN | 1456 | regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); |
1425 | | bbsqi_bitpos[ds1307->type]; | ||
1426 | ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); | ||
1427 | |||
1428 | want_irq = true; | ||
1429 | } | 1457 | } |
1430 | 1458 | ||
1431 | regmap_write(ds1307->regmap, DS1337_REG_CONTROL, | 1459 | regmap_write(ds1307->regmap, DS1337_REG_CONTROL, |
1432 | ds1307->regs[0]); | 1460 | regs[0]); |
1433 | 1461 | ||
1434 | /* oscillator fault? clear flag, and warn */ | 1462 | /* oscillator fault? clear flag, and warn */ |
1435 | if (ds1307->regs[1] & DS1337_BIT_OSF) { | 1463 | if (regs[1] & DS1337_BIT_OSF) { |
1436 | regmap_write(ds1307->regmap, DS1337_REG_STATUS, | 1464 | regmap_write(ds1307->regmap, DS1337_REG_STATUS, |
1437 | ds1307->regs[1] & ~DS1337_BIT_OSF); | 1465 | regs[1] & ~DS1337_BIT_OSF); |
1438 | dev_warn(ds1307->dev, "SET TIME!\n"); | 1466 | dev_warn(ds1307->dev, "SET TIME!\n"); |
1439 | } | 1467 | } |
1440 | break; | 1468 | break; |
1441 | 1469 | ||
1442 | case rx_8025: | 1470 | case rx_8025: |
1443 | err = regmap_bulk_read(ds1307->regmap, | 1471 | err = regmap_bulk_read(ds1307->regmap, |
1444 | RX8025_REG_CTRL1 << 4 | 0x08, buf, 2); | 1472 | RX8025_REG_CTRL1 << 4 | 0x08, regs, 2); |
1445 | if (err) { | 1473 | if (err) { |
1446 | dev_dbg(ds1307->dev, "read error %d\n", err); | 1474 | dev_dbg(ds1307->dev, "read error %d\n", err); |
1447 | goto exit; | 1475 | goto exit; |
1448 | } | 1476 | } |
1449 | 1477 | ||
1450 | /* oscillator off? turn it on, so clock can tick. */ | 1478 | /* oscillator off? turn it on, so clock can tick. */ |
1451 | if (!(ds1307->regs[1] & RX8025_BIT_XST)) { | 1479 | if (!(regs[1] & RX8025_BIT_XST)) { |
1452 | ds1307->regs[1] |= RX8025_BIT_XST; | 1480 | regs[1] |= RX8025_BIT_XST; |
1453 | regmap_write(ds1307->regmap, | 1481 | regmap_write(ds1307->regmap, |
1454 | RX8025_REG_CTRL2 << 4 | 0x08, | 1482 | RX8025_REG_CTRL2 << 4 | 0x08, |
1455 | ds1307->regs[1]); | 1483 | regs[1]); |
1456 | dev_warn(ds1307->dev, | 1484 | dev_warn(ds1307->dev, |
1457 | "oscillator stop detected - SET TIME!\n"); | 1485 | "oscillator stop detected - SET TIME!\n"); |
1458 | } | 1486 | } |
1459 | 1487 | ||
1460 | if (ds1307->regs[1] & RX8025_BIT_PON) { | 1488 | if (regs[1] & RX8025_BIT_PON) { |
1461 | ds1307->regs[1] &= ~RX8025_BIT_PON; | 1489 | regs[1] &= ~RX8025_BIT_PON; |
1462 | regmap_write(ds1307->regmap, | 1490 | regmap_write(ds1307->regmap, |
1463 | RX8025_REG_CTRL2 << 4 | 0x08, | 1491 | RX8025_REG_CTRL2 << 4 | 0x08, |
1464 | ds1307->regs[1]); | 1492 | regs[1]); |
1465 | dev_warn(ds1307->dev, "power-on detected\n"); | 1493 | dev_warn(ds1307->dev, "power-on detected\n"); |
1466 | } | 1494 | } |
1467 | 1495 | ||
1468 | if (ds1307->regs[1] & RX8025_BIT_VDET) { | 1496 | if (regs[1] & RX8025_BIT_VDET) { |
1469 | ds1307->regs[1] &= ~RX8025_BIT_VDET; | 1497 | regs[1] &= ~RX8025_BIT_VDET; |
1470 | regmap_write(ds1307->regmap, | 1498 | regmap_write(ds1307->regmap, |
1471 | RX8025_REG_CTRL2 << 4 | 0x08, | 1499 | RX8025_REG_CTRL2 << 4 | 0x08, |
1472 | ds1307->regs[1]); | 1500 | regs[1]); |
1473 | dev_warn(ds1307->dev, "voltage drop detected\n"); | 1501 | dev_warn(ds1307->dev, "voltage drop detected\n"); |
1474 | } | 1502 | } |
1475 | 1503 | ||
1476 | /* make sure we are running in 24hour mode */ | 1504 | /* make sure we are running in 24hour mode */ |
1477 | if (!(ds1307->regs[0] & RX8025_BIT_2412)) { | 1505 | if (!(regs[0] & RX8025_BIT_2412)) { |
1478 | u8 hour; | 1506 | u8 hour; |
1479 | 1507 | ||
1480 | /* switch to 24 hour mode */ | 1508 | /* switch to 24 hour mode */ |
1481 | regmap_write(ds1307->regmap, | 1509 | regmap_write(ds1307->regmap, |
1482 | RX8025_REG_CTRL1 << 4 | 0x08, | 1510 | RX8025_REG_CTRL1 << 4 | 0x08, |
1483 | ds1307->regs[0] | RX8025_BIT_2412); | 1511 | regs[0] | RX8025_BIT_2412); |
1484 | 1512 | ||
1485 | err = regmap_bulk_read(ds1307->regmap, | 1513 | err = regmap_bulk_read(ds1307->regmap, |
1486 | RX8025_REG_CTRL1 << 4 | 0x08, | 1514 | RX8025_REG_CTRL1 << 4 | 0x08, |
1487 | buf, 2); | 1515 | regs, 2); |
1488 | if (err) { | 1516 | if (err) { |
1489 | dev_dbg(ds1307->dev, "read error %d\n", err); | 1517 | dev_dbg(ds1307->dev, "read error %d\n", err); |
1490 | goto exit; | 1518 | goto exit; |
1491 | } | 1519 | } |
1492 | 1520 | ||
1493 | /* correct hour */ | 1521 | /* correct hour */ |
1494 | hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]); | 1522 | hour = bcd2bin(regs[DS1307_REG_HOUR]); |
1495 | if (hour == 12) | 1523 | if (hour == 12) |
1496 | hour = 0; | 1524 | hour = 0; |
1497 | if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) | 1525 | if (regs[DS1307_REG_HOUR] & DS1307_BIT_PM) |
1498 | hour += 12; | 1526 | hour += 12; |
1499 | 1527 | ||
1500 | regmap_write(ds1307->regmap, | 1528 | regmap_write(ds1307->regmap, |
1501 | DS1307_REG_HOUR << 4 | 0x08, hour); | 1529 | DS1307_REG_HOUR << 4 | 0x08, hour); |
1502 | } | 1530 | } |
1503 | break; | 1531 | break; |
1504 | case rx_8130: | ||
1505 | ds1307->offset = 0x10; /* Seconds starts at 0x10 */ | ||
1506 | rtc_ops = &rx8130_rtc_ops; | ||
1507 | if (chip->alarm && ds1307->irq > 0) { | ||
1508 | irq_handler = rx8130_irq; | ||
1509 | want_irq = true; | ||
1510 | } | ||
1511 | break; | ||
1512 | case ds_1388: | ||
1513 | ds1307->offset = 1; /* Seconds starts at 1 */ | ||
1514 | break; | ||
1515 | case mcp794xx: | ||
1516 | rtc_ops = &mcp794xx_rtc_ops; | ||
1517 | if (chip->alarm && (ds1307->irq > 0 || | ||
1518 | ds1307_can_wakeup_device)) { | ||
1519 | irq_handler = mcp794xx_irq; | ||
1520 | want_irq = true; | ||
1521 | } | ||
1522 | break; | ||
1523 | default: | 1532 | default: |
1524 | break; | 1533 | break; |
1525 | } | 1534 | } |
1526 | 1535 | ||
1527 | read_rtc: | 1536 | read_rtc: |
1528 | /* read RTC registers */ | 1537 | /* read RTC registers */ |
1529 | err = regmap_bulk_read(ds1307->regmap, ds1307->offset, buf, 8); | 1538 | err = regmap_bulk_read(ds1307->regmap, chip->offset, regs, |
1539 | sizeof(regs)); | ||
1530 | if (err) { | 1540 | if (err) { |
1531 | dev_dbg(ds1307->dev, "read error %d\n", err); | 1541 | dev_dbg(ds1307->dev, "read error %d\n", err); |
1532 | goto exit; | 1542 | goto exit; |
@@ -1537,7 +1547,7 @@ read_rtc: | |||
1537 | * specify the extra bits as must-be-zero, but there are | 1547 | * specify the extra bits as must-be-zero, but there are |
1538 | * still a few values that are clearly out-of-range. | 1548 | * still a few values that are clearly out-of-range. |
1539 | */ | 1549 | */ |
1540 | tmp = ds1307->regs[DS1307_REG_SECS]; | 1550 | tmp = regs[DS1307_REG_SECS]; |
1541 | switch (ds1307->type) { | 1551 | switch (ds1307->type) { |
1542 | case ds_1307: | 1552 | case ds_1307: |
1543 | case m41t0: | 1553 | case m41t0: |
@@ -1556,10 +1566,10 @@ read_rtc: | |||
1556 | regmap_write(ds1307->regmap, DS1307_REG_SECS, 0); | 1566 | regmap_write(ds1307->regmap, DS1307_REG_SECS, 0); |
1557 | 1567 | ||
1558 | /* oscillator fault? clear flag, and warn */ | 1568 | /* oscillator fault? clear flag, and warn */ |
1559 | if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { | 1569 | if (regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { |
1560 | regmap_write(ds1307->regmap, DS1307_REG_CONTROL, | 1570 | regmap_write(ds1307->regmap, DS1307_REG_CONTROL, |
1561 | ds1307->regs[DS1307_REG_CONTROL] & | 1571 | regs[DS1307_REG_CONTROL] & |
1562 | ~DS1338_BIT_OSF); | 1572 | ~DS1338_BIT_OSF); |
1563 | dev_warn(ds1307->dev, "SET TIME!\n"); | 1573 | dev_warn(ds1307->dev, "SET TIME!\n"); |
1564 | goto read_rtc; | 1574 | goto read_rtc; |
1565 | } | 1575 | } |
@@ -1583,9 +1593,9 @@ read_rtc: | |||
1583 | break; | 1593 | break; |
1584 | case mcp794xx: | 1594 | case mcp794xx: |
1585 | /* make sure that the backup battery is enabled */ | 1595 | /* make sure that the backup battery is enabled */ |
1586 | if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) { | 1596 | if (!(regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) { |
1587 | regmap_write(ds1307->regmap, DS1307_REG_WDAY, | 1597 | regmap_write(ds1307->regmap, DS1307_REG_WDAY, |
1588 | ds1307->regs[DS1307_REG_WDAY] | | 1598 | regs[DS1307_REG_WDAY] | |
1589 | MCP794XX_BIT_VBATEN); | 1599 | MCP794XX_BIT_VBATEN); |
1590 | } | 1600 | } |
1591 | 1601 | ||
@@ -1602,7 +1612,7 @@ read_rtc: | |||
1602 | break; | 1612 | break; |
1603 | } | 1613 | } |
1604 | 1614 | ||
1605 | tmp = ds1307->regs[DS1307_REG_HOUR]; | 1615 | tmp = regs[DS1307_REG_HOUR]; |
1606 | switch (ds1307->type) { | 1616 | switch (ds1307->type) { |
1607 | case ds_1340: | 1617 | case ds_1340: |
1608 | case m41t0: | 1618 | case m41t0: |
@@ -1625,9 +1635,9 @@ read_rtc: | |||
1625 | tmp = bcd2bin(tmp & 0x1f); | 1635 | tmp = bcd2bin(tmp & 0x1f); |
1626 | if (tmp == 12) | 1636 | if (tmp == 12) |
1627 | tmp = 0; | 1637 | tmp = 0; |
1628 | if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) | 1638 | if (regs[DS1307_REG_HOUR] & DS1307_BIT_PM) |
1629 | tmp += 12; | 1639 | tmp += 12; |
1630 | regmap_write(ds1307->regmap, ds1307->offset + DS1307_REG_HOUR, | 1640 | regmap_write(ds1307->regmap, chip->offset + DS1307_REG_HOUR, |
1631 | bin2bcd(tmp)); | 1641 | bin2bcd(tmp)); |
1632 | } | 1642 | } |
1633 | 1643 | ||
@@ -1650,19 +1660,16 @@ read_rtc: | |||
1650 | MCP794XX_REG_WEEKDAY_WDAY_MASK, | 1660 | MCP794XX_REG_WEEKDAY_WDAY_MASK, |
1651 | tm.tm_wday + 1); | 1661 | tm.tm_wday + 1); |
1652 | 1662 | ||
1653 | if (want_irq) { | 1663 | if (want_irq || ds1307_can_wakeup_device) { |
1654 | device_set_wakeup_capable(ds1307->dev, true); | 1664 | device_set_wakeup_capable(ds1307->dev, true); |
1655 | set_bit(HAS_ALARM, &ds1307->flags); | 1665 | set_bit(HAS_ALARM, &ds1307->flags); |
1656 | } | 1666 | } |
1657 | 1667 | ||
1658 | ds1307->rtc = devm_rtc_allocate_device(ds1307->dev); | 1668 | ds1307->rtc = devm_rtc_allocate_device(ds1307->dev); |
1659 | if (IS_ERR(ds1307->rtc)) { | 1669 | if (IS_ERR(ds1307->rtc)) |
1660 | return PTR_ERR(ds1307->rtc); | 1670 | return PTR_ERR(ds1307->rtc); |
1661 | } | ||
1662 | 1671 | ||
1663 | if (ds1307_can_wakeup_device && ds1307->irq <= 0) { | 1672 | if (ds1307_can_wakeup_device && !want_irq) { |
1664 | /* Disable request for an IRQ */ | ||
1665 | want_irq = false; | ||
1666 | dev_info(ds1307->dev, | 1673 | dev_info(ds1307->dev, |
1667 | "'wakeup-source' is set, request for an IRQ is disabled!\n"); | 1674 | "'wakeup-source' is set, request for an IRQ is disabled!\n"); |
1668 | /* We cannot support UIE mode if we do not have an IRQ line */ | 1675 | /* We cannot support UIE mode if we do not have an IRQ line */ |
@@ -1670,8 +1677,8 @@ read_rtc: | |||
1670 | } | 1677 | } |
1671 | 1678 | ||
1672 | if (want_irq) { | 1679 | if (want_irq) { |
1673 | err = devm_request_threaded_irq(ds1307->dev, | 1680 | err = devm_request_threaded_irq(ds1307->dev, client->irq, NULL, |
1674 | ds1307->irq, NULL, irq_handler, | 1681 | chip->irq_handler ?: ds1307_irq, |
1675 | IRQF_SHARED | IRQF_ONESHOT, | 1682 | IRQF_SHARED | IRQF_ONESHOT, |
1676 | ds1307->name, ds1307); | 1683 | ds1307->name, ds1307); |
1677 | if (err) { | 1684 | if (err) { |
@@ -1679,8 +1686,9 @@ read_rtc: | |||
1679 | device_set_wakeup_capable(ds1307->dev, false); | 1686 | device_set_wakeup_capable(ds1307->dev, false); |
1680 | clear_bit(HAS_ALARM, &ds1307->flags); | 1687 | clear_bit(HAS_ALARM, &ds1307->flags); |
1681 | dev_err(ds1307->dev, "unable to request IRQ!\n"); | 1688 | dev_err(ds1307->dev, "unable to request IRQ!\n"); |
1682 | } else | 1689 | } else { |
1683 | dev_dbg(ds1307->dev, "got IRQ %d\n", client->irq); | 1690 | dev_dbg(ds1307->dev, "got IRQ %d\n", client->irq); |
1691 | } | ||
1684 | } | 1692 | } |
1685 | 1693 | ||
1686 | if (chip->nvram_size) { | 1694 | if (chip->nvram_size) { |
@@ -1691,13 +1699,12 @@ read_rtc: | |||
1691 | ds1307->nvmem_cfg.reg_read = ds1307_nvram_read; | 1699 | ds1307->nvmem_cfg.reg_read = ds1307_nvram_read; |
1692 | ds1307->nvmem_cfg.reg_write = ds1307_nvram_write; | 1700 | ds1307->nvmem_cfg.reg_write = ds1307_nvram_write; |
1693 | ds1307->nvmem_cfg.priv = ds1307; | 1701 | ds1307->nvmem_cfg.priv = ds1307; |
1694 | ds1307->nvram_offset = chip->nvram_offset; | ||
1695 | 1702 | ||
1696 | ds1307->rtc->nvmem_config = &ds1307->nvmem_cfg; | 1703 | ds1307->rtc->nvmem_config = &ds1307->nvmem_cfg; |
1697 | ds1307->rtc->nvram_old_abi = true; | 1704 | ds1307->rtc->nvram_old_abi = true; |
1698 | } | 1705 | } |
1699 | 1706 | ||
1700 | ds1307->rtc->ops = rtc_ops; | 1707 | ds1307->rtc->ops = chip->rtc_ops ?: &ds13xx_rtc_ops; |
1701 | err = rtc_register_device(ds1307->rtc); | 1708 | err = rtc_register_device(ds1307->rtc); |
1702 | if (err) | 1709 | if (err) |
1703 | return err; | 1710 | return err; |
diff --git a/drivers/rtc/rtc-ds1672.c b/drivers/rtc/rtc-ds1672.c index 7bf46bfe11a4..9caaccccaa57 100644 --- a/drivers/rtc/rtc-ds1672.c +++ b/drivers/rtc/rtc-ds1672.c | |||
@@ -190,7 +190,7 @@ static int ds1672_probe(struct i2c_client *client, | |||
190 | return 0; | 190 | return 0; |
191 | } | 191 | } |
192 | 192 | ||
193 | static struct i2c_device_id ds1672_id[] = { | 193 | static const struct i2c_device_id ds1672_id[] = { |
194 | { "ds1672", 0 }, | 194 | { "ds1672", 0 }, |
195 | { } | 195 | { } |
196 | }; | 196 | }; |
diff --git a/drivers/rtc/rtc-em3027.c b/drivers/rtc/rtc-em3027.c index 4f4930a2004c..b0ef8cfe742d 100644 --- a/drivers/rtc/rtc-em3027.c +++ b/drivers/rtc/rtc-em3027.c | |||
@@ -132,7 +132,7 @@ static int em3027_probe(struct i2c_client *client, | |||
132 | return 0; | 132 | return 0; |
133 | } | 133 | } |
134 | 134 | ||
135 | static struct i2c_device_id em3027_id[] = { | 135 | static const struct i2c_device_id em3027_id[] = { |
136 | { "em3027", 0 }, | 136 | { "em3027", 0 }, |
137 | { } | 137 | { } |
138 | }; | 138 | }; |
diff --git a/drivers/rtc/rtc-goldfish.c b/drivers/rtc/rtc-goldfish.c new file mode 100644 index 000000000000..d67769265185 --- /dev/null +++ b/drivers/rtc/rtc-goldfish.c | |||
@@ -0,0 +1,237 @@ | |||
1 | /* drivers/rtc/rtc-goldfish.c | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * Copyright (C) 2017 Imagination Technologies Ltd. | ||
5 | * | ||
6 | * This software is licensed under the terms of the GNU General Public | ||
7 | * License version 2, as published by the Free Software Foundation, and | ||
8 | * may be copied, distributed, and modified under those terms. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | #include <linux/module.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/rtc.h> | ||
20 | #include <linux/io.h> | ||
21 | |||
22 | #define TIMER_TIME_LOW 0x00 /* get low bits of current time */ | ||
23 | /* and update TIMER_TIME_HIGH */ | ||
24 | #define TIMER_TIME_HIGH 0x04 /* get high bits of time at last */ | ||
25 | /* TIMER_TIME_LOW read */ | ||
26 | #define TIMER_ALARM_LOW 0x08 /* set low bits of alarm and */ | ||
27 | /* activate it */ | ||
28 | #define TIMER_ALARM_HIGH 0x0c /* set high bits of next alarm */ | ||
29 | #define TIMER_IRQ_ENABLED 0x10 | ||
30 | #define TIMER_CLEAR_ALARM 0x14 | ||
31 | #define TIMER_ALARM_STATUS 0x18 | ||
32 | #define TIMER_CLEAR_INTERRUPT 0x1c | ||
33 | |||
34 | struct goldfish_rtc { | ||
35 | void __iomem *base; | ||
36 | int irq; | ||
37 | struct rtc_device *rtc; | ||
38 | }; | ||
39 | |||
40 | static int goldfish_rtc_read_alarm(struct device *dev, | ||
41 | struct rtc_wkalrm *alrm) | ||
42 | { | ||
43 | u64 rtc_alarm; | ||
44 | u64 rtc_alarm_low; | ||
45 | u64 rtc_alarm_high; | ||
46 | void __iomem *base; | ||
47 | struct goldfish_rtc *rtcdrv; | ||
48 | |||
49 | rtcdrv = dev_get_drvdata(dev); | ||
50 | base = rtcdrv->base; | ||
51 | |||
52 | rtc_alarm_low = readl(base + TIMER_ALARM_LOW); | ||
53 | rtc_alarm_high = readl(base + TIMER_ALARM_HIGH); | ||
54 | rtc_alarm = (rtc_alarm_high << 32) | rtc_alarm_low; | ||
55 | |||
56 | do_div(rtc_alarm, NSEC_PER_SEC); | ||
57 | memset(alrm, 0, sizeof(struct rtc_wkalrm)); | ||
58 | |||
59 | rtc_time_to_tm(rtc_alarm, &alrm->time); | ||
60 | |||
61 | if (readl(base + TIMER_ALARM_STATUS)) | ||
62 | alrm->enabled = 1; | ||
63 | else | ||
64 | alrm->enabled = 0; | ||
65 | |||
66 | return 0; | ||
67 | } | ||
68 | |||
69 | static int goldfish_rtc_set_alarm(struct device *dev, | ||
70 | struct rtc_wkalrm *alrm) | ||
71 | { | ||
72 | struct goldfish_rtc *rtcdrv; | ||
73 | unsigned long rtc_alarm; | ||
74 | u64 rtc_alarm64; | ||
75 | u64 rtc_status_reg; | ||
76 | void __iomem *base; | ||
77 | int ret = 0; | ||
78 | |||
79 | rtcdrv = dev_get_drvdata(dev); | ||
80 | base = rtcdrv->base; | ||
81 | |||
82 | if (alrm->enabled) { | ||
83 | ret = rtc_tm_to_time(&alrm->time, &rtc_alarm); | ||
84 | if (ret != 0) | ||
85 | return ret; | ||
86 | |||
87 | rtc_alarm64 = rtc_alarm * NSEC_PER_SEC; | ||
88 | writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH); | ||
89 | writel(rtc_alarm64, base + TIMER_ALARM_LOW); | ||
90 | } else { | ||
91 | /* | ||
92 | * if this function was called with enabled=0 | ||
93 | * then it could mean that the application is | ||
94 | * trying to cancel an ongoing alarm | ||
95 | */ | ||
96 | rtc_status_reg = readl(base + TIMER_ALARM_STATUS); | ||
97 | if (rtc_status_reg) | ||
98 | writel(1, base + TIMER_CLEAR_ALARM); | ||
99 | } | ||
100 | |||
101 | return ret; | ||
102 | } | ||
103 | |||
104 | static int goldfish_rtc_alarm_irq_enable(struct device *dev, | ||
105 | unsigned int enabled) | ||
106 | { | ||
107 | void __iomem *base; | ||
108 | struct goldfish_rtc *rtcdrv; | ||
109 | |||
110 | rtcdrv = dev_get_drvdata(dev); | ||
111 | base = rtcdrv->base; | ||
112 | |||
113 | if (enabled) | ||
114 | writel(1, base + TIMER_IRQ_ENABLED); | ||
115 | else | ||
116 | writel(0, base + TIMER_IRQ_ENABLED); | ||
117 | |||
118 | return 0; | ||
119 | } | ||
120 | |||
121 | static irqreturn_t goldfish_rtc_interrupt(int irq, void *dev_id) | ||
122 | { | ||
123 | struct goldfish_rtc *rtcdrv = dev_id; | ||
124 | void __iomem *base = rtcdrv->base; | ||
125 | |||
126 | writel(1, base + TIMER_CLEAR_INTERRUPT); | ||
127 | |||
128 | rtc_update_irq(rtcdrv->rtc, 1, RTC_IRQF | RTC_AF); | ||
129 | |||
130 | return IRQ_HANDLED; | ||
131 | } | ||
132 | |||
133 | static int goldfish_rtc_read_time(struct device *dev, struct rtc_time *tm) | ||
134 | { | ||
135 | struct goldfish_rtc *rtcdrv; | ||
136 | void __iomem *base; | ||
137 | u64 time_high; | ||
138 | u64 time_low; | ||
139 | u64 time; | ||
140 | |||
141 | rtcdrv = dev_get_drvdata(dev); | ||
142 | base = rtcdrv->base; | ||
143 | |||
144 | time_low = readl(base + TIMER_TIME_LOW); | ||
145 | time_high = readl(base + TIMER_TIME_HIGH); | ||
146 | time = (time_high << 32) | time_low; | ||
147 | |||
148 | do_div(time, NSEC_PER_SEC); | ||
149 | |||
150 | rtc_time_to_tm(time, tm); | ||
151 | |||
152 | return 0; | ||
153 | } | ||
154 | |||
155 | static int goldfish_rtc_set_time(struct device *dev, struct rtc_time *tm) | ||
156 | { | ||
157 | struct goldfish_rtc *rtcdrv; | ||
158 | void __iomem *base; | ||
159 | unsigned long now; | ||
160 | u64 now64; | ||
161 | int ret; | ||
162 | |||
163 | rtcdrv = dev_get_drvdata(dev); | ||
164 | base = rtcdrv->base; | ||
165 | |||
166 | ret = rtc_tm_to_time(tm, &now); | ||
167 | if (ret == 0) { | ||
168 | now64 = now * NSEC_PER_SEC; | ||
169 | writel((now64 >> 32), base + TIMER_TIME_HIGH); | ||
170 | writel(now64, base + TIMER_TIME_LOW); | ||
171 | } | ||
172 | |||
173 | return ret; | ||
174 | } | ||
175 | |||
176 | static const struct rtc_class_ops goldfish_rtc_ops = { | ||
177 | .read_time = goldfish_rtc_read_time, | ||
178 | .set_time = goldfish_rtc_set_time, | ||
179 | .read_alarm = goldfish_rtc_read_alarm, | ||
180 | .set_alarm = goldfish_rtc_set_alarm, | ||
181 | .alarm_irq_enable = goldfish_rtc_alarm_irq_enable | ||
182 | }; | ||
183 | |||
184 | static int goldfish_rtc_probe(struct platform_device *pdev) | ||
185 | { | ||
186 | struct goldfish_rtc *rtcdrv; | ||
187 | struct resource *r; | ||
188 | int err; | ||
189 | |||
190 | rtcdrv = devm_kzalloc(&pdev->dev, sizeof(*rtcdrv), GFP_KERNEL); | ||
191 | if (!rtcdrv) | ||
192 | return -ENOMEM; | ||
193 | |||
194 | platform_set_drvdata(pdev, rtcdrv); | ||
195 | |||
196 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
197 | if (!r) | ||
198 | return -ENODEV; | ||
199 | |||
200 | rtcdrv->base = devm_ioremap_resource(&pdev->dev, r); | ||
201 | if (IS_ERR(rtcdrv->base)) | ||
202 | return -ENODEV; | ||
203 | |||
204 | rtcdrv->irq = platform_get_irq(pdev, 0); | ||
205 | if (rtcdrv->irq < 0) | ||
206 | return -ENODEV; | ||
207 | |||
208 | rtcdrv->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, | ||
209 | &goldfish_rtc_ops, | ||
210 | THIS_MODULE); | ||
211 | if (IS_ERR(rtcdrv->rtc)) | ||
212 | return PTR_ERR(rtcdrv->rtc); | ||
213 | |||
214 | err = devm_request_irq(&pdev->dev, rtcdrv->irq, | ||
215 | goldfish_rtc_interrupt, | ||
216 | 0, pdev->name, rtcdrv); | ||
217 | if (err) | ||
218 | return err; | ||
219 | |||
220 | return 0; | ||
221 | } | ||
222 | |||
223 | static const struct of_device_id goldfish_rtc_of_match[] = { | ||
224 | { .compatible = "google,goldfish-rtc", }, | ||
225 | {}, | ||
226 | }; | ||
227 | MODULE_DEVICE_TABLE(of, goldfish_rtc_of_match); | ||
228 | |||
229 | static struct platform_driver goldfish_rtc = { | ||
230 | .probe = goldfish_rtc_probe, | ||
231 | .driver = { | ||
232 | .name = "goldfish_rtc", | ||
233 | .of_match_table = goldfish_rtc_of_match, | ||
234 | } | ||
235 | }; | ||
236 | |||
237 | module_platform_driver(goldfish_rtc); | ||
diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c index 8940e9e43ea0..f4c070ea8384 100644 --- a/drivers/rtc/rtc-m41t80.c +++ b/drivers/rtc/rtc-m41t80.c | |||
@@ -440,28 +440,6 @@ static int m41t80_resume(struct device *dev) | |||
440 | 440 | ||
441 | static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); | 441 | static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); |
442 | 442 | ||
443 | static ssize_t flags_show(struct device *dev, | ||
444 | struct device_attribute *attr, char *buf) | ||
445 | { | ||
446 | struct i2c_client *client = to_i2c_client(dev); | ||
447 | int val; | ||
448 | |||
449 | val = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | ||
450 | if (val < 0) | ||
451 | return val; | ||
452 | return sprintf(buf, "%#x\n", val); | ||
453 | } | ||
454 | static DEVICE_ATTR_RO(flags); | ||
455 | |||
456 | static struct attribute *attrs[] = { | ||
457 | &dev_attr_flags.attr, | ||
458 | NULL, | ||
459 | }; | ||
460 | |||
461 | static struct attribute_group attr_group = { | ||
462 | .attrs = attrs, | ||
463 | }; | ||
464 | |||
465 | #ifdef CONFIG_COMMON_CLK | 443 | #ifdef CONFIG_COMMON_CLK |
466 | #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw) | 444 | #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw) |
467 | 445 | ||
@@ -912,13 +890,6 @@ static struct notifier_block wdt_notifier = { | |||
912 | ***************************************************************************** | 890 | ***************************************************************************** |
913 | */ | 891 | */ |
914 | 892 | ||
915 | static void m41t80_remove_sysfs_group(void *_dev) | ||
916 | { | ||
917 | struct device *dev = _dev; | ||
918 | |||
919 | sysfs_remove_group(&dev->kobj, &attr_group); | ||
920 | } | ||
921 | |||
922 | static int m41t80_probe(struct i2c_client *client, | 893 | static int m41t80_probe(struct i2c_client *client, |
923 | const struct i2c_device_id *id) | 894 | const struct i2c_device_id *id) |
924 | { | 895 | { |
@@ -927,6 +898,7 @@ static int m41t80_probe(struct i2c_client *client, | |||
927 | struct rtc_device *rtc = NULL; | 898 | struct rtc_device *rtc = NULL; |
928 | struct rtc_time tm; | 899 | struct rtc_time tm; |
929 | struct m41t80_data *m41t80_data = NULL; | 900 | struct m41t80_data *m41t80_data = NULL; |
901 | bool wakeup_source = false; | ||
930 | 902 | ||
931 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | | 903 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | |
932 | I2C_FUNC_SMBUS_BYTE_DATA)) { | 904 | I2C_FUNC_SMBUS_BYTE_DATA)) { |
@@ -947,6 +919,10 @@ static int m41t80_probe(struct i2c_client *client, | |||
947 | m41t80_data->features = id->driver_data; | 919 | m41t80_data->features = id->driver_data; |
948 | i2c_set_clientdata(client, m41t80_data); | 920 | i2c_set_clientdata(client, m41t80_data); |
949 | 921 | ||
922 | #ifdef CONFIG_OF | ||
923 | wakeup_source = of_property_read_bool(client->dev.of_node, | ||
924 | "wakeup-source"); | ||
925 | #endif | ||
950 | if (client->irq > 0) { | 926 | if (client->irq > 0) { |
951 | rc = devm_request_threaded_irq(&client->dev, client->irq, | 927 | rc = devm_request_threaded_irq(&client->dev, client->irq, |
952 | NULL, m41t80_handle_irq, | 928 | NULL, m41t80_handle_irq, |
@@ -955,14 +931,16 @@ static int m41t80_probe(struct i2c_client *client, | |||
955 | if (rc) { | 931 | if (rc) { |
956 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); | 932 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); |
957 | client->irq = 0; | 933 | client->irq = 0; |
958 | } else { | 934 | wakeup_source = false; |
959 | m41t80_rtc_ops.read_alarm = m41t80_read_alarm; | ||
960 | m41t80_rtc_ops.set_alarm = m41t80_set_alarm; | ||
961 | m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; | ||
962 | /* Enable the wakealarm */ | ||
963 | device_init_wakeup(&client->dev, true); | ||
964 | } | 935 | } |
965 | } | 936 | } |
937 | if (client->irq > 0 || wakeup_source) { | ||
938 | m41t80_rtc_ops.read_alarm = m41t80_read_alarm; | ||
939 | m41t80_rtc_ops.set_alarm = m41t80_set_alarm; | ||
940 | m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; | ||
941 | /* Enable the wakealarm */ | ||
942 | device_init_wakeup(&client->dev, true); | ||
943 | } | ||
966 | 944 | ||
967 | rtc = devm_rtc_device_register(&client->dev, client->name, | 945 | rtc = devm_rtc_device_register(&client->dev, client->name, |
968 | &m41t80_rtc_ops, THIS_MODULE); | 946 | &m41t80_rtc_ops, THIS_MODULE); |
@@ -970,6 +948,10 @@ static int m41t80_probe(struct i2c_client *client, | |||
970 | return PTR_ERR(rtc); | 948 | return PTR_ERR(rtc); |
971 | 949 | ||
972 | m41t80_data->rtc = rtc; | 950 | m41t80_data->rtc = rtc; |
951 | if (client->irq <= 0) { | ||
952 | /* We cannot support UIE mode if we do not have an IRQ line */ | ||
953 | rtc->uie_unsupported = 1; | ||
954 | } | ||
973 | 955 | ||
974 | /* Make sure HT (Halt Update) bit is cleared */ | 956 | /* Make sure HT (Halt Update) bit is cleared */ |
975 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); | 957 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); |
@@ -1004,21 +986,6 @@ static int m41t80_probe(struct i2c_client *client, | |||
1004 | return rc; | 986 | return rc; |
1005 | } | 987 | } |
1006 | 988 | ||
1007 | /* Export sysfs entries */ | ||
1008 | rc = sysfs_create_group(&(&client->dev)->kobj, &attr_group); | ||
1009 | if (rc) { | ||
1010 | dev_err(&client->dev, "Failed to create sysfs group: %d\n", rc); | ||
1011 | return rc; | ||
1012 | } | ||
1013 | |||
1014 | rc = devm_add_action_or_reset(&client->dev, m41t80_remove_sysfs_group, | ||
1015 | &client->dev); | ||
1016 | if (rc) { | ||
1017 | dev_err(&client->dev, | ||
1018 | "Failed to add sysfs cleanup action: %d\n", rc); | ||
1019 | return rc; | ||
1020 | } | ||
1021 | |||
1022 | #ifdef CONFIG_RTC_DRV_M41T80_WDT | 989 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
1023 | if (m41t80_data->features & M41T80_FEATURE_HT) { | 990 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
1024 | save_client = client; | 991 | save_client = client; |
diff --git a/drivers/rtc/rtc-max6900.c b/drivers/rtc/rtc-max6900.c index 48b6b411f8b2..cbdc86a560ba 100644 --- a/drivers/rtc/rtc-max6900.c +++ b/drivers/rtc/rtc-max6900.c | |||
@@ -226,7 +226,7 @@ max6900_probe(struct i2c_client *client, const struct i2c_device_id *id) | |||
226 | return 0; | 226 | return 0; |
227 | } | 227 | } |
228 | 228 | ||
229 | static struct i2c_device_id max6900_id[] = { | 229 | static const struct i2c_device_id max6900_id[] = { |
230 | { "max6900", 0 }, | 230 | { "max6900", 0 }, |
231 | { } | 231 | { } |
232 | }; | 232 | }; |
diff --git a/drivers/rtc/rtc-max8925.c b/drivers/rtc/rtc-max8925.c index 16d129a0bb3b..67d6fc2d23e6 100644 --- a/drivers/rtc/rtc-max8925.c +++ b/drivers/rtc/rtc-max8925.c | |||
@@ -234,8 +234,6 @@ static int max8925_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
234 | ret = max8925_reg_write(info->rtc, MAX8925_ALARM0_CNTL, 0x77); | 234 | ret = max8925_reg_write(info->rtc, MAX8925_ALARM0_CNTL, 0x77); |
235 | else | 235 | else |
236 | ret = max8925_reg_write(info->rtc, MAX8925_ALARM0_CNTL, 0x0); | 236 | ret = max8925_reg_write(info->rtc, MAX8925_ALARM0_CNTL, 0x0); |
237 | if (ret < 0) | ||
238 | goto out; | ||
239 | out: | 237 | out: |
240 | return ret; | 238 | return ret; |
241 | } | 239 | } |
diff --git a/drivers/rtc/rtc-mxc.c b/drivers/rtc/rtc-mxc.c index 401f46d8f21b..bce427d202ee 100644 --- a/drivers/rtc/rtc-mxc.c +++ b/drivers/rtc/rtc-mxc.c | |||
@@ -238,26 +238,6 @@ static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id) | |||
238 | return IRQ_HANDLED; | 238 | return IRQ_HANDLED; |
239 | } | 239 | } |
240 | 240 | ||
241 | /* | ||
242 | * Clear all interrupts and release the IRQ | ||
243 | */ | ||
244 | static void mxc_rtc_release(struct device *dev) | ||
245 | { | ||
246 | struct platform_device *pdev = to_platform_device(dev); | ||
247 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); | ||
248 | void __iomem *ioaddr = pdata->ioaddr; | ||
249 | |||
250 | spin_lock_irq(&pdata->rtc->irq_lock); | ||
251 | |||
252 | /* Disable all rtc interrupts */ | ||
253 | writew(0, ioaddr + RTC_RTCIENR); | ||
254 | |||
255 | /* Clear all interrupt status */ | ||
256 | writew(0xffffffff, ioaddr + RTC_RTCISR); | ||
257 | |||
258 | spin_unlock_irq(&pdata->rtc->irq_lock); | ||
259 | } | ||
260 | |||
261 | static int mxc_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | 241 | static int mxc_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
262 | { | 242 | { |
263 | mxc_rtc_irq_enable(dev, RTC_ALM_BIT, enabled); | 243 | mxc_rtc_irq_enable(dev, RTC_ALM_BIT, enabled); |
@@ -343,7 +323,6 @@ static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
343 | 323 | ||
344 | /* RTC layer */ | 324 | /* RTC layer */ |
345 | static const struct rtc_class_ops mxc_rtc_ops = { | 325 | static const struct rtc_class_ops mxc_rtc_ops = { |
346 | .release = mxc_rtc_release, | ||
347 | .read_time = mxc_rtc_read_time, | 326 | .read_time = mxc_rtc_read_time, |
348 | .set_mmss64 = mxc_rtc_set_mmss, | 327 | .set_mmss64 = mxc_rtc_set_mmss, |
349 | .read_alarm = mxc_rtc_read_alarm, | 328 | .read_alarm = mxc_rtc_read_alarm, |
diff --git a/drivers/rtc/rtc-puv3.c b/drivers/rtc/rtc-puv3.c index c0a6e638c672..9e83be32ff43 100644 --- a/drivers/rtc/rtc-puv3.c +++ b/drivers/rtc/rtc-puv3.c | |||
@@ -157,49 +157,7 @@ static int puv3_rtc_proc(struct device *dev, struct seq_file *seq) | |||
157 | return 0; | 157 | return 0; |
158 | } | 158 | } |
159 | 159 | ||
160 | static int puv3_rtc_open(struct device *dev) | ||
161 | { | ||
162 | struct platform_device *pdev = to_platform_device(dev); | ||
163 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | ||
164 | int ret; | ||
165 | |||
166 | ret = request_irq(puv3_rtc_alarmno, puv3_rtc_alarmirq, | ||
167 | 0, "pkunity-rtc alarm", rtc_dev); | ||
168 | |||
169 | if (ret) { | ||
170 | dev_err(dev, "IRQ%d error %d\n", puv3_rtc_alarmno, ret); | ||
171 | return ret; | ||
172 | } | ||
173 | |||
174 | ret = request_irq(puv3_rtc_tickno, puv3_rtc_tickirq, | ||
175 | 0, "pkunity-rtc tick", rtc_dev); | ||
176 | |||
177 | if (ret) { | ||
178 | dev_err(dev, "IRQ%d error %d\n", puv3_rtc_tickno, ret); | ||
179 | goto tick_err; | ||
180 | } | ||
181 | |||
182 | return ret; | ||
183 | |||
184 | tick_err: | ||
185 | free_irq(puv3_rtc_alarmno, rtc_dev); | ||
186 | return ret; | ||
187 | } | ||
188 | |||
189 | static void puv3_rtc_release(struct device *dev) | ||
190 | { | ||
191 | struct platform_device *pdev = to_platform_device(dev); | ||
192 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | ||
193 | |||
194 | /* do not clear AIE here, it may be needed for wake */ | ||
195 | puv3_rtc_setpie(dev, 0); | ||
196 | free_irq(puv3_rtc_alarmno, rtc_dev); | ||
197 | free_irq(puv3_rtc_tickno, rtc_dev); | ||
198 | } | ||
199 | |||
200 | static const struct rtc_class_ops puv3_rtcops = { | 160 | static const struct rtc_class_ops puv3_rtcops = { |
201 | .open = puv3_rtc_open, | ||
202 | .release = puv3_rtc_release, | ||
203 | .read_time = puv3_rtc_gettime, | 161 | .read_time = puv3_rtc_gettime, |
204 | .set_time = puv3_rtc_settime, | 162 | .set_time = puv3_rtc_settime, |
205 | .read_alarm = puv3_rtc_getalarm, | 163 | .read_alarm = puv3_rtc_getalarm, |
@@ -222,10 +180,6 @@ static void puv3_rtc_enable(struct device *dev, int en) | |||
222 | 180 | ||
223 | static int puv3_rtc_remove(struct platform_device *dev) | 181 | static int puv3_rtc_remove(struct platform_device *dev) |
224 | { | 182 | { |
225 | struct rtc_device *rtc = platform_get_drvdata(dev); | ||
226 | |||
227 | rtc_device_unregister(rtc); | ||
228 | |||
229 | puv3_rtc_setpie(&dev->dev, 0); | 183 | puv3_rtc_setpie(&dev->dev, 0); |
230 | puv3_rtc_setaie(&dev->dev, 0); | 184 | puv3_rtc_setaie(&dev->dev, 0); |
231 | 185 | ||
@@ -259,6 +213,24 @@ static int puv3_rtc_probe(struct platform_device *pdev) | |||
259 | dev_dbg(&pdev->dev, "PKUnity_rtc: tick irq %d, alarm irq %d\n", | 213 | dev_dbg(&pdev->dev, "PKUnity_rtc: tick irq %d, alarm irq %d\n", |
260 | puv3_rtc_tickno, puv3_rtc_alarmno); | 214 | puv3_rtc_tickno, puv3_rtc_alarmno); |
261 | 215 | ||
216 | rtc = devm_rtc_allocate_device(&pdev->dev); | ||
217 | if (IS_ERR(rtc)) | ||
218 | return PTR_ERR(rtc); | ||
219 | |||
220 | ret = devm_request_irq(&pdev->dev, puv3_rtc_alarmno, puv3_rtc_alarmirq, | ||
221 | 0, "pkunity-rtc alarm", rtc); | ||
222 | if (ret) { | ||
223 | dev_err(&pdev->dev, "IRQ%d error %d\n", puv3_rtc_alarmno, ret); | ||
224 | return ret; | ||
225 | } | ||
226 | |||
227 | ret = devm_request_irq(&pdev->dev, puv3_rtc_tickno, puv3_rtc_tickirq, | ||
228 | 0, "pkunity-rtc tick", rtc); | ||
229 | if (ret) { | ||
230 | dev_err(&pdev->dev, "IRQ%d error %d\n", puv3_rtc_tickno, ret); | ||
231 | return ret; | ||
232 | } | ||
233 | |||
262 | /* get the memory region */ | 234 | /* get the memory region */ |
263 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 235 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
264 | if (res == NULL) { | 236 | if (res == NULL) { |
@@ -278,12 +250,10 @@ static int puv3_rtc_probe(struct platform_device *pdev) | |||
278 | puv3_rtc_enable(&pdev->dev, 1); | 250 | puv3_rtc_enable(&pdev->dev, 1); |
279 | 251 | ||
280 | /* register RTC and exit */ | 252 | /* register RTC and exit */ |
281 | rtc = rtc_device_register("pkunity", &pdev->dev, &puv3_rtcops, | 253 | rtc->ops = &puv3_rtcops; |
282 | THIS_MODULE); | 254 | ret = rtc_register_device(rtc); |
283 | 255 | if (ret) { | |
284 | if (IS_ERR(rtc)) { | ||
285 | dev_err(&pdev->dev, "cannot attach rtc\n"); | 256 | dev_err(&pdev->dev, "cannot attach rtc\n"); |
286 | ret = PTR_ERR(rtc); | ||
287 | goto err_nortc; | 257 | goto err_nortc; |
288 | } | 258 | } |
289 | 259 | ||
diff --git a/drivers/rtc/rtc-pxa.c b/drivers/rtc/rtc-pxa.c index fe4985b54608..47304f5664d8 100644 --- a/drivers/rtc/rtc-pxa.c +++ b/drivers/rtc/rtc-pxa.c | |||
@@ -348,7 +348,7 @@ static int __init pxa_rtc_probe(struct platform_device *pdev) | |||
348 | dev_err(dev, "No alarm IRQ resource defined\n"); | 348 | dev_err(dev, "No alarm IRQ resource defined\n"); |
349 | return -ENXIO; | 349 | return -ENXIO; |
350 | } | 350 | } |
351 | pxa_rtc_open(dev); | 351 | |
352 | pxa_rtc->base = devm_ioremap(dev, pxa_rtc->ress->start, | 352 | pxa_rtc->base = devm_ioremap(dev, pxa_rtc->ress->start, |
353 | resource_size(pxa_rtc->ress)); | 353 | resource_size(pxa_rtc->ress)); |
354 | if (!pxa_rtc->base) { | 354 | if (!pxa_rtc->base) { |
@@ -356,6 +356,8 @@ static int __init pxa_rtc_probe(struct platform_device *pdev) | |||
356 | return -ENOMEM; | 356 | return -ENOMEM; |
357 | } | 357 | } |
358 | 358 | ||
359 | pxa_rtc_open(dev); | ||
360 | |||
359 | sa1100_rtc->rcnr = pxa_rtc->base + 0x0; | 361 | sa1100_rtc->rcnr = pxa_rtc->base + 0x0; |
360 | sa1100_rtc->rtsr = pxa_rtc->base + 0x8; | 362 | sa1100_rtc->rtsr = pxa_rtc->base + 0x8; |
361 | sa1100_rtc->rtar = pxa_rtc->base + 0x4; | 363 | sa1100_rtc->rtar = pxa_rtc->base + 0x4; |
diff --git a/drivers/rtc/rtc-rtd119x.c b/drivers/rtc/rtc-rtd119x.c new file mode 100644 index 000000000000..b233559d950b --- /dev/null +++ b/drivers/rtc/rtc-rtd119x.c | |||
@@ -0,0 +1,242 @@ | |||
1 | /* | ||
2 | * Realtek RTD129x RTC | ||
3 | * | ||
4 | * Copyright (c) 2017 Andreas Färber | ||
5 | * | ||
6 | * SPDX-License-Identifier: GPL-2.0+ | ||
7 | */ | ||
8 | |||
9 | #include <linux/clk.h> | ||
10 | #include <linux/io.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/of.h> | ||
13 | #include <linux/of_address.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/rtc.h> | ||
16 | #include <linux/spinlock.h> | ||
17 | |||
18 | #define RTD_RTCSEC 0x00 | ||
19 | #define RTD_RTCMIN 0x04 | ||
20 | #define RTD_RTCHR 0x08 | ||
21 | #define RTD_RTCDATE1 0x0c | ||
22 | #define RTD_RTCDATE2 0x10 | ||
23 | #define RTD_RTCACR 0x28 | ||
24 | #define RTD_RTCEN 0x2c | ||
25 | #define RTD_RTCCR 0x30 | ||
26 | |||
27 | #define RTD_RTCSEC_RTCSEC_MASK 0x7f | ||
28 | |||
29 | #define RTD_RTCMIN_RTCMIN_MASK 0x3f | ||
30 | |||
31 | #define RTD_RTCHR_RTCHR_MASK 0x1f | ||
32 | |||
33 | #define RTD_RTCDATE1_RTCDATE1_MASK 0xff | ||
34 | |||
35 | #define RTD_RTCDATE2_RTCDATE2_MASK 0x7f | ||
36 | |||
37 | #define RTD_RTCACR_RTCPWR BIT(7) | ||
38 | |||
39 | #define RTD_RTCEN_RTCEN_MASK 0xff | ||
40 | |||
41 | #define RTD_RTCCR_RTCRST BIT(6) | ||
42 | |||
43 | struct rtd119x_rtc { | ||
44 | void __iomem *base; | ||
45 | struct clk *clk; | ||
46 | struct rtc_device *rtcdev; | ||
47 | unsigned int base_year; | ||
48 | }; | ||
49 | |||
50 | static inline int rtd119x_rtc_days_in_year(int year) | ||
51 | { | ||
52 | return 365 + (is_leap_year(year) ? 1 : 0); | ||
53 | } | ||
54 | |||
55 | static void rtd119x_rtc_reset(struct device *dev) | ||
56 | { | ||
57 | struct rtd119x_rtc *data = dev_get_drvdata(dev); | ||
58 | u32 val; | ||
59 | |||
60 | val = readl_relaxed(data->base + RTD_RTCCR); | ||
61 | val |= RTD_RTCCR_RTCRST; | ||
62 | writel_relaxed(val, data->base + RTD_RTCCR); | ||
63 | |||
64 | val &= ~RTD_RTCCR_RTCRST; | ||
65 | writel(val, data->base + RTD_RTCCR); | ||
66 | } | ||
67 | |||
68 | static void rtd119x_rtc_set_enabled(struct device *dev, bool enable) | ||
69 | { | ||
70 | struct rtd119x_rtc *data = dev_get_drvdata(dev); | ||
71 | u32 val; | ||
72 | |||
73 | val = readl_relaxed(data->base + RTD_RTCEN); | ||
74 | if (enable) { | ||
75 | if ((val & RTD_RTCEN_RTCEN_MASK) == 0x5a) | ||
76 | return; | ||
77 | writel_relaxed(0x5a, data->base + RTD_RTCEN); | ||
78 | } else { | ||
79 | writel_relaxed(0, data->base + RTD_RTCEN); | ||
80 | } | ||
81 | } | ||
82 | |||
83 | static int rtd119x_rtc_read_time(struct device *dev, struct rtc_time *tm) | ||
84 | { | ||
85 | struct rtd119x_rtc *data = dev_get_drvdata(dev); | ||
86 | s32 day; | ||
87 | u32 sec; | ||
88 | unsigned int year; | ||
89 | int tries = 0; | ||
90 | |||
91 | while (true) { | ||
92 | tm->tm_sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1; | ||
93 | tm->tm_min = readl_relaxed(data->base + RTD_RTCMIN) & RTD_RTCMIN_RTCMIN_MASK; | ||
94 | tm->tm_hour = readl_relaxed(data->base + RTD_RTCHR) & RTD_RTCHR_RTCHR_MASK; | ||
95 | day = readl_relaxed(data->base + RTD_RTCDATE1) & RTD_RTCDATE1_RTCDATE1_MASK; | ||
96 | day |= (readl_relaxed(data->base + RTD_RTCDATE2) & RTD_RTCDATE2_RTCDATE2_MASK) << 8; | ||
97 | sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1; | ||
98 | tries++; | ||
99 | |||
100 | if (sec == tm->tm_sec) | ||
101 | break; | ||
102 | |||
103 | if (tries >= 3) | ||
104 | return -EINVAL; | ||
105 | } | ||
106 | if (tries > 1) | ||
107 | dev_dbg(dev, "%s: needed %i tries\n", __func__, tries); | ||
108 | |||
109 | year = data->base_year; | ||
110 | while (day >= rtd119x_rtc_days_in_year(year)) { | ||
111 | day -= rtd119x_rtc_days_in_year(year); | ||
112 | year++; | ||
113 | } | ||
114 | tm->tm_year = year - 1900; | ||
115 | tm->tm_yday = day; | ||
116 | |||
117 | tm->tm_mon = 0; | ||
118 | while (day >= rtc_month_days(tm->tm_mon, year)) { | ||
119 | day -= rtc_month_days(tm->tm_mon, year); | ||
120 | tm->tm_mon++; | ||
121 | } | ||
122 | tm->tm_mday = day + 1; | ||
123 | |||
124 | return 0; | ||
125 | } | ||
126 | |||
127 | static int rtd119x_rtc_set_time(struct device *dev, struct rtc_time *tm) | ||
128 | { | ||
129 | struct rtd119x_rtc *data = dev_get_drvdata(dev); | ||
130 | unsigned int day; | ||
131 | int i; | ||
132 | |||
133 | if (1900 + tm->tm_year < data->base_year) | ||
134 | return -EINVAL; | ||
135 | |||
136 | day = 0; | ||
137 | for (i = data->base_year; i < 1900 + tm->tm_year; i++) | ||
138 | day += rtd119x_rtc_days_in_year(i); | ||
139 | |||
140 | day += tm->tm_yday; | ||
141 | if (day > 0x7fff) | ||
142 | return -EINVAL; | ||
143 | |||
144 | rtd119x_rtc_set_enabled(dev, false); | ||
145 | |||
146 | writel_relaxed((tm->tm_sec << 1) & RTD_RTCSEC_RTCSEC_MASK, data->base + RTD_RTCSEC); | ||
147 | writel_relaxed(tm->tm_min & RTD_RTCMIN_RTCMIN_MASK, data->base + RTD_RTCMIN); | ||
148 | writel_relaxed(tm->tm_hour & RTD_RTCHR_RTCHR_MASK, data->base + RTD_RTCHR); | ||
149 | writel_relaxed(day & RTD_RTCDATE1_RTCDATE1_MASK, data->base + RTD_RTCDATE1); | ||
150 | writel_relaxed((day >> 8) & RTD_RTCDATE2_RTCDATE2_MASK, data->base + RTD_RTCDATE2); | ||
151 | |||
152 | rtd119x_rtc_set_enabled(dev, true); | ||
153 | |||
154 | return 0; | ||
155 | } | ||
156 | |||
157 | static const struct rtc_class_ops rtd119x_rtc_ops = { | ||
158 | .read_time = rtd119x_rtc_read_time, | ||
159 | .set_time = rtd119x_rtc_set_time, | ||
160 | }; | ||
161 | |||
162 | static const struct of_device_id rtd119x_rtc_dt_ids[] = { | ||
163 | { .compatible = "realtek,rtd1295-rtc" }, | ||
164 | { } | ||
165 | }; | ||
166 | |||
167 | static int rtd119x_rtc_probe(struct platform_device *pdev) | ||
168 | { | ||
169 | struct rtd119x_rtc *data; | ||
170 | struct resource *res; | ||
171 | u32 val; | ||
172 | int ret; | ||
173 | |||
174 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | ||
175 | if (!data) | ||
176 | return -ENOMEM; | ||
177 | |||
178 | platform_set_drvdata(pdev, data); | ||
179 | data->base_year = 2014; | ||
180 | |||
181 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
182 | data->base = devm_ioremap_resource(&pdev->dev, res); | ||
183 | if (IS_ERR(data->base)) | ||
184 | return PTR_ERR(data->base); | ||
185 | |||
186 | data->clk = of_clk_get(pdev->dev.of_node, 0); | ||
187 | if (IS_ERR(data->clk)) | ||
188 | return PTR_ERR(data->clk); | ||
189 | |||
190 | ret = clk_prepare_enable(data->clk); | ||
191 | if (ret) { | ||
192 | clk_put(data->clk); | ||
193 | return ret; | ||
194 | } | ||
195 | |||
196 | val = readl_relaxed(data->base + RTD_RTCACR); | ||
197 | if (!(val & RTD_RTCACR_RTCPWR)) { | ||
198 | writel_relaxed(RTD_RTCACR_RTCPWR, data->base + RTD_RTCACR); | ||
199 | |||
200 | rtd119x_rtc_reset(&pdev->dev); | ||
201 | |||
202 | writel_relaxed(0, data->base + RTD_RTCMIN); | ||
203 | writel_relaxed(0, data->base + RTD_RTCHR); | ||
204 | writel_relaxed(0, data->base + RTD_RTCDATE1); | ||
205 | writel_relaxed(0, data->base + RTD_RTCDATE2); | ||
206 | } | ||
207 | |||
208 | rtd119x_rtc_set_enabled(&pdev->dev, true); | ||
209 | |||
210 | data->rtcdev = devm_rtc_device_register(&pdev->dev, "rtc", | ||
211 | &rtd119x_rtc_ops, THIS_MODULE); | ||
212 | if (IS_ERR(data->rtcdev)) { | ||
213 | dev_err(&pdev->dev, "failed to register rtc device"); | ||
214 | clk_disable_unprepare(data->clk); | ||
215 | clk_put(data->clk); | ||
216 | return PTR_ERR(data->rtcdev); | ||
217 | } | ||
218 | |||
219 | return 0; | ||
220 | } | ||
221 | |||
222 | static int rtd119x_rtc_remove(struct platform_device *pdev) | ||
223 | { | ||
224 | struct rtd119x_rtc *data = platform_get_drvdata(pdev); | ||
225 | |||
226 | rtd119x_rtc_set_enabled(&pdev->dev, false); | ||
227 | |||
228 | clk_disable_unprepare(data->clk); | ||
229 | clk_put(data->clk); | ||
230 | |||
231 | return 0; | ||
232 | } | ||
233 | |||
234 | static struct platform_driver rtd119x_rtc_driver = { | ||
235 | .probe = rtd119x_rtc_probe, | ||
236 | .remove = rtd119x_rtc_remove, | ||
237 | .driver = { | ||
238 | .name = "rtd1295-rtc", | ||
239 | .of_match_table = rtd119x_rtc_dt_ids, | ||
240 | }, | ||
241 | }; | ||
242 | builtin_platform_driver(rtd119x_rtc_driver); | ||
diff --git a/drivers/rtc/rtc-rv3029c2.c b/drivers/rtc/rtc-rv3029c2.c index 85fa1da03762..aa09771de04f 100644 --- a/drivers/rtc/rtc-rv3029c2.c +++ b/drivers/rtc/rtc-rv3029c2.c | |||
@@ -868,7 +868,7 @@ static int rv3029_i2c_probe(struct i2c_client *client, | |||
868 | return rv3029_probe(&client->dev, regmap, client->irq, client->name); | 868 | return rv3029_probe(&client->dev, regmap, client->irq, client->name); |
869 | } | 869 | } |
870 | 870 | ||
871 | static struct i2c_device_id rv3029_id[] = { | 871 | static const struct i2c_device_id rv3029_id[] = { |
872 | { "rv3029", 0 }, | 872 | { "rv3029", 0 }, |
873 | { "rv3029c2", 0 }, | 873 | { "rv3029c2", 0 }, |
874 | { } | 874 | { } |
diff --git a/drivers/rtc/rtc-s35390a.c b/drivers/rtc/rtc-s35390a.c index 449820eeefe8..7067bca5c20d 100644 --- a/drivers/rtc/rtc-s35390a.c +++ b/drivers/rtc/rtc-s35390a.c | |||
@@ -106,33 +106,12 @@ static int s35390a_get_reg(struct s35390a *s35390a, int reg, char *buf, int len) | |||
106 | return 0; | 106 | return 0; |
107 | } | 107 | } |
108 | 108 | ||
109 | /* | 109 | static int s35390a_init(struct s35390a *s35390a) |
110 | * Returns <0 on error, 0 if rtc is setup fine and 1 if the chip was reset. | ||
111 | * To keep the information if an irq is pending, pass the value read from | ||
112 | * STATUS1 to the caller. | ||
113 | */ | ||
114 | static int s35390a_reset(struct s35390a *s35390a, char *status1) | ||
115 | { | 110 | { |
116 | char buf; | 111 | char buf; |
117 | int ret; | 112 | int ret; |
118 | unsigned initcount = 0; | 113 | unsigned initcount = 0; |
119 | 114 | ||
120 | ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, status1, 1); | ||
121 | if (ret < 0) | ||
122 | return ret; | ||
123 | |||
124 | if (*status1 & S35390A_FLAG_POC) | ||
125 | /* | ||
126 | * Do not communicate for 0.5 seconds since the power-on | ||
127 | * detection circuit is in operation. | ||
128 | */ | ||
129 | msleep(500); | ||
130 | else if (!(*status1 & S35390A_FLAG_BLD)) | ||
131 | /* | ||
132 | * If both POC and BLD are unset everything is fine. | ||
133 | */ | ||
134 | return 0; | ||
135 | |||
136 | /* | 115 | /* |
137 | * At least one of POC and BLD are set, so reinitialise chip. Keeping | 116 | * At least one of POC and BLD are set, so reinitialise chip. Keeping |
138 | * this information in the hardware to know later that the time isn't | 117 | * this information in the hardware to know later that the time isn't |
@@ -142,7 +121,6 @@ static int s35390a_reset(struct s35390a *s35390a, char *status1) | |||
142 | * The 24H bit is kept over reset, so set it already here. | 121 | * The 24H bit is kept over reset, so set it already here. |
143 | */ | 122 | */ |
144 | initialize: | 123 | initialize: |
145 | *status1 = S35390A_FLAG_24H; | ||
146 | buf = S35390A_FLAG_RESET | S35390A_FLAG_24H; | 124 | buf = S35390A_FLAG_RESET | S35390A_FLAG_24H; |
147 | ret = s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1); | 125 | ret = s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1); |
148 | 126 | ||
@@ -165,6 +143,34 @@ initialize: | |||
165 | return 1; | 143 | return 1; |
166 | } | 144 | } |
167 | 145 | ||
146 | /* | ||
147 | * Returns <0 on error, 0 if rtc is setup fine and 1 if the chip was reset. | ||
148 | * To keep the information if an irq is pending, pass the value read from | ||
149 | * STATUS1 to the caller. | ||
150 | */ | ||
151 | static int s35390a_read_status(struct s35390a *s35390a, char *status1) | ||
152 | { | ||
153 | int ret; | ||
154 | |||
155 | ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, status1, 1); | ||
156 | if (ret < 0) | ||
157 | return ret; | ||
158 | |||
159 | if (*status1 & S35390A_FLAG_POC) { | ||
160 | /* | ||
161 | * Do not communicate for 0.5 seconds since the power-on | ||
162 | * detection circuit is in operation. | ||
163 | */ | ||
164 | msleep(500); | ||
165 | return 1; | ||
166 | } else if (*status1 & S35390A_FLAG_BLD) | ||
167 | return 1; | ||
168 | /* | ||
169 | * If both POC and BLD are unset everything is fine. | ||
170 | */ | ||
171 | return 0; | ||
172 | } | ||
173 | |||
168 | static int s35390a_disable_test_mode(struct s35390a *s35390a) | 174 | static int s35390a_disable_test_mode(struct s35390a *s35390a) |
169 | { | 175 | { |
170 | char buf[1]; | 176 | char buf[1]; |
@@ -208,13 +214,16 @@ static int s35390a_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |||
208 | { | 214 | { |
209 | struct s35390a *s35390a = i2c_get_clientdata(client); | 215 | struct s35390a *s35390a = i2c_get_clientdata(client); |
210 | int i, err; | 216 | int i, err; |
211 | char buf[7]; | 217 | char buf[7], status; |
212 | 218 | ||
213 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d mday=%d, " | 219 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d mday=%d, " |
214 | "mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec, | 220 | "mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec, |
215 | tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, | 221 | tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, |
216 | tm->tm_wday); | 222 | tm->tm_wday); |
217 | 223 | ||
224 | if (s35390a_read_status(s35390a, &status) == 1) | ||
225 | s35390a_init(s35390a); | ||
226 | |||
218 | buf[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 100); | 227 | buf[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 100); |
219 | buf[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon + 1); | 228 | buf[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon + 1); |
220 | buf[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday); | 229 | buf[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday); |
@@ -235,9 +244,12 @@ static int s35390a_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |||
235 | static int s35390a_get_datetime(struct i2c_client *client, struct rtc_time *tm) | 244 | static int s35390a_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
236 | { | 245 | { |
237 | struct s35390a *s35390a = i2c_get_clientdata(client); | 246 | struct s35390a *s35390a = i2c_get_clientdata(client); |
238 | char buf[7]; | 247 | char buf[7], status; |
239 | int i, err; | 248 | int i, err; |
240 | 249 | ||
250 | if (s35390a_read_status(s35390a, &status) == 1) | ||
251 | return -EINVAL; | ||
252 | |||
241 | err = s35390a_get_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); | 253 | err = s35390a_get_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); |
242 | if (err < 0) | 254 | if (err < 0) |
243 | return err; | 255 | return err; |
@@ -392,12 +404,42 @@ static int s35390a_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
392 | return s35390a_set_datetime(to_i2c_client(dev), tm); | 404 | return s35390a_set_datetime(to_i2c_client(dev), tm); |
393 | } | 405 | } |
394 | 406 | ||
407 | static int s35390a_rtc_ioctl(struct device *dev, unsigned int cmd, | ||
408 | unsigned long arg) | ||
409 | { | ||
410 | struct i2c_client *client = to_i2c_client(dev); | ||
411 | struct s35390a *s35390a = i2c_get_clientdata(client); | ||
412 | char sts; | ||
413 | int err; | ||
414 | |||
415 | switch (cmd) { | ||
416 | case RTC_VL_READ: | ||
417 | /* s35390a_reset set lowvoltage flag and init RTC if needed */ | ||
418 | err = s35390a_read_status(s35390a, &sts); | ||
419 | if (err < 0) | ||
420 | return err; | ||
421 | if (copy_to_user((void __user *)arg, &err, sizeof(int))) | ||
422 | return -EFAULT; | ||
423 | break; | ||
424 | case RTC_VL_CLR: | ||
425 | /* update flag and clear register */ | ||
426 | err = s35390a_init(s35390a); | ||
427 | if (err < 0) | ||
428 | return err; | ||
429 | break; | ||
430 | default: | ||
431 | return -ENOIOCTLCMD; | ||
432 | } | ||
433 | |||
434 | return 0; | ||
435 | } | ||
436 | |||
395 | static const struct rtc_class_ops s35390a_rtc_ops = { | 437 | static const struct rtc_class_ops s35390a_rtc_ops = { |
396 | .read_time = s35390a_rtc_read_time, | 438 | .read_time = s35390a_rtc_read_time, |
397 | .set_time = s35390a_rtc_set_time, | 439 | .set_time = s35390a_rtc_set_time, |
398 | .set_alarm = s35390a_rtc_set_alarm, | 440 | .set_alarm = s35390a_rtc_set_alarm, |
399 | .read_alarm = s35390a_rtc_read_alarm, | 441 | .read_alarm = s35390a_rtc_read_alarm, |
400 | 442 | .ioctl = s35390a_rtc_ioctl, | |
401 | }; | 443 | }; |
402 | 444 | ||
403 | static struct i2c_driver s35390a_driver; | 445 | static struct i2c_driver s35390a_driver; |
@@ -405,7 +447,7 @@ static struct i2c_driver s35390a_driver; | |||
405 | static int s35390a_probe(struct i2c_client *client, | 447 | static int s35390a_probe(struct i2c_client *client, |
406 | const struct i2c_device_id *id) | 448 | const struct i2c_device_id *id) |
407 | { | 449 | { |
408 | int err, err_reset; | 450 | int err, err_read; |
409 | unsigned int i; | 451 | unsigned int i; |
410 | struct s35390a *s35390a; | 452 | struct s35390a *s35390a; |
411 | struct rtc_time tm; | 453 | struct rtc_time tm; |
@@ -438,9 +480,9 @@ static int s35390a_probe(struct i2c_client *client, | |||
438 | } | 480 | } |
439 | } | 481 | } |
440 | 482 | ||
441 | err_reset = s35390a_reset(s35390a, &status1); | 483 | err_read = s35390a_read_status(s35390a, &status1); |
442 | if (err_reset < 0) { | 484 | if (err_read < 0) { |
443 | err = err_reset; | 485 | err = err_read; |
444 | dev_err(&client->dev, "error resetting chip\n"); | 486 | dev_err(&client->dev, "error resetting chip\n"); |
445 | goto exit_dummy; | 487 | goto exit_dummy; |
446 | } | 488 | } |
@@ -466,7 +508,7 @@ static int s35390a_probe(struct i2c_client *client, | |||
466 | } | 508 | } |
467 | } | 509 | } |
468 | 510 | ||
469 | if (err_reset > 0 || s35390a_get_datetime(client, &tm) < 0) | 511 | if (err_read > 0 || s35390a_get_datetime(client, &tm) < 0) |
470 | dev_warn(&client->dev, "clock needs to be set\n"); | 512 | dev_warn(&client->dev, "clock needs to be set\n"); |
471 | 513 | ||
472 | device_set_wakeup_capable(&client->dev, 1); | 514 | device_set_wakeup_capable(&client->dev, 1); |
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index c2187bf6c7e4..ed71d1113627 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c | |||
@@ -95,46 +95,6 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) | |||
95 | return IRQ_HANDLED; | 95 | return IRQ_HANDLED; |
96 | } | 96 | } |
97 | 97 | ||
98 | static int sa1100_rtc_open(struct device *dev) | ||
99 | { | ||
100 | struct sa1100_rtc *info = dev_get_drvdata(dev); | ||
101 | struct rtc_device *rtc = info->rtc; | ||
102 | int ret; | ||
103 | |||
104 | ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev); | ||
105 | if (ret) { | ||
106 | dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz); | ||
107 | goto fail_ui; | ||
108 | } | ||
109 | ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev); | ||
110 | if (ret) { | ||
111 | dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm); | ||
112 | goto fail_ai; | ||
113 | } | ||
114 | rtc->max_user_freq = RTC_FREQ; | ||
115 | rtc_irq_set_freq(rtc, NULL, RTC_FREQ); | ||
116 | |||
117 | return 0; | ||
118 | |||
119 | fail_ai: | ||
120 | free_irq(info->irq_1hz, dev); | ||
121 | fail_ui: | ||
122 | clk_disable_unprepare(info->clk); | ||
123 | return ret; | ||
124 | } | ||
125 | |||
126 | static void sa1100_rtc_release(struct device *dev) | ||
127 | { | ||
128 | struct sa1100_rtc *info = dev_get_drvdata(dev); | ||
129 | |||
130 | spin_lock_irq(&info->lock); | ||
131 | writel_relaxed(0, info->rtsr); | ||
132 | spin_unlock_irq(&info->lock); | ||
133 | |||
134 | free_irq(info->irq_alarm, dev); | ||
135 | free_irq(info->irq_1hz, dev); | ||
136 | } | ||
137 | |||
138 | static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | 98 | static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
139 | { | 99 | { |
140 | u32 rtsr; | 100 | u32 rtsr; |
@@ -216,8 +176,6 @@ static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) | |||
216 | } | 176 | } |
217 | 177 | ||
218 | static const struct rtc_class_ops sa1100_rtc_ops = { | 178 | static const struct rtc_class_ops sa1100_rtc_ops = { |
219 | .open = sa1100_rtc_open, | ||
220 | .release = sa1100_rtc_release, | ||
221 | .read_time = sa1100_rtc_read_time, | 179 | .read_time = sa1100_rtc_read_time, |
222 | .set_time = sa1100_rtc_set_time, | 180 | .set_time = sa1100_rtc_set_time, |
223 | .read_alarm = sa1100_rtc_read_alarm, | 181 | .read_alarm = sa1100_rtc_read_alarm, |
@@ -265,6 +223,9 @@ int sa1100_rtc_init(struct platform_device *pdev, struct sa1100_rtc *info) | |||
265 | } | 223 | } |
266 | info->rtc = rtc; | 224 | info->rtc = rtc; |
267 | 225 | ||
226 | rtc->max_user_freq = RTC_FREQ; | ||
227 | rtc_irq_set_freq(rtc, NULL, RTC_FREQ); | ||
228 | |||
268 | /* Fix for a nasty initialization problem the in SA11xx RTSR register. | 229 | /* Fix for a nasty initialization problem the in SA11xx RTSR register. |
269 | * See also the comments in sa1100_rtc_interrupt(). | 230 | * See also the comments in sa1100_rtc_interrupt(). |
270 | * | 231 | * |
@@ -299,6 +260,7 @@ static int sa1100_rtc_probe(struct platform_device *pdev) | |||
299 | struct resource *iores; | 260 | struct resource *iores; |
300 | void __iomem *base; | 261 | void __iomem *base; |
301 | int irq_1hz, irq_alarm; | 262 | int irq_1hz, irq_alarm; |
263 | int ret; | ||
302 | 264 | ||
303 | irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz"); | 265 | irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz"); |
304 | irq_alarm = platform_get_irq_byname(pdev, "rtc alarm"); | 266 | irq_alarm = platform_get_irq_byname(pdev, "rtc alarm"); |
@@ -311,6 +273,19 @@ static int sa1100_rtc_probe(struct platform_device *pdev) | |||
311 | info->irq_1hz = irq_1hz; | 273 | info->irq_1hz = irq_1hz; |
312 | info->irq_alarm = irq_alarm; | 274 | info->irq_alarm = irq_alarm; |
313 | 275 | ||
276 | ret = devm_request_irq(&pdev->dev, irq_1hz, sa1100_rtc_interrupt, 0, | ||
277 | "rtc 1Hz", &pdev->dev); | ||
278 | if (ret) { | ||
279 | dev_err(&pdev->dev, "IRQ %d already in use.\n", irq_1hz); | ||
280 | return ret; | ||
281 | } | ||
282 | ret = devm_request_irq(&pdev->dev, irq_alarm, sa1100_rtc_interrupt, 0, | ||
283 | "rtc Alrm", &pdev->dev); | ||
284 | if (ret) { | ||
285 | dev_err(&pdev->dev, "IRQ %d already in use.\n", irq_alarm); | ||
286 | return ret; | ||
287 | } | ||
288 | |||
314 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 289 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
315 | base = devm_ioremap_resource(&pdev->dev, iores); | 290 | base = devm_ioremap_resource(&pdev->dev, iores); |
316 | if (IS_ERR(base)) | 291 | if (IS_ERR(base)) |
@@ -339,8 +314,12 @@ static int sa1100_rtc_remove(struct platform_device *pdev) | |||
339 | { | 314 | { |
340 | struct sa1100_rtc *info = platform_get_drvdata(pdev); | 315 | struct sa1100_rtc *info = platform_get_drvdata(pdev); |
341 | 316 | ||
342 | if (info) | 317 | if (info) { |
318 | spin_lock_irq(&info->lock); | ||
319 | writel_relaxed(0, info->rtsr); | ||
320 | spin_unlock_irq(&info->lock); | ||
343 | clk_disable_unprepare(info->clk); | 321 | clk_disable_unprepare(info->clk); |
322 | } | ||
344 | 323 | ||
345 | return 0; | 324 | return 0; |
346 | } | 325 | } |
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c index 39cbc1238b92..3d2216ccd860 100644 --- a/drivers/rtc/rtc-sun6i.c +++ b/drivers/rtc/rtc-sun6i.c | |||
@@ -73,6 +73,9 @@ | |||
73 | #define SUN6I_ALARM_CONFIG 0x0050 | 73 | #define SUN6I_ALARM_CONFIG 0x0050 |
74 | #define SUN6I_ALARM_CONFIG_WAKEUP BIT(0) | 74 | #define SUN6I_ALARM_CONFIG_WAKEUP BIT(0) |
75 | 75 | ||
76 | #define SUN6I_LOSC_OUT_GATING 0x0060 | ||
77 | #define SUN6I_LOSC_OUT_GATING_EN BIT(0) | ||
78 | |||
76 | /* | 79 | /* |
77 | * Get date values | 80 | * Get date values |
78 | */ | 81 | */ |
@@ -125,6 +128,7 @@ struct sun6i_rtc_dev { | |||
125 | struct clk_hw hw; | 128 | struct clk_hw hw; |
126 | struct clk_hw *int_osc; | 129 | struct clk_hw *int_osc; |
127 | struct clk *losc; | 130 | struct clk *losc; |
131 | struct clk *ext_losc; | ||
128 | 132 | ||
129 | spinlock_t lock; | 133 | spinlock_t lock; |
130 | }; | 134 | }; |
@@ -188,23 +192,24 @@ static void __init sun6i_rtc_clk_init(struct device_node *node) | |||
188 | struct clk_init_data init = { | 192 | struct clk_init_data init = { |
189 | .ops = &sun6i_rtc_osc_ops, | 193 | .ops = &sun6i_rtc_osc_ops, |
190 | }; | 194 | }; |
195 | const char *clkout_name = "osc32k-out"; | ||
191 | const char *parents[2]; | 196 | const char *parents[2]; |
192 | 197 | ||
193 | rtc = kzalloc(sizeof(*rtc), GFP_KERNEL); | 198 | rtc = kzalloc(sizeof(*rtc), GFP_KERNEL); |
194 | if (!rtc) | 199 | if (!rtc) |
195 | return; | 200 | return; |
196 | spin_lock_init(&rtc->lock); | ||
197 | 201 | ||
198 | clk_data = kzalloc(sizeof(*clk_data) + sizeof(*clk_data->hws), | 202 | clk_data = kzalloc(sizeof(*clk_data) + (sizeof(*clk_data->hws) * 2), |
199 | GFP_KERNEL); | 203 | GFP_KERNEL); |
200 | if (!clk_data) | 204 | if (!clk_data) |
201 | return; | 205 | return; |
206 | |||
202 | spin_lock_init(&rtc->lock); | 207 | spin_lock_init(&rtc->lock); |
203 | 208 | ||
204 | rtc->base = of_io_request_and_map(node, 0, of_node_full_name(node)); | 209 | rtc->base = of_io_request_and_map(node, 0, of_node_full_name(node)); |
205 | if (IS_ERR(rtc->base)) { | 210 | if (IS_ERR(rtc->base)) { |
206 | pr_crit("Can't map RTC registers"); | 211 | pr_crit("Can't map RTC registers"); |
207 | return; | 212 | goto err; |
208 | } | 213 | } |
209 | 214 | ||
210 | /* Switch to the external, more precise, oscillator */ | 215 | /* Switch to the external, more precise, oscillator */ |
@@ -216,7 +221,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node) | |||
216 | 221 | ||
217 | /* Deal with old DTs */ | 222 | /* Deal with old DTs */ |
218 | if (!of_get_property(node, "clocks", NULL)) | 223 | if (!of_get_property(node, "clocks", NULL)) |
219 | return; | 224 | goto err; |
220 | 225 | ||
221 | rtc->int_osc = clk_hw_register_fixed_rate_with_accuracy(NULL, | 226 | rtc->int_osc = clk_hw_register_fixed_rate_with_accuracy(NULL, |
222 | "rtc-int-osc", | 227 | "rtc-int-osc", |
@@ -235,7 +240,8 @@ static void __init sun6i_rtc_clk_init(struct device_node *node) | |||
235 | 240 | ||
236 | init.parent_names = parents; | 241 | init.parent_names = parents; |
237 | init.num_parents = of_clk_get_parent_count(node) + 1; | 242 | init.num_parents = of_clk_get_parent_count(node) + 1; |
238 | of_property_read_string(node, "clock-output-names", &init.name); | 243 | of_property_read_string_index(node, "clock-output-names", 0, |
244 | &init.name); | ||
239 | 245 | ||
240 | rtc->losc = clk_register(NULL, &rtc->hw); | 246 | rtc->losc = clk_register(NULL, &rtc->hw); |
241 | if (IS_ERR(rtc->losc)) { | 247 | if (IS_ERR(rtc->losc)) { |
@@ -243,9 +249,25 @@ static void __init sun6i_rtc_clk_init(struct device_node *node) | |||
243 | return; | 249 | return; |
244 | } | 250 | } |
245 | 251 | ||
246 | clk_data->num = 1; | 252 | of_property_read_string_index(node, "clock-output-names", 1, |
253 | &clkout_name); | ||
254 | rtc->ext_losc = clk_register_gate(NULL, clkout_name, rtc->hw.init->name, | ||
255 | 0, rtc->base + SUN6I_LOSC_OUT_GATING, | ||
256 | SUN6I_LOSC_OUT_GATING_EN, 0, | ||
257 | &rtc->lock); | ||
258 | if (IS_ERR(rtc->ext_losc)) { | ||
259 | pr_crit("Couldn't register the LOSC external gate\n"); | ||
260 | return; | ||
261 | } | ||
262 | |||
263 | clk_data->num = 2; | ||
247 | clk_data->hws[0] = &rtc->hw; | 264 | clk_data->hws[0] = &rtc->hw; |
265 | clk_data->hws[1] = __clk_get_hw(rtc->ext_losc); | ||
248 | of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); | 266 | of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); |
267 | return; | ||
268 | |||
269 | err: | ||
270 | kfree(clk_data); | ||
249 | } | 271 | } |
250 | CLK_OF_DECLARE_DRIVER(sun6i_rtc_clk, "allwinner,sun6i-a31-rtc", | 272 | CLK_OF_DECLARE_DRIVER(sun6i_rtc_clk, "allwinner,sun6i-a31-rtc", |
251 | sun6i_rtc_clk_init); | 273 | sun6i_rtc_clk_init); |
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c index e1b86bb01062..7ce22967fd16 100644 --- a/drivers/rtc/rtc-vr41xx.c +++ b/drivers/rtc/rtc-vr41xx.c | |||
@@ -119,23 +119,6 @@ static inline void write_elapsed_second(unsigned long sec) | |||
119 | spin_unlock_irq(&rtc_lock); | 119 | spin_unlock_irq(&rtc_lock); |
120 | } | 120 | } |
121 | 121 | ||
122 | static void vr41xx_rtc_release(struct device *dev) | ||
123 | { | ||
124 | |||
125 | spin_lock_irq(&rtc_lock); | ||
126 | |||
127 | rtc1_write(ECMPLREG, 0); | ||
128 | rtc1_write(ECMPMREG, 0); | ||
129 | rtc1_write(ECMPHREG, 0); | ||
130 | rtc1_write(RTCL1LREG, 0); | ||
131 | rtc1_write(RTCL1HREG, 0); | ||
132 | |||
133 | spin_unlock_irq(&rtc_lock); | ||
134 | |||
135 | disable_irq(aie_irq); | ||
136 | disable_irq(pie_irq); | ||
137 | } | ||
138 | |||
139 | static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time) | 122 | static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time) |
140 | { | 123 | { |
141 | unsigned long epoch_sec, elapsed_sec; | 124 | unsigned long epoch_sec, elapsed_sec; |
@@ -272,7 +255,6 @@ static irqreturn_t rtclong1_interrupt(int irq, void *dev_id) | |||
272 | } | 255 | } |
273 | 256 | ||
274 | static const struct rtc_class_ops vr41xx_rtc_ops = { | 257 | static const struct rtc_class_ops vr41xx_rtc_ops = { |
275 | .release = vr41xx_rtc_release, | ||
276 | .ioctl = vr41xx_rtc_ioctl, | 258 | .ioctl = vr41xx_rtc_ioctl, |
277 | .read_time = vr41xx_rtc_read_time, | 259 | .read_time = vr41xx_rtc_read_time, |
278 | .set_time = vr41xx_rtc_set_time, | 260 | .set_time = vr41xx_rtc_set_time, |
diff --git a/include/linux/rtc.h b/include/linux/rtc.h index 0a0f0d14a5fb..e6d0f9c1cafd 100644 --- a/include/linux/rtc.h +++ b/include/linux/rtc.h | |||
@@ -72,8 +72,6 @@ extern struct class *rtc_class; | |||
72 | * issued through ioctl() ... | 72 | * issued through ioctl() ... |
73 | */ | 73 | */ |
74 | struct rtc_class_ops { | 74 | struct rtc_class_ops { |
75 | int (*open)(struct device *); | ||
76 | void (*release)(struct device *); | ||
77 | int (*ioctl)(struct device *, unsigned int, unsigned long); | 75 | int (*ioctl)(struct device *, unsigned int, unsigned long); |
78 | int (*read_time)(struct device *, struct rtc_time *); | 76 | int (*read_time)(struct device *, struct rtc_time *); |
79 | int (*set_time)(struct device *, struct rtc_time *); | 77 | int (*set_time)(struct device *, struct rtc_time *); |