ARM: dts: iwg22d-sodimm: Enable SGTL5000 audio codec

This patch enables SGTL5000 audio codec on the carrier board.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

1 files changed, 28 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 39ce7e7101c7..5d4b7d203f8d 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -26,6 +26,12 @@
                 stdout-path = "serial3:115200n8";
         };
 
+        audio_clock: audio_clock {
+                compatible = "fixed-clock";
+                #clock-cells = <0>;
+                clock-frequency = <26000000>;
+        };
+
         vccq_sdhi0: regulator-vccq-sdhi0 {
                 compatible = "regulator-gpio";
 
@@ -80,6 +86,23 @@
         pinctrl-names = "default";
 };
 
+&i2c5 {
+        pinctrl-0 = <&i2c5_pins>;
+        pinctrl-names = "default";
+
+        status = "okay";
+        clock-frequency = <400000>;
+
+        sgtl5000: codec@a {
+                compatible = "fsl,sgtl5000";
+                #sound-dai-cells = <0>;
+                reg = <0x0a>;
+                clocks = <&audio_clock>;
+                VDDA-supply = <&reg_3p3v>;
+                VDDIO-supply = <&reg_3p3v>;
+        };
+};
+
 &pci1 {
         status = "okay";
         pinctrl-0 = <&usb1_pins>;
@@ -102,6 +125,11 @@
                 function = "hscif1";
         };
 
+        i2c5_pins: i2c5 {
+                groups = "i2c5_b";
+                function = "i2c5";
+        };
+
         scif4_pins: scif4 {
                 groups = "scif4_data_b";
                 function = "scif4";