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authorOlof Johansson <olof@lixom.net>2013-08-14 03:24:05 -0400
committerOlof Johansson <olof@lixom.net>2013-08-14 03:24:05 -0400
commit55689bfa21dc0c02ff6cc9c3ab90a78bc9b66093 (patch)
tree0b645145d8aae568ac0cef5e3337551a6dc20c93
parent38494429f383c8c0bda1d462f6be3d54f1dc1fed (diff)
parent1469273960de45275f33276c7254456edcba9da2 (diff)
Merge tag 'renesas-pinmux-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman: Renesas ARM based SoC pinmux updates for v3.12 SH Mobile pinctrl DT support * tag 'renesas-pinmux-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: kzm9g-reference: Add LED1-LED4 to the device tree ARM: shmobile: kzm9g-reference: Move SDHI regulators to DT ARM: shmobile: kzm9g-reference: Move pinctrl mappings to device tree ARM: shmobile: marzen-reference: Add LED2-LED4 to the device tree ARM: shmobile: marzen-reference: Move pinctrl mappings to device tree ARM: shmobile: armadillo-reference: Add LED1-LED4 to the device tree ARM: shmobile: armadillo-reference: Move st1232 reset GPIO to DT ARM: shmobile: armadillo-reference: Add st1232 pin mappings ARM: shmobile: armadillo-reference: Move pinctrl mappings to device tree ARM: shmobile: sh73a0: Add pin control device to device tree ARM: shmobile: sh7372: Add pin control device to device tree ARM: shmobile: r8a7790: Add GPIO controller devices to device tree ARM: shmobile: r8a7790: Add pin control device to device tree ARM: shmobile: r8a7779: Add GPIO controller devices to device tree ARM: shmobile: r8a7779: Add pin control device to device tree ARM: shmobile: r8a7778: Add GPIO controller devices to device tree ARM: shmobile: r8a7778: Add pin control device to device tree ARM: shmobile: r8a7740: Add pin control device to device tree ARM: shmobile: r8a73a4: Add pin control device to device tree Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/boot/dts/r8a73a4.dtsi arch/arm/boot/dts/r8a7790.dtsi
Diffstat
-rw-r--r--arch/arm/boot/dts/r8a73a4.dtsi7
-rw-r--r--arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts34
-rw-r--r--arch/arm/boot/dts/r8a7740.dtsi8
-rw-r--r--arch/arm/boot/dts/r8a7778.dtsi66
-rw-r--r--arch/arm/boot/dts/r8a7779-marzen-reference.dts49
-rw-r--r--arch/arm/boot/dts/r8a7779.dtsi90
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi78
-rw-r--r--arch/arm/boot/dts/sh7372.dtsi8
-rw-r--r--arch/arm/boot/dts/sh73a0-kzm9g-reference.dts90
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi8
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva-reference.c18
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g-reference.c47
-rw-r--r--arch/arm/mach-shmobile/board-marzen-reference.c28
13 files changed, 437 insertions, 94 deletions
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 6ce699be6095..6c26caa880f2 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -185,6 +185,13 @@
185 status = "disabled"; 185 status = "disabled";
186 }; 186 };
187 187
188 pfc: pfc@e6050000 {
189 compatible = "renesas,pfc-r8a73a4";
190 reg = <0 0xe6050000 0 0x9000>;
191 gpio-controller;
192 #gpio-cells = <2>;
193 };
194
188 sdhi0: sdhi@ee100000 { 195 sdhi0: sdhi@ee100000 {
189 compatible = "renesas,r8a73a4-sdhi"; 196 compatible = "renesas,r8a73a4-sdhi";
190 reg = <0 0xee100000 0 0x100>; 197 reg = <0 0xee100000 0 0x100>;
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index 09ea22c26359..366f72989dc3 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -10,6 +10,7 @@
10 10
11/dts-v1/; 11/dts-v1/;
12/include/ "r8a7740.dtsi" 12/include/ "r8a7740.dtsi"
13#include <dt-bindings/gpio/gpio.h>
13 14
14/ { 15/ {
15 model = "armadillo 800 eva reference"; 16 model = "armadillo 800 eva reference";
@@ -33,6 +34,21 @@
33 regulator-boot-on; 34 regulator-boot-on;
34 }; 35 };
35 36
37 leds {
38 compatible = "gpio-leds";
39 led1 {
40 gpios = <&pfc 102 GPIO_ACTIVE_HIGH>;
41 };
42 led2 {
43 gpios = <&pfc 111 GPIO_ACTIVE_HIGH>;
44 };
45 led3 {
46 gpios = <&pfc 110 GPIO_ACTIVE_HIGH>;
47 };
48 led4 {
49 gpios = <&pfc 177 GPIO_ACTIVE_HIGH>;
50 };
51 };
36}; 52};
37 53
38&i2c0 { 54&i2c0 {
@@ -41,5 +57,23 @@
41 reg = <0x55>; 57 reg = <0x55>;
42 interrupt-parent = <&irqpin1>; 58 interrupt-parent = <&irqpin1>;
43 interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */ 59 interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
60 pinctrl-0 = <&st1232_pins>;
61 pinctrl-names = "default";
62 gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
63 };
64};
65
66&pfc {
67 pinctrl-0 = <&scifa1_pins>;
68 pinctrl-names = "default";
69
70 scifa1_pins: scifa1 {
71 renesas,groups = "scifa1_data";
72 renesas,function = "scifa1";
73 };
74
75 st1232_pins: st1232 {
76 renesas,groups = "intc_irq10";
77 renesas,function = "intc";
44 }; 78 };
45}; 79};
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 24e930643821..e18a195b55f3 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -139,4 +139,12 @@
139 0 72 0x4 139 0 72 0x4
140 0 73 0x4>; 140 0 73 0x4>;
141 }; 141 };
142
143 pfc: pfc@e6050000 {
144 compatible = "renesas,pfc-r8a7740";
145 reg = <0xe6050000 0x8000>,
146 <0xe605800c 0x20>;
147 gpio-controller;
148 #gpio-cells = <2>;
149 };
142}; 150};
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 474373559bdc..45ac404ab6d8 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -32,4 +32,70 @@
32 reg = <0xfe438000 0x1000>, 32 reg = <0xfe438000 0x1000>,
33 <0xfe430000 0x100>; 33 <0xfe430000 0x100>;
34 }; 34 };
35
36 gpio0: gpio@ffc40000 {
37 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
38 reg = <0xffc40000 0x2c>;
39 interrupt-parent = <&gic>;
40 interrupts = <0 103 0x4>;
41 #gpio-cells = <2>;
42 gpio-controller;
43 gpio-ranges = <&pfc 0 0 32>;
44 #interrupt-cells = <2>;
45 interrupt-controller;
46 };
47
48 gpio1: gpio@ffc41000 {
49 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
50 reg = <0xffc41000 0x2c>;
51 interrupt-parent = <&gic>;
52 interrupts = <0 103 0x4>;
53 #gpio-cells = <2>;
54 gpio-controller;
55 gpio-ranges = <&pfc 0 32 32>;
56 #interrupt-cells = <2>;
57 interrupt-controller;
58 };
59
60 gpio2: gpio@ffc42000 {
61 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
62 reg = <0xffc42000 0x2c>;
63 interrupt-parent = <&gic>;
64 interrupts = <0 103 0x4>;
65 #gpio-cells = <2>;
66 gpio-controller;
67 gpio-ranges = <&pfc 0 64 32>;
68 #interrupt-cells = <2>;
69 interrupt-controller;
70 };
71
72 gpio3: gpio@ffc43000 {
73 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
74 reg = <0xffc43000 0x2c>;
75 interrupt-parent = <&gic>;
76 interrupts = <0 103 0x4>;
77 #gpio-cells = <2>;
78 gpio-controller;
79 gpio-ranges = <&pfc 0 96 32>;
80 #interrupt-cells = <2>;
81 interrupt-controller;
82 };
83
84 gpio4: gpio@ffc44000 {
85 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
86 reg = <0xffc44000 0x2c>;
87 interrupt-parent = <&gic>;
88 interrupts = <0 103 0x4>;
89 #gpio-cells = <2>;
90 gpio-controller;
91 gpio-ranges = <&pfc 0 128 27>;
92 #interrupt-cells = <2>;
93 interrupt-controller;
94 };
95
96 pfc: pfc@fffc0000 {
97 compatible = "renesas,pfc-r8a7778";
98 reg = <0xfffc000 0x118>;
99 #gpio-range-cells = <3>;
100 };
35}; 101};
diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
index 72be4c87cfb5..b64705be258d 100644
--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
@@ -11,6 +11,7 @@
11 11
12/dts-v1/; 12/dts-v1/;
13/include/ "r8a7779.dtsi" 13/include/ "r8a7779.dtsi"
14#include <dt-bindings/gpio/gpio.h>
14 15
15/ { 16/ {
16 model = "marzen"; 17 model = "marzen";
@@ -37,6 +38,9 @@
37 lan0@18000000 { 38 lan0@18000000 {
38 compatible = "smsc,lan9220", "smsc,lan9115"; 39 compatible = "smsc,lan9220", "smsc,lan9115";
39 reg = <0x18000000 0x100>; 40 reg = <0x18000000 0x100>;
41 pinctrl-0 = <&lan0_pins>;
42 pinctrl-names = "default";
43
40 phy-mode = "mii"; 44 phy-mode = "mii";
41 interrupt-parent = <&gic>; 45 interrupt-parent = <&gic>;
42 interrupts = <0 28 0x4>; 46 interrupts = <0 28 0x4>;
@@ -44,4 +48,49 @@
44 vddvario-supply = <&fixedregulator3v3>; 48 vddvario-supply = <&fixedregulator3v3>;
45 vdd33a-supply = <&fixedregulator3v3>; 49 vdd33a-supply = <&fixedregulator3v3>;
46 }; 50 };
51
52 leds {
53 compatible = "gpio-leds";
54 led2 {
55 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
56 };
57 led3 {
58 gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
59 };
60 led4 {
61 gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
62 };
63 };
64};
65
66&pfc {
67 pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
68 pinctrl-names = "default";
69
70 lan0_pins: lan0 {
71 intc {
72 renesas,groups = "intc_irq1_b";
73 renesas,function = "intc";
74 };
75 lbsc {
76 renesas,groups = "lbsc_ex_cs0";
77 renesas,function = "lbsc";
78 };
79 };
80
81 scif2_pins: scif2 {
82 renesas,groups = "scif2_data_c";
83 renesas,function = "scif2";
84 };
85
86 scif4_pins: scif4 {
87 renesas,groups = "scif4_data";
88 renesas,function = "scif4";
89 };
90
91 sdhi0_pins: sdhi0 {
92 renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
93 "sdhi0_wp";
94 renesas,function = "sdhi0";
95 };
47}; 96};
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 7f146c6bf756..e9fbe3d572d7 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -48,6 +48,90 @@
48 <0xf0000100 0x100>; 48 <0xf0000100 0x100>;
49 }; 49 };
50 50
51 gpio0: gpio@ffc40000 {
52 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
53 reg = <0xffc40000 0x2c>;
54 interrupt-parent = <&gic>;
55 interrupts = <0 141 0x4>;
56 #gpio-cells = <2>;
57 gpio-controller;
58 gpio-ranges = <&pfc 0 0 32>;
59 #interrupt-cells = <2>;
60 interrupt-controller;
61 };
62
63 gpio1: gpio@ffc41000 {
64 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
65 reg = <0xffc41000 0x2c>;
66 interrupt-parent = <&gic>;
67 interrupts = <0 142 0x4>;
68 #gpio-cells = <2>;
69 gpio-controller;
70 gpio-ranges = <&pfc 0 32 32>;
71 #interrupt-cells = <2>;
72 interrupt-controller;
73 };
74
75 gpio2: gpio@ffc42000 {
76 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
77 reg = <0xffc42000 0x2c>;
78 interrupt-parent = <&gic>;
79 interrupts = <0 143 0x4>;
80 #gpio-cells = <2>;
81 gpio-controller;
82 gpio-ranges = <&pfc 0 64 32>;
83 #interrupt-cells = <2>;
84 interrupt-controller;
85 };
86
87 gpio3: gpio@ffc43000 {
88 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
89 reg = <0xffc43000 0x2c>;
90 interrupt-parent = <&gic>;
91 interrupts = <0 144 0x4>;
92 #gpio-cells = <2>;
93 gpio-controller;
94 gpio-ranges = <&pfc 0 96 32>;
95 #interrupt-cells = <2>;
96 interrupt-controller;
97 };
98
99 gpio4: gpio@ffc44000 {
100 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
101 reg = <0xffc44000 0x2c>;
102 interrupt-parent = <&gic>;
103 interrupts = <0 145 0x4>;
104 #gpio-cells = <2>;
105 gpio-controller;
106 gpio-ranges = <&pfc 0 128 32>;
107 #interrupt-cells = <2>;
108 interrupt-controller;
109 };
110
111 gpio5: gpio@ffc45000 {
112 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
113 reg = <0xffc45000 0x2c>;
114 interrupt-parent = <&gic>;
115 interrupts = <0 146 0x4>;
116 #gpio-cells = <2>;
117 gpio-controller;
118 gpio-ranges = <&pfc 0 160 32>;
119 #interrupt-cells = <2>;
120 interrupt-controller;
121 };
122
123 gpio6: gpio@ffc46000 {
124 compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
125 reg = <0xffc46000 0x2c>;
126 interrupt-parent = <&gic>;
127 interrupts = <0 147 0x4>;
128 #gpio-cells = <2>;
129 gpio-controller;
130 gpio-ranges = <&pfc 0 192 9>;
131 #interrupt-cells = <2>;
132 interrupt-controller;
133 };
134
51 irqpin0: irqpin@fe780010 { 135 irqpin0: irqpin@fe780010 {
52 compatible = "renesas,intc-irqpin"; 136 compatible = "renesas,intc-irqpin";
53 #interrupt-cells = <2>; 137 #interrupt-cells = <2>;
@@ -101,6 +185,12 @@
101 interrupts = <0 81 0x4>; 185 interrupts = <0 81 0x4>;
102 }; 186 };
103 187
188 pfc: pfc@fffc0000 {
189 compatible = "renesas,pfc-r8a7779";
190 reg = <0xfffc0000 0x23c>;
191 #gpio-range-cells = <3>;
192 };
193
104 thermal@ffc48000 { 194 thermal@ffc48000 {
105 compatible = "renesas,rcar-thermal"; 195 compatible = "renesas,rcar-thermal";
106 reg = <0xffc48000 0x38>; 196 reg = <0xffc48000 0x38>;
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 9cd882028095..3b879e7c697c 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -38,6 +38,78 @@
38 interrupts = <1 9 0xf04>; 38 interrupts = <1 9 0xf04>;
39 }; 39 };
40 40
41 gpio0: gpio@ffc40000 {
42 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
43 reg = <0 0xffc40000 0 0x2c>;
44 interrupt-parent = <&gic>;
45 interrupts = <0 4 0x4>;
46 #gpio-cells = <2>;
47 gpio-controller;
48 gpio-ranges = <&pfc 0 0 32>;
49 #interrupt-cells = <2>;
50 interrupt-controller;
51 };
52
53 gpio1: gpio@ffc41000 {
54 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
55 reg = <0 0xffc41000 0 0x2c>;
56 interrupt-parent = <&gic>;
57 interrupts = <0 5 0x4>;
58 #gpio-cells = <2>;
59 gpio-controller;
60 gpio-ranges = <&pfc 0 32 32>;
61 #interrupt-cells = <2>;
62 interrupt-controller;
63 };
64
65 gpio2: gpio@ffc42000 {
66 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
67 reg = <0 0xffc42000 0 0x2c>;
68 interrupt-parent = <&gic>;
69 interrupts = <0 6 0x4>;
70 #gpio-cells = <2>;
71 gpio-controller;
72 gpio-ranges = <&pfc 0 64 32>;
73 #interrupt-cells = <2>;
74 interrupt-controller;
75 };
76
77 gpio3: gpio@ffc43000 {
78 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
79 reg = <0 0xffc43000 0 0x2c>;
80 interrupt-parent = <&gic>;
81 interrupts = <0 7 0x4>;
82 #gpio-cells = <2>;
83 gpio-controller;
84 gpio-ranges = <&pfc 0 96 32>;
85 #interrupt-cells = <2>;
86 interrupt-controller;
87 };
88
89 gpio4: gpio@ffc44000 {
90 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
91 reg = <0 0xffc44000 0 0x2c>;
92 interrupt-parent = <&gic>;
93 interrupts = <0 8 0x4>;
94 #gpio-cells = <2>;
95 gpio-controller;
96 gpio-ranges = <&pfc 0 128 32>;
97 #interrupt-cells = <2>;
98 interrupt-controller;
99 };
100
101 gpio5: gpio@ffc45000 {
102 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
103 reg = <0 0xffc45000 0 0x2c>;
104 interrupt-parent = <&gic>;
105 interrupts = <0 9 0x4>;
106 #gpio-cells = <2>;
107 gpio-controller;
108 gpio-ranges = <&pfc 0 160 32>;
109 #interrupt-cells = <2>;
110 interrupt-controller;
111 };
112
41 timer { 113 timer {
42 compatible = "arm,armv7-timer"; 114 compatible = "arm,armv7-timer";
43 interrupts = <1 13 0xf08>, 115 interrupts = <1 13 0xf08>,
@@ -73,6 +145,12 @@
73 status = "disabled"; 145 status = "disabled";
74 }; 146 };
75 147
148 pfc: pfc@e6060000 {
149 compatible = "renesas,pfc-r8a7790";
150 reg = <0 0xe6060000 0 0x250>;
151 #gpio-range-cells = <3>;
152 };
153
76 sdhi0: sdhi@ee100000 { 154 sdhi0: sdhi@ee100000 {
77 compatible = "renesas,r8a7790-sdhi"; 155 compatible = "renesas,r8a7790-sdhi";
78 reg = <0 0xee100000 0 0x100>; 156 reg = <0 0xee100000 0 0x100>;
diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
index 7bf020ecadf5..249f65be2a50 100644
--- a/arch/arm/boot/dts/sh7372.dtsi
+++ b/arch/arm/boot/dts/sh7372.dtsi
@@ -23,4 +23,12 @@
23 reg = <0x0>; 23 reg = <0x0>;
24 }; 24 };
25 }; 25 };
26
27 pfc: pfc@e6050000 {
28 compatible = "renesas,pfc-sh7372";
29 reg = <0xe6050000 0x8000>,
30 <0xe605801c 0x1c>;
31 gpio-controller;
32 #gpio-cells = <2>;
33 };
26}; 34};
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
index b6f759e830ed..b99e890def54 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
@@ -13,6 +13,7 @@
13 13
14/dts-v1/; 14/dts-v1/;
15/include/ "sh73a0.dtsi" 15/include/ "sh73a0.dtsi"
16#include <dt-bindings/gpio/gpio.h>
16 17
17/ { 18/ {
18 model = "KZM-A9-GT"; 19 model = "KZM-A9-GT";
@@ -58,6 +59,24 @@
58 regulator-boot-on; 59 regulator-boot-on;
59 }; 60 };
60 61
62 vmmc_sdhi0: regulator@2 {
63 compatible = "regulator-fixed";
64 regulator-name = "SDHI0 Vcc";
65 regulator-min-microvolt = <3300000>;
66 regulator-max-microvolt = <3300000>;
67 gpio = <&pfc 15 GPIO_ACTIVE_HIGH>;
68 enable-active-high;
69 };
70
71 vmmc_sdhi2: regulator@3 {
72 compatible = "regulator-fixed";
73 regulator-name = "SDHI2 Vcc";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
76 gpio = <&pfc 14 GPIO_ACTIVE_HIGH>;
77 enable-active-high;
78 };
79
61 lan9220@10000000 { 80 lan9220@10000000 {
62 compatible = "smsc,lan9220", "smsc,lan9115"; 81 compatible = "smsc,lan9220", "smsc,lan9115";
63 reg = <0x10000000 0x100>; 82 reg = <0x10000000 0x100>;
@@ -70,6 +89,22 @@
70 vddvario-supply = <&reg_1p8v>; 89 vddvario-supply = <&reg_1p8v>;
71 vdd33a-supply = <&reg_3p3v>; 90 vdd33a-supply = <&reg_3p3v>;
72 }; 91 };
92
93 leds {
94 compatible = "gpio-leds";
95 led1 {
96 gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
97 };
98 led2 {
99 gpios = <&pfc 21 GPIO_ACTIVE_LOW>;
100 };
101 led3 {
102 gpios = <&pfc 22 GPIO_ACTIVE_LOW>;
103 };
104 led4 {
105 gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
106 };
107 };
73}; 108};
74 109
75&i2c0 { 110&i2c0 {
@@ -145,20 +180,71 @@
145 }; 180 };
146}; 181};
147 182
183&i2c3 {
184 pinctrl-0 = <&i2c3_pins>;
185 pinctrl-names = "default";
186};
187
148&mmcif { 188&mmcif {
189 pinctrl-0 = <&mmcif_pins>;
190 pinctrl-names = "default";
191
149 bus-width = <8>; 192 bus-width = <8>;
150 vmmc-supply = <&reg_1p8v>; 193 vmmc-supply = <&reg_1p8v>;
151 status = "okay"; 194 status = "okay";
152}; 195};
153 196
197&pfc {
198 pinctrl-0 = <&scifa4_pins>;
199 pinctrl-names = "default";
200
201 i2c3_pins: i2c3 {
202 renesas,groups = "i2c3_1";
203 renesas,function = "i2c3";
204 };
205
206 mmcif_pins: mmcif {
207 mux {
208 renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
209 renesas,function = "mmc0";
210 };
211 cfg {
212 renesas,groups = "mmc0_data8_0";
213 renesas,pins = "PORT279";
214 bias-pull-up;
215 };
216 };
217
218 scifa4_pins: scifa4 {
219 renesas,groups = "scifa4_data", "scifa4_ctrl";
220 renesas,function = "scifa4";
221 };
222
223 sdhi0_pins: sdhi0 {
224 renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
225 renesas,function = "sdhi0";
226 };
227
228 sdhi2_pins: sdhi2 {
229 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
230 renesas,function = "sdhi2";
231 };
232};
233
154&sdhi0 { 234&sdhi0 {
155 vmmc-supply = <&reg_3p3v>; 235 pinctrl-0 = <&sdhi0_pins>;
236 pinctrl-names = "default";
237
238 vmmc-supply = <&vmmc_sdhi0>;
156 bus-width = <4>; 239 bus-width = <4>;
157 status = "okay"; 240 status = "okay";
158}; 241};
159 242
160&sdhi2 { 243&sdhi2 {
161 vmmc-supply = <&reg_3p3v>; 244 pinctrl-0 = <&sdhi2_pins>;
245 pinctrl-names = "default";
246
247 vmmc-supply = <&vmmc_sdhi2>;
162 bus-width = <4>; 248 bus-width = <4>;
163 broken-cd; 249 broken-cd;
164 status = "okay"; 250 status = "okay";
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b97750256003..86e79feb7560 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -222,4 +222,12 @@
222 cap-sd-highspeed; 222 cap-sd-highspeed;
223 status = "disabled"; 223 status = "disabled";
224 }; 224 };
225
226 pfc: pfc@e6050000 {
227 compatible = "renesas,pfc-sh73a0";
228 reg = <0xe6050000 0x8000>,
229 <0xe605801c 0x1c>;
230 gpio-controller;
231 #gpio-cells = <2>;
232 };
225}; 233};
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 03b85fec2ddb..002d8d3d0fc5 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -24,7 +24,6 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/pinctrl/machine.h>
28#include <mach/common.h> 27#include <mach/common.h>
29#include <mach/r8a7740.h> 28#include <mach/r8a7740.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
@@ -119,12 +118,6 @@
119 * usbhsf_power_ctrl() 118 * usbhsf_power_ctrl()
120 */ 119 */
121 120
122static const struct pinctrl_map eva_pinctrl_map[] = {
123 /* SCIFA1 */
124 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740",
125 "scifa1_data", "scifa1"),
126};
127
128static void __init eva_clock_init(void) 121static void __init eva_clock_init(void)
129{ 122{
130 struct clk *system = clk_get(NULL, "system_clk"); 123 struct clk *system = clk_get(NULL, "system_clk");
@@ -165,27 +158,18 @@ clock_error:
165 */ 158 */
166static void __init eva_init(void) 159static void __init eva_init(void)
167{ 160{
168
169 r8a7740_clock_init(MD_CK0 | MD_CK2); 161 r8a7740_clock_init(MD_CK0 | MD_CK2);
170 eva_clock_init(); 162 eva_clock_init();
171 163
172 pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
173 r8a7740_pinmux_init();
174
175 r8a7740_meram_workaround(); 164 r8a7740_meram_workaround();
176 165
177 /*
178 * Touchscreen
179 * TODO: Move reset GPIO over to .dts when we can reference it
180 */
181 gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
182
183#ifdef CONFIG_CACHE_L2X0 166#ifdef CONFIG_CACHE_L2X0
184 /* Early BRESP enable, Shared attribute override enable, 32K*8way */ 167 /* Early BRESP enable, Shared attribute override enable, 32K*8way */
185 l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); 168 l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
186#endif 169#endif
187 170
188 r8a7740_add_standard_devices_dt(); 171 r8a7740_add_standard_devices_dt();
172
189 r8a7740_pm_init(); 173 r8a7740_pm_init();
190} 174}
191 175
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index 41092bb01ee5..a66a808db012 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -21,66 +21,19 @@
21 */ 21 */
22 22
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/gpio.h>
25#include <linux/io.h> 24#include <linux/io.h>
26#include <linux/irq.h> 25#include <linux/irq.h>
27#include <linux/input.h> 26#include <linux/input.h>
28#include <linux/of_platform.h> 27#include <linux/of_platform.h>
29#include <linux/pinctrl/machine.h>
30#include <linux/pinctrl/pinconf-generic.h>
31#include <mach/sh73a0.h> 28#include <mach/sh73a0.h>
32#include <mach/common.h> 29#include <mach/common.h>
33#include <asm/hardware/cache-l2x0.h> 30#include <asm/hardware/cache-l2x0.h>
34#include <asm/mach-types.h> 31#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
36 33
37static unsigned long pin_pullup_conf[] = {
38 PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
39};
40
41static const struct pinctrl_map kzm_pinctrl_map[] = {
42 PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "pfc-sh73a0",
43 "i2c3_1", "i2c3"),
44 /* MMCIF */
45 PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
46 "mmc0_data8_0", "mmc0"),
47 PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
48 "mmc0_ctrl_0", "mmc0"),
49 PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
50 "PORT279", pin_pullup_conf),
51 PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
52 "mmc0_data8_0", pin_pullup_conf),
53 /* SCIFA4 */
54 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
55 "scifa4_data", "scifa4"),
56 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
57 "scifa4_ctrl", "scifa4"),
58 /* SDHI0 */
59 PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
60 "sdhi0_data4", "sdhi0"),
61 PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
62 "sdhi0_ctrl", "sdhi0"),
63 PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
64 "sdhi0_cd", "sdhi0"),
65 PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
66 "sdhi0_wp", "sdhi0"),
67 /* SDHI2 */
68 PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
69 "sdhi2_data4", "sdhi2"),
70 PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
71 "sdhi2_ctrl", "sdhi2"),
72};
73
74static void __init kzm_init(void) 34static void __init kzm_init(void)
75{ 35{
76 sh73a0_add_standard_devices_dt(); 36 sh73a0_add_standard_devices_dt();
77 pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
78 sh73a0_pinmux_init();
79
80 /* enable SD */
81 gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
82
83 gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
84 37
85#ifdef CONFIG_CACHE_L2X0 38#ifdef CONFIG_CACHE_L2X0
86 /* Early BRESP enable, Shared attribute override enable, 64K*8way */ 39 /* Early BRESP enable, Shared attribute override enable, 64K*8way */
diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
index 480d882e42c7..3d1c439b4998 100644
--- a/arch/arm/mach-shmobile/board-marzen-reference.c
+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
@@ -19,42 +19,14 @@
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */ 20 */
21 21
22#include <linux/pinctrl/machine.h>
23#include <mach/r8a7779.h> 22#include <mach/r8a7779.h>
24#include <mach/common.h> 23#include <mach/common.h>
25#include <mach/irqs.h> 24#include <mach/irqs.h>
26#include <asm/irq.h> 25#include <asm/irq.h>
27#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
28 27
29static const struct pinctrl_map marzen_pinctrl_map[] = {
30 /* SCIF2 (CN18: DEBUG0) */
31 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-r8a7779",
32 "scif2_data_c", "scif2"),
33 /* SCIF4 (CN19: DEBUG1) */
34 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-r8a7779",
35 "scif4_data", "scif4"),
36 /* SDHI0 */
37 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
38 "sdhi0_data4", "sdhi0"),
39 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
40 "sdhi0_ctrl", "sdhi0"),
41 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
42 "sdhi0_cd", "sdhi0"),
43 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
44 "sdhi0_wp", "sdhi0"),
45 /* SMSC */
46 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
47 "intc_irq1_b", "intc"),
48 PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
49 "lbsc_ex_cs0", "lbsc"),
50};
51
52static void __init marzen_init(void) 28static void __init marzen_init(void)
53{ 29{
54 pinctrl_register_mappings(marzen_pinctrl_map,
55 ARRAY_SIZE(marzen_pinctrl_map));
56 r8a7779_pinmux_init();
57
58 r8a7779_add_standard_devices_dt(); 30 r8a7779_add_standard_devices_dt();
59} 31}
60 32
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-15 10:17:37 -0400