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authorkbuild test robot <fengguang.wu@intel.com>2017-06-22 16:28:47 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-06-29 12:43:49 -0400
commit552c8f76afe7d24c1c1415ec951dea56d553d59c (patch)
treef6b3b16d60d17df8d94355772bc53ce0afbb6338
parentf03defe0b70c8c3e19c267fa27f094ce6503c30f (diff)
drm/amdgpu/gfx9: gfx_v9_0_enable_gfx_static_mg_power_gating() can be static
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index ba228f613027..209bf0188e06 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1964,8 +1964,8 @@ static void gfx_v9_0_enable_gfx_pipeline_powergating(struct amdgpu_device *adev,
1964 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmDB_RENDER_CONTROL)); 1964 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmDB_RENDER_CONTROL));
1965} 1965}
1966 1966
1967void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev, 1967static void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,
1968 bool enable) 1968 bool enable)
1969{ 1969{
1970 uint32_t data, default_data; 1970 uint32_t data, default_data;
1971 1971
@@ -1978,7 +1978,7 @@ void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,
1978 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data); 1978 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
1979} 1979}
1980 1980
1981void gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev, 1981static void gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev,
1982 bool enable) 1982 bool enable)
1983{ 1983{
1984 uint32_t data, default_data; 1984 uint32_t data, default_data;