diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-10-20 18:17:43 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-10-20 18:17:43 -0400 |
commit | 545ea16f7c42969f94c769d0c2267cf4a65e5850 (patch) | |
tree | ba2835f51f3a3f42c309fc18e1381432ea3f171c | |
parent | 1c9fec470b81ca5e89391c20a11ead31a1e9314b (diff) | |
parent | 6bf99a6cb69f78de0083b76a7c033918f853f580 (diff) |
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here is another set of bugfixes for ARM SoCs, mostly harmless:
- a boot regression fix on ux500
- PCIe interrupts on NXP i.MX7 and on Marvell Armada 7K/8K were wired
up wrong, in different ways
- Armada XP support for large memory never worked
- the socfpga reset controller now builds on 64-bit
- minor device tree corrections on gemini, mvebu, r-pi 3, rockchip
and at91"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: ux500: Fix regression while init PM domains
ARM: dts: fix PCLK name on Gemini and MOXA ART
arm64: dts: rockchip: fix typo in iommu nodes
arm64: dts: rockchip: correct vqmmc voltage for rk3399 platforms
ARM: dts: imx7d: Invert legacy PCI irq mapping
bus: mbus: fix window size calculation for 4GB windows
ARM: dts: at91: sama5d2: add ADC hw trigger edge type
ARM: dts: at91: sama5d2_xplained: enable ADTRG pin
ARM: dts: at91: at91-sama5d27_som1: fix PHY ID
ARM: dts: bcm283x: Fix console path on RPi3
reset: socfpga: fix for 64-bit compilation
ARM: dts: Fix I2C repeated start issue on Armada-38x
arm64: dts: marvell: fix interrupt-map property for Armada CP110 PCIe controller
arm64: dts: salvator-common: add 12V regulator to backlight
ARM: dts: sun6i: Fix endpoint IDs in second display pipeline
arm64: allwinner: a64: pine64: Use dcdc1 regulator for mmc0
25 files changed, 92 insertions, 62 deletions
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 7ff0811e61db..4960722aab32 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi | |||
@@ -178,7 +178,7 @@ | |||
178 | }; | 178 | }; |
179 | 179 | ||
180 | i2c0: i2c@11000 { | 180 | i2c0: i2c@11000 { |
181 | compatible = "marvell,mv64xxx-i2c"; | 181 | compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c"; |
182 | reg = <0x11000 0x20>; | 182 | reg = <0x11000 0x20>; |
183 | #address-cells = <1>; | 183 | #address-cells = <1>; |
184 | #size-cells = <0>; | 184 | #size-cells = <0>; |
@@ -189,7 +189,7 @@ | |||
189 | }; | 189 | }; |
190 | 190 | ||
191 | i2c1: i2c@11100 { | 191 | i2c1: i2c@11100 { |
192 | compatible = "marvell,mv64xxx-i2c"; | 192 | compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c"; |
193 | reg = <0x11100 0x20>; | 193 | reg = <0x11100 0x20>; |
194 | #address-cells = <1>; | 194 | #address-cells = <1>; |
195 | #size-cells = <0>; | 195 | #size-cells = <0>; |
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi index 63a5af898165..cf0087b4c9e1 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi | |||
@@ -67,8 +67,8 @@ | |||
67 | pinctrl-0 = <&pinctrl_macb0_default>; | 67 | pinctrl-0 = <&pinctrl_macb0_default>; |
68 | phy-mode = "rmii"; | 68 | phy-mode = "rmii"; |
69 | 69 | ||
70 | ethernet-phy@1 { | 70 | ethernet-phy@0 { |
71 | reg = <0x1>; | 71 | reg = <0x0>; |
72 | interrupt-parent = <&pioA>; | 72 | interrupt-parent = <&pioA>; |
73 | interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>; | 73 | interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>; |
74 | pinctrl-names = "default"; | 74 | pinctrl-names = "default"; |
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index c7e9ccf2bc87..cbc26001247b 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts | |||
@@ -309,7 +309,7 @@ | |||
309 | vddana-supply = <&vdd_3v3_lp_reg>; | 309 | vddana-supply = <&vdd_3v3_lp_reg>; |
310 | vref-supply = <&vdd_3v3_lp_reg>; | 310 | vref-supply = <&vdd_3v3_lp_reg>; |
311 | pinctrl-names = "default"; | 311 | pinctrl-names = "default"; |
312 | pinctrl-0 = <&pinctrl_adc_default>; | 312 | pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; |
313 | status = "okay"; | 313 | status = "okay"; |
314 | }; | 314 | }; |
315 | 315 | ||
@@ -340,6 +340,20 @@ | |||
340 | bias-disable; | 340 | bias-disable; |
341 | }; | 341 | }; |
342 | 342 | ||
343 | /* | ||
344 | * The ADTRG pin can work on any edge type. | ||
345 | * In here it's being pulled up, so need to | ||
346 | * connect it to ground to get an edge e.g. | ||
347 | * Trigger can be configured on falling, rise | ||
348 | * or any edge, and the pull-up can be changed | ||
349 | * to pull-down or left floating according to | ||
350 | * needs. | ||
351 | */ | ||
352 | pinctrl_adtrg_default: adtrg_default { | ||
353 | pinmux = <PIN_PD31__ADTRG>; | ||
354 | bias-pull-up; | ||
355 | }; | ||
356 | |||
343 | pinctrl_charger_chglev: charger_chglev { | 357 | pinctrl_charger_chglev: charger_chglev { |
344 | pinmux = <PIN_PA12__GPIO>; | 358 | pinmux = <PIN_PA12__GPIO>; |
345 | bias-disable; | 359 | bias-disable; |
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts index 82651c3eb682..b8565fc33eea 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | |||
@@ -18,12 +18,9 @@ | |||
18 | compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; | 18 | compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; |
19 | model = "Raspberry Pi Zero W"; | 19 | model = "Raspberry Pi Zero W"; |
20 | 20 | ||
21 | /* Needed by firmware to properly init UARTs */ | 21 | chosen { |
22 | aliases { | 22 | /* 8250 auxiliary UART instead of pl011 */ |
23 | uart0 = "/soc/serial@7e201000"; | 23 | stdout-path = "serial1:115200n8"; |
24 | uart1 = "/soc/serial@7e215040"; | ||
25 | serial0 = "/soc/serial@7e201000"; | ||
26 | serial1 = "/soc/serial@7e215040"; | ||
27 | }; | 24 | }; |
28 | 25 | ||
29 | leds { | 26 | leds { |
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts index 20725ca487f3..c71a0d73d2a2 100644 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts | |||
@@ -8,6 +8,11 @@ | |||
8 | compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; | 8 | compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; |
9 | model = "Raspberry Pi 3 Model B"; | 9 | model = "Raspberry Pi 3 Model B"; |
10 | 10 | ||
11 | chosen { | ||
12 | /* 8250 auxiliary UART instead of pl011 */ | ||
13 | stdout-path = "serial1:115200n8"; | ||
14 | }; | ||
15 | |||
11 | memory { | 16 | memory { |
12 | reg = <0 0x40000000>; | 17 | reg = <0 0x40000000>; |
13 | }; | 18 | }; |
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 431dcfc900c0..013431e3d7c3 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi | |||
@@ -20,8 +20,13 @@ | |||
20 | #address-cells = <1>; | 20 | #address-cells = <1>; |
21 | #size-cells = <1>; | 21 | #size-cells = <1>; |
22 | 22 | ||
23 | aliases { | ||
24 | serial0 = &uart0; | ||
25 | serial1 = &uart1; | ||
26 | }; | ||
27 | |||
23 | chosen { | 28 | chosen { |
24 | bootargs = "earlyprintk console=ttyAMA0"; | 29 | stdout-path = "serial0:115200n8"; |
25 | }; | 30 | }; |
26 | 31 | ||
27 | thermal-zones { | 32 | thermal-zones { |
diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi index c68e8d430234..f0d178c77153 100644 --- a/arch/arm/boot/dts/gemini.dtsi +++ b/arch/arm/boot/dts/gemini.dtsi | |||
@@ -145,11 +145,12 @@ | |||
145 | }; | 145 | }; |
146 | 146 | ||
147 | watchdog@41000000 { | 147 | watchdog@41000000 { |
148 | compatible = "cortina,gemini-watchdog"; | 148 | compatible = "cortina,gemini-watchdog", "faraday,ftwdt010"; |
149 | reg = <0x41000000 0x1000>; | 149 | reg = <0x41000000 0x1000>; |
150 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; | 150 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; |
151 | resets = <&syscon GEMINI_RESET_WDOG>; | 151 | resets = <&syscon GEMINI_RESET_WDOG>; |
152 | clocks = <&syscon GEMINI_CLK_APB>; | 152 | clocks = <&syscon GEMINI_CLK_APB>; |
153 | clock-names = "PCLK"; | ||
153 | }; | 154 | }; |
154 | 155 | ||
155 | uart0: serial@42000000 { | 156 | uart0: serial@42000000 { |
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index f46814a7ea44..4d308d17f040 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi | |||
@@ -144,10 +144,10 @@ | |||
144 | interrupt-names = "msi"; | 144 | interrupt-names = "msi"; |
145 | #interrupt-cells = <1>; | 145 | #interrupt-cells = <1>; |
146 | interrupt-map-mask = <0 0 0 0x7>; | 146 | interrupt-map-mask = <0 0 0 0x7>; |
147 | interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | 147 | interrupt-map = <0 0 0 1 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, |
148 | <0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | 148 | <0 0 0 2 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, |
149 | <0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | 149 | <0 0 0 3 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, |
150 | <0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; | 150 | <0 0 0 4 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; |
151 | clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, | 151 | clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, |
152 | <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, | 152 | <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, |
153 | <&clks IMX7D_PCIE_PHY_ROOT_CLK>; | 153 | <&clks IMX7D_PCIE_PHY_ROOT_CLK>; |
diff --git a/arch/arm/boot/dts/moxart.dtsi b/arch/arm/boot/dts/moxart.dtsi index 1f4c795d3f72..da7b3237bfe9 100644 --- a/arch/arm/boot/dts/moxart.dtsi +++ b/arch/arm/boot/dts/moxart.dtsi | |||
@@ -87,9 +87,10 @@ | |||
87 | }; | 87 | }; |
88 | 88 | ||
89 | watchdog: watchdog@98500000 { | 89 | watchdog: watchdog@98500000 { |
90 | compatible = "moxa,moxart-watchdog"; | 90 | compatible = "moxa,moxart-watchdog", "faraday,ftwdt010"; |
91 | reg = <0x98500000 0x10>; | 91 | reg = <0x98500000 0x10>; |
92 | clocks = <&clk_apb>; | 92 | clocks = <&clk_apb>; |
93 | clock-names = "PCLK"; | ||
93 | }; | 94 | }; |
94 | 95 | ||
95 | sdhci: sdhci@98e00000 { | 96 | sdhci: sdhci@98e00000 { |
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 38d2216c7ead..b1a26b42d190 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi | |||
@@ -1430,6 +1430,7 @@ | |||
1430 | atmel,min-sample-rate-hz = <200000>; | 1430 | atmel,min-sample-rate-hz = <200000>; |
1431 | atmel,max-sample-rate-hz = <20000000>; | 1431 | atmel,max-sample-rate-hz = <20000000>; |
1432 | atmel,startup-time-ms = <4>; | 1432 | atmel,startup-time-ms = <4>; |
1433 | atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>; | ||
1433 | status = "disabled"; | 1434 | status = "disabled"; |
1434 | }; | 1435 | }; |
1435 | 1436 | ||
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index b147cb0dc14b..eef072a21acc 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi | |||
@@ -311,8 +311,8 @@ | |||
311 | #size-cells = <0>; | 311 | #size-cells = <0>; |
312 | reg = <0>; | 312 | reg = <0>; |
313 | 313 | ||
314 | tcon1_in_drc1: endpoint@0 { | 314 | tcon1_in_drc1: endpoint@1 { |
315 | reg = <0>; | 315 | reg = <1>; |
316 | remote-endpoint = <&drc1_out_tcon1>; | 316 | remote-endpoint = <&drc1_out_tcon1>; |
317 | }; | 317 | }; |
318 | }; | 318 | }; |
@@ -1012,8 +1012,8 @@ | |||
1012 | #size-cells = <0>; | 1012 | #size-cells = <0>; |
1013 | reg = <1>; | 1013 | reg = <1>; |
1014 | 1014 | ||
1015 | be1_out_drc1: endpoint@0 { | 1015 | be1_out_drc1: endpoint@1 { |
1016 | reg = <0>; | 1016 | reg = <1>; |
1017 | remote-endpoint = <&drc1_in_be1>; | 1017 | remote-endpoint = <&drc1_in_be1>; |
1018 | }; | 1018 | }; |
1019 | }; | 1019 | }; |
@@ -1042,8 +1042,8 @@ | |||
1042 | #size-cells = <0>; | 1042 | #size-cells = <0>; |
1043 | reg = <0>; | 1043 | reg = <0>; |
1044 | 1044 | ||
1045 | drc1_in_be1: endpoint@0 { | 1045 | drc1_in_be1: endpoint@1 { |
1046 | reg = <0>; | 1046 | reg = <1>; |
1047 | remote-endpoint = <&be1_out_drc1>; | 1047 | remote-endpoint = <&be1_out_drc1>; |
1048 | }; | 1048 | }; |
1049 | }; | 1049 | }; |
@@ -1053,8 +1053,8 @@ | |||
1053 | #size-cells = <0>; | 1053 | #size-cells = <0>; |
1054 | reg = <1>; | 1054 | reg = <1>; |
1055 | 1055 | ||
1056 | drc1_out_tcon1: endpoint@0 { | 1056 | drc1_out_tcon1: endpoint@1 { |
1057 | reg = <0>; | 1057 | reg = <1>; |
1058 | remote-endpoint = <&tcon1_in_drc1>; | 1058 | remote-endpoint = <&tcon1_in_drc1>; |
1059 | }; | 1059 | }; |
1060 | }; | 1060 | }; |
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 71a34e8c345a..57058ac46f49 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
33 | 33 | ||
34 | #include "db8500-regs.h" | 34 | #include "db8500-regs.h" |
35 | #include "pm_domains.h" | ||
35 | 36 | ||
36 | static int __init ux500_l2x0_unlock(void) | 37 | static int __init ux500_l2x0_unlock(void) |
37 | { | 38 | { |
@@ -157,6 +158,9 @@ static const struct of_device_id u8500_local_bus_nodes[] = { | |||
157 | 158 | ||
158 | static void __init u8500_init_machine(void) | 159 | static void __init u8500_init_machine(void) |
159 | { | 160 | { |
161 | /* Initialize ux500 power domains */ | ||
162 | ux500_pm_domains_init(); | ||
163 | |||
160 | /* automatically probe child nodes of dbx5x0 devices */ | 164 | /* automatically probe child nodes of dbx5x0 devices */ |
161 | if (of_machine_is_compatible("st-ericsson,u8540")) | 165 | if (of_machine_is_compatible("st-ericsson,u8540")) |
162 | of_platform_populate(NULL, u8500_local_bus_nodes, | 166 | of_platform_populate(NULL, u8500_local_bus_nodes, |
diff --git a/arch/arm/mach-ux500/pm.c b/arch/arm/mach-ux500/pm.c index a970e7fcba9e..f6c33a0c1c61 100644 --- a/arch/arm/mach-ux500/pm.c +++ b/arch/arm/mach-ux500/pm.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/of_address.h> | 19 | #include <linux/of_address.h> |
20 | 20 | ||
21 | #include "db8500-regs.h" | 21 | #include "db8500-regs.h" |
22 | #include "pm_domains.h" | ||
23 | 22 | ||
24 | /* ARM WFI Standby signal register */ | 23 | /* ARM WFI Standby signal register */ |
25 | #define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) | 24 | #define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130) |
@@ -203,7 +202,4 @@ void __init ux500_pm_init(u32 phy_base, u32 size) | |||
203 | 202 | ||
204 | /* Set up ux500 suspend callbacks. */ | 203 | /* Set up ux500 suspend callbacks. */ |
205 | suspend_set_ops(UX500_SUSPEND_OPS); | 204 | suspend_set_ops(UX500_SUSPEND_OPS); |
206 | |||
207 | /* Initialize ux500 power domains */ | ||
208 | ux500_pm_domains_init(); | ||
209 | } | 205 | } |
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts index caf8b6fbe5e3..d06e34b5d192 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | |||
@@ -61,13 +61,6 @@ | |||
61 | chosen { | 61 | chosen { |
62 | stdout-path = "serial0:115200n8"; | 62 | stdout-path = "serial0:115200n8"; |
63 | }; | 63 | }; |
64 | |||
65 | reg_vcc3v3: vcc3v3 { | ||
66 | compatible = "regulator-fixed"; | ||
67 | regulator-name = "vcc3v3"; | ||
68 | regulator-min-microvolt = <3300000>; | ||
69 | regulator-max-microvolt = <3300000>; | ||
70 | }; | ||
71 | }; | 64 | }; |
72 | 65 | ||
73 | &ehci0 { | 66 | &ehci0 { |
@@ -91,7 +84,7 @@ | |||
91 | &mmc0 { | 84 | &mmc0 { |
92 | pinctrl-names = "default"; | 85 | pinctrl-names = "default"; |
93 | pinctrl-0 = <&mmc0_pins>; | 86 | pinctrl-0 = <&mmc0_pins>; |
94 | vmmc-supply = <®_vcc3v3>; | 87 | vmmc-supply = <®_dcdc1>; |
95 | cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; | 88 | cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; |
96 | cd-inverted; | 89 | cd-inverted; |
97 | disable-wp; | 90 | disable-wp; |
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index 8263a8a504a8..f2aa2a81de4d 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | |||
@@ -336,7 +336,7 @@ | |||
336 | /* non-prefetchable memory */ | 336 | /* non-prefetchable memory */ |
337 | 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; | 337 | 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; |
338 | interrupt-map-mask = <0 0 0 0>; | 338 | interrupt-map-mask = <0 0 0 0>; |
339 | interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; | 339 | interrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; |
340 | interrupts = <ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; | 340 | interrupts = <ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; |
341 | num-lanes = <1>; | 341 | num-lanes = <1>; |
342 | clocks = <&cpm_clk 1 13>; | 342 | clocks = <&cpm_clk 1 13>; |
@@ -362,7 +362,7 @@ | |||
362 | /* non-prefetchable memory */ | 362 | /* non-prefetchable memory */ |
363 | 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>; | 363 | 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>; |
364 | interrupt-map-mask = <0 0 0 0>; | 364 | interrupt-map-mask = <0 0 0 0>; |
365 | interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; | 365 | interrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; |
366 | interrupts = <ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; | 366 | interrupts = <ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; |
367 | 367 | ||
368 | num-lanes = <1>; | 368 | num-lanes = <1>; |
@@ -389,7 +389,7 @@ | |||
389 | /* non-prefetchable memory */ | 389 | /* non-prefetchable memory */ |
390 | 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>; | 390 | 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>; |
391 | interrupt-map-mask = <0 0 0 0>; | 391 | interrupt-map-mask = <0 0 0 0>; |
392 | interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; | 392 | interrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; |
393 | interrupts = <ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; | 393 | interrupts = <ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; |
394 | 394 | ||
395 | num-lanes = <1>; | 395 | num-lanes = <1>; |
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index b71ee6c83668..4fe70323abb3 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | |||
@@ -335,7 +335,7 @@ | |||
335 | /* non-prefetchable memory */ | 335 | /* non-prefetchable memory */ |
336 | 0x82000000 0 0xfa000000 0 0xfa000000 0 0xf00000>; | 336 | 0x82000000 0 0xfa000000 0 0xfa000000 0 0xf00000>; |
337 | interrupt-map-mask = <0 0 0 0>; | 337 | interrupt-map-mask = <0 0 0 0>; |
338 | interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; | 338 | interrupt-map = <0 0 0 0 &cps_icu ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; |
339 | interrupts = <ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; | 339 | interrupts = <ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; |
340 | num-lanes = <1>; | 340 | num-lanes = <1>; |
341 | clocks = <&cps_clk 1 13>; | 341 | clocks = <&cps_clk 1 13>; |
@@ -361,7 +361,7 @@ | |||
361 | /* non-prefetchable memory */ | 361 | /* non-prefetchable memory */ |
362 | 0x82000000 0 0xfb000000 0 0xfb000000 0 0xf00000>; | 362 | 0x82000000 0 0xfb000000 0 0xfb000000 0 0xf00000>; |
363 | interrupt-map-mask = <0 0 0 0>; | 363 | interrupt-map-mask = <0 0 0 0>; |
364 | interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; | 364 | interrupt-map = <0 0 0 0 &cps_icu ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; |
365 | interrupts = <ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; | 365 | interrupts = <ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>; |
366 | 366 | ||
367 | num-lanes = <1>; | 367 | num-lanes = <1>; |
@@ -388,7 +388,7 @@ | |||
388 | /* non-prefetchable memory */ | 388 | /* non-prefetchable memory */ |
389 | 0x82000000 0 0xfc000000 0 0xfc000000 0 0xf00000>; | 389 | 0x82000000 0 0xfc000000 0 0xfc000000 0 0xf00000>; |
390 | interrupt-map-mask = <0 0 0 0>; | 390 | interrupt-map-mask = <0 0 0 0>; |
391 | interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; | 391 | interrupt-map = <0 0 0 0 &cps_icu ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; |
392 | interrupts = <ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; | 392 | interrupts = <ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>; |
393 | 393 | ||
394 | num-lanes = <1>; | 394 | num-lanes = <1>; |
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi index 4786c67b5e65..d9d885006a8e 100644 --- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi +++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi | |||
@@ -62,6 +62,7 @@ | |||
62 | brightness-levels = <256 128 64 16 8 4 0>; | 62 | brightness-levels = <256 128 64 16 8 4 0>; |
63 | default-brightness-level = <6>; | 63 | default-brightness-level = <6>; |
64 | 64 | ||
65 | power-supply = <®_12v>; | ||
65 | enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; | 66 | enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; |
66 | }; | 67 | }; |
67 | 68 | ||
@@ -83,6 +84,15 @@ | |||
83 | regulator-always-on; | 84 | regulator-always-on; |
84 | }; | 85 | }; |
85 | 86 | ||
87 | reg_12v: regulator2 { | ||
88 | compatible = "regulator-fixed"; | ||
89 | regulator-name = "fixed-12V"; | ||
90 | regulator-min-microvolt = <12000000>; | ||
91 | regulator-max-microvolt = <12000000>; | ||
92 | regulator-boot-on; | ||
93 | regulator-always-on; | ||
94 | }; | ||
95 | |||
86 | rsnd_ak4613: sound { | 96 | rsnd_ak4613: sound { |
87 | compatible = "simple-audio-card"; | 97 | compatible = "simple-audio-card"; |
88 | 98 | ||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 6d615cb6e64d..41d61840fb99 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi | |||
@@ -582,7 +582,7 @@ | |||
582 | vop_mmu: iommu@ff373f00 { | 582 | vop_mmu: iommu@ff373f00 { |
583 | compatible = "rockchip,iommu"; | 583 | compatible = "rockchip,iommu"; |
584 | reg = <0x0 0xff373f00 0x0 0x100>; | 584 | reg = <0x0 0xff373f00 0x0 0x100>; |
585 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>; | 585 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
586 | interrupt-names = "vop_mmu"; | 586 | interrupt-names = "vop_mmu"; |
587 | #iommu-cells = <0>; | 587 | #iommu-cells = <0>; |
588 | status = "disabled"; | 588 | status = "disabled"; |
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 19fbaa5e7bdd..1070c8264c13 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi | |||
@@ -740,7 +740,7 @@ | |||
740 | iep_mmu: iommu@ff900800 { | 740 | iep_mmu: iommu@ff900800 { |
741 | compatible = "rockchip,iommu"; | 741 | compatible = "rockchip,iommu"; |
742 | reg = <0x0 0xff900800 0x0 0x100>; | 742 | reg = <0x0 0xff900800 0x0 0x100>; |
743 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>; | 743 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
744 | interrupt-names = "iep_mmu"; | 744 | interrupt-names = "iep_mmu"; |
745 | #iommu-cells = <0>; | 745 | #iommu-cells = <0>; |
746 | status = "disabled"; | 746 | status = "disabled"; |
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts index 7fd4bfcaa38e..fef82274a39d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | |||
@@ -371,10 +371,10 @@ | |||
371 | regulator-always-on; | 371 | regulator-always-on; |
372 | regulator-boot-on; | 372 | regulator-boot-on; |
373 | regulator-min-microvolt = <1800000>; | 373 | regulator-min-microvolt = <1800000>; |
374 | regulator-max-microvolt = <3300000>; | 374 | regulator-max-microvolt = <3000000>; |
375 | regulator-state-mem { | 375 | regulator-state-mem { |
376 | regulator-on-in-suspend; | 376 | regulator-on-in-suspend; |
377 | regulator-suspend-microvolt = <3300000>; | 377 | regulator-suspend-microvolt = <3000000>; |
378 | }; | 378 | }; |
379 | }; | 379 | }; |
380 | 380 | ||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi index 53ff3d191a1d..910628d18add 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | |||
@@ -325,12 +325,12 @@ | |||
325 | vcc_sd: LDO_REG4 { | 325 | vcc_sd: LDO_REG4 { |
326 | regulator-name = "vcc_sd"; | 326 | regulator-name = "vcc_sd"; |
327 | regulator-min-microvolt = <1800000>; | 327 | regulator-min-microvolt = <1800000>; |
328 | regulator-max-microvolt = <3300000>; | 328 | regulator-max-microvolt = <3000000>; |
329 | regulator-always-on; | 329 | regulator-always-on; |
330 | regulator-boot-on; | 330 | regulator-boot-on; |
331 | regulator-state-mem { | 331 | regulator-state-mem { |
332 | regulator-on-in-suspend; | 332 | regulator-on-in-suspend; |
333 | regulator-suspend-microvolt = <3300000>; | 333 | regulator-suspend-microvolt = <3000000>; |
334 | }; | 334 | }; |
335 | }; | 335 | }; |
336 | 336 | ||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi index 6c30bb02210d..0f873c897d0d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | |||
@@ -315,10 +315,10 @@ | |||
315 | regulator-always-on; | 315 | regulator-always-on; |
316 | regulator-boot-on; | 316 | regulator-boot-on; |
317 | regulator-min-microvolt = <1800000>; | 317 | regulator-min-microvolt = <1800000>; |
318 | regulator-max-microvolt = <3300000>; | 318 | regulator-max-microvolt = <3000000>; |
319 | regulator-state-mem { | 319 | regulator-state-mem { |
320 | regulator-on-in-suspend; | 320 | regulator-on-in-suspend; |
321 | regulator-suspend-microvolt = <3300000>; | 321 | regulator-suspend-microvolt = <3000000>; |
322 | }; | 322 | }; |
323 | }; | 323 | }; |
324 | 324 | ||
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c index c7f396903184..70db4d5638a6 100644 --- a/drivers/bus/mvebu-mbus.c +++ b/drivers/bus/mvebu-mbus.c | |||
@@ -720,7 +720,7 @@ mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus) | |||
720 | if (mbus->hw_io_coherency) | 720 | if (mbus->hw_io_coherency) |
721 | w->mbus_attr |= ATTR_HW_COHERENCY; | 721 | w->mbus_attr |= ATTR_HW_COHERENCY; |
722 | w->base = base & DDR_BASE_CS_LOW_MASK; | 722 | w->base = base & DDR_BASE_CS_LOW_MASK; |
723 | w->size = (size | ~DDR_SIZE_MASK) + 1; | 723 | w->size = (u64)(size | ~DDR_SIZE_MASK) + 1; |
724 | } | 724 | } |
725 | } | 725 | } |
726 | mvebu_mbus_dram_info.num_cs = cs; | 726 | mvebu_mbus_dram_info.num_cs = cs; |
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c index c60904ff40b8..3907bbc9c6cf 100644 --- a/drivers/reset/reset-socfpga.c +++ b/drivers/reset/reset-socfpga.c | |||
@@ -40,8 +40,9 @@ static int socfpga_reset_assert(struct reset_controller_dev *rcdev, | |||
40 | struct socfpga_reset_data *data = container_of(rcdev, | 40 | struct socfpga_reset_data *data = container_of(rcdev, |
41 | struct socfpga_reset_data, | 41 | struct socfpga_reset_data, |
42 | rcdev); | 42 | rcdev); |
43 | int bank = id / BITS_PER_LONG; | 43 | int reg_width = sizeof(u32); |
44 | int offset = id % BITS_PER_LONG; | 44 | int bank = id / (reg_width * BITS_PER_BYTE); |
45 | int offset = id % (reg_width * BITS_PER_BYTE); | ||
45 | unsigned long flags; | 46 | unsigned long flags; |
46 | u32 reg; | 47 | u32 reg; |
47 | 48 | ||
@@ -61,8 +62,9 @@ static int socfpga_reset_deassert(struct reset_controller_dev *rcdev, | |||
61 | struct socfpga_reset_data, | 62 | struct socfpga_reset_data, |
62 | rcdev); | 63 | rcdev); |
63 | 64 | ||
64 | int bank = id / BITS_PER_LONG; | 65 | int reg_width = sizeof(u32); |
65 | int offset = id % BITS_PER_LONG; | 66 | int bank = id / (reg_width * BITS_PER_BYTE); |
67 | int offset = id % (reg_width * BITS_PER_BYTE); | ||
66 | unsigned long flags; | 68 | unsigned long flags; |
67 | u32 reg; | 69 | u32 reg; |
68 | 70 | ||
@@ -81,8 +83,9 @@ static int socfpga_reset_status(struct reset_controller_dev *rcdev, | |||
81 | { | 83 | { |
82 | struct socfpga_reset_data *data = container_of(rcdev, | 84 | struct socfpga_reset_data *data = container_of(rcdev, |
83 | struct socfpga_reset_data, rcdev); | 85 | struct socfpga_reset_data, rcdev); |
84 | int bank = id / BITS_PER_LONG; | 86 | int reg_width = sizeof(u32); |
85 | int offset = id % BITS_PER_LONG; | 87 | int bank = id / (reg_width * BITS_PER_BYTE); |
88 | int offset = id % (reg_width * BITS_PER_BYTE); | ||
86 | u32 reg; | 89 | u32 reg; |
87 | 90 | ||
88 | reg = readl(data->membase + (bank * BANK_INCREMENT)); | 91 | reg = readl(data->membase + (bank * BANK_INCREMENT)); |
@@ -132,7 +135,7 @@ static int socfpga_reset_probe(struct platform_device *pdev) | |||
132 | spin_lock_init(&data->lock); | 135 | spin_lock_init(&data->lock); |
133 | 136 | ||
134 | data->rcdev.owner = THIS_MODULE; | 137 | data->rcdev.owner = THIS_MODULE; |
135 | data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG; | 138 | data->rcdev.nr_resets = NR_BANKS * (sizeof(u32) * BITS_PER_BYTE); |
136 | data->rcdev.ops = &socfpga_reset_ops; | 139 | data->rcdev.ops = &socfpga_reset_ops; |
137 | data->rcdev.of_node = pdev->dev.of_node; | 140 | data->rcdev.of_node = pdev->dev.of_node; |
138 | 141 | ||
diff --git a/include/linux/mbus.h b/include/linux/mbus.h index 0d3f14fd2621..4773145246ed 100644 --- a/include/linux/mbus.h +++ b/include/linux/mbus.h | |||
@@ -31,8 +31,8 @@ struct mbus_dram_target_info | |||
31 | struct mbus_dram_window { | 31 | struct mbus_dram_window { |
32 | u8 cs_index; | 32 | u8 cs_index; |
33 | u8 mbus_attr; | 33 | u8 mbus_attr; |
34 | u32 base; | 34 | u64 base; |
35 | u32 size; | 35 | u64 size; |
36 | } cs[4]; | 36 | } cs[4]; |
37 | }; | 37 | }; |
38 | 38 | ||