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authorJérémy Lefaure <jeremy.lefaure@lse.epita.fr>2017-11-13 22:19:41 -0500
committerKalle Valo <kvalo@codeaurora.org>2017-12-08 08:19:46 -0500
commit53ac793593275a7d9cf9cd3d88e730f6c2521730 (patch)
tree3c3e56cc96bce7a8cece664cc9af5b2d281f40c3
parent59365b9efd48b113badfa9dafbb391ef84fa7b08 (diff)
wireless: use ARRAY_SIZE
Using the ARRAY_SIZE macro improves the readability of the code. Also, it is not always useful to use a variable to store this constant calculated at compile time. Found with Coccinelle with the following semantic patch: @r depends on (org || report)@ type T; T[] E; position p; @@ ( (sizeof(E)@p /sizeof(*E)) | (sizeof(E)@p /sizeof(E[...])) | (sizeof(E)@p /sizeof(T)) ) Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat
-rw-r--r--drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c462
-rw-r--r--drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c9
-rw-r--r--drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c12
-rw-r--r--drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.c14
-rw-r--r--drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c34
5 files changed, 135 insertions, 396 deletions
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c
index dbf50ef6cd75..533bd4b0277e 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c
@@ -14,6 +14,7 @@
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <linux/kernel.h>
17#include <types.h> 18#include <types.h>
18#include "phytbl_n.h" 19#include "phytbl_n.h"
19 20
@@ -4437,109 +4438,39 @@ static const u16 loft_lut_core1_rev0[] = {
4437}; 4438};
4438 4439
4439const struct phytbl_info mimophytbl_info_rev0_volatile[] = { 4440const struct phytbl_info mimophytbl_info_rev0_volatile[] = {
4440 {&bdi_tbl_rev0, sizeof(bdi_tbl_rev0) / sizeof(bdi_tbl_rev0[0]), 21, 0, 4441 {&bdi_tbl_rev0, ARRAY_SIZE(bdi_tbl_rev0), 21, 0, 16},
4441 16} 4442 {&pltlut_tbl_rev0, ARRAY_SIZE(pltlut_tbl_rev0), 20, 0, 32},
4442 , 4443 {&gainctrl_lut_core0_rev0, ARRAY_SIZE(gainctrl_lut_core0_rev0), 26, 192, 32},
4443 {&pltlut_tbl_rev0, sizeof(pltlut_tbl_rev0) / sizeof(pltlut_tbl_rev0[0]), 4444 {&gainctrl_lut_core1_rev0, ARRAY_SIZE(gainctrl_lut_core1_rev0), 27, 192, 32},
4444 20, 0, 32} 4445 {&est_pwr_lut_core0_rev0, ARRAY_SIZE(est_pwr_lut_core0_rev0), 26, 0, 8},
4445 , 4446 {&est_pwr_lut_core1_rev0, ARRAY_SIZE(est_pwr_lut_core1_rev0), 27, 0, 8},
4446 {&gainctrl_lut_core0_rev0, 4447 {&adj_pwr_lut_core0_rev0, ARRAY_SIZE(adj_pwr_lut_core0_rev0), 26, 64, 8},
4447 sizeof(gainctrl_lut_core0_rev0) / sizeof(gainctrl_lut_core0_rev0[0]), 4448 {&adj_pwr_lut_core1_rev0, ARRAY_SIZE(adj_pwr_lut_core1_rev0), 27, 64, 8},
4448 26, 192, 32} 4449 {&iq_lut_core0_rev0, ARRAY_SIZE(iq_lut_core0_rev0), 26, 320, 32},
4449 , 4450 {&iq_lut_core1_rev0, ARRAY_SIZE(iq_lut_core1_rev0), 27, 320, 32},
4450 {&gainctrl_lut_core1_rev0, 4451 {&loft_lut_core0_rev0, ARRAY_SIZE(loft_lut_core0_rev0), 26, 448, 16},
4451 sizeof(gainctrl_lut_core1_rev0) / sizeof(gainctrl_lut_core1_rev0[0]), 4452 {&loft_lut_core1_rev0, ARRAY_SIZE(loft_lut_core1_rev0), 27, 448, 16},
4452 27, 192, 32}
4453 ,
4454
4455 {&est_pwr_lut_core0_rev0,
4456 sizeof(est_pwr_lut_core0_rev0) / sizeof(est_pwr_lut_core0_rev0[0]), 26,
4457 0, 8}
4458 ,
4459 {&est_pwr_lut_core1_rev0,
4460 sizeof(est_pwr_lut_core1_rev0) / sizeof(est_pwr_lut_core1_rev0[0]), 27,
4461 0, 8}
4462 ,
4463 {&adj_pwr_lut_core0_rev0,
4464 sizeof(adj_pwr_lut_core0_rev0) / sizeof(adj_pwr_lut_core0_rev0[0]), 26,
4465 64, 8}
4466 ,
4467 {&adj_pwr_lut_core1_rev0,
4468 sizeof(adj_pwr_lut_core1_rev0) / sizeof(adj_pwr_lut_core1_rev0[0]), 27,
4469 64, 8}
4470 ,
4471 {&iq_lut_core0_rev0,
4472 sizeof(iq_lut_core0_rev0) / sizeof(iq_lut_core0_rev0[0]), 26, 320, 32}
4473 ,
4474 {&iq_lut_core1_rev0,
4475 sizeof(iq_lut_core1_rev0) / sizeof(iq_lut_core1_rev0[0]), 27, 320, 32}
4476 ,
4477 {&loft_lut_core0_rev0,
4478 sizeof(loft_lut_core0_rev0) / sizeof(loft_lut_core0_rev0[0]), 26, 448,
4479 16}
4480 ,
4481 {&loft_lut_core1_rev0,
4482 sizeof(loft_lut_core1_rev0) / sizeof(loft_lut_core1_rev0[0]), 27, 448,
4483 16}
4484 ,
4485}; 4453};
4486 4454
4487const struct phytbl_info mimophytbl_info_rev0[] = { 4455const struct phytbl_info mimophytbl_info_rev0[] = {
4488 {&frame_struct_rev0, 4456 {&frame_struct_rev0, ARRAY_SIZE(frame_struct_rev0), 10, 0, 32},
4489 sizeof(frame_struct_rev0) / sizeof(frame_struct_rev0[0]), 10, 0, 32} 4457 {&frame_lut_rev0, ARRAY_SIZE(frame_lut_rev0), 24, 0, 8},
4490 , 4458 {&tmap_tbl_rev0, ARRAY_SIZE(tmap_tbl_rev0), 12, 0, 32},
4491 {&frame_lut_rev0, sizeof(frame_lut_rev0) / sizeof(frame_lut_rev0[0]), 4459 {&tdtrn_tbl_rev0, ARRAY_SIZE(tdtrn_tbl_rev0), 14, 0, 32},
4492 24, 0, 8} 4460 {&intlv_tbl_rev0, ARRAY_SIZE(intlv_tbl_rev0), 13, 0, 32},
4493 , 4461 {&pilot_tbl_rev0, ARRAY_SIZE(pilot_tbl_rev0), 11, 0, 16},
4494 {&tmap_tbl_rev0, sizeof(tmap_tbl_rev0) / sizeof(tmap_tbl_rev0[0]), 12, 4462 {&tdi_tbl20_ant0_rev0, ARRAY_SIZE(tdi_tbl20_ant0_rev0), 19, 128, 32},
4495 0, 32} 4463 {&tdi_tbl20_ant1_rev0, ARRAY_SIZE(tdi_tbl20_ant1_rev0), 19, 256, 32},
4496 , 4464 {&tdi_tbl40_ant0_rev0, ARRAY_SIZE(tdi_tbl40_ant0_rev0), 19, 640, 32},
4497 {&tdtrn_tbl_rev0, sizeof(tdtrn_tbl_rev0) / sizeof(tdtrn_tbl_rev0[0]), 4465 {&tdi_tbl40_ant1_rev0, ARRAY_SIZE(tdi_tbl40_ant1_rev0), 19, 768, 32},
4498 14, 0, 32} 4466 {&chanest_tbl_rev0, ARRAY_SIZE(chanest_tbl_rev0), 22, 0, 32},
4499 , 4467 {&mcs_tbl_rev0, ARRAY_SIZE(mcs_tbl_rev0), 18, 0, 8},
4500 {&intlv_tbl_rev0, sizeof(intlv_tbl_rev0) / sizeof(intlv_tbl_rev0[0]), 4468 {&noise_var_tbl0_rev0, ARRAY_SIZE(noise_var_tbl0_rev0), 16, 0, 32},
4501 13, 0, 32} 4469 {&noise_var_tbl1_rev0, ARRAY_SIZE(noise_var_tbl1_rev0), 16, 128, 32},
4502 ,
4503 {&pilot_tbl_rev0, sizeof(pilot_tbl_rev0) / sizeof(pilot_tbl_rev0[0]),
4504 11, 0, 16}
4505 ,
4506 {&tdi_tbl20_ant0_rev0,
4507 sizeof(tdi_tbl20_ant0_rev0) / sizeof(tdi_tbl20_ant0_rev0[0]), 19, 128,
4508 32}
4509 ,
4510 {&tdi_tbl20_ant1_rev0,
4511 sizeof(tdi_tbl20_ant1_rev0) / sizeof(tdi_tbl20_ant1_rev0[0]), 19, 256,
4512 32}
4513 ,
4514 {&tdi_tbl40_ant0_rev0,
4515 sizeof(tdi_tbl40_ant0_rev0) / sizeof(tdi_tbl40_ant0_rev0[0]), 19, 640,
4516 32}
4517 ,
4518 {&tdi_tbl40_ant1_rev0,
4519 sizeof(tdi_tbl40_ant1_rev0) / sizeof(tdi_tbl40_ant1_rev0[0]), 19, 768,
4520 32}
4521 ,
4522 {&chanest_tbl_rev0,
4523 sizeof(chanest_tbl_rev0) / sizeof(chanest_tbl_rev0[0]), 22, 0, 32}
4524 ,
4525 {&mcs_tbl_rev0, sizeof(mcs_tbl_rev0) / sizeof(mcs_tbl_rev0[0]), 18, 0,
4526 8}
4527 ,
4528 {&noise_var_tbl0_rev0,
4529 sizeof(noise_var_tbl0_rev0) / sizeof(noise_var_tbl0_rev0[0]), 16, 0,
4530 32}
4531 ,
4532 {&noise_var_tbl1_rev0,
4533 sizeof(noise_var_tbl1_rev0) / sizeof(noise_var_tbl1_rev0[0]), 16, 128,
4534 32}
4535 ,
4536}; 4470};
4537 4471
4538const u32 mimophytbl_info_sz_rev0 = 4472const u32 mimophytbl_info_sz_rev0 = ARRAY_SIZE(mimophytbl_info_rev0);
4539 sizeof(mimophytbl_info_rev0) / sizeof(mimophytbl_info_rev0[0]); 4473const u32 mimophytbl_info_sz_rev0_volatile = ARRAY_SIZE(mimophytbl_info_rev0_volatile);
4540const u32 mimophytbl_info_sz_rev0_volatile =
4541 sizeof(mimophytbl_info_rev0_volatile) /
4542 sizeof(mimophytbl_info_rev0_volatile[0]);
4543 4474
4544static const u16 ant_swctrl_tbl_rev3[] = { 4475static const u16 ant_swctrl_tbl_rev3[] = {
4545 0x0082, 4476 0x0082,
@@ -9363,132 +9294,53 @@ static const u32 papd_cal_scalars_tbl_core1_rev3[] = {
9363}; 9294};
9364 9295
9365const struct phytbl_info mimophytbl_info_rev3_volatile[] = { 9296const struct phytbl_info mimophytbl_info_rev3_volatile[] = {
9366 {&ant_swctrl_tbl_rev3, 9297 {&ant_swctrl_tbl_rev3, ARRAY_SIZE(ant_swctrl_tbl_rev3), 9, 0, 16},
9367 sizeof(ant_swctrl_tbl_rev3) / sizeof(ant_swctrl_tbl_rev3[0]), 9, 0, 16}
9368 ,
9369}; 9298};
9370 9299
9371const struct phytbl_info mimophytbl_info_rev3_volatile1[] = { 9300const struct phytbl_info mimophytbl_info_rev3_volatile1[] = {
9372 {&ant_swctrl_tbl_rev3_1, 9301 {&ant_swctrl_tbl_rev3_1, ARRAY_SIZE(ant_swctrl_tbl_rev3_1), 9, 0, 16},
9373 sizeof(ant_swctrl_tbl_rev3_1) / sizeof(ant_swctrl_tbl_rev3_1[0]), 9, 0,
9374 16}
9375 ,
9376}; 9302};
9377 9303
9378const struct phytbl_info mimophytbl_info_rev3_volatile2[] = { 9304const struct phytbl_info mimophytbl_info_rev3_volatile2[] = {
9379 {&ant_swctrl_tbl_rev3_2, 9305 {&ant_swctrl_tbl_rev3_2, ARRAY_SIZE(ant_swctrl_tbl_rev3_2), 9, 0, 16},
9380 sizeof(ant_swctrl_tbl_rev3_2) / sizeof(ant_swctrl_tbl_rev3_2[0]), 9, 0,
9381 16}
9382 ,
9383}; 9306};
9384 9307
9385const struct phytbl_info mimophytbl_info_rev3_volatile3[] = { 9308const struct phytbl_info mimophytbl_info_rev3_volatile3[] = {
9386 {&ant_swctrl_tbl_rev3_3, 9309 {&ant_swctrl_tbl_rev3_3, ARRAY_SIZE(ant_swctrl_tbl_rev3_3), 9, 0, 16},
9387 sizeof(ant_swctrl_tbl_rev3_3) / sizeof(ant_swctrl_tbl_rev3_3[0]), 9, 0,
9388 16}
9389 ,
9390}; 9310};
9391 9311
9392const struct phytbl_info mimophytbl_info_rev3[] = { 9312const struct phytbl_info mimophytbl_info_rev3[] = {
9393 {&frame_struct_rev3, 9313 {&frame_struct_rev3, ARRAY_SIZE(frame_struct_rev3), 10, 0, 32},
9394 sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32} 9314 {&pilot_tbl_rev3, ARRAY_SIZE(pilot_tbl_rev3), 11, 0, 16},
9395 , 9315 {&tmap_tbl_rev3, ARRAY_SIZE(tmap_tbl_rev3), 12, 0, 32},
9396 {&pilot_tbl_rev3, sizeof(pilot_tbl_rev3) / sizeof(pilot_tbl_rev3[0]), 9316 {&intlv_tbl_rev3, ARRAY_SIZE(intlv_tbl_rev3), 13, 0, 32},
9397 11, 0, 16} 9317 {&tdtrn_tbl_rev3, ARRAY_SIZE(tdtrn_tbl_rev3), 14, 0, 32},
9398 , 9318 {&noise_var_tbl_rev3, ARRAY_SIZE(noise_var_tbl_rev3), 16, 0, 32},
9399 {&tmap_tbl_rev3, sizeof(tmap_tbl_rev3) / sizeof(tmap_tbl_rev3[0]), 12, 9319 {&mcs_tbl_rev3, ARRAY_SIZE(mcs_tbl_rev3), 18, 0, 16},
9400 0, 32} 9320 {&tdi_tbl20_ant0_rev3, ARRAY_SIZE(tdi_tbl20_ant0_rev3), 19, 128, 32},
9401 , 9321 {&tdi_tbl20_ant1_rev3, ARRAY_SIZE(tdi_tbl20_ant1_rev3), 19, 256, 32},
9402 {&intlv_tbl_rev3, sizeof(intlv_tbl_rev3) / sizeof(intlv_tbl_rev3[0]), 9322 {&tdi_tbl40_ant0_rev3, ARRAY_SIZE(tdi_tbl40_ant0_rev3), 19, 640, 32},
9403 13, 0, 32} 9323 {&tdi_tbl40_ant1_rev3, ARRAY_SIZE(tdi_tbl40_ant1_rev3), 19, 768, 32},
9404 , 9324 {&pltlut_tbl_rev3, ARRAY_SIZE(pltlut_tbl_rev3), 20, 0, 32},
9405 {&tdtrn_tbl_rev3, sizeof(tdtrn_tbl_rev3) / sizeof(tdtrn_tbl_rev3[0]), 9325 {&chanest_tbl_rev3, ARRAY_SIZE(chanest_tbl_rev3), 22, 0, 32},
9406 14, 0, 32} 9326 {&frame_lut_rev3, ARRAY_SIZE(frame_lut_rev3), 24, 0, 8},
9407 , 9327 {&est_pwr_lut_core0_rev3, ARRAY_SIZE(est_pwr_lut_core0_rev3), 26, 0, 8},
9408 {&noise_var_tbl_rev3, 9328 {&est_pwr_lut_core1_rev3, ARRAY_SIZE(est_pwr_lut_core1_rev3), 27, 0, 8},
9409 sizeof(noise_var_tbl_rev3) / sizeof(noise_var_tbl_rev3[0]), 16, 0, 32} 9329 {&adj_pwr_lut_core0_rev3, ARRAY_SIZE(adj_pwr_lut_core0_rev3), 26, 64, 8},
9410 , 9330 {&adj_pwr_lut_core1_rev3, ARRAY_SIZE(adj_pwr_lut_core1_rev3), 27, 64, 8},
9411 {&mcs_tbl_rev3, sizeof(mcs_tbl_rev3) / sizeof(mcs_tbl_rev3[0]), 18, 0, 9331 {&gainctrl_lut_core0_rev3, ARRAY_SIZE(gainctrl_lut_core0_rev3), 26, 192, 32},
9412 16} 9332 {&gainctrl_lut_core1_rev3, ARRAY_SIZE(gainctrl_lut_core1_rev3), 27, 192, 32},
9413 , 9333 {&iq_lut_core0_rev3, ARRAY_SIZE(iq_lut_core0_rev3), 26, 320, 32},
9414 {&tdi_tbl20_ant0_rev3, 9334 {&iq_lut_core1_rev3, ARRAY_SIZE(iq_lut_core1_rev3), 27, 320, 32},
9415 sizeof(tdi_tbl20_ant0_rev3) / sizeof(tdi_tbl20_ant0_rev3[0]), 19, 128, 9335 {&loft_lut_core0_rev3, ARRAY_SIZE(loft_lut_core0_rev3), 26, 448, 16},
9416 32} 9336 {&loft_lut_core1_rev3, ARRAY_SIZE(loft_lut_core1_rev3), 27, 448, 16}
9417 ,
9418 {&tdi_tbl20_ant1_rev3,
9419 sizeof(tdi_tbl20_ant1_rev3) / sizeof(tdi_tbl20_ant1_rev3[0]), 19, 256,
9420 32}
9421 ,
9422 {&tdi_tbl40_ant0_rev3,
9423 sizeof(tdi_tbl40_ant0_rev3) / sizeof(tdi_tbl40_ant0_rev3[0]), 19, 640,
9424 32}
9425 ,
9426 {&tdi_tbl40_ant1_rev3,
9427 sizeof(tdi_tbl40_ant1_rev3) / sizeof(tdi_tbl40_ant1_rev3[0]), 19, 768,
9428 32}
9429 ,
9430 {&pltlut_tbl_rev3, sizeof(pltlut_tbl_rev3) / sizeof(pltlut_tbl_rev3[0]),
9431 20, 0, 32}
9432 ,
9433 {&chanest_tbl_rev3,
9434 sizeof(chanest_tbl_rev3) / sizeof(chanest_tbl_rev3[0]), 22, 0, 32}
9435 ,
9436 {&frame_lut_rev3, sizeof(frame_lut_rev3) / sizeof(frame_lut_rev3[0]),
9437 24, 0, 8}
9438 ,
9439 {&est_pwr_lut_core0_rev3,
9440 sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26,
9441 0, 8}
9442 ,
9443 {&est_pwr_lut_core1_rev3,
9444 sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27,
9445 0, 8}
9446 ,
9447 {&adj_pwr_lut_core0_rev3,
9448 sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26,
9449 64, 8}
9450 ,
9451 {&adj_pwr_lut_core1_rev3,
9452 sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27,
9453 64, 8}
9454 ,
9455 {&gainctrl_lut_core0_rev3,
9456 sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]),
9457 26, 192, 32}
9458 ,
9459 {&gainctrl_lut_core1_rev3,
9460 sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]),
9461 27, 192, 32}
9462 ,
9463 {&iq_lut_core0_rev3,
9464 sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32}
9465 ,
9466 {&iq_lut_core1_rev3,
9467 sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32}
9468 ,
9469 {&loft_lut_core0_rev3,
9470 sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448,
9471 16}
9472 ,
9473 {&loft_lut_core1_rev3,
9474 sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448,
9475 16}
9476}; 9337};
9477 9338
9478const u32 mimophytbl_info_sz_rev3 = 9339const u32 mimophytbl_info_sz_rev3 = ARRAY_SIZE(mimophytbl_info_rev3);
9479 sizeof(mimophytbl_info_rev3) / sizeof(mimophytbl_info_rev3[0]); 9340const u32 mimophytbl_info_sz_rev3_volatile = ARRAY_SIZE(mimophytbl_info_rev3_volatile);
9480const u32 mimophytbl_info_sz_rev3_volatile = 9341const u32 mimophytbl_info_sz_rev3_volatile1 = ARRAY_SIZE(mimophytbl_info_rev3_volatile1);
9481 sizeof(mimophytbl_info_rev3_volatile) / 9342const u32 mimophytbl_info_sz_rev3_volatile2 = ARRAY_SIZE(mimophytbl_info_rev3_volatile2);
9482 sizeof(mimophytbl_info_rev3_volatile[0]); 9343const u32 mimophytbl_info_sz_rev3_volatile3 = ARRAY_SIZE(mimophytbl_info_rev3_volatile3);
9483const u32 mimophytbl_info_sz_rev3_volatile1 =
9484 sizeof(mimophytbl_info_rev3_volatile1) /
9485 sizeof(mimophytbl_info_rev3_volatile1[0]);
9486const u32 mimophytbl_info_sz_rev3_volatile2 =
9487 sizeof(mimophytbl_info_rev3_volatile2) /
9488 sizeof(mimophytbl_info_rev3_volatile2[0]);
9489const u32 mimophytbl_info_sz_rev3_volatile3 =
9490 sizeof(mimophytbl_info_rev3_volatile3) /
9491 sizeof(mimophytbl_info_rev3_volatile3[0]);
9492 9344
9493static const u32 tmap_tbl_rev7[] = { 9345static const u32 tmap_tbl_rev7[] = {
9494 0x8a88aa80, 9346 0x8a88aa80,
@@ -10469,162 +10321,58 @@ static const u32 papd_cal_scalars_tbl_core1_rev7[] = {
10469}; 10321};
10470 10322
10471const struct phytbl_info mimophytbl_info_rev7[] = { 10323const struct phytbl_info mimophytbl_info_rev7[] = {
10472 {&frame_struct_rev3, 10324 {&frame_struct_rev3, ARRAY_SIZE(frame_struct_rev3), 10, 0, 32},
10473 sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32} 10325 {&pilot_tbl_rev3, ARRAY_SIZE(pilot_tbl_rev3), 11, 0, 16},
10474 , 10326 {&tmap_tbl_rev7, ARRAY_SIZE(tmap_tbl_rev7), 12, 0, 32},
10475 {&pilot_tbl_rev3, sizeof(pilot_tbl_rev3) / sizeof(pilot_tbl_rev3[0]), 10327 {&intlv_tbl_rev3, ARRAY_SIZE(intlv_tbl_rev3), 13, 0, 32},
10476 11, 0, 16} 10328 {&tdtrn_tbl_rev3, ARRAY_SIZE(tdtrn_tbl_rev3), 14, 0, 32},
10477 , 10329 {&noise_var_tbl_rev7, ARRAY_SIZE(noise_var_tbl_rev7), 16, 0, 32},
10478 {&tmap_tbl_rev7, sizeof(tmap_tbl_rev7) / sizeof(tmap_tbl_rev7[0]), 12, 10330 {&mcs_tbl_rev3, ARRAY_SIZE(mcs_tbl_rev3), 18, 0, 16},
10479 0, 32} 10331 {&tdi_tbl20_ant0_rev3, ARRAY_SIZE(tdi_tbl20_ant0_rev3), 19, 128, 32},
10480 , 10332 {&tdi_tbl20_ant1_rev3, ARRAY_SIZE(tdi_tbl20_ant1_rev3), 19, 256, 32},
10481 {&intlv_tbl_rev3, sizeof(intlv_tbl_rev3) / sizeof(intlv_tbl_rev3[0]), 10333 {&tdi_tbl40_ant0_rev3, ARRAY_SIZE(tdi_tbl40_ant0_rev3), 19, 640, 32},
10482 13, 0, 32} 10334 {&tdi_tbl40_ant1_rev3, ARRAY_SIZE(tdi_tbl40_ant1_rev3), 19, 768, 32},
10483 , 10335 {&pltlut_tbl_rev3, ARRAY_SIZE(pltlut_tbl_rev3), 20, 0, 32},
10484 {&tdtrn_tbl_rev3, sizeof(tdtrn_tbl_rev3) / sizeof(tdtrn_tbl_rev3[0]), 10336 {&chanest_tbl_rev3, ARRAY_SIZE(chanest_tbl_rev3), 22, 0, 32},
10485 14, 0, 32} 10337 {&frame_lut_rev3, ARRAY_SIZE(frame_lut_rev3), 24, 0, 8},
10486 , 10338 {&est_pwr_lut_core0_rev3, ARRAY_SIZE(est_pwr_lut_core0_rev3), 26, 0, 8},
10487 {&noise_var_tbl_rev7, 10339 {&est_pwr_lut_core1_rev3, ARRAY_SIZE(est_pwr_lut_core1_rev3), 27, 0, 8},
10488 sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32} 10340 {&adj_pwr_lut_core0_rev3, ARRAY_SIZE(adj_pwr_lut_core0_rev3), 26, 64, 8},
10489 , 10341 {&adj_pwr_lut_core1_rev3, ARRAY_SIZE(adj_pwr_lut_core1_rev3), 27, 64, 8},
10490 {&mcs_tbl_rev3, sizeof(mcs_tbl_rev3) / sizeof(mcs_tbl_rev3[0]), 18, 0, 10342 {&gainctrl_lut_core0_rev3, ARRAY_SIZE(gainctrl_lut_core0_rev3), 26, 192, 32},
10491 16} 10343 {&gainctrl_lut_core1_rev3, ARRAY_SIZE(gainctrl_lut_core1_rev3), 27, 192, 32},
10492 , 10344 {&iq_lut_core0_rev3, ARRAY_SIZE(iq_lut_core0_rev3), 26, 320, 32},
10493 {&tdi_tbl20_ant0_rev3, 10345 {&iq_lut_core1_rev3, ARRAY_SIZE(iq_lut_core1_rev3), 27, 320, 32},
10494 sizeof(tdi_tbl20_ant0_rev3) / sizeof(tdi_tbl20_ant0_rev3[0]), 19, 128, 10346 {&loft_lut_core0_rev3, ARRAY_SIZE(loft_lut_core0_rev3), 26, 448, 16},
10495 32} 10347 {&loft_lut_core1_rev3, ARRAY_SIZE(loft_lut_core1_rev3), 27, 448, 16},
10496 ,
10497 {&tdi_tbl20_ant1_rev3,
10498 sizeof(tdi_tbl20_ant1_rev3) / sizeof(tdi_tbl20_ant1_rev3[0]), 19, 256,
10499 32}
10500 ,
10501 {&tdi_tbl40_ant0_rev3,
10502 sizeof(tdi_tbl40_ant0_rev3) / sizeof(tdi_tbl40_ant0_rev3[0]), 19, 640,
10503 32}
10504 ,
10505 {&tdi_tbl40_ant1_rev3,
10506 sizeof(tdi_tbl40_ant1_rev3) / sizeof(tdi_tbl40_ant1_rev3[0]), 19, 768,
10507 32}
10508 ,
10509 {&pltlut_tbl_rev3, sizeof(pltlut_tbl_rev3) / sizeof(pltlut_tbl_rev3[0]),
10510 20, 0, 32}
10511 ,
10512 {&chanest_tbl_rev3,
10513 sizeof(chanest_tbl_rev3) / sizeof(chanest_tbl_rev3[0]), 22, 0, 32}
10514 ,
10515 {&frame_lut_rev3, sizeof(frame_lut_rev3) / sizeof(frame_lut_rev3[0]),
10516 24, 0, 8}
10517 ,
10518 {&est_pwr_lut_core0_rev3,
10519 sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26,
10520 0, 8}
10521 ,
10522 {&est_pwr_lut_core1_rev3,
10523 sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27,
10524 0, 8}
10525 ,
10526 {&adj_pwr_lut_core0_rev3,
10527 sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26,
10528 64, 8}
10529 ,
10530 {&adj_pwr_lut_core1_rev3,
10531 sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27,
10532 64, 8}
10533 ,
10534 {&gainctrl_lut_core0_rev3,
10535 sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]),
10536 26, 192, 32}
10537 ,
10538 {&gainctrl_lut_core1_rev3,
10539 sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]),
10540 27, 192, 32}
10541 ,
10542 {&iq_lut_core0_rev3,
10543 sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32}
10544 ,
10545 {&iq_lut_core1_rev3,
10546 sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32}
10547 ,
10548 {&loft_lut_core0_rev3,
10549 sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448,
10550 16}
10551 ,
10552 {&loft_lut_core1_rev3,
10553 sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448,
10554 16}
10555 ,
10556 {&papd_comp_rfpwr_tbl_core0_rev3, 10348 {&papd_comp_rfpwr_tbl_core0_rev3,
10557 sizeof(papd_comp_rfpwr_tbl_core0_rev3) / 10349 ARRAY_SIZE(papd_comp_rfpwr_tbl_core0_rev3), 26, 576, 16},
10558 sizeof(papd_comp_rfpwr_tbl_core0_rev3[0]), 26, 576, 16}
10559 ,
10560 {&papd_comp_rfpwr_tbl_core1_rev3, 10350 {&papd_comp_rfpwr_tbl_core1_rev3,
10561 sizeof(papd_comp_rfpwr_tbl_core1_rev3) / 10351 ARRAY_SIZE(papd_comp_rfpwr_tbl_core1_rev3), 27, 576, 16},
10562 sizeof(papd_comp_rfpwr_tbl_core1_rev3[0]), 27, 576, 16}
10563 ,
10564 {&papd_comp_epsilon_tbl_core0_rev7, 10352 {&papd_comp_epsilon_tbl_core0_rev7,
10565 sizeof(papd_comp_epsilon_tbl_core0_rev7) / 10353 ARRAY_SIZE(papd_comp_epsilon_tbl_core0_rev7), 31, 0, 32},
10566 sizeof(papd_comp_epsilon_tbl_core0_rev7[0]), 31, 0, 32}
10567 ,
10568 {&papd_cal_scalars_tbl_core0_rev7, 10354 {&papd_cal_scalars_tbl_core0_rev7,
10569 sizeof(papd_cal_scalars_tbl_core0_rev7) / 10355 ARRAY_SIZE(papd_cal_scalars_tbl_core0_rev7), 32, 0, 32},
10570 sizeof(papd_cal_scalars_tbl_core0_rev7[0]), 32, 0, 32}
10571 ,
10572 {&papd_comp_epsilon_tbl_core1_rev7, 10356 {&papd_comp_epsilon_tbl_core1_rev7,
10573 sizeof(papd_comp_epsilon_tbl_core1_rev7) / 10357 ARRAY_SIZE(papd_comp_epsilon_tbl_core1_rev7), 33, 0, 32},
10574 sizeof(papd_comp_epsilon_tbl_core1_rev7[0]), 33, 0, 32}
10575 ,
10576 {&papd_cal_scalars_tbl_core1_rev7, 10358 {&papd_cal_scalars_tbl_core1_rev7,
10577 sizeof(papd_cal_scalars_tbl_core1_rev7) / 10359 ARRAY_SIZE(papd_cal_scalars_tbl_core1_rev7), 34, 0, 32},
10578 sizeof(papd_cal_scalars_tbl_core1_rev7[0]), 34, 0, 32}
10579 ,
10580}; 10360};
10581 10361
10582const u32 mimophytbl_info_sz_rev7 = 10362const u32 mimophytbl_info_sz_rev7 = ARRAY_SIZE(mimophytbl_info_rev7);
10583 sizeof(mimophytbl_info_rev7) / sizeof(mimophytbl_info_rev7[0]);
10584 10363
10585const struct phytbl_info mimophytbl_info_rev16[] = { 10364const struct phytbl_info mimophytbl_info_rev16[] = {
10586 {&noise_var_tbl_rev7, 10365 {&noise_var_tbl_rev7, ARRAY_SIZE(noise_var_tbl_rev7), 16, 0, 32},
10587 sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32} 10366 {&est_pwr_lut_core0_rev3, ARRAY_SIZE(est_pwr_lut_core0_rev3), 26, 0, 8},
10588 , 10367 {&est_pwr_lut_core1_rev3, ARRAY_SIZE(est_pwr_lut_core1_rev3), 27, 0, 8},
10589 {&est_pwr_lut_core0_rev3, 10368 {&adj_pwr_lut_core0_rev3, ARRAY_SIZE(adj_pwr_lut_core0_rev3), 26, 64, 8},
10590 sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26, 10369 {&adj_pwr_lut_core1_rev3, ARRAY_SIZE(adj_pwr_lut_core1_rev3), 27, 64, 8},
10591 0, 8} 10370 {&gainctrl_lut_core0_rev3, ARRAY_SIZE(gainctrl_lut_core0_rev3), 26, 192, 32},
10592 , 10371 {&gainctrl_lut_core1_rev3, ARRAY_SIZE(gainctrl_lut_core1_rev3), 27, 192, 32},
10593 {&est_pwr_lut_core1_rev3, 10372 {&iq_lut_core0_rev3, ARRAY_SIZE(iq_lut_core0_rev3), 26, 320, 32},
10594 sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27, 10373 {&iq_lut_core1_rev3, ARRAY_SIZE(iq_lut_core1_rev3), 27, 320, 32},
10595 0, 8} 10374 {&loft_lut_core0_rev3, ARRAY_SIZE(loft_lut_core0_rev3), 26, 448, 16},
10596 , 10375 {&loft_lut_core1_rev3, ARRAY_SIZE(loft_lut_core1_rev3), 27, 448, 16},
10597 {&adj_pwr_lut_core0_rev3,
10598 sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26,
10599 64, 8}
10600 ,
10601 {&adj_pwr_lut_core1_rev3,
10602 sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27,
10603 64, 8}
10604 ,
10605 {&gainctrl_lut_core0_rev3,
10606 sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]),
10607 26, 192, 32}
10608 ,
10609 {&gainctrl_lut_core1_rev3,
10610 sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]),
10611 27, 192, 32}
10612 ,
10613 {&iq_lut_core0_rev3,
10614 sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32}
10615 ,
10616 {&iq_lut_core1_rev3,
10617 sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32}
10618 ,
10619 {&loft_lut_core0_rev3,
10620 sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448,
10621 16}
10622 ,
10623 {&loft_lut_core1_rev3,
10624 sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448,
10625 16}
10626 ,
10627}; 10376};
10628 10377
10629const u32 mimophytbl_info_sz_rev16 = 10378const u32 mimophytbl_info_sz_rev16 = ARRAY_SIZE(mimophytbl_info_rev16);
10630 sizeof(mimophytbl_info_rev16) / sizeof(mimophytbl_info_rev16[0]);
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c
index d2369b0cad99..f9ccd13c79f9 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c
@@ -43,6 +43,7 @@
43#include "../pwrseqcmd.h" 43#include "../pwrseqcmd.h"
44#include "pwrseq.h" 44#include "pwrseq.h"
45#include "../btcoexist/rtl_btc.h" 45#include "../btcoexist/rtl_btc.h"
46#include <linux/kernel.h>
46 47
47#define LLT_CONFIG 5 48#define LLT_CONFIG 5
48 49
@@ -2126,28 +2127,28 @@ static void _rtl8723be_read_adapter_info(struct ieee80211_hw *hw,
2126 2127
2127 if (rtlhal->oem_id == RT_CID_DEFAULT) { 2128 if (rtlhal->oem_id == RT_CID_DEFAULT) {
2128 /* Does this one have a Toshiba SMID from group 1? */ 2129 /* Does this one have a Toshiba SMID from group 1? */
2129 for (i = 0; i < sizeof(toshiba_smid1) / sizeof(u16); i++) { 2130 for (i = 0; i < ARRAY_SIZE(toshiba_smid1); i++) {
2130 if (rtlefuse->eeprom_smid == toshiba_smid1[i]) { 2131 if (rtlefuse->eeprom_smid == toshiba_smid1[i]) {
2131 is_toshiba_smid1 = true; 2132 is_toshiba_smid1 = true;
2132 break; 2133 break;
2133 } 2134 }
2134 } 2135 }
2135 /* Does this one have a Toshiba SMID from group 2? */ 2136 /* Does this one have a Toshiba SMID from group 2? */
2136 for (i = 0; i < sizeof(toshiba_smid2) / sizeof(u16); i++) { 2137 for (i = 0; i < ARRAY_SIZE(toshiba_smid2); i++) {
2137 if (rtlefuse->eeprom_smid == toshiba_smid2[i]) { 2138 if (rtlefuse->eeprom_smid == toshiba_smid2[i]) {
2138 is_toshiba_smid2 = true; 2139 is_toshiba_smid2 = true;
2139 break; 2140 break;
2140 } 2141 }
2141 } 2142 }
2142 /* Does this one have a Samsung SMID? */ 2143 /* Does this one have a Samsung SMID? */
2143 for (i = 0; i < sizeof(samsung_smid) / sizeof(u16); i++) { 2144 for (i = 0; i < ARRAY_SIZE(samsung_smid); i++) {
2144 if (rtlefuse->eeprom_smid == samsung_smid[i]) { 2145 if (rtlefuse->eeprom_smid == samsung_smid[i]) {
2145 is_samsung_smid = true; 2146 is_samsung_smid = true;
2146 break; 2147 break;
2147 } 2148 }
2148 } 2149 }
2149 /* Does this one have a Lenovo SMID? */ 2150 /* Does this one have a Lenovo SMID? */
2150 for (i = 0; i < sizeof(lenovo_smid) / sizeof(u16); i++) { 2151 for (i = 0; i < ARRAY_SIZE(lenovo_smid); i++) {
2151 if (rtlefuse->eeprom_smid == lenovo_smid[i]) { 2152 if (rtlefuse->eeprom_smid == lenovo_smid[i]) {
2152 is_lenovo_smid = true; 2153 is_lenovo_smid = true;
2153 break; 2154 break;
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
index 9606641519e7..1263b12db5dc 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
@@ -35,6 +35,7 @@
35#include "../rtl8723com/dm_common.h" 35#include "../rtl8723com/dm_common.h"
36#include "table.h" 36#include "table.h"
37#include "trx.h" 37#include "trx.h"
38#include <linux/kernel.h>
38 39
39static bool _rtl8723be_phy_bb8723b_config_parafile(struct ieee80211_hw *hw); 40static bool _rtl8723be_phy_bb8723b_config_parafile(struct ieee80211_hw *hw);
40static bool _rtl8723be_phy_config_mac_with_headerfile(struct ieee80211_hw *hw); 41static bool _rtl8723be_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
@@ -1143,14 +1144,13 @@ void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
1143 DESC92C_RATEMCS2, DESC92C_RATEMCS3, 1144 DESC92C_RATEMCS2, DESC92C_RATEMCS3,
1144 DESC92C_RATEMCS4, DESC92C_RATEMCS5, 1145 DESC92C_RATEMCS4, DESC92C_RATEMCS5,
1145 DESC92C_RATEMCS6, DESC92C_RATEMCS7}; 1146 DESC92C_RATEMCS6, DESC92C_RATEMCS7};
1146 u8 i, size; 1147 u8 i;
1147 u8 power_index; 1148 u8 power_index;
1148 1149
1149 if (!rtlefuse->txpwr_fromeprom) 1150 if (!rtlefuse->txpwr_fromeprom)
1150 return; 1151 return;
1151 1152
1152 size = sizeof(cck_rates) / sizeof(u8); 1153 for (i = 0; i < ARRAY_SIZE(cck_rates); i++) {
1153 for (i = 0; i < size; i++) {
1154 power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A, 1154 power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,
1155 cck_rates[i], 1155 cck_rates[i],
1156 rtl_priv(hw)->phy.current_chan_bw, 1156 rtl_priv(hw)->phy.current_chan_bw,
@@ -1158,8 +1158,7 @@ void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
1158 _rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A, 1158 _rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A,
1159 cck_rates[i]); 1159 cck_rates[i]);
1160 } 1160 }
1161 size = sizeof(ofdm_rates) / sizeof(u8); 1161 for (i = 0; i < ARRAY_SIZE(ofdm_rates); i++) {
1162 for (i = 0; i < size; i++) {
1163 power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A, 1162 power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,
1164 ofdm_rates[i], 1163 ofdm_rates[i],
1165 rtl_priv(hw)->phy.current_chan_bw, 1164 rtl_priv(hw)->phy.current_chan_bw,
@@ -1167,8 +1166,7 @@ void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
1167 _rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A, 1166 _rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A,
1168 ofdm_rates[i]); 1167 ofdm_rates[i]);
1169 } 1168 }
1170 size = sizeof(ht_rates_1t) / sizeof(u8); 1169 for (i = 0; i < ARRAY_SIZE(ht_rates_1t); i++) {
1171 for (i = 0; i < size; i++) {
1172 power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A, 1170 power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,
1173 ht_rates_1t[i], 1171 ht_rates_1t[i],
1174 rtl_priv(hw)->phy.current_chan_bw, 1172 rtl_priv(hw)->phy.current_chan_bw,
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.c b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.c
index 381c16b9b3a9..160fee8333ae 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.c
@@ -25,6 +25,7 @@
25 * 25 *
26 *****************************************************************************/ 26 *****************************************************************************/
27 27
28#include <linux/kernel.h>
28#include "table.h" 29#include "table.h"
29 30
30u32 RTL8723BEPHY_REG_1TARRAY[] = { 31u32 RTL8723BEPHY_REG_1TARRAY[] = {
@@ -224,8 +225,7 @@ u32 RTL8723BEPHY_REG_1TARRAY[] = {
224 225
225}; 226};
226 227
227u32 RTL8723BEPHY_REG_1TARRAYLEN = 228u32 RTL8723BEPHY_REG_1TARRAYLEN = ARRAY_SIZE(RTL8723BEPHY_REG_1TARRAY);
228 sizeof(RTL8723BEPHY_REG_1TARRAY) / sizeof(u32);
229 229
230u32 RTL8723BEPHY_REG_ARRAY_PG[] = { 230u32 RTL8723BEPHY_REG_ARRAY_PG[] = {
231 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003800, 231 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003800,
@@ -236,8 +236,7 @@ u32 RTL8723BEPHY_REG_ARRAY_PG[] = {
236 0, 0, 0, 0x00000e14, 0xffffffff, 0x26303436 236 0, 0, 0, 0x00000e14, 0xffffffff, 0x26303436
237}; 237};
238 238
239u32 RTL8723BEPHY_REG_ARRAY_PGLEN = 239u32 RTL8723BEPHY_REG_ARRAY_PGLEN = ARRAY_SIZE(RTL8723BEPHY_REG_ARRAY_PG);
240 sizeof(RTL8723BEPHY_REG_ARRAY_PG) / sizeof(u32);
241 240
242u32 RTL8723BE_RADIOA_1TARRAY[] = { 241u32 RTL8723BE_RADIOA_1TARRAY[] = {
243 0x000, 0x00010000, 242 0x000, 0x00010000,
@@ -373,8 +372,7 @@ u32 RTL8723BE_RADIOA_1TARRAY[] = {
373 372
374}; 373};
375 374
376u32 RTL8723BE_RADIOA_1TARRAYLEN = 375u32 RTL8723BE_RADIOA_1TARRAYLEN = ARRAY_SIZE(RTL8723BE_RADIOA_1TARRAY);
377 sizeof(RTL8723BE_RADIOA_1TARRAY) / sizeof(u32);
378 376
379u32 RTL8723BEMAC_1T_ARRAY[] = { 377u32 RTL8723BEMAC_1T_ARRAY[] = {
380 0x02F, 0x00000030, 378 0x02F, 0x00000030,
@@ -483,7 +481,7 @@ u32 RTL8723BEMAC_1T_ARRAY[] = {
483 481
484}; 482};
485 483
486u32 RTL8723BEMAC_1T_ARRAYLEN = sizeof(RTL8723BEMAC_1T_ARRAY) / sizeof(u32); 484u32 RTL8723BEMAC_1T_ARRAYLEN = ARRAY_SIZE(RTL8723BEMAC_1T_ARRAY);
487 485
488u32 RTL8723BEAGCTAB_1TARRAY[] = { 486u32 RTL8723BEAGCTAB_1TARRAY[] = {
489 0xC78, 0xFD000001, 487 0xC78, 0xFD000001,
@@ -620,4 +618,4 @@ u32 RTL8723BEAGCTAB_1TARRAY[] = {
620 618
621}; 619};
622 620
623u32 RTL8723BEAGCTAB_1TARRAYLEN = sizeof(RTL8723BEAGCTAB_1TARRAY) / sizeof(u32); 621u32 RTL8723BEAGCTAB_1TARRAYLEN = ARRAY_SIZE(RTL8723BEAGCTAB_1TARRAY);
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c
index 408c4611e5de..f87f9d03b9fa 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c
@@ -24,7 +24,7 @@
24 * Larry Finger <Larry.Finger@lwfinger.net> 24 * Larry Finger <Larry.Finger@lwfinger.net>
25 * 25 *
26 *****************************************************************************/ 26 *****************************************************************************/
27 27#include <linux/kernel.h>
28#include "table.h" 28#include "table.h"
29u32 RTL8812AE_PHY_REG_ARRAY[] = { 29u32 RTL8812AE_PHY_REG_ARRAY[] = {
30 0x800, 0x8020D010, 30 0x800, 0x8020D010,
@@ -258,8 +258,7 @@ u32 RTL8812AE_PHY_REG_ARRAY[] = {
258 0xEB8, 0x00508242, 258 0xEB8, 0x00508242,
259}; 259};
260 260
261u32 RTL8812AE_PHY_REG_1TARRAYLEN = 261u32 RTL8812AE_PHY_REG_1TARRAYLEN = ARRAY_SIZE(RTL8812AE_PHY_REG_ARRAY);
262 sizeof(RTL8812AE_PHY_REG_ARRAY) / sizeof(u32);
263 262
264u32 RTL8821AE_PHY_REG_ARRAY[] = { 263u32 RTL8821AE_PHY_REG_ARRAY[] = {
265 0x800, 0x0020D090, 264 0x800, 0x0020D090,
@@ -436,8 +435,7 @@ u32 RTL8821AE_PHY_REG_ARRAY[] = {
436 0xCB8, 0x00508240, 435 0xCB8, 0x00508240,
437}; 436};
438 437
439u32 RTL8821AE_PHY_REG_1TARRAYLEN = 438u32 RTL8821AE_PHY_REG_1TARRAYLEN = ARRAY_SIZE(RTL8821AE_PHY_REG_ARRAY);
440 sizeof(RTL8821AE_PHY_REG_ARRAY) / sizeof(u32);
441 439
442u32 RTL8812AE_PHY_REG_ARRAY_PG[] = { 440u32 RTL8812AE_PHY_REG_ARRAY_PG[] = {
443 0, 0, 0, 0x00000c20, 0xffffffff, 0x34363840, 441 0, 0, 0, 0x00000c20, 0xffffffff, 0x34363840,
@@ -488,8 +486,7 @@ u32 RTL8812AE_PHY_REG_ARRAY_PG[] = {
488 1, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628 486 1, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628
489}; 487};
490 488
491u32 RTL8812AE_PHY_REG_ARRAY_PGLEN = 489u32 RTL8812AE_PHY_REG_ARRAY_PGLEN = ARRAY_SIZE(RTL8812AE_PHY_REG_ARRAY_PG);
492 sizeof(RTL8812AE_PHY_REG_ARRAY_PG) / sizeof(u32);
493 490
494u32 RTL8821AE_PHY_REG_ARRAY_PG[] = { 491u32 RTL8821AE_PHY_REG_ARRAY_PG[] = {
495 0, 0, 0, 0x00000c20, 0xffffffff, 0x32343638, 492 0, 0, 0, 0x00000c20, 0xffffffff, 0x32343638,
@@ -509,8 +506,7 @@ u32 RTL8821AE_PHY_REG_ARRAY_PG[] = {
509 1, 0, 0, 0x00000c44, 0x0000ffff, 0x00002022 506 1, 0, 0, 0x00000c44, 0x0000ffff, 0x00002022
510}; 507};
511 508
512u32 RTL8821AE_PHY_REG_ARRAY_PGLEN = 509u32 RTL8821AE_PHY_REG_ARRAY_PGLEN = ARRAY_SIZE(RTL8821AE_PHY_REG_ARRAY_PG);
513 sizeof(RTL8821AE_PHY_REG_ARRAY_PG) / sizeof(u32);
514 510
515u32 RTL8812AE_RADIOA_ARRAY[] = { 511u32 RTL8812AE_RADIOA_ARRAY[] = {
516 0x000, 0x00010000, 512 0x000, 0x00010000,
@@ -927,7 +923,7 @@ u32 RTL8812AE_RADIOA_ARRAY[] = {
927 0x018, 0x0001712A, 923 0x018, 0x0001712A,
928}; 924};
929 925
930u32 RTL8812AE_RADIOA_1TARRAYLEN = sizeof(RTL8812AE_RADIOA_ARRAY) / sizeof(u32); 926u32 RTL8812AE_RADIOA_1TARRAYLEN = ARRAY_SIZE(RTL8812AE_RADIOA_ARRAY);
931 927
932u32 RTL8812AE_RADIOB_ARRAY[] = { 928u32 RTL8812AE_RADIOB_ARRAY[] = {
933 0x056, 0x00051CF2, 929 0x056, 0x00051CF2,
@@ -1335,7 +1331,7 @@ u32 RTL8812AE_RADIOB_ARRAY[] = {
1335 0x008, 0x00008400, 1331 0x008, 0x00008400,
1336}; 1332};
1337 1333
1338u32 RTL8812AE_RADIOB_1TARRAYLEN = sizeof(RTL8812AE_RADIOB_ARRAY) / sizeof(u32); 1334u32 RTL8812AE_RADIOB_1TARRAYLEN = ARRAY_SIZE(RTL8812AE_RADIOB_ARRAY);
1339 1335
1340u32 RTL8821AE_RADIOA_ARRAY[] = { 1336u32 RTL8821AE_RADIOA_ARRAY[] = {
1341 0x018, 0x0001712A, 1337 0x018, 0x0001712A,
@@ -1929,7 +1925,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = {
1929 1925
1930}; 1926};
1931 1927
1932u32 RTL8821AE_RADIOA_1TARRAYLEN = sizeof(RTL8821AE_RADIOA_ARRAY) / sizeof(u32); 1928u32 RTL8821AE_RADIOA_1TARRAYLEN = ARRAY_SIZE(RTL8821AE_RADIOA_ARRAY);
1933 1929
1934u32 RTL8812AE_MAC_REG_ARRAY[] = { 1930u32 RTL8812AE_MAC_REG_ARRAY[] = {
1935 0x010, 0x0000000C, 1931 0x010, 0x0000000C,
@@ -2041,7 +2037,7 @@ u32 RTL8812AE_MAC_REG_ARRAY[] = {
2041 0x718, 0x00000040, 2037 0x718, 0x00000040,
2042}; 2038};
2043 2039
2044u32 RTL8812AE_MAC_1T_ARRAYLEN = sizeof(RTL8812AE_MAC_REG_ARRAY) / sizeof(u32); 2040u32 RTL8812AE_MAC_1T_ARRAYLEN = ARRAY_SIZE(RTL8812AE_MAC_REG_ARRAY);
2045 2041
2046u32 RTL8821AE_MAC_REG_ARRAY[] = { 2042u32 RTL8821AE_MAC_REG_ARRAY[] = {
2047 0x428, 0x0000000A, 2043 0x428, 0x0000000A,
@@ -2143,7 +2139,7 @@ u32 RTL8821AE_MAC_REG_ARRAY[] = {
2143 0x718, 0x00000040, 2139 0x718, 0x00000040,
2144}; 2140};
2145 2141
2146u32 RTL8821AE_MAC_1T_ARRAYLEN = sizeof(RTL8821AE_MAC_REG_ARRAY) / sizeof(u32); 2142u32 RTL8821AE_MAC_1T_ARRAYLEN = ARRAY_SIZE(RTL8821AE_MAC_REG_ARRAY);
2147 2143
2148u32 RTL8812AE_AGC_TAB_ARRAY[] = { 2144u32 RTL8812AE_AGC_TAB_ARRAY[] = {
2149 0x80000001, 0x00000000, 0x40000000, 0x00000000, 2145 0x80000001, 0x00000000, 0x40000000, 0x00000000,
@@ -2479,8 +2475,7 @@ u32 RTL8812AE_AGC_TAB_ARRAY[] = {
2479 0xE50, 0x00000020, 2475 0xE50, 0x00000020,
2480}; 2476};
2481 2477
2482u32 RTL8812AE_AGC_TAB_1TARRAYLEN = 2478u32 RTL8812AE_AGC_TAB_1TARRAYLEN = ARRAY_SIZE(RTL8812AE_AGC_TAB_ARRAY);
2483 sizeof(RTL8812AE_AGC_TAB_ARRAY) / sizeof(u32);
2484 2479
2485u32 RTL8821AE_AGC_TAB_ARRAY[] = { 2480u32 RTL8821AE_AGC_TAB_ARRAY[] = {
2486 0x81C, 0xBF000001, 2481 0x81C, 0xBF000001,
@@ -2676,8 +2671,7 @@ u32 RTL8821AE_AGC_TAB_ARRAY[] = {
2676 0xC50, 0x00000020, 2671 0xC50, 0x00000020,
2677}; 2672};
2678 2673
2679u32 RTL8821AE_AGC_TAB_1TARRAYLEN = 2674u32 RTL8821AE_AGC_TAB_1TARRAYLEN = ARRAY_SIZE(RTL8821AE_AGC_TAB_ARRAY);
2680 sizeof(RTL8821AE_AGC_TAB_ARRAY) / sizeof(u32);
2681 2675
2682/****************************************************************************** 2676/******************************************************************************
2683* TXPWR_LMT.TXT 2677* TXPWR_LMT.TXT
@@ -3250,7 +3244,7 @@ u8 *RTL8812AE_TXPWR_LMT[] = {
3250 "MKK", "5G", "80M", "VHT", "2T", "155", "63" 3244 "MKK", "5G", "80M", "VHT", "2T", "155", "63"
3251}; 3245};
3252 3246
3253u32 RTL8812AE_TXPWR_LMT_ARRAY_LEN = sizeof(RTL8812AE_TXPWR_LMT) / sizeof(u8 *); 3247u32 RTL8812AE_TXPWR_LMT_ARRAY_LEN = ARRAY_SIZE(RTL8812AE_TXPWR_LMT);
3254 3248
3255u8 *RTL8821AE_TXPWR_LMT[] = { 3249u8 *RTL8821AE_TXPWR_LMT[] = {
3256 "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", 3250 "FCC", "2.4G", "20M", "CCK", "1T", "01", "32",
@@ -3819,4 +3813,4 @@ u8 *RTL8821AE_TXPWR_LMT[] = {
3819 "MKK", "5G", "80M", "VHT", "2T", "155", "63" 3813 "MKK", "5G", "80M", "VHT", "2T", "155", "63"
3820}; 3814};
3821 3815
3822u32 RTL8821AE_TXPWR_LMT_ARRAY_LEN = sizeof(RTL8821AE_TXPWR_LMT) / sizeof(u8 *); 3816u32 RTL8821AE_TXPWR_LMT_ARRAY_LEN = ARRAY_SIZE(RTL8821AE_TXPWR_LMT);
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-16 05:35:49 -0400