diff options
author | Chunfeng Yun <chunfeng.yun@mediatek.com> | 2015-09-28 23:01:34 -0400 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2015-10-06 10:51:47 -0400 |
commit | 538b2a4e96990a4839086cc47b657a12b1364d3c (patch) | |
tree | 022c71d155e6080be43cae7bf503c724a554b161 | |
parent | a007ddbaef5317f76bec541688e304f31ad9c4b0 (diff) |
dt-bindings: Add usb3.0 phy binding for MT65xx SoCs
add a DT binding documentation of usb3.0 phy for MT65xx
SoCs from Mediatek.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-rw-r--r-- | Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt b/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt new file mode 100644 index 000000000000..00100cf3e037 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt | |||
@@ -0,0 +1,68 @@ | |||
1 | mt65xx USB3.0 PHY binding | ||
2 | -------------------------- | ||
3 | |||
4 | This binding describes a usb3.0 phy for mt65xx platforms of Medaitek SoC. | ||
5 | |||
6 | Required properties (controller (parent) node): | ||
7 | - compatible : should be "mediatek,mt8173-u3phy" | ||
8 | - reg : offset and length of register for phy, exclude port's | ||
9 | register. | ||
10 | - clocks : a list of phandle + clock-specifier pairs, one for each | ||
11 | entry in clock-names | ||
12 | - clock-names : must contain | ||
13 | "u3phya_ref": for reference clock of usb3.0 analog phy. | ||
14 | |||
15 | Required nodes : a sub-node is required for each port the controller | ||
16 | provides. Address range information including the usual | ||
17 | 'reg' property is used inside these nodes to describe | ||
18 | the controller's topology. | ||
19 | |||
20 | Required properties (port (child) node): | ||
21 | - reg : address and length of the register set for the port. | ||
22 | - #phy-cells : should be 1 (See second example) | ||
23 | cell after port phandle is phy type from: | ||
24 | - PHY_TYPE_USB2 | ||
25 | - PHY_TYPE_USB3 | ||
26 | |||
27 | Example: | ||
28 | |||
29 | u3phy: usb-phy@11290000 { | ||
30 | compatible = "mediatek,mt8173-u3phy"; | ||
31 | reg = <0 0x11290000 0 0x800>; | ||
32 | clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>; | ||
33 | clock-names = "u3phya_ref"; | ||
34 | #address-cells = <2>; | ||
35 | #size-cells = <2>; | ||
36 | ranges; | ||
37 | status = "okay"; | ||
38 | |||
39 | phy_port0: port@11290800 { | ||
40 | reg = <0 0x11290800 0 0x800>; | ||
41 | #phy-cells = <1>; | ||
42 | status = "okay"; | ||
43 | }; | ||
44 | |||
45 | phy_port1: port@11291000 { | ||
46 | reg = <0 0x11291000 0 0x800>; | ||
47 | #phy-cells = <1>; | ||
48 | status = "okay"; | ||
49 | }; | ||
50 | }; | ||
51 | |||
52 | Specifying phy control of devices | ||
53 | --------------------------------- | ||
54 | |||
55 | Device nodes should specify the configuration required in their "phys" | ||
56 | property, containing a phandle to the phy port node and a device type; | ||
57 | phy-names for each port are optional. | ||
58 | |||
59 | Example: | ||
60 | |||
61 | #include <dt-bindings/phy/phy.h> | ||
62 | |||
63 | usb30: usb@11270000 { | ||
64 | ... | ||
65 | phys = <&phy_port0 PHY_TYPE_USB3>; | ||
66 | phy-names = "usb3-0"; | ||
67 | ... | ||
68 | }; | ||