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author | Marc Zyngier <marc.zyngier@arm.com> | 2018-05-08 08:14:38 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2018-05-13 09:59:02 -0400 |
commit | 53667c670fe00d63246fb3cfb4480bb1ba247bcc (patch) | |
tree | ac1b41cf812531873894edd500238a5cb0f43483 | |
parent | 38985351492b4ef2f63ffe527ef7cdfa66680f94 (diff) |
dt-bindings/gic-v3: Add documentation for MBI support
Add the required properties to support the MBI feature on GICv3.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lkml.kernel.org/r/20180508121438.11301-10-marc.zyngier@arm.com
-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt index 0a57f2f4167d..3ea78c4ef887 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt | |||
@@ -57,6 +57,20 @@ Optional | |||
57 | occupied by the redistributors. Required if more than one such | 57 | occupied by the redistributors. Required if more than one such |
58 | region is present. | 58 | region is present. |
59 | 59 | ||
60 | - msi-controller: Boolean property. Identifies the node as an MSI | ||
61 | controller. Only present if the Message Based Interrupt | ||
62 | functionnality is being exposed by the HW, and the mbi-ranges | ||
63 | property present. | ||
64 | |||
65 | - mbi-ranges: A list of pairs <intid span>, where "intid" is the first | ||
66 | SPI of a range that can be used an MBI, and "span" the size of that | ||
67 | range. Multiple ranges can be provided. Requires "msi-controller" to | ||
68 | be set. | ||
69 | |||
70 | - mbi-alias: Address property. Base address of an alias of the GICD | ||
71 | region containing only the {SET,CLR}SPI registers to be used if | ||
72 | isolation is required, and if supported by the HW. | ||
73 | |||
60 | Sub-nodes: | 74 | Sub-nodes: |
61 | 75 | ||
62 | PPI affinity can be expressed as a single "ppi-partitions" node, | 76 | PPI affinity can be expressed as a single "ppi-partitions" node, |
@@ -99,6 +113,9 @@ Examples: | |||
99 | <0x0 0x2c020000 0 0x2000>; // GICV | 113 | <0x0 0x2c020000 0 0x2000>; // GICV |
100 | interrupts = <1 9 4>; | 114 | interrupts = <1 9 4>; |
101 | 115 | ||
116 | msi-controller; | ||
117 | mbi-ranges = <256 128>; | ||
118 | |||
102 | gic-its@2c200000 { | 119 | gic-its@2c200000 { |
103 | compatible = "arm,gic-v3-its"; | 120 | compatible = "arm,gic-v3-its"; |
104 | msi-controller; | 121 | msi-controller; |