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authorNicolas Ferre <nicolas.ferre@atmel.com>2014-11-21 10:15:50 -0500
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-11-21 11:35:15 -0500
commit5341110fc9c84ffa71ada7a62eea87de5f282bc4 (patch)
treea5fe3729f3518400e2fa72b89fa01222ede1a906
parent37a0186fdef963a5345dc076d32779147acfa6cb (diff)
ARM: at91: remove at91rm9200 legacy board support
Second part of at91rm9200 legacy !DT removal. This is the core !DT support removal for this Atmel SoC. Note that from now on, the Kconfig.non_dt file and its specialized options are completely removed. Use the Device Tree for running this board with newer kernels. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Diffstat
-rw-r--r--arch/arm/configs/at91rm9200_defconfig161
-rw-r--r--arch/arm/mach-at91/Kconfig5
-rw-r--r--arch/arm/mach-at91/Kconfig.non_dt114
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/at91rm9200.c341
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c1212
6 files changed, 0 insertions, 1835 deletions
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
deleted file mode 100644
index bf057719dab0..000000000000
--- a/arch/arm/configs/at91rm9200_defconfig
+++ /dev/null
@@ -1,161 +0,0 @@
1# CONFIG_LOCALVERSION_AUTO is not set
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_NO_HZ=y
5CONFIG_HIGH_RES_TIMERS=y
6CONFIG_IKCONFIG=y
7CONFIG_IKCONFIG_PROC=y
8CONFIG_LOG_BUF_SHIFT=14
9CONFIG_USER_NS=y
10CONFIG_BLK_DEV_INITRD=y
11CONFIG_MODULES=y
12CONFIG_MODULE_FORCE_LOAD=y
13CONFIG_MODULE_UNLOAD=y
14CONFIG_MODVERSIONS=y
15CONFIG_MODULE_SRCVERSION_ALL=y
16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_CFQ is not set
18CONFIG_ARCH_AT91=y
19CONFIG_ARCH_AT91RM9200=y
20CONFIG_MACH_ONEARM=y
21CONFIG_MACH_AT91RM9200EK=y
22CONFIG_MACH_CSB337=y
23CONFIG_MACH_CSB637=y
24CONFIG_MACH_CARMEVA=y
25CONFIG_MACH_ATEB9200=y
26CONFIG_MACH_KB9200=y
27CONFIG_MACH_PICOTUX2XX=y
28CONFIG_MACH_KAFA=y
29CONFIG_MACH_ECBAT91=y
30CONFIG_MACH_YL9200=y
31CONFIG_MACH_CPUAT91=y
32CONFIG_MACH_ECO920=y
33CONFIG_MTD_AT91_DATAFLASH_CARD=y
34CONFIG_AT91_TIMER_HZ=100
35# CONFIG_ARM_THUMB is not set
36CONFIG_PCCARD=y
37CONFIG_AT91_CF=y
38CONFIG_AEABI=y
39# CONFIG_COMPACTION is not set
40CONFIG_ZBOOT_ROM_TEXT=0x10000000
41CONFIG_ZBOOT_ROM_BSS=0x20040000
42CONFIG_KEXEC=y
43CONFIG_AUTO_ZRELADDR=y
44CONFIG_FPE_NWFPE=y
45CONFIG_BINFMT_MISC=y
46CONFIG_NET=y
47CONFIG_PACKET=y
48CONFIG_UNIX=y
49CONFIG_INET=y
50CONFIG_IP_MULTICAST=y
51CONFIG_IP_PNP=y
52CONFIG_IP_PNP_DHCP=y
53CONFIG_IP_PNP_BOOTP=y
54# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
55# CONFIG_INET_XFRM_MODE_TUNNEL is not set
56# CONFIG_INET_XFRM_MODE_BEET is not set
57# CONFIG_INET_DIAG is not set
58CONFIG_IPV6=y
59CONFIG_IPV6_PRIVACY=y
60CONFIG_IPV6_ROUTER_PREF=y
61CONFIG_IPV6_ROUTE_INFO=y
62CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
63CONFIG_DEVTMPFS=y
64CONFIG_DEVTMPFS_MOUNT=y
65# CONFIG_STANDALONE is not set
66# CONFIG_PREVENT_FIRMWARE_BUILD is not set
67CONFIG_MTD=y
68CONFIG_MTD_CMDLINE_PARTS=y
69CONFIG_MTD_CHAR=y
70CONFIG_MTD_BLOCK=y
71CONFIG_MTD_CFI=y
72CONFIG_MTD_JEDECPROBE=y
73CONFIG_MTD_CFI_INTELEXT=y
74CONFIG_MTD_CFI_AMDSTD=y
75CONFIG_MTD_COMPLEX_MAPPINGS=y
76CONFIG_MTD_PHYSMAP=y
77CONFIG_MTD_PLATRAM=y
78CONFIG_MTD_DATAFLASH=y
79CONFIG_MTD_NAND=y
80CONFIG_MTD_NAND_ATMEL=y
81CONFIG_MTD_NAND_PLATFORM=y
82CONFIG_MTD_UBI=y
83CONFIG_MTD_UBI_GLUEBI=y
84CONFIG_BLK_DEV_LOOP=y
85CONFIG_BLK_DEV_RAM=y
86CONFIG_BLK_DEV_RAM_SIZE=8192
87CONFIG_NETDEVICES=y
88CONFIG_MII=y
89CONFIG_ARM_AT91_ETHER=y
90CONFIG_DAVICOM_PHY=y
91CONFIG_SMSC_PHY=y
92CONFIG_MICREL_PHY=y
93# CONFIG_WLAN is not set
94# CONFIG_INPUT_MOUSEDEV is not set
95CONFIG_INPUT_EVDEV=y
96CONFIG_KEYBOARD_GPIO=y
97# CONFIG_INPUT_MOUSE is not set
98CONFIG_INPUT_TOUCHSCREEN=y
99# CONFIG_LEGACY_PTYS is not set
100CONFIG_SERIAL_ATMEL=y
101CONFIG_SERIAL_ATMEL_CONSOLE=y
102CONFIG_HW_RANDOM=y
103CONFIG_I2C=y
104CONFIG_I2C_CHARDEV=y
105CONFIG_I2C_GPIO=y
106CONFIG_SPI=y
107CONFIG_SPI_ATMEL=y
108CONFIG_GPIO_SYSFS=y
109# CONFIG_HWMON is not set
110CONFIG_WATCHDOG=y
111CONFIG_WATCHDOG_NOWAYOUT=y
112CONFIG_AT91RM9200_WATCHDOG=y
113CONFIG_FB=y
114CONFIG_FB_MODE_HELPERS=y
115CONFIG_FB_TILEBLITTING=y
116CONFIG_FB_S1D13XXX=y
117CONFIG_BACKLIGHT_LCD_SUPPORT=y
118CONFIG_LCD_CLASS_DEVICE=y
119CONFIG_BACKLIGHT_CLASS_DEVICE=y
120# CONFIG_BACKLIGHT_GENERIC is not set
121CONFIG_FRAMEBUFFER_CONSOLE=y
122CONFIG_FONTS=y
123CONFIG_LOGO=y
124CONFIG_USB=y
125CONFIG_USB_OHCI_HCD=y
126CONFIG_USB_GADGET=y
127CONFIG_USB_AT91=y
128CONFIG_USB_G_SERIAL=y
129CONFIG_MMC=y
130CONFIG_MMC_ATMELMCI=y
131CONFIG_NEW_LEDS=y
132CONFIG_LEDS_CLASS=y
133CONFIG_LEDS_GPIO=y
134CONFIG_LEDS_TRIGGERS=y
135CONFIG_LEDS_TRIGGER_TIMER=y
136CONFIG_LEDS_TRIGGER_HEARTBEAT=y
137CONFIG_LEDS_TRIGGER_GPIO=y
138CONFIG_RTC_CLASS=y
139CONFIG_RTC_DRV_AT91RM9200=y
140CONFIG_EXT4_FS=y
141CONFIG_AUTOFS4_FS=y
142CONFIG_VFAT_FS=y
143CONFIG_TMPFS=y
144CONFIG_UBIFS_FS=y
145CONFIG_UBIFS_FS_ADVANCED_COMPR=y
146CONFIG_NFS_FS=y
147CONFIG_ROOT_NFS=y
148CONFIG_NLS_CODEPAGE_437=y
149CONFIG_NLS_CODEPAGE_850=y
150CONFIG_NLS_ISO8859_1=y
151CONFIG_NLS_UTF8=y
152CONFIG_MAGIC_SYSRQ=y
153CONFIG_DEBUG_FS=y
154CONFIG_DEBUG_KERNEL=y
155# CONFIG_FTRACE is not set
156CONFIG_DEBUG_USER=y
157CONFIG_DEBUG_LL=y
158CONFIG_EARLY_PRINTK=y
159CONFIG_CRYPTO_PCBC=y
160CONFIG_CRYPTO_SHA1=y
161CONFIG_XZ_DEC_ARMTHUMB=y
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 162a88930a8b..db8e756a15a8 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -185,11 +185,6 @@ config SOC_AT91SAM9N12
185# ---------------------------------------------------------- 185# ----------------------------------------------------------
186endif # SOC_SAM_V4_V5 186endif # SOC_SAM_V4_V5
187 187
188
189if SOC_SAM_V4_V5
190source arch/arm/mach-at91/Kconfig.non_dt
191endif
192
193comment "Generic Board Type" 188comment "Generic Board Type"
194 189
195config MACH_AT91RM9200_DT 190config MACH_AT91RM9200_DT
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
deleted file mode 100644
index 5fc138da89fb..000000000000
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ /dev/null
@@ -1,114 +0,0 @@
1menu "Atmel Non-DT world"
2
3config HAVE_AT91_DATAFLASH_CARD
4 bool
5
6choice
7 prompt "Atmel AT91 Processor Devices for non DT boards"
8
9config ARCH_AT91_NONE
10 bool "None"
11
12config ARCH_AT91RM9200
13 bool "AT91RM9200"
14 select SOC_AT91RM9200
15 select AT91_USE_OLD_CLK
16 select OLD_IRQ_AT91
17
18endchoice
19
20# ----------------------------------------------------------
21
22if ARCH_AT91RM9200
23
24comment "AT91RM9200 Board Type"
25
26config MACH_ONEARM
27 bool "Ajeco 1ARM Single Board Computer"
28 help
29 Select this if you are using Ajeco's 1ARM Single Board Computer.
30 <http://www.ajeco.fi/>
31
32config MACH_AT91RM9200EK
33 bool "Atmel AT91RM9200-EK Evaluation Kit"
34 select HAVE_AT91_DATAFLASH_CARD
35 help
36 Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit.
37 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507>
38
39config MACH_CSB337
40 bool "Cogent CSB337"
41 help
42 Select this if you are using Cogent's CSB337 board.
43 <http://www.cogcomp.com/csb_csb337.htm>
44
45config MACH_CSB637
46 bool "Cogent CSB637"
47 help
48 Select this if you are using Cogent's CSB637 board.
49 <http://www.cogcomp.com/csb_csb637.htm>
50
51config MACH_CARMEVA
52 bool "Conitec ARM&EVA"
53 help
54 Select this if you are using Conitec's AT91RM9200-MCU-Module.
55 <http://www.conitec.net/english/linuxboard.php>
56
57config MACH_ATEB9200
58 bool "Embest ATEB9200"
59 help
60 Select this if you are using Embest's ATEB9200 board.
61 <http://www.embedinfo.com/english/product/ATEB9200.asp>
62
63config MACH_KB9200
64 bool "KwikByte KB920x"
65 help
66 Select this if you are using KwikByte's KB920x board.
67 <http://www.kwikbyte.com/KB9202.html>
68
69config MACH_PICOTUX2XX
70 bool "picotux 200"
71 help
72 Select this if you are using a picotux 200.
73 <http://www.picotux.com/>
74
75config MACH_KAFA
76 bool "Sperry-Sun KAFA board"
77 help
78 Select this if you are using Sperry-Sun's KAFA board.
79
80config MACH_ECBAT91
81 bool "emQbit ECB_AT91 SBC"
82 select HAVE_AT91_DATAFLASH_CARD
83 help
84 Select this if you are using emQbit's ECB_AT91 board.
85 <http://wiki.emqbit.com/free-ecb-at91>
86
87config MACH_YL9200
88 bool "ucDragon YL-9200"
89 help
90 Select this if you are using the ucDragon YL-9200 board.
91
92config MACH_CPUAT91
93 bool "Eukrea CPUAT91"
94 help
95 Select this if you are using the Eukrea Electromatique's
96 CPUAT91 board <http://www.eukrea.com/>.
97
98config MACH_ECO920
99 bool "eco920"
100 help
101 Select this if you are using the eco920 board
102endif
103
104# ----------------------------------------------------------
105
106comment "AT91 Board Options"
107
108config MTD_AT91_DATAFLASH_CARD
109 bool "Enable DataFlash Card support"
110 depends on HAVE_AT91_DATAFLASH_CARD
111 help
112 Enable support for the DataFlash card.
113
114endmenu
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 016d9a126eb9..edc5b21f2157 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -20,8 +20,6 @@ obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o
20obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o 20obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
21obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o 21obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
22 22
23obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
24
25# AT91SAM board with device-tree 23# AT91SAM board with device-tree
26obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o 24obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o
27obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o 25obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 038702ee8bc6..b52916947535 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -11,296 +11,15 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/reboot.h>
15#include <linux/clk/at91_pmc.h> 14#include <linux/clk/at91_pmc.h>
16 15
17#include <asm/irq.h>
18#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 16#include <asm/mach/map.h>
20#include <asm/system_misc.h> 17#include <asm/system_misc.h>
21#include <mach/at91rm9200.h>
22#include <mach/at91_st.h> 18#include <mach/at91_st.h>
23#include <mach/cpu.h>
24#include <mach/hardware.h> 19#include <mach/hardware.h>
25 20
26#include "at91_aic.h"
27#include "soc.h" 21#include "soc.h"
28#include "generic.h" 22#include "generic.h"
29#include "sam9_smc.h"
30#include "pm.h"
31
32#if defined(CONFIG_OLD_CLK_AT91)
33#include "clock.h"
34/* --------------------------------------------------------------------
35 * Clocks
36 * -------------------------------------------------------------------- */
37
38/*
39 * The peripheral clocks.
40 */
41static struct clk udc_clk = {
42 .name = "udc_clk",
43 .pmc_mask = 1 << AT91RM9200_ID_UDP,
44 .type = CLK_TYPE_PERIPHERAL,
45};
46static struct clk ohci_clk = {
47 .name = "ohci_clk",
48 .pmc_mask = 1 << AT91RM9200_ID_UHP,
49 .type = CLK_TYPE_PERIPHERAL,
50};
51static struct clk ether_clk = {
52 .name = "ether_clk",
53 .pmc_mask = 1 << AT91RM9200_ID_EMAC,
54 .type = CLK_TYPE_PERIPHERAL,
55};
56static struct clk mmc_clk = {
57 .name = "mci_clk",
58 .pmc_mask = 1 << AT91RM9200_ID_MCI,
59 .type = CLK_TYPE_PERIPHERAL,
60};
61static struct clk twi_clk = {
62 .name = "twi_clk",
63 .pmc_mask = 1 << AT91RM9200_ID_TWI,
64 .type = CLK_TYPE_PERIPHERAL,
65};
66static struct clk usart0_clk = {
67 .name = "usart0_clk",
68 .pmc_mask = 1 << AT91RM9200_ID_US0,
69 .type = CLK_TYPE_PERIPHERAL,
70};
71static struct clk usart1_clk = {
72 .name = "usart1_clk",
73 .pmc_mask = 1 << AT91RM9200_ID_US1,
74 .type = CLK_TYPE_PERIPHERAL,
75};
76static struct clk usart2_clk = {
77 .name = "usart2_clk",
78 .pmc_mask = 1 << AT91RM9200_ID_US2,
79 .type = CLK_TYPE_PERIPHERAL,
80};
81static struct clk usart3_clk = {
82 .name = "usart3_clk",
83 .pmc_mask = 1 << AT91RM9200_ID_US3,
84 .type = CLK_TYPE_PERIPHERAL,
85};
86static struct clk spi_clk = {
87 .name = "spi_clk",
88 .pmc_mask = 1 << AT91RM9200_ID_SPI,
89 .type = CLK_TYPE_PERIPHERAL,
90};
91static struct clk pioA_clk = {
92 .name = "pioA_clk",
93 .pmc_mask = 1 << AT91RM9200_ID_PIOA,
94 .type = CLK_TYPE_PERIPHERAL,
95};
96static struct clk pioB_clk = {
97 .name = "pioB_clk",
98 .pmc_mask = 1 << AT91RM9200_ID_PIOB,
99 .type = CLK_TYPE_PERIPHERAL,
100};
101static struct clk pioC_clk = {
102 .name = "pioC_clk",
103 .pmc_mask = 1 << AT91RM9200_ID_PIOC,
104 .type = CLK_TYPE_PERIPHERAL,
105};
106static struct clk pioD_clk = {
107 .name = "pioD_clk",
108 .pmc_mask = 1 << AT91RM9200_ID_PIOD,
109 .type = CLK_TYPE_PERIPHERAL,
110};
111static struct clk ssc0_clk = {
112 .name = "ssc0_clk",
113 .pmc_mask = 1 << AT91RM9200_ID_SSC0,
114 .type = CLK_TYPE_PERIPHERAL,
115};
116static struct clk ssc1_clk = {
117 .name = "ssc1_clk",
118 .pmc_mask = 1 << AT91RM9200_ID_SSC1,
119 .type = CLK_TYPE_PERIPHERAL,
120};
121static struct clk ssc2_clk = {
122 .name = "ssc2_clk",
123 .pmc_mask = 1 << AT91RM9200_ID_SSC2,
124 .type = CLK_TYPE_PERIPHERAL,
125};
126static struct clk tc0_clk = {
127 .name = "tc0_clk",
128 .pmc_mask = 1 << AT91RM9200_ID_TC0,
129 .type = CLK_TYPE_PERIPHERAL,
130};
131static struct clk tc1_clk = {
132 .name = "tc1_clk",
133 .pmc_mask = 1 << AT91RM9200_ID_TC1,
134 .type = CLK_TYPE_PERIPHERAL,
135};
136static struct clk tc2_clk = {
137 .name = "tc2_clk",
138 .pmc_mask = 1 << AT91RM9200_ID_TC2,
139 .type = CLK_TYPE_PERIPHERAL,
140};
141static struct clk tc3_clk = {
142 .name = "tc3_clk",
143 .pmc_mask = 1 << AT91RM9200_ID_TC3,
144 .type = CLK_TYPE_PERIPHERAL,
145};
146static struct clk tc4_clk = {
147 .name = "tc4_clk",
148 .pmc_mask = 1 << AT91RM9200_ID_TC4,
149 .type = CLK_TYPE_PERIPHERAL,
150};
151static struct clk tc5_clk = {
152 .name = "tc5_clk",
153 .pmc_mask = 1 << AT91RM9200_ID_TC5,
154 .type = CLK_TYPE_PERIPHERAL,
155};
156
157static struct clk *periph_clocks[] __initdata = {
158 &pioA_clk,
159 &pioB_clk,
160 &pioC_clk,
161 &pioD_clk,
162 &usart0_clk,
163 &usart1_clk,
164 &usart2_clk,
165 &usart3_clk,
166 &mmc_clk,
167 &udc_clk,
168 &twi_clk,
169 &spi_clk,
170 &ssc0_clk,
171 &ssc1_clk,
172 &ssc2_clk,
173 &tc0_clk,
174 &tc1_clk,
175 &tc2_clk,
176 &tc3_clk,
177 &tc4_clk,
178 &tc5_clk,
179 &ohci_clk,
180 &ether_clk,
181 // irq0 .. irq6
182};
183
184static struct clk_lookup periph_clocks_lookups[] = {
185 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
186 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
187 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
188 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
189 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
190 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
191 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
192 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
193 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.2", &ssc2_clk),
194 CLKDEV_CON_DEV_ID("pclk", "fffd0000.ssc", &ssc0_clk),
195 CLKDEV_CON_DEV_ID("pclk", "fffd4000.ssc", &ssc1_clk),
196 CLKDEV_CON_DEV_ID("pclk", "fffd8000.ssc", &ssc2_clk),
197 CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200.0", &twi_clk),
198 /* fake hclk clock */
199 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
200 CLKDEV_CON_ID("pioA", &pioA_clk),
201 CLKDEV_CON_ID("pioB", &pioB_clk),
202 CLKDEV_CON_ID("pioC", &pioC_clk),
203 CLKDEV_CON_ID("pioD", &pioD_clk),
204 /* usart lookup table for DT entries */
205 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
206 CLKDEV_CON_DEV_ID("usart", "fffc0000.serial", &usart0_clk),
207 CLKDEV_CON_DEV_ID("usart", "fffc4000.serial", &usart1_clk),
208 CLKDEV_CON_DEV_ID("usart", "fffc8000.serial", &usart2_clk),
209 CLKDEV_CON_DEV_ID("usart", "fffcc000.serial", &usart3_clk),
210 /* tc lookup table for DT entries */
211 CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
212 CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
213 CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
214 CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk),
215 CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk),
216 CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk),
217 CLKDEV_CON_DEV_ID("mci_clk", "fffb4000.mmc", &mmc_clk),
218 CLKDEV_CON_DEV_ID("emac_clk", "fffbc000.ethernet", &ether_clk),
219 CLKDEV_CON_DEV_ID(NULL, "fffb8000.i2c", &twi_clk),
220 CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk),
221 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
222 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
223 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
224 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
225};
226
227static struct clk_lookup usart_clocks_lookups[] = {
228 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
229 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
230 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
231 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
232 CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
233};
234
235/*
236 * The four programmable clocks.
237 * You must configure pin multiplexing to bring these signals out.
238 */
239static struct clk pck0 = {
240 .name = "pck0",
241 .pmc_mask = AT91_PMC_PCK0,
242 .type = CLK_TYPE_PROGRAMMABLE,
243 .id = 0,
244};
245static struct clk pck1 = {
246 .name = "pck1",
247 .pmc_mask = AT91_PMC_PCK1,
248 .type = CLK_TYPE_PROGRAMMABLE,
249 .id = 1,
250};
251static struct clk pck2 = {
252 .name = "pck2",
253 .pmc_mask = AT91_PMC_PCK2,
254 .type = CLK_TYPE_PROGRAMMABLE,
255 .id = 2,
256};
257static struct clk pck3 = {
258 .name = "pck3",
259 .pmc_mask = AT91_PMC_PCK3,
260 .type = CLK_TYPE_PROGRAMMABLE,
261 .id = 3,
262};
263
264static void __init at91rm9200_register_clocks(void)
265{
266 int i;
267
268 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
269 clk_register(periph_clocks[i]);
270
271 clkdev_add_table(periph_clocks_lookups,
272 ARRAY_SIZE(periph_clocks_lookups));
273 clkdev_add_table(usart_clocks_lookups,
274 ARRAY_SIZE(usart_clocks_lookups));
275
276 clk_register(&pck0);
277 clk_register(&pck1);
278 clk_register(&pck2);
279 clk_register(&pck3);
280}
281#else
282#define at91rm9200_register_clocks NULL
283#endif
284
285/* --------------------------------------------------------------------
286 * GPIO
287 * -------------------------------------------------------------------- */
288
289static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
290 {
291 .id = AT91RM9200_ID_PIOA,
292 .regbase = AT91RM9200_BASE_PIOA,
293 }, {
294 .id = AT91RM9200_ID_PIOB,
295 .regbase = AT91RM9200_BASE_PIOB,
296 }, {
297 .id = AT91RM9200_ID_PIOC,
298 .regbase = AT91RM9200_BASE_PIOC,
299 }, {
300 .id = AT91RM9200_ID_PIOD,
301 .regbase = AT91RM9200_BASE_PIOD,
302 }
303};
304 23
305static void at91rm9200_idle(void) 24static void at91rm9200_idle(void)
306{ 25{
@@ -329,74 +48,14 @@ static void __init at91rm9200_map_io(void)
329 at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE); 48 at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE);
330} 49}
331 50
332static void __init at91rm9200_ioremap_registers(void)
333{
334 at91rm9200_ioremap_st(AT91RM9200_BASE_ST);
335 at91_ioremap_ramc(0, AT91RM9200_BASE_MC, 256);
336 at91_pm_set_standby(at91rm9200_standby);
337}
338
339static void __init at91rm9200_initialize(void) 51static void __init at91rm9200_initialize(void)
340{ 52{
341 arm_pm_idle = at91rm9200_idle; 53 arm_pm_idle = at91rm9200_idle;
342 arm_pm_restart = at91rm9200_restart; 54 arm_pm_restart = at91rm9200_restart;
343
344 /* Initialize GPIO subsystem */
345 at91_gpio_init(at91rm9200_gpio,
346 cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
347} 55}
348 56
349 57
350/* --------------------------------------------------------------------
351 * Interrupt initialization
352 * -------------------------------------------------------------------- */
353
354/*
355 * The default interrupt priority levels (0 = lowest, 7 = highest).
356 */
357static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
358 7, /* Advanced Interrupt Controller (FIQ) */
359 7, /* System Peripherals */
360 1, /* Parallel IO Controller A */
361 1, /* Parallel IO Controller B */
362 1, /* Parallel IO Controller C */
363 1, /* Parallel IO Controller D */
364 5, /* USART 0 */
365 5, /* USART 1 */
366 5, /* USART 2 */
367 5, /* USART 3 */
368 0, /* Multimedia Card Interface */
369 2, /* USB Device Port */
370 6, /* Two-Wire Interface */
371 5, /* Serial Peripheral Interface */
372 4, /* Serial Synchronous Controller 0 */
373 4, /* Serial Synchronous Controller 1 */
374 4, /* Serial Synchronous Controller 2 */
375 0, /* Timer Counter 0 */
376 0, /* Timer Counter 1 */
377 0, /* Timer Counter 2 */
378 0, /* Timer Counter 3 */
379 0, /* Timer Counter 4 */
380 0, /* Timer Counter 5 */
381 2, /* USB Host port */
382 3, /* Ethernet MAC */
383 0, /* Advanced Interrupt Controller (IRQ0) */
384 0, /* Advanced Interrupt Controller (IRQ1) */
385 0, /* Advanced Interrupt Controller (IRQ2) */
386 0, /* Advanced Interrupt Controller (IRQ3) */
387 0, /* Advanced Interrupt Controller (IRQ4) */
388 0, /* Advanced Interrupt Controller (IRQ5) */
389 0 /* Advanced Interrupt Controller (IRQ6) */
390};
391
392AT91_SOC_START(at91rm9200) 58AT91_SOC_START(at91rm9200)
393 .map_io = at91rm9200_map_io, 59 .map_io = at91rm9200_map_io,
394 .default_irq_priority = at91rm9200_default_irq_priority,
395 .extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
396 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
397 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
398 | (1 << AT91RM9200_ID_IRQ6),
399 .ioremap_registers = at91rm9200_ioremap_registers,
400 .register_clocks = at91rm9200_register_clocks,
401 .init = at91rm9200_initialize, 60 .init = at91rm9200_initialize,
402AT91_SOC_END 61AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
deleted file mode 100644
index 74f1eaf97801..000000000000
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ /dev/null
@@ -1,1212 +0,0 @@
1/*
2 * arch/arm/mach-at91/at91rm9200_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13#include <asm/mach/arch.h>
14#include <asm/mach/map.h>
15
16#include <linux/dma-mapping.h>
17#include <linux/gpio.h>
18#include <linux/gpio/machine.h>
19#include <linux/platform_device.h>
20#include <linux/i2c-gpio.h>
21
22#include <mach/at91rm9200.h>
23#include <mach/at91rm9200_mc.h>
24#include <mach/at91_ramc.h>
25#include <mach/hardware.h>
26
27#include "board.h"
28#include "generic.h"
29#include "gpio.h"
30
31
32/* --------------------------------------------------------------------
33 * USB Host
34 * -------------------------------------------------------------------- */
35
36#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
37static u64 ohci_dmamask = DMA_BIT_MASK(32);
38static struct at91_usbh_data usbh_data;
39
40static struct resource usbh_resources[] = {
41 [0] = {
42 .start = AT91RM9200_UHP_BASE,
43 .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
44 .flags = IORESOURCE_MEM,
45 },
46 [1] = {
47 .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
48 .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53static struct platform_device at91rm9200_usbh_device = {
54 .name = "at91_ohci",
55 .id = -1,
56 .dev = {
57 .dma_mask = &ohci_dmamask,
58 .coherent_dma_mask = DMA_BIT_MASK(32),
59 .platform_data = &usbh_data,
60 },
61 .resource = usbh_resources,
62 .num_resources = ARRAY_SIZE(usbh_resources),
63};
64
65void __init at91_add_device_usbh(struct at91_usbh_data *data)
66{
67 int i;
68
69 if (!data)
70 return;
71
72 /* Enable overcurrent notification */
73 for (i = 0; i < data->ports; i++) {
74 if (gpio_is_valid(data->overcurrent_pin[i]))
75 at91_set_gpio_input(data->overcurrent_pin[i], 1);
76 }
77
78 usbh_data = *data;
79 platform_device_register(&at91rm9200_usbh_device);
80}
81#else
82void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
83#endif
84
85
86/* --------------------------------------------------------------------
87 * USB Device (Gadget)
88 * -------------------------------------------------------------------- */
89
90#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
91static struct at91_udc_data udc_data;
92
93static struct resource udc_resources[] = {
94 [0] = {
95 .start = AT91RM9200_BASE_UDP,
96 .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
97 .flags = IORESOURCE_MEM,
98 },
99 [1] = {
100 .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
101 .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
102 .flags = IORESOURCE_IRQ,
103 },
104};
105
106static struct platform_device at91rm9200_udc_device = {
107 .name = "at91_udc",
108 .id = -1,
109 .dev = {
110 .platform_data = &udc_data,
111 },
112 .resource = udc_resources,
113 .num_resources = ARRAY_SIZE(udc_resources),
114};
115
116void __init at91_add_device_udc(struct at91_udc_data *data)
117{
118 if (!data)
119 return;
120
121 if (gpio_is_valid(data->vbus_pin)) {
122 at91_set_gpio_input(data->vbus_pin, 0);
123 at91_set_deglitch(data->vbus_pin, 1);
124 }
125 if (gpio_is_valid(data->pullup_pin))
126 at91_set_gpio_output(data->pullup_pin, 0);
127
128 udc_data = *data;
129 platform_device_register(&at91rm9200_udc_device);
130}
131#else
132void __init at91_add_device_udc(struct at91_udc_data *data) {}
133#endif
134
135
136/* --------------------------------------------------------------------
137 * Ethernet
138 * -------------------------------------------------------------------- */
139
140#if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
141static u64 eth_dmamask = DMA_BIT_MASK(32);
142static struct macb_platform_data eth_data;
143
144static struct resource eth_resources[] = {
145 [0] = {
146 .start = AT91RM9200_BASE_EMAC,
147 .end = AT91RM9200_BASE_EMAC + SZ_16K - 1,
148 .flags = IORESOURCE_MEM,
149 },
150 [1] = {
151 .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
152 .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
153 .flags = IORESOURCE_IRQ,
154 },
155};
156
157static struct platform_device at91rm9200_eth_device = {
158 .name = "at91_ether",
159 .id = -1,
160 .dev = {
161 .dma_mask = &eth_dmamask,
162 .coherent_dma_mask = DMA_BIT_MASK(32),
163 .platform_data = &eth_data,
164 },
165 .resource = eth_resources,
166 .num_resources = ARRAY_SIZE(eth_resources),
167};
168
169void __init at91_add_device_eth(struct macb_platform_data *data)
170{
171 if (!data)
172 return;
173
174 if (gpio_is_valid(data->phy_irq_pin)) {
175 at91_set_gpio_input(data->phy_irq_pin, 0);
176 at91_set_deglitch(data->phy_irq_pin, 1);
177 }
178
179 /* Pins used for MII and RMII */
180 at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
181 at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
182 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
183 at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
184 at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
185 at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
186 at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
187 at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
188 at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
189 at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
190
191 if (!data->is_rmii) {
192 at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
193 at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
194 at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
195 at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
196 at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
197 at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
198 at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
199 at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
200 }
201
202 eth_data = *data;
203 platform_device_register(&at91rm9200_eth_device);
204}
205#else
206void __init at91_add_device_eth(struct macb_platform_data *data) {}
207#endif
208
209
210/* --------------------------------------------------------------------
211 * Compact Flash / PCMCIA
212 * -------------------------------------------------------------------- */
213
214#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
215static struct at91_cf_data cf_data;
216
217#define CF_BASE AT91_CHIPSELECT_4
218
219static struct resource cf_resources[] = {
220 [0] = {
221 .start = CF_BASE,
222 /* ties up CS4, CS5 and CS6 */
223 .end = CF_BASE + (0x30000000 - 1),
224 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
225 },
226};
227
228static struct platform_device at91rm9200_cf_device = {
229 .name = "at91_cf",
230 .id = -1,
231 .dev = {
232 .platform_data = &cf_data,
233 },
234 .resource = cf_resources,
235 .num_resources = ARRAY_SIZE(cf_resources),
236};
237
238void __init at91_add_device_cf(struct at91_cf_data *data)
239{
240 unsigned int csa;
241
242 if (!data)
243 return;
244
245 data->chipselect = 4; /* can only use EBI ChipSelect 4 */
246
247 /* CF takes over CS4, CS5, CS6 */
248 csa = at91_ramc_read(0, AT91_EBI_CSA);
249 at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
250
251 /*
252 * Static memory controller timing adjustments.
253 * REVISIT: these timings are in terms of MCK cycles, so
254 * when MCK changes (cpufreq etc) so must these values...
255 */
256 at91_ramc_write(0, AT91_SMC_CSR(4),
257 AT91_SMC_ACSS_STD
258 | AT91_SMC_DBW_16
259 | AT91_SMC_BAT
260 | AT91_SMC_WSEN
261 | AT91_SMC_NWS_(32) /* wait states */
262 | AT91_SMC_RWSETUP_(6) /* setup time */
263 | AT91_SMC_RWHOLD_(4) /* hold time */
264 );
265
266 /* input/irq */
267 if (gpio_is_valid(data->irq_pin)) {
268 at91_set_gpio_input(data->irq_pin, 1);
269 at91_set_deglitch(data->irq_pin, 1);
270 }
271 at91_set_gpio_input(data->det_pin, 1);
272 at91_set_deglitch(data->det_pin, 1);
273
274 /* outputs, initially off */
275 if (gpio_is_valid(data->vcc_pin))
276 at91_set_gpio_output(data->vcc_pin, 0);
277 at91_set_gpio_output(data->rst_pin, 0);
278
279 /* force poweron defaults for these pins ... */
280 at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
281 at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
282 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
283 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
284
285 /* nWAIT is _not_ a default setting */
286 at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
287
288 cf_data = *data;
289 platform_device_register(&at91rm9200_cf_device);
290}
291#else
292void __init at91_add_device_cf(struct at91_cf_data *data) {}
293#endif
294
295
296/* --------------------------------------------------------------------
297 * MMC / SD
298 * -------------------------------------------------------------------- */
299
300#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
301static u64 mmc_dmamask = DMA_BIT_MASK(32);
302static struct mci_platform_data mmc_data;
303
304static struct resource mmc_resources[] = {
305 [0] = {
306 .start = AT91RM9200_BASE_MCI,
307 .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
308 .flags = IORESOURCE_MEM,
309 },
310 [1] = {
311 .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
312 .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
313 .flags = IORESOURCE_IRQ,
314 },
315};
316
317static struct platform_device at91rm9200_mmc_device = {
318 .name = "atmel_mci",
319 .id = -1,
320 .dev = {
321 .dma_mask = &mmc_dmamask,
322 .coherent_dma_mask = DMA_BIT_MASK(32),
323 .platform_data = &mmc_data,
324 },
325 .resource = mmc_resources,
326 .num_resources = ARRAY_SIZE(mmc_resources),
327};
328
329void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
330{
331 unsigned int i;
332 unsigned int slot_count = 0;
333
334 if (!data)
335 return;
336
337 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
338
339 if (!data->slot[i].bus_width)
340 continue;
341
342 /* input/irq */
343 if (gpio_is_valid(data->slot[i].detect_pin)) {
344 at91_set_gpio_input(data->slot[i].detect_pin, 1);
345 at91_set_deglitch(data->slot[i].detect_pin, 1);
346 }
347 if (gpio_is_valid(data->slot[i].wp_pin))
348 at91_set_gpio_input(data->slot[i].wp_pin, 1);
349
350 switch (i) {
351 case 0: /* slot A */
352 /* CMD */
353 at91_set_A_periph(AT91_PIN_PA28, 1);
354 /* DAT0, maybe DAT1..DAT3 */
355 at91_set_A_periph(AT91_PIN_PA29, 1);
356 if (data->slot[i].bus_width == 4) {
357 at91_set_B_periph(AT91_PIN_PB3, 1);
358 at91_set_B_periph(AT91_PIN_PB4, 1);
359 at91_set_B_periph(AT91_PIN_PB5, 1);
360 }
361 slot_count++;
362 break;
363 case 1: /* slot B */
364 /* CMD */
365 at91_set_B_periph(AT91_PIN_PA8, 1);
366 /* DAT0, maybe DAT1..DAT3 */
367 at91_set_B_periph(AT91_PIN_PA9, 1);
368 if (data->slot[i].bus_width == 4) {
369 at91_set_B_periph(AT91_PIN_PA10, 1);
370 at91_set_B_periph(AT91_PIN_PA11, 1);
371 at91_set_B_periph(AT91_PIN_PA12, 1);
372 }
373 slot_count++;
374 break;
375 default:
376 printk(KERN_ERR
377 "AT91: SD/MMC slot %d not available\n", i);
378 break;
379 }
380 if (slot_count) {
381 /* CLK */
382 at91_set_A_periph(AT91_PIN_PA27, 0);
383
384 mmc_data = *data;
385 platform_device_register(&at91rm9200_mmc_device);
386 }
387 }
388
389}
390#else
391void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
392#endif
393
394
395/* --------------------------------------------------------------------
396 * NAND / SmartMedia
397 * -------------------------------------------------------------------- */
398
399#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
400static struct atmel_nand_data nand_data;
401
402#define NAND_BASE AT91_CHIPSELECT_3
403
404static struct resource nand_resources[] = {
405 {
406 .start = NAND_BASE,
407 .end = NAND_BASE + SZ_256M - 1,
408 .flags = IORESOURCE_MEM,
409 }
410};
411
412static struct platform_device at91rm9200_nand_device = {
413 .name = "atmel_nand",
414 .id = -1,
415 .dev = {
416 .platform_data = &nand_data,
417 },
418 .resource = nand_resources,
419 .num_resources = ARRAY_SIZE(nand_resources),
420};
421
422void __init at91_add_device_nand(struct atmel_nand_data *data)
423{
424 unsigned int csa;
425
426 if (!data)
427 return;
428
429 /* enable the address range of CS3 */
430 csa = at91_ramc_read(0, AT91_EBI_CSA);
431 at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
432
433 /* set the bus interface characteristics */
434 at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
435 | AT91_SMC_NWS_(5)
436 | AT91_SMC_TDF_(1)
437 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
438 | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
439 );
440
441 /* enable pin */
442 if (gpio_is_valid(data->enable_pin))
443 at91_set_gpio_output(data->enable_pin, 1);
444
445 /* ready/busy pin */
446 if (gpio_is_valid(data->rdy_pin))
447 at91_set_gpio_input(data->rdy_pin, 1);
448
449 /* card detect pin */
450 if (gpio_is_valid(data->det_pin))
451 at91_set_gpio_input(data->det_pin, 1);
452
453 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
454 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
455
456 nand_data = *data;
457 platform_device_register(&at91rm9200_nand_device);
458}
459#else
460void __init at91_add_device_nand(struct atmel_nand_data *data) {}
461#endif
462
463
464/* --------------------------------------------------------------------
465 * TWI (i2c)
466 * -------------------------------------------------------------------- */
467
468/*
469 * Prefer the GPIO code since the TWI controller isn't robust
470 * (gets overruns and underruns under load) and can only issue
471 * repeated STARTs in one scenario (the driver doesn't yet handle them).
472 */
473#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
474
475static struct i2c_gpio_platform_data pdata = {
476 .sda_pin = AT91_PIN_PA25,
477 .sda_is_open_drain = 1,
478 .scl_pin = AT91_PIN_PA26,
479 .scl_is_open_drain = 1,
480 .udelay = 2, /* ~100 kHz */
481};
482
483static struct platform_device at91rm9200_twi_device = {
484 .name = "i2c-gpio",
485 .id = 0,
486 .dev.platform_data = &pdata,
487};
488
489void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
490{
491 at91_set_GPIO_periph(AT91_PIN_PA25, 1); /* TWD (SDA) */
492 at91_set_multi_drive(AT91_PIN_PA25, 1);
493
494 at91_set_GPIO_periph(AT91_PIN_PA26, 1); /* TWCK (SCL) */
495 at91_set_multi_drive(AT91_PIN_PA26, 1);
496
497 i2c_register_board_info(0, devices, nr_devices);
498 platform_device_register(&at91rm9200_twi_device);
499}
500
501#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
502
503static struct resource twi_resources[] = {
504 [0] = {
505 .start = AT91RM9200_BASE_TWI,
506 .end = AT91RM9200_BASE_TWI + SZ_16K - 1,
507 .flags = IORESOURCE_MEM,
508 },
509 [1] = {
510 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
511 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
512 .flags = IORESOURCE_IRQ,
513 },
514};
515
516static struct platform_device at91rm9200_twi_device = {
517 .name = "i2c-at91rm9200",
518 .id = 0,
519 .resource = twi_resources,
520 .num_resources = ARRAY_SIZE(twi_resources),
521};
522
523void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
524{
525 /* pins used for TWI interface */
526 at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
527 at91_set_multi_drive(AT91_PIN_PA25, 1);
528
529 at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
530 at91_set_multi_drive(AT91_PIN_PA26, 1);
531
532 i2c_register_board_info(0, devices, nr_devices);
533 platform_device_register(&at91rm9200_twi_device);
534}
535#else
536void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
537#endif
538
539
540/* --------------------------------------------------------------------
541 * SPI
542 * -------------------------------------------------------------------- */
543
544#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
545static u64 spi_dmamask = DMA_BIT_MASK(32);
546
547static struct resource spi_resources[] = {
548 [0] = {
549 .start = AT91RM9200_BASE_SPI,
550 .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
551 .flags = IORESOURCE_MEM,
552 },
553 [1] = {
554 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
555 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
556 .flags = IORESOURCE_IRQ,
557 },
558};
559
560static struct platform_device at91rm9200_spi_device = {
561 .name = "atmel_spi",
562 .id = 0,
563 .dev = {
564 .dma_mask = &spi_dmamask,
565 .coherent_dma_mask = DMA_BIT_MASK(32),
566 },
567 .resource = spi_resources,
568 .num_resources = ARRAY_SIZE(spi_resources),
569};
570
571static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
572
573void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
574{
575 int i;
576 unsigned long cs_pin;
577
578 at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
579 at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
580 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
581
582 /* Enable SPI chip-selects */
583 for (i = 0; i < nr_devices; i++) {
584 if (devices[i].controller_data)
585 cs_pin = (unsigned long) devices[i].controller_data;
586 else
587 cs_pin = spi_standard_cs[devices[i].chip_select];
588
589 if (devices[i].chip_select == 0) /* for CS0 errata */
590 at91_set_A_periph(cs_pin, 0);
591 else
592 at91_set_gpio_output(cs_pin, 1);
593
594
595 /* pass chip-select pin to driver */
596 devices[i].controller_data = (void *) cs_pin;
597 }
598
599 spi_register_board_info(devices, nr_devices);
600 platform_device_register(&at91rm9200_spi_device);
601}
602#else
603void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
604#endif
605
606
607/* --------------------------------------------------------------------
608 * Timer/Counter blocks
609 * -------------------------------------------------------------------- */
610
611#ifdef CONFIG_ATMEL_TCLIB
612
613static struct resource tcb0_resources[] = {
614 [0] = {
615 .start = AT91RM9200_BASE_TCB0,
616 .end = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
617 .flags = IORESOURCE_MEM,
618 },
619 [1] = {
620 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
621 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
622 .flags = IORESOURCE_IRQ,
623 },
624 [2] = {
625 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
626 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
627 .flags = IORESOURCE_IRQ,
628 },
629 [3] = {
630 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
631 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
632 .flags = IORESOURCE_IRQ,
633 },
634};
635
636static struct platform_device at91rm9200_tcb0_device = {
637 .name = "atmel_tcb",
638 .id = 0,
639 .resource = tcb0_resources,
640 .num_resources = ARRAY_SIZE(tcb0_resources),
641};
642
643static struct resource tcb1_resources[] = {
644 [0] = {
645 .start = AT91RM9200_BASE_TCB1,
646 .end = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
647 .flags = IORESOURCE_MEM,
648 },
649 [1] = {
650 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
651 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
652 .flags = IORESOURCE_IRQ,
653 },
654 [2] = {
655 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
656 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
657 .flags = IORESOURCE_IRQ,
658 },
659 [3] = {
660 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
661 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
662 .flags = IORESOURCE_IRQ,
663 },
664};
665
666static struct platform_device at91rm9200_tcb1_device = {
667 .name = "atmel_tcb",
668 .id = 1,
669 .resource = tcb1_resources,
670 .num_resources = ARRAY_SIZE(tcb1_resources),
671};
672
673static void __init at91_add_device_tc(void)
674{
675 platform_device_register(&at91rm9200_tcb0_device);
676 platform_device_register(&at91rm9200_tcb1_device);
677}
678#else
679static void __init at91_add_device_tc(void) { }
680#endif
681
682
683/* --------------------------------------------------------------------
684 * RTC
685 * -------------------------------------------------------------------- */
686
687#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
688static struct resource rtc_resources[] = {
689 [0] = {
690 .start = AT91RM9200_BASE_RTC,
691 .end = AT91RM9200_BASE_RTC + SZ_256 - 1,
692 .flags = IORESOURCE_MEM,
693 },
694 [1] = {
695 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
696 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
697 .flags = IORESOURCE_IRQ,
698 },
699};
700
701static struct platform_device at91rm9200_rtc_device = {
702 .name = "at91_rtc",
703 .id = -1,
704 .resource = rtc_resources,
705 .num_resources = ARRAY_SIZE(rtc_resources),
706};
707
708static void __init at91_add_device_rtc(void)
709{
710 platform_device_register(&at91rm9200_rtc_device);
711}
712#else
713static void __init at91_add_device_rtc(void) {}
714#endif
715
716
717/* --------------------------------------------------------------------
718 * Watchdog
719 * -------------------------------------------------------------------- */
720
721#if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
722static struct platform_device at91rm9200_wdt_device = {
723 .name = "at91_wdt",
724 .id = -1,
725 .num_resources = 0,
726};
727
728static void __init at91_add_device_watchdog(void)
729{
730 platform_device_register(&at91rm9200_wdt_device);
731}
732#else
733static void __init at91_add_device_watchdog(void) {}
734#endif
735
736
737/* --------------------------------------------------------------------
738 * SSC -- Synchronous Serial Controller
739 * -------------------------------------------------------------------- */
740
741#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
742static u64 ssc0_dmamask = DMA_BIT_MASK(32);
743
744static struct resource ssc0_resources[] = {
745 [0] = {
746 .start = AT91RM9200_BASE_SSC0,
747 .end = AT91RM9200_BASE_SSC0 + SZ_16K - 1,
748 .flags = IORESOURCE_MEM,
749 },
750 [1] = {
751 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
752 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
753 .flags = IORESOURCE_IRQ,
754 },
755};
756
757static struct platform_device at91rm9200_ssc0_device = {
758 .name = "at91rm9200_ssc",
759 .id = 0,
760 .dev = {
761 .dma_mask = &ssc0_dmamask,
762 .coherent_dma_mask = DMA_BIT_MASK(32),
763 },
764 .resource = ssc0_resources,
765 .num_resources = ARRAY_SIZE(ssc0_resources),
766};
767
768static inline void configure_ssc0_pins(unsigned pins)
769{
770 if (pins & ATMEL_SSC_TF)
771 at91_set_A_periph(AT91_PIN_PB0, 1);
772 if (pins & ATMEL_SSC_TK)
773 at91_set_A_periph(AT91_PIN_PB1, 1);
774 if (pins & ATMEL_SSC_TD)
775 at91_set_A_periph(AT91_PIN_PB2, 1);
776 if (pins & ATMEL_SSC_RD)
777 at91_set_A_periph(AT91_PIN_PB3, 1);
778 if (pins & ATMEL_SSC_RK)
779 at91_set_A_periph(AT91_PIN_PB4, 1);
780 if (pins & ATMEL_SSC_RF)
781 at91_set_A_periph(AT91_PIN_PB5, 1);
782}
783
784static u64 ssc1_dmamask = DMA_BIT_MASK(32);
785
786static struct resource ssc1_resources[] = {
787 [0] = {
788 .start = AT91RM9200_BASE_SSC1,
789 .end = AT91RM9200_BASE_SSC1 + SZ_16K - 1,
790 .flags = IORESOURCE_MEM,
791 },
792 [1] = {
793 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
794 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
795 .flags = IORESOURCE_IRQ,
796 },
797};
798
799static struct platform_device at91rm9200_ssc1_device = {
800 .name = "at91rm9200_ssc",
801 .id = 1,
802 .dev = {
803 .dma_mask = &ssc1_dmamask,
804 .coherent_dma_mask = DMA_BIT_MASK(32),
805 },
806 .resource = ssc1_resources,
807 .num_resources = ARRAY_SIZE(ssc1_resources),
808};
809
810static inline void configure_ssc1_pins(unsigned pins)
811{
812 if (pins & ATMEL_SSC_TF)
813 at91_set_A_periph(AT91_PIN_PB6, 1);
814 if (pins & ATMEL_SSC_TK)
815 at91_set_A_periph(AT91_PIN_PB7, 1);
816 if (pins & ATMEL_SSC_TD)
817 at91_set_A_periph(AT91_PIN_PB8, 1);
818 if (pins & ATMEL_SSC_RD)
819 at91_set_A_periph(AT91_PIN_PB9, 1);
820 if (pins & ATMEL_SSC_RK)
821 at91_set_A_periph(AT91_PIN_PB10, 1);
822 if (pins & ATMEL_SSC_RF)
823 at91_set_A_periph(AT91_PIN_PB11, 1);
824}
825
826static u64 ssc2_dmamask = DMA_BIT_MASK(32);
827
828static struct resource ssc2_resources[] = {
829 [0] = {
830 .start = AT91RM9200_BASE_SSC2,
831 .end = AT91RM9200_BASE_SSC2 + SZ_16K - 1,
832 .flags = IORESOURCE_MEM,
833 },
834 [1] = {
835 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
836 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
837 .flags = IORESOURCE_IRQ,
838 },
839};
840
841static struct platform_device at91rm9200_ssc2_device = {
842 .name = "at91rm9200_ssc",
843 .id = 2,
844 .dev = {
845 .dma_mask = &ssc2_dmamask,
846 .coherent_dma_mask = DMA_BIT_MASK(32),
847 },
848 .resource = ssc2_resources,
849 .num_resources = ARRAY_SIZE(ssc2_resources),
850};
851
852static inline void configure_ssc2_pins(unsigned pins)
853{
854 if (pins & ATMEL_SSC_TF)
855 at91_set_A_periph(AT91_PIN_PB12, 1);
856 if (pins & ATMEL_SSC_TK)
857 at91_set_A_periph(AT91_PIN_PB13, 1);
858 if (pins & ATMEL_SSC_TD)
859 at91_set_A_periph(AT91_PIN_PB14, 1);
860 if (pins & ATMEL_SSC_RD)
861 at91_set_A_periph(AT91_PIN_PB15, 1);
862 if (pins & ATMEL_SSC_RK)
863 at91_set_A_periph(AT91_PIN_PB16, 1);
864 if (pins & ATMEL_SSC_RF)
865 at91_set_A_periph(AT91_PIN_PB17, 1);
866}
867
868/*
869 * SSC controllers are accessed through library code, instead of any
870 * kind of all-singing/all-dancing driver. For example one could be
871 * used by a particular I2S audio codec's driver, while another one
872 * on the same system might be used by a custom data capture driver.
873 */
874void __init at91_add_device_ssc(unsigned id, unsigned pins)
875{
876 struct platform_device *pdev;
877
878 /*
879 * NOTE: caller is responsible for passing information matching
880 * "pins" to whatever will be using each particular controller.
881 */
882 switch (id) {
883 case AT91RM9200_ID_SSC0:
884 pdev = &at91rm9200_ssc0_device;
885 configure_ssc0_pins(pins);
886 break;
887 case AT91RM9200_ID_SSC1:
888 pdev = &at91rm9200_ssc1_device;
889 configure_ssc1_pins(pins);
890 break;
891 case AT91RM9200_ID_SSC2:
892 pdev = &at91rm9200_ssc2_device;
893 configure_ssc2_pins(pins);
894 break;
895 default:
896 return;
897 }
898
899 platform_device_register(pdev);
900}
901
902#else
903void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
904#endif
905
906
907/* --------------------------------------------------------------------
908 * UART
909 * -------------------------------------------------------------------- */
910
911#if defined(CONFIG_SERIAL_ATMEL)
912static struct resource dbgu_resources[] = {
913 [0] = {
914 .start = AT91RM9200_BASE_DBGU,
915 .end = AT91RM9200_BASE_DBGU + SZ_512 - 1,
916 .flags = IORESOURCE_MEM,
917 },
918 [1] = {
919 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
920 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
921 .flags = IORESOURCE_IRQ,
922 },
923};
924
925static struct atmel_uart_data dbgu_data = {
926 .use_dma_tx = 0,
927 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
928};
929
930static u64 dbgu_dmamask = DMA_BIT_MASK(32);
931
932static struct platform_device at91rm9200_dbgu_device = {
933 .name = "atmel_usart",
934 .id = 0,
935 .dev = {
936 .dma_mask = &dbgu_dmamask,
937 .coherent_dma_mask = DMA_BIT_MASK(32),
938 .platform_data = &dbgu_data,
939 },
940 .resource = dbgu_resources,
941 .num_resources = ARRAY_SIZE(dbgu_resources),
942};
943
944static inline void configure_dbgu_pins(void)
945{
946 at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
947 at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
948}
949
950static struct resource uart0_resources[] = {
951 [0] = {
952 .start = AT91RM9200_BASE_US0,
953 .end = AT91RM9200_BASE_US0 + SZ_16K - 1,
954 .flags = IORESOURCE_MEM,
955 },
956 [1] = {
957 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
958 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
959 .flags = IORESOURCE_IRQ,
960 },
961};
962
963static struct atmel_uart_data uart0_data = {
964 .use_dma_tx = 1,
965 .use_dma_rx = 1,
966};
967
968static struct gpiod_lookup_table uart0_gpios_table = {
969 .dev_id = "atmel_usart",
970 .table = {
971 GPIO_LOOKUP("pioA", 21, "rts", GPIO_ACTIVE_LOW),
972 { },
973 },
974};
975
976static u64 uart0_dmamask = DMA_BIT_MASK(32);
977
978static struct platform_device at91rm9200_uart0_device = {
979 .name = "atmel_usart",
980 .id = 1,
981 .dev = {
982 .dma_mask = &uart0_dmamask,
983 .coherent_dma_mask = DMA_BIT_MASK(32),
984 .platform_data = &uart0_data,
985 },
986 .resource = uart0_resources,
987 .num_resources = ARRAY_SIZE(uart0_resources),
988};
989
990static inline void configure_usart0_pins(unsigned pins)
991{
992 at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
993 at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
994
995 if (pins & ATMEL_UART_CTS)
996 at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
997
998 if (pins & ATMEL_UART_RTS) {
999 /*
1000 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
1001 * We need to drive the pin manually. The serial driver will driver
1002 * this to high when initializing.
1003 */
1004 gpiod_add_lookup_table(&uart0_gpios_table);
1005 }
1006}
1007
1008static struct resource uart1_resources[] = {
1009 [0] = {
1010 .start = AT91RM9200_BASE_US1,
1011 .end = AT91RM9200_BASE_US1 + SZ_16K - 1,
1012 .flags = IORESOURCE_MEM,
1013 },
1014 [1] = {
1015 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
1016 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
1017 .flags = IORESOURCE_IRQ,
1018 },
1019};
1020
1021static struct atmel_uart_data uart1_data = {
1022 .use_dma_tx = 1,
1023 .use_dma_rx = 1,
1024};
1025
1026static u64 uart1_dmamask = DMA_BIT_MASK(32);
1027
1028static struct platform_device at91rm9200_uart1_device = {
1029 .name = "atmel_usart",
1030 .id = 2,
1031 .dev = {
1032 .dma_mask = &uart1_dmamask,
1033 .coherent_dma_mask = DMA_BIT_MASK(32),
1034 .platform_data = &uart1_data,
1035 },
1036 .resource = uart1_resources,
1037 .num_resources = ARRAY_SIZE(uart1_resources),
1038};
1039
1040static inline void configure_usart1_pins(unsigned pins)
1041{
1042 at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
1043 at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
1044
1045 if (pins & ATMEL_UART_RI)
1046 at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
1047 if (pins & ATMEL_UART_DTR)
1048 at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
1049 if (pins & ATMEL_UART_DCD)
1050 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
1051 if (pins & ATMEL_UART_CTS)
1052 at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
1053 if (pins & ATMEL_UART_DSR)
1054 at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
1055 if (pins & ATMEL_UART_RTS)
1056 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
1057}
1058
1059static struct resource uart2_resources[] = {
1060 [0] = {
1061 .start = AT91RM9200_BASE_US2,
1062 .end = AT91RM9200_BASE_US2 + SZ_16K - 1,
1063 .flags = IORESOURCE_MEM,
1064 },
1065 [1] = {
1066 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1067 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1068 .flags = IORESOURCE_IRQ,
1069 },
1070};
1071
1072static struct atmel_uart_data uart2_data = {
1073 .use_dma_tx = 1,
1074 .use_dma_rx = 1,
1075};
1076
1077static u64 uart2_dmamask = DMA_BIT_MASK(32);
1078
1079static struct platform_device at91rm9200_uart2_device = {
1080 .name = "atmel_usart",
1081 .id = 3,
1082 .dev = {
1083 .dma_mask = &uart2_dmamask,
1084 .coherent_dma_mask = DMA_BIT_MASK(32),
1085 .platform_data = &uart2_data,
1086 },
1087 .resource = uart2_resources,
1088 .num_resources = ARRAY_SIZE(uart2_resources),
1089};
1090
1091static inline void configure_usart2_pins(unsigned pins)
1092{
1093 at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
1094 at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
1095
1096 if (pins & ATMEL_UART_CTS)
1097 at91_set_B_periph(AT91_PIN_PA30, 0); /* CTS2 */
1098 if (pins & ATMEL_UART_RTS)
1099 at91_set_B_periph(AT91_PIN_PA31, 0); /* RTS2 */
1100}
1101
1102static struct resource uart3_resources[] = {
1103 [0] = {
1104 .start = AT91RM9200_BASE_US3,
1105 .end = AT91RM9200_BASE_US3 + SZ_16K - 1,
1106 .flags = IORESOURCE_MEM,
1107 },
1108 [1] = {
1109 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1110 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1111 .flags = IORESOURCE_IRQ,
1112 },
1113};
1114
1115static struct atmel_uart_data uart3_data = {
1116 .use_dma_tx = 1,
1117 .use_dma_rx = 1,
1118};
1119
1120static u64 uart3_dmamask = DMA_BIT_MASK(32);
1121
1122static struct platform_device at91rm9200_uart3_device = {
1123 .name = "atmel_usart",
1124 .id = 4,
1125 .dev = {
1126 .dma_mask = &uart3_dmamask,
1127 .coherent_dma_mask = DMA_BIT_MASK(32),
1128 .platform_data = &uart3_data,
1129 },
1130 .resource = uart3_resources,
1131 .num_resources = ARRAY_SIZE(uart3_resources),
1132};
1133
1134static inline void configure_usart3_pins(unsigned pins)
1135{
1136 at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
1137 at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
1138
1139 if (pins & ATMEL_UART_CTS)
1140 at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
1141 if (pins & ATMEL_UART_RTS)
1142 at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
1143}
1144
1145static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1146
1147void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1148{
1149 struct platform_device *pdev;
1150 struct atmel_uart_data *pdata;
1151
1152 switch (id) {
1153 case 0: /* DBGU */
1154 pdev = &at91rm9200_dbgu_device;
1155 configure_dbgu_pins();
1156 break;
1157 case AT91RM9200_ID_US0:
1158 pdev = &at91rm9200_uart0_device;
1159 configure_usart0_pins(pins);
1160 break;
1161 case AT91RM9200_ID_US1:
1162 pdev = &at91rm9200_uart1_device;
1163 configure_usart1_pins(pins);
1164 break;
1165 case AT91RM9200_ID_US2:
1166 pdev = &at91rm9200_uart2_device;
1167 configure_usart2_pins(pins);
1168 break;
1169 case AT91RM9200_ID_US3:
1170 pdev = &at91rm9200_uart3_device;
1171 configure_usart3_pins(pins);
1172 break;
1173 default:
1174 return;
1175 }
1176 pdata = pdev->dev.platform_data;
1177 pdata->num = portnr; /* update to mapped ID */
1178
1179 if (portnr < ATMEL_MAX_UART)
1180 at91_uarts[portnr] = pdev;
1181}
1182
1183void __init at91_add_device_serial(void)
1184{
1185 int i;
1186
1187 for (i = 0; i < ATMEL_MAX_UART; i++) {
1188 if (at91_uarts[i])
1189 platform_device_register(at91_uarts[i]);
1190 }
1191}
1192#else
1193void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1194void __init at91_add_device_serial(void) {}
1195#endif
1196
1197
1198/* -------------------------------------------------------------------- */
1199
1200/*
1201 * These devices are always present and don't need any board-specific
1202 * setup.
1203 */
1204static int __init at91_add_standard_devices(void)
1205{
1206 at91_add_device_rtc();
1207 at91_add_device_watchdog();
1208 at91_add_device_tc();
1209 return 0;
1210}
1211
1212arch_initcall(at91_add_standard_devices);
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 04:22:09 -0400