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authorLinus Torvalds <torvalds@linux-foundation.org>2018-08-20 18:38:44 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-08-20 18:38:44 -0400
commit532c2b926dda11174700333a5dda5e3c0ee383f2 (patch)
tree518e583bd74e90c18f7dfd014e82ce011d0c732e
parent8786583db54197b3859311870912f51cb3fca434 (diff)
parentd2c9281c184bf2b768ac141a7a10586e0643695d (diff)
Merge tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones: "New Drivers: - Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver - Add ChromeOS EC CEC driver - Add ROHM BD71837 PMIC driver New Device Support: - Add support for Dialog Semi DA9063L PMIC variant to DA9063 - Add support for Intel Ice Lake to Intel-PLSS-PCI - Add support for X-Powers AXP806 to AXP20x New Functionality: - Add support for USB Charging to the ChromeOS Embedded Controller - Add support for HDMI CEC to the ChromeOS Embedded Controller - Add support for HDMI CEC to Intel HDMI - Add support for accessory detection to Madera devices - Allow individual pins to be configured via DT' wlf,csnaddr-pd - Provide legacy platform specific EEPROM/Watchdog commands; rave-sp Fix-upsL - Trivial renaming/spelling fixes; cros_ec, da9063-* - Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc - Transition to helper macros/functions; da9063-* - Constify; kempld-core - Improve error path/messages; wm8994-core - Disable IRQs locally instead of relying on USB subsystem; dln2 - Remove unused code; rave-sp - New exports; sec-core Bug Fixes: - Fix possible false I2C transaction error; arizona-core - Fix declared memory area size; hi655x-pmic - Fix checksum type; rave-sp - Fix incorrect default serial port configuration: rave-sp - Fix incorrect coherent DMA mask for sub-devices; sm501" * tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits) mfd: madera: Add register definitions for accessory detect mfd: sm501: Set coherent_dma_mask when creating subdevices mfd: bd71837: Devicetree bindings for ROHM BD71837 PMIC mfd: bd71837: Core driver for ROHM BD71837 PMIC media: platform: cros-ec-cec: Fix dependency on MFD_CROS_EC mfd: sec-core: Export OF module alias table mfd: as3722: Disable auto-power-on when AC OK mfd: axp20x: Support AXP806 in I2C mode mfd: axp20x: Add self-working mode support for AXP806 dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806 mfd: wm8994: Allow to configure CS/ADDR Pulldown from dts mfd: wm8994: Allow to configure Speaker Mode Pullup from dts mfd: rave-sp: Emulate CMD_GET_STATUS on device that don't support it mfd: rave-sp: Add legacy watchdog ping command translation mfd: rave-sp: Add legacy EEPROM access command translation mfd: rave-sp: Initialize flow control and parity of the port mfd: rave-sp: Fix incorrectly specified checksum type mfd: rave-sp: Remove unused defines mfd: hi655x: Fix regmap area declared size for hi655x mfd: ti_am335x_tscadc: Fix struct clk memory leak ...
-rw-r--r--Documentation/devicetree/bindings/mfd/as3722.txt2
-rw-r--r--Documentation/devicetree/bindings/mfd/axp20x.txt7
-rw-r--r--Documentation/devicetree/bindings/mfd/madera.txt102
-rw-r--r--Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt62
-rw-r--r--Documentation/devicetree/bindings/mfd/tps65910.txt2
-rw-r--r--Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt99
-rw-r--r--MAINTAINERS16
-rw-r--r--arch/arm/configs/exynos_defconfig4
-rw-r--r--arch/arm/configs/multi_v7_defconfig4
-rw-r--r--arch/arm/configs/pxa_defconfig4
-rw-r--r--arch/arm64/configs/defconfig4
-rw-r--r--drivers/gpio/Kconfig6
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/gpio-madera.c206
-rw-r--r--drivers/gpu/drm/i915/Kconfig1
-rw-r--r--drivers/gpu/drm/i915/intel_display.h24
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h2
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c13
-rw-r--r--drivers/input/keyboard/Kconfig2
-rw-r--r--drivers/media/cec/cec-notifier.c11
-rw-r--r--drivers/media/platform/Kconfig11
-rw-r--r--drivers/media/platform/Makefile2
-rw-r--r--drivers/media/platform/cros-ec-cec/Makefile1
-rw-r--r--drivers/media/platform/cros-ec-cec/cros-ec-cec.c347
-rw-r--r--drivers/mfd/Kconfig83
-rw-r--r--drivers/mfd/Makefile17
-rw-r--r--drivers/mfd/arizona-core.c34
-rw-r--r--drivers/mfd/as3722.c12
-rw-r--r--drivers/mfd/axp20x-i2c.c2
-rw-r--r--drivers/mfd/axp20x.c28
-rw-r--r--drivers/mfd/cros_ec_dev.c32
-rw-r--r--drivers/mfd/cs47l35-tables.c1609
-rw-r--r--drivers/mfd/cs47l85-tables.c3009
-rw-r--r--drivers/mfd/cs47l90-tables.c2674
-rw-r--r--drivers/mfd/da9063-core.c44
-rw-r--r--drivers/mfd/da9063-i2c.c239
-rw-r--r--drivers/mfd/da9063-irq.c264
-rw-r--r--drivers/mfd/dln2.c10
-rw-r--r--drivers/mfd/hi655x-pmic.c2
-rw-r--r--drivers/mfd/intel-lpss-pci.c13
-rw-r--r--drivers/mfd/kempld-core.c15
-rw-r--r--drivers/mfd/madera-core.c609
-rw-r--r--drivers/mfd/madera-i2c.c140
-rw-r--r--drivers/mfd/madera-spi.c139
-rw-r--r--drivers/mfd/madera.h44
-rw-r--r--drivers/mfd/rave-sp.c119
-rw-r--r--drivers/mfd/rohm-bd718x7.c211
-rw-r--r--drivers/mfd/sec-core.c1
-rw-r--r--drivers/mfd/sm501.c1
-rw-r--r--drivers/mfd/ti_am335x_tscadc.c3
-rw-r--r--drivers/mfd/wm8994-core.c15
-rw-r--r--drivers/pinctrl/Kconfig1
-rw-r--r--drivers/pinctrl/Makefile1
-rw-r--r--drivers/pinctrl/cirrus/Kconfig14
-rw-r--r--drivers/pinctrl/cirrus/Makefile13
-rw-r--r--drivers/pinctrl/cirrus/pinctrl-cs47l35.c45
-rw-r--r--drivers/pinctrl/cirrus/pinctrl-cs47l85.c59
-rw-r--r--drivers/pinctrl/cirrus/pinctrl-cs47l90.c57
-rw-r--r--drivers/pinctrl/cirrus/pinctrl-madera-core.c1076
-rw-r--r--drivers/pinctrl/cirrus/pinctrl-madera.h41
-rw-r--r--drivers/platform/chrome/Kconfig20
-rw-r--r--drivers/platform/chrome/Makefile2
-rw-r--r--drivers/platform/chrome/cros_ec_i2c.c (renamed from drivers/mfd/cros_ec_i2c.c)0
-rw-r--r--drivers/platform/chrome/cros_ec_proto.c40
-rw-r--r--drivers/platform/chrome/cros_ec_spi.c (renamed from drivers/mfd/cros_ec_spi.c)0
-rw-r--r--drivers/regulator/da9063-regulator.c84
-rw-r--r--include/linux/mfd/as3722.h3
-rw-r--r--include/linux/mfd/cros_ec.h2
-rw-r--r--include/linux/mfd/cros_ec_commands.h229
-rw-r--r--include/linux/mfd/da9063/core.h15
-rw-r--r--include/linux/mfd/madera/core.h187
-rw-r--r--include/linux/mfd/madera/pdata.h59
-rw-r--r--include/linux/mfd/madera/registers.h3968
-rw-r--r--include/linux/mfd/rave-sp.h1
-rw-r--r--include/linux/mfd/rohm-bd718x7.h332
-rw-r--r--include/linux/mfd/wm8994/pdata.h6
-rw-r--r--include/media/cec-notifier.h27
77 files changed, 16124 insertions, 460 deletions
diff --git a/Documentation/devicetree/bindings/mfd/as3722.txt b/Documentation/devicetree/bindings/mfd/as3722.txt
index 5297b2210704..2a665741d7fe 100644
--- a/Documentation/devicetree/bindings/mfd/as3722.txt
+++ b/Documentation/devicetree/bindings/mfd/as3722.txt
@@ -20,6 +20,8 @@ Optional properties:
20- ams,enable-internal-i2c-pullup: Boolean property, to enable internal pullup on 20- ams,enable-internal-i2c-pullup: Boolean property, to enable internal pullup on
21 i2c scl/sda pins. Missing this will disable internal pullup on i2c 21 i2c scl/sda pins. Missing this will disable internal pullup on i2c
22 scl/sda lines. 22 scl/sda lines.
23- ams,enable-ac-ok-power-on: Boolean property, to enable exit out of power off
24 mode with AC_OK pin (pin enabled in power off mode).
23 25
24Optional submodule and their properties: 26Optional submodule and their properties:
25======================================= 27=======================================
diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 62091f6b025e..188f0373d441 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -44,8 +44,11 @@ Optional properties:
44 board is driving OTG VBus or not. 44 board is driving OTG VBus or not.
45 (axp221 / axp223 / axp803/ axp813 only) 45 (axp221 / axp223 / axp803/ axp813 only)
46 46
47- x-powers,master-mode: Boolean (axp806 only). Set this when the PMIC is 47- x-powers,self-working-mode and
48 wired for master mode. The default is slave mode. 48 x-powers,master-mode: Boolean (axp806 only). Set either of these when the
49 PMIC is wired for self-working mode or master mode.
50 If neither is set then slave mode is assumed.
51 This corresponds to how the MODESET pin is wired.
49 52
50- <input>-supply: a phandle to the regulator supply node. May be omitted if 53- <input>-supply: a phandle to the regulator supply node. May be omitted if
51 inputs are unregulated, such as using the IPSOUT output 54 inputs are unregulated, such as using the IPSOUT output
diff --git a/Documentation/devicetree/bindings/mfd/madera.txt b/Documentation/devicetree/bindings/mfd/madera.txt
new file mode 100644
index 000000000000..db3266088386
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/madera.txt
@@ -0,0 +1,102 @@
1Cirrus Logic Madera class audio codecs Multi-Functional Device
2
3These devices are audio SoCs with extensive digital capabilities and a range
4of analogue I/O.
5
6See also the child driver bindings in:
7bindings/pinctrl/cirrus,madera-pinctrl.txt
8bindings/regulator/arizona-regulator.txt
9bindings/sound/madera.txt
10
11Required properties:
12
13 - compatible : One of the following chip-specific strings:
14 "cirrus,cs47l35"
15 "cirrus,cs47l85"
16 "cirrus,cs47l90"
17 "cirrus,cs47l91"
18 "cirrus,wm1840"
19
20 - reg : I2C slave address when connected using I2C, chip select number when
21 using SPI.
22
23 - DCVDD-supply : Power supply for the device as defined in
24 bindings/regulator/regulator.txt
25 Mandatory on CS47L35, CS47L90, CS47L91
26 Optional on CS47L85, WM1840
27
28 - AVDD-supply, DBVDD1-supply, DBVDD2-supply, CPVDD1-supply, CPVDD2-supply :
29 Power supplies for the device
30
31 - DBVDD3-supply, DBVDD4-supply : Power supplies for the device
32 (CS47L85, CS47L90, CS47L91, WM1840)
33
34 - SPKVDDL-supply, SPKVDDR-supply : Power supplies for the device
35 (CS47L85, WM1840)
36
37 - SPKVDD-supply : Power supply for the device
38 (CS47L35)
39
40 - interrupt-controller : Indicates that this device is an interrupt controller
41
42 - #interrupt-cells: the number of cells to describe an IRQ, must be 2.
43 The first cell is the IRQ number.
44 The second cell is the flags, encoded as the trigger masks from
45 bindings/interrupt-controller/interrupts.txt
46
47 - gpio-controller : Indicates this device is a GPIO controller.
48
49 - #gpio-cells : Must be 2. The first cell is the pin number. The second cell
50 is reserved for future use and must be zero
51
52 - interrupt-parent : The parent interrupt controller.
53
54 - interrupts : The interrupt line the /IRQ signal for the device is
55 connected to.
56
57Optional properties:
58
59 - MICVDD-supply : Power supply, only need to be specified if
60 powered externally
61
62 - reset-gpios : One entry specifying the GPIO controlling /RESET.
63 As defined in bindings/gpio.txt.
64 Although optional, it is strongly recommended to use a hardware reset
65
66 - MICBIASx : Initial data for the MICBIAS regulators, as covered in
67 Documentation/devicetree/bindings/regulator/regulator.txt.
68 One for each MICBIAS generator (MICBIAS1, MICBIAS2, ...)
69 (all codecs)
70
71 One for each output pin (MICBIAS1A, MIBCIAS1B, MICBIAS2A, ...)
72 (all except CS47L85, WM1840)
73
74 The following following additional property is supported for the generator
75 nodes:
76 - cirrus,ext-cap : Set to 1 if the MICBIAS has external decoupling
77 capacitors attached.
78
79Optional child nodes:
80 micvdd : Node containing initialization data for the micvdd regulator
81 See bindings/regulator/arizona-regulator.txt
82
83 ldo1 : Node containing initialization data for the LDO1 regulator
84 See bindings/regulator/arizona-regulator.txt
85 (cs47l85, wm1840)
86
87Example:
88
89cs47l85@0 {
90 compatible = "cirrus,cs47l85";
91 reg = <0>;
92
93 reset-gpios = <&gpio 0>;
94
95 interrupt-controller;
96 #interrupt-cells = <2>;
97 interrupts = <&host_irq1>;
98 interrupt-parent = <&gic>;
99
100 gpio-controller;
101 #gpio-cells = <2>;
102};
diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt
new file mode 100644
index 000000000000..3ca56fdb5ffe
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt
@@ -0,0 +1,62 @@
1* ROHM BD71837 Power Management Integrated Circuit bindings
2
3BD71837MWV is a programmable Power Management IC for powering single-core,
4dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for
5low BOM cost and compact solution footprint. It integrates 8 Buck
6egulators and 7 LDOs to provide all the power rails required by the SoC and
7the commonly used peripherals.
8
9Datasheet for PMIC is available at:
10https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
11
12Required properties:
13 - compatible : Should be "rohm,bd71837".
14 - reg : I2C slave address.
15 - interrupt-parent : Phandle to the parent interrupt controller.
16 - interrupts : The interrupt line the device is connected to.
17 - clocks : The parent clock connected to PMIC. If this is missing
18 32768 KHz clock is assumed.
19 - #clock-cells : Should be 0.
20 - regulators: : List of child nodes that specify the regulators.
21 Please see ../regulator/rohm,bd71837-regulator.txt
22
23Optional properties:
24- clock-output-names : Should contain name for output clock.
25
26Example:
27
28 /* external oscillator node */
29 osc: oscillator {
30 compatible = "fixed-clock";
31 #clock-cells = <1>;
32 clock-frequency = <32768>;
33 clock-output-names = "osc";
34 };
35
36 pmic: pmic@4b {
37 compatible = "rohm,bd71837";
38 reg = <0x4b>;
39 interrupt-parent = <&gpio1>;
40 interrupts = <29 GPIO_ACTIVE_LOW>;
41 interrupt-names = "irq";
42 #clock-cells = <0>;
43 clocks = <&osc 0>;
44 clock-output-names = "bd71837-32k-out";
45
46 regulators {
47 buck1: BUCK1 {
48 regulator-name = "buck1";
49 regulator-min-microvolt = <700000>;
50 regulator-max-microvolt = <1300000>;
51 regulator-boot-on;
52 regulator-ramp-delay = <1250>;
53 };
54 };
55 };
56
57 /* Clock consumer node */
58 rtc@0 {
59 compatible = "company,my-rtc";
60 clock-names = "my-clock";
61 clocks = <&pmic>;
62 };
diff --git a/Documentation/devicetree/bindings/mfd/tps65910.txt b/Documentation/devicetree/bindings/mfd/tps65910.txt
index 8af1202b381d..4f62143afd24 100644
--- a/Documentation/devicetree/bindings/mfd/tps65910.txt
+++ b/Documentation/devicetree/bindings/mfd/tps65910.txt
@@ -22,7 +22,7 @@ Required properties:
22 The valid regulator-compatible values are: 22 The valid regulator-compatible values are:
23 tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1, 23 tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1,
24 vaux2, vaux33, vmmc, vbb 24 vaux2, vaux33, vmmc, vbb
25 tps65911: vrtc, vio, vdd1, vdd3, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5, 25 tps65911: vrtc, vio, vdd1, vdd2, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5,
26 ldo6, ldo7, ldo8 26 ldo6, ldo7, ldo8
27 27
28- xxx-supply: Input voltage supply regulator. 28- xxx-supply: Input voltage supply regulator.
diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt
new file mode 100644
index 000000000000..b0e36cf0d289
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt
@@ -0,0 +1,99 @@
1Cirrus Logic Madera class audio codecs pinctrl driver
2
3The Cirrus Logic Madera codecs provide a number of GPIO functions for
4interfacing to external hardware and to provide logic outputs to other devices.
5Certain groups of GPIO pins also have an alternate function, normally as an
6audio interface.
7
8The set of available GPIOs, functions and alternate function groups differs
9between codecs so refer to the datasheet for the codec for further information
10on what is supported on that device.
11
12The properties for this driver exist within the parent MFD driver node.
13
14See also
15 the core bindings for the parent MFD driver:
16 Documentation/devicetree/bindings/mfd/madera.txt
17
18 the generic pinmix bindings:
19 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
20
21Required properties of parent mfd node:
22 - pinctrl-names : must be "default"
23 - pinctrl-0 : a phandle to the node containing the subnodes containing default
24 configurations
25
26Required subnodes:
27 One subnode is required to contain the default settings. It contains an
28 arbitrary number of configuration subnodes, one for each group or pin
29 configuration you want to apply as a default.
30
31Required properties of configuration subnodes:
32 - groups : name of one pin group to configure. One of:
33 aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1, pdmspk2,
34 dmic4, dmic5, dmic6,
35 gpio1, gpio2, ..., gpio40
36 The gpioN groups select the single pin of this name for configuration
37
38Optional properties of configuration subnodes:
39 Any configuration option not explicitly listed in the dts will be left at
40 chip default setting.
41
42 - function : name of function to assign to this group. One of:
43 aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1, pdmspk2,
44 dmic3, dmic4, dmic5, dmic6,
45 io, dsp-gpio, irq1, irq2,
46 fll1-clk, fll1-lock, fll2-clk, fll2-lock, fll3-clk, fll3-lock,
47 fllao-clk, fllao-lock,
48 opclk, opclk-async, pwm1, pwm2, spdif,
49 asrc1-in1-lock, asrc1-in2-lock, asrc2-in1-lock, asrc2-in2-lock,
50 spkl-short-circuit, spkr-short-circuit, spk-shutdown,
51 spk-overheat-shutdown, spk-overheat-warn,
52 timer1-sts, timer2-sts, timer3-sts, timer4-sts, timer5-sts, timer6-sts,
53 timer7-sts, timer8-sts,
54 log1-fifo-ne, log2-fifo-ne, log3-fifo-ne, log4-fifo-ne, log5-fifo-ne,
55 log6-fifo-ne, log7-fifo-ne, log8-fifo-ne,
56
57 - bias-disable : disable pull-up and pull-down
58 - bias-bus-hold : enable buskeeper
59 - bias-pull-up : output is pulled-up
60 - bias-pull-down : output is pulled-down
61 - drive-push-pull : CMOS output
62 - drive-open-drain : open-drain output
63 - drive-strength : drive strength in mA. Valid values are 4 or 8
64 - input-schmitt-enable : enable schmitt-trigger mode
65 - input-schmitt-disable : disable schmitt-trigger mode
66 - input-debounce : A value of 0 disables debounce, a value !=0 enables
67 debounce
68 - output-low : set the pin to output mode with low level
69 - output-high : set the pin to output mode with high level
70
71Example:
72
73cs47l85@0 {
74 compatible = "cirrus,cs47l85";
75
76 pinctrl-names = "default";
77 pinctrl-0 = <&cs47l85_defaults>;
78
79 cs47l85_defaults: cs47l85-gpio-defaults {
80 aif1 {
81 groups = "aif1";
82 function = "aif1";
83 bias-bus-hold;
84 };
85
86 aif2 {
87 groups = "aif2";
88 function = "aif2";
89 bias-bus-hold;
90 };
91
92 opclk {
93 groups = "gpio1";
94 function = "opclk";
95 bias-pull-up;
96 drive-strength = <8>;
97 };
98 };
99};
diff --git a/MAINTAINERS b/MAINTAINERS
index 955463f8d518..5df1b3643196 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3562,6 +3562,22 @@ M: Christian Benvenuti <benve@cisco.com>
3562S: Supported 3562S: Supported
3563F: drivers/infiniband/hw/usnic/ 3563F: drivers/infiniband/hw/usnic/
3564 3564
3565CIRRUS LOGIC MADERA CODEC DRIVERS
3566M: Charles Keepax <ckeepax@opensource.cirrus.com>
3567M: Richard Fitzgerald <rf@opensource.cirrus.com>
3568L: alsa-devel@alsa-project.org (moderated for non-subscribers)
3569L: patches@opensource.cirrus.com
3570T: git https://github.com/CirrusLogic/linux-drivers.git
3571W: https://github.com/CirrusLogic/linux-drivers/wiki
3572S: Supported
3573F: Documentation/devicetree/bindings/mfd/madera.txt
3574F: Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt
3575F: include/linux/mfd/madera/*
3576F: drivers/gpio/gpio-madera*
3577F: drivers/mfd/madera*
3578F: drivers/mfd/cs47l*
3579F: drivers/pinctrl/cirrus/*
3580
3565CLANG-FORMAT FILE 3581CLANG-FORMAT FILE
3566M: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com> 3582M: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com>
3567S: Maintained 3583S: Maintained
diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
index 85b2369d6b20..27ea6dfcf2f2 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -155,8 +155,8 @@ CONFIG_THERMAL_EMULATION=y
155CONFIG_WATCHDOG=y 155CONFIG_WATCHDOG=y
156CONFIG_S3C2410_WATCHDOG=y 156CONFIG_S3C2410_WATCHDOG=y
157CONFIG_MFD_CROS_EC=y 157CONFIG_MFD_CROS_EC=y
158CONFIG_MFD_CROS_EC_I2C=y 158CONFIG_CROS_EC_I2C=y
159CONFIG_MFD_CROS_EC_SPI=y 159CONFIG_CROS_EC_SPI=y
160CONFIG_MFD_MAX14577=y 160CONFIG_MFD_MAX14577=y
161CONFIG_MFD_MAX77686=y 161CONFIG_MFD_MAX77686=y
162CONFIG_MFD_MAX77693=y 162CONFIG_MFD_MAX77693=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 8f6be1982545..be732f382418 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -490,8 +490,8 @@ CONFIG_MFD_AC100=y
490CONFIG_MFD_AXP20X_I2C=y 490CONFIG_MFD_AXP20X_I2C=y
491CONFIG_MFD_AXP20X_RSB=y 491CONFIG_MFD_AXP20X_RSB=y
492CONFIG_MFD_CROS_EC=m 492CONFIG_MFD_CROS_EC=m
493CONFIG_MFD_CROS_EC_I2C=m 493CONFIG_CROS_EC_I2C=m
494CONFIG_MFD_CROS_EC_SPI=m 494CONFIG_CROS_EC_SPI=m
495CONFIG_MFD_DA9063=m 495CONFIG_MFD_DA9063=m
496CONFIG_MFD_MAX14577=y 496CONFIG_MFD_MAX14577=y
497CONFIG_MFD_MAX77686=y 497CONFIG_MFD_MAX77686=y
diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig
index 5655a1cee87d..6bb506edb1f5 100644
--- a/arch/arm/configs/pxa_defconfig
+++ b/arch/arm/configs/pxa_defconfig
@@ -398,8 +398,8 @@ CONFIG_MFD_AS3711=y
398CONFIG_MFD_BCM590XX=m 398CONFIG_MFD_BCM590XX=m
399CONFIG_MFD_AXP20X=y 399CONFIG_MFD_AXP20X=y
400CONFIG_MFD_CROS_EC=m 400CONFIG_MFD_CROS_EC=m
401CONFIG_MFD_CROS_EC_I2C=m 401CONFIG_CROS_EC_I2C=m
402CONFIG_MFD_CROS_EC_SPI=m 402CONFIG_CROS_EC_SPI=m
403CONFIG_MFD_ASIC3=y 403CONFIG_MFD_ASIC3=y
404CONFIG_PMIC_DA903X=y 404CONFIG_PMIC_DA903X=y
405CONFIG_HTC_EGPIO=y 405CONFIG_HTC_EGPIO=y
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c07e233012b..514787d45dee 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -373,8 +373,8 @@ CONFIG_UNIPHIER_WATCHDOG=y
373CONFIG_BCM2835_WDT=y 373CONFIG_BCM2835_WDT=y
374CONFIG_MFD_AXP20X_RSB=y 374CONFIG_MFD_AXP20X_RSB=y
375CONFIG_MFD_CROS_EC=y 375CONFIG_MFD_CROS_EC=y
376CONFIG_MFD_CROS_EC_I2C=y 376CONFIG_CROS_EC_I2C=y
377CONFIG_MFD_CROS_EC_SPI=y 377CONFIG_CROS_EC_SPI=y
378CONFIG_MFD_CROS_EC_CHARDEV=m 378CONFIG_MFD_CROS_EC_CHARDEV=m
379CONFIG_MFD_EXYNOS_LPASS=m 379CONFIG_MFD_EXYNOS_LPASS=m
380CONFIG_MFD_HI6421_PMIC=y 380CONFIG_MFD_HI6421_PMIC=y
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index f7a0f576f918..4f52c3a8ec99 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1049,6 +1049,12 @@ config GPIO_LP87565
1049 This driver can also be built as a module. If so, the module will be 1049 This driver can also be built as a module. If so, the module will be
1050 called gpio-lp87565. 1050 called gpio-lp87565.
1051 1051
1052config GPIO_MADERA
1053 tristate "Cirrus Logic Madera class codecs"
1054 depends on PINCTRL_MADERA
1055 help
1056 Support for GPIOs on Cirrus Logic Madera class codecs.
1057
1052config GPIO_MAX77620 1058config GPIO_MAX77620
1053 tristate "GPIO support for PMIC MAX77620 and MAX20024" 1059 tristate "GPIO support for PMIC MAX77620 and MAX20024"
1054 depends on MFD_MAX77620 1060 depends on MFD_MAX77620
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index fc77989371be..c256aff66a65 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -71,6 +71,7 @@ obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o
71obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o 71obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o
72obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o 72obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o
73obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o 73obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o
74obj-$(CONFIG_GPIO_MADERA) += gpio-madera.o
74obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o 75obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o
75obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o 76obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o
76obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o 77obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o
diff --git a/drivers/gpio/gpio-madera.c b/drivers/gpio/gpio-madera.c
new file mode 100644
index 000000000000..7ba68d1a0932
--- /dev/null
+++ b/drivers/gpio/gpio-madera.c
@@ -0,0 +1,206 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * GPIO support for Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2015-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/gpio/driver.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/platform_device.h>
16
17#include <linux/mfd/madera/core.h>
18#include <linux/mfd/madera/pdata.h>
19#include <linux/mfd/madera/registers.h>
20
21struct madera_gpio {
22 struct madera *madera;
23 /* storage space for the gpio_chip we're using */
24 struct gpio_chip gpio_chip;
25};
26
27static int madera_gpio_get_direction(struct gpio_chip *chip,
28 unsigned int offset)
29{
30 struct madera_gpio *madera_gpio = gpiochip_get_data(chip);
31 struct madera *madera = madera_gpio->madera;
32 unsigned int reg_offset = 2 * offset;
33 unsigned int val;
34 int ret;
35
36 ret = regmap_read(madera->regmap, MADERA_GPIO1_CTRL_2 + reg_offset,
37 &val);
38 if (ret < 0)
39 return ret;
40
41 return !!(val & MADERA_GP1_DIR_MASK);
42}
43
44static int madera_gpio_direction_in(struct gpio_chip *chip, unsigned int offset)
45{
46 struct madera_gpio *madera_gpio = gpiochip_get_data(chip);
47 struct madera *madera = madera_gpio->madera;
48 unsigned int reg_offset = 2 * offset;
49
50 return regmap_update_bits(madera->regmap,
51 MADERA_GPIO1_CTRL_2 + reg_offset,
52 MADERA_GP1_DIR_MASK, MADERA_GP1_DIR);
53}
54
55static int madera_gpio_get(struct gpio_chip *chip, unsigned int offset)
56{
57 struct madera_gpio *madera_gpio = gpiochip_get_data(chip);
58 struct madera *madera = madera_gpio->madera;
59 unsigned int reg_offset = 2 * offset;
60 unsigned int val;
61 int ret;
62
63 ret = regmap_read(madera->regmap, MADERA_GPIO1_CTRL_1 + reg_offset,
64 &val);
65 if (ret < 0)
66 return ret;
67
68 return !!(val & MADERA_GP1_LVL_MASK);
69}
70
71static int madera_gpio_direction_out(struct gpio_chip *chip,
72 unsigned int offset, int value)
73{
74 struct madera_gpio *madera_gpio = gpiochip_get_data(chip);
75 struct madera *madera = madera_gpio->madera;
76 unsigned int reg_offset = 2 * offset;
77 unsigned int reg_val = value ? MADERA_GP1_LVL : 0;
78 int ret;
79
80 ret = regmap_update_bits(madera->regmap,
81 MADERA_GPIO1_CTRL_2 + reg_offset,
82 MADERA_GP1_DIR_MASK, 0);
83 if (ret < 0)
84 return ret;
85
86 return regmap_update_bits(madera->regmap,
87 MADERA_GPIO1_CTRL_1 + reg_offset,
88 MADERA_GP1_LVL_MASK, reg_val);
89}
90
91static void madera_gpio_set(struct gpio_chip *chip, unsigned int offset,
92 int value)
93{
94 struct madera_gpio *madera_gpio = gpiochip_get_data(chip);
95 struct madera *madera = madera_gpio->madera;
96 unsigned int reg_offset = 2 * offset;
97 unsigned int reg_val = value ? MADERA_GP1_LVL : 0;
98 int ret;
99
100 ret = regmap_update_bits(madera->regmap,
101 MADERA_GPIO1_CTRL_1 + reg_offset,
102 MADERA_GP1_LVL_MASK, reg_val);
103
104 /* set() doesn't return an error so log a warning */
105 if (ret)
106 dev_warn(madera->dev, "Failed to write to 0x%x (%d)\n",
107 MADERA_GPIO1_CTRL_1 + reg_offset, ret);
108}
109
110static struct gpio_chip madera_gpio_chip = {
111 .label = "madera",
112 .owner = THIS_MODULE,
113 .request = gpiochip_generic_request,
114 .free = gpiochip_generic_free,
115 .get_direction = madera_gpio_get_direction,
116 .direction_input = madera_gpio_direction_in,
117 .get = madera_gpio_get,
118 .direction_output = madera_gpio_direction_out,
119 .set = madera_gpio_set,
120 .set_config = gpiochip_generic_config,
121 .can_sleep = true,
122};
123
124static int madera_gpio_probe(struct platform_device *pdev)
125{
126 struct madera *madera = dev_get_drvdata(pdev->dev.parent);
127 struct madera_pdata *pdata = dev_get_platdata(madera->dev);
128 struct madera_gpio *madera_gpio;
129 int ret;
130
131 madera_gpio = devm_kzalloc(&pdev->dev, sizeof(*madera_gpio),
132 GFP_KERNEL);
133 if (!madera_gpio)
134 return -ENOMEM;
135
136 madera_gpio->madera = madera;
137
138 /* Construct suitable gpio_chip from the template in madera_gpio_chip */
139 madera_gpio->gpio_chip = madera_gpio_chip;
140 madera_gpio->gpio_chip.parent = pdev->dev.parent;
141
142 switch (madera->type) {
143 case CS47L35:
144 madera_gpio->gpio_chip.ngpio = CS47L35_NUM_GPIOS;
145 break;
146 case CS47L85:
147 case WM1840:
148 madera_gpio->gpio_chip.ngpio = CS47L85_NUM_GPIOS;
149 break;
150 case CS47L90:
151 case CS47L91:
152 madera_gpio->gpio_chip.ngpio = CS47L90_NUM_GPIOS;
153 break;
154 default:
155 dev_err(&pdev->dev, "Unknown chip variant %d\n", madera->type);
156 return -EINVAL;
157 }
158
159 /* We want to be usable on systems that don't use devicetree or acpi */
160 if (pdata && pdata->gpio_base)
161 madera_gpio->gpio_chip.base = pdata->gpio_base;
162 else
163 madera_gpio->gpio_chip.base = -1;
164
165 ret = devm_gpiochip_add_data(&pdev->dev,
166 &madera_gpio->gpio_chip,
167 madera_gpio);
168 if (ret < 0) {
169 dev_dbg(&pdev->dev, "Could not register gpiochip, %d\n", ret);
170 return ret;
171 }
172
173 /*
174 * This is part of a composite MFD device which can only be used with
175 * the corresponding pinctrl driver. On all supported silicon the GPIO
176 * to pinctrl mapping is fixed in the silicon, so we register it
177 * explicitly instead of requiring a redundant gpio-ranges in the
178 * devicetree.
179 * In any case we also want to work on systems that don't use devicetree
180 * or acpi.
181 */
182 ret = gpiochip_add_pin_range(&madera_gpio->gpio_chip, "madera-pinctrl",
183 0, 0, madera_gpio->gpio_chip.ngpio);
184 if (ret) {
185 dev_dbg(&pdev->dev, "Failed to add pin range (%d)\n", ret);
186 return ret;
187 }
188
189 return 0;
190}
191
192static struct platform_driver madera_gpio_driver = {
193 .driver = {
194 .name = "madera-gpio",
195 },
196 .probe = madera_gpio_probe,
197};
198
199module_platform_driver(madera_gpio_driver);
200
201MODULE_SOFTDEP("pre: pinctrl-madera");
202MODULE_DESCRIPTION("GPIO interface for Madera codecs");
203MODULE_AUTHOR("Nariman Poushin <nariman@opensource.cirrus.com>");
204MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
205MODULE_LICENSE("GPL v2");
206MODULE_ALIAS("platform:madera-gpio");
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 5c607f2c707b..33a458b7f1fc 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -24,6 +24,7 @@ config DRM_I915
24 select IOSF_MBI 24 select IOSF_MBI
25 select CRC32 25 select CRC32
26 select SND_HDA_I915 if SND_HDA_CORE 26 select SND_HDA_I915 if SND_HDA_CORE
27 select CEC_CORE if CEC_NOTIFIER
27 help 28 help
28 Choose this option if you have a system that has "Intel Graphics 29 Choose this option if you have a system that has "Intel Graphics
29 Media Accelerator" or "HD Graphics" integrated graphics, 30 Media Accelerator" or "HD Graphics" integrated graphics,
diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
index 9292001cdd14..138a1bc1818c 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -126,6 +126,30 @@ enum port {
126 126
127#define port_name(p) ((p) + 'A') 127#define port_name(p) ((p) + 'A')
128 128
129/*
130 * Ports identifier referenced from other drivers.
131 * Expected to remain stable over time
132 */
133static inline const char *port_identifier(enum port port)
134{
135 switch (port) {
136 case PORT_A:
137 return "Port A";
138 case PORT_B:
139 return "Port B";
140 case PORT_C:
141 return "Port C";
142 case PORT_D:
143 return "Port D";
144 case PORT_E:
145 return "Port E";
146 case PORT_F:
147 return "Port F";
148 default:
149 return "<invalid>";
150 }
151}
152
129enum tc_port { 153enum tc_port {
130 PORT_TC_NONE = -1, 154 PORT_TC_NONE = -1,
131 155
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 17af06d8a43e..8fc61e96754f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -39,6 +39,7 @@
39#include <drm/drm_dp_mst_helper.h> 39#include <drm/drm_dp_mst_helper.h>
40#include <drm/drm_rect.h> 40#include <drm/drm_rect.h>
41#include <drm/drm_atomic.h> 41#include <drm/drm_atomic.h>
42#include <media/cec-notifier.h>
42 43
43/** 44/**
44 * __wait_for - magic wait macro 45 * __wait_for - magic wait macro
@@ -1016,6 +1017,7 @@ struct intel_hdmi {
1016 bool has_audio; 1017 bool has_audio;
1017 bool rgb_quant_range_selectable; 1018 bool rgb_quant_range_selectable;
1018 struct intel_connector *attached_connector; 1019 struct intel_connector *attached_connector;
1020 struct cec_notifier *cec_notifier;
1019}; 1021};
1020 1022
1021struct intel_dp_mst_encoder; 1023struct intel_dp_mst_encoder;
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 8363fbd18ee8..a9076402dcb0 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1899,6 +1899,8 @@ intel_hdmi_set_edid(struct drm_connector *connector)
1899 connected = true; 1899 connected = true;
1900 } 1900 }
1901 1901
1902 cec_notifier_set_phys_addr_from_edid(intel_hdmi->cec_notifier, edid);
1903
1902 return connected; 1904 return connected;
1903} 1905}
1904 1906
@@ -1907,6 +1909,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
1907{ 1909{
1908 enum drm_connector_status status; 1910 enum drm_connector_status status;
1909 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1911 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1912 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
1910 1913
1911 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1914 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1912 connector->base.id, connector->name); 1915 connector->base.id, connector->name);
@@ -1922,6 +1925,9 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
1922 1925
1923 intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS); 1926 intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);
1924 1927
1928 if (status != connector_status_connected)
1929 cec_notifier_phys_addr_invalidate(intel_hdmi->cec_notifier);
1930
1925 return status; 1931 return status;
1926} 1932}
1927 1933
@@ -2062,6 +2068,8 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder,
2062 2068
2063static void intel_hdmi_destroy(struct drm_connector *connector) 2069static void intel_hdmi_destroy(struct drm_connector *connector)
2064{ 2070{
2071 if (intel_attached_hdmi(connector)->cec_notifier)
2072 cec_notifier_put(intel_attached_hdmi(connector)->cec_notifier);
2065 kfree(to_intel_connector(connector)->detect_edid); 2073 kfree(to_intel_connector(connector)->detect_edid);
2066 drm_connector_cleanup(connector); 2074 drm_connector_cleanup(connector);
2067 kfree(connector); 2075 kfree(connector);
@@ -2382,6 +2390,11 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
2382 u32 temp = I915_READ(PEG_BAND_GAP_DATA); 2390 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
2383 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd); 2391 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
2384 } 2392 }
2393
2394 intel_hdmi->cec_notifier = cec_notifier_get_conn(dev->dev,
2395 port_identifier(port));
2396 if (!intel_hdmi->cec_notifier)
2397 DRM_DEBUG_KMS("CEC notifier get failed\n");
2385} 2398}
2386 2399
2387void intel_hdmi_init(struct drm_i915_private *dev_priv, 2400void intel_hdmi_init(struct drm_i915_private *dev_priv,
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 6bd97ffee761..4713957b0cbb 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -721,7 +721,7 @@ config KEYBOARD_CROS_EC
721 help 721 help
722 Say Y here to enable the matrix keyboard used by ChromeOS devices 722 Say Y here to enable the matrix keyboard used by ChromeOS devices
723 and implemented on the ChromeOS EC. You must enable one bus option 723 and implemented on the ChromeOS EC. You must enable one bus option
724 (MFD_CROS_EC_I2C or MFD_CROS_EC_SPI) to use this. 724 (CROS_EC_I2C or CROS_EC_SPI) to use this.
725 725
726 To compile this driver as a module, choose M here: the 726 To compile this driver as a module, choose M here: the
727 module will be called cros_ec_keyb. 727 module will be called cros_ec_keyb.
diff --git a/drivers/media/cec/cec-notifier.c b/drivers/media/cec/cec-notifier.c
index 16dffa06c913..dd2078b27a41 100644
--- a/drivers/media/cec/cec-notifier.c
+++ b/drivers/media/cec/cec-notifier.c
@@ -21,6 +21,7 @@ struct cec_notifier {
21 struct list_head head; 21 struct list_head head;
22 struct kref kref; 22 struct kref kref;
23 struct device *dev; 23 struct device *dev;
24 const char *conn;
24 struct cec_adapter *cec_adap; 25 struct cec_adapter *cec_adap;
25 void (*callback)(struct cec_adapter *adap, u16 pa); 26 void (*callback)(struct cec_adapter *adap, u16 pa);
26 27
@@ -30,13 +31,14 @@ struct cec_notifier {
30static LIST_HEAD(cec_notifiers); 31static LIST_HEAD(cec_notifiers);
31static DEFINE_MUTEX(cec_notifiers_lock); 32static DEFINE_MUTEX(cec_notifiers_lock);
32 33
33struct cec_notifier *cec_notifier_get(struct device *dev) 34struct cec_notifier *cec_notifier_get_conn(struct device *dev, const char *conn)
34{ 35{
35 struct cec_notifier *n; 36 struct cec_notifier *n;
36 37
37 mutex_lock(&cec_notifiers_lock); 38 mutex_lock(&cec_notifiers_lock);
38 list_for_each_entry(n, &cec_notifiers, head) { 39 list_for_each_entry(n, &cec_notifiers, head) {
39 if (n->dev == dev) { 40 if (n->dev == dev &&
41 (!conn || !strcmp(n->conn, conn))) {
40 kref_get(&n->kref); 42 kref_get(&n->kref);
41 mutex_unlock(&cec_notifiers_lock); 43 mutex_unlock(&cec_notifiers_lock);
42 return n; 44 return n;
@@ -46,6 +48,8 @@ struct cec_notifier *cec_notifier_get(struct device *dev)
46 if (!n) 48 if (!n)
47 goto unlock; 49 goto unlock;
48 n->dev = dev; 50 n->dev = dev;
51 if (conn)
52 n->conn = kstrdup(conn, GFP_KERNEL);
49 n->phys_addr = CEC_PHYS_ADDR_INVALID; 53 n->phys_addr = CEC_PHYS_ADDR_INVALID;
50 mutex_init(&n->lock); 54 mutex_init(&n->lock);
51 kref_init(&n->kref); 55 kref_init(&n->kref);
@@ -54,7 +58,7 @@ unlock:
54 mutex_unlock(&cec_notifiers_lock); 58 mutex_unlock(&cec_notifiers_lock);
55 return n; 59 return n;
56} 60}
57EXPORT_SYMBOL_GPL(cec_notifier_get); 61EXPORT_SYMBOL_GPL(cec_notifier_get_conn);
58 62
59static void cec_notifier_release(struct kref *kref) 63static void cec_notifier_release(struct kref *kref)
60{ 64{
@@ -62,6 +66,7 @@ static void cec_notifier_release(struct kref *kref)
62 container_of(kref, struct cec_notifier, kref); 66 container_of(kref, struct cec_notifier, kref);
63 67
64 list_del(&n->head); 68 list_del(&n->head);
69 kfree(n->conn);
65 kfree(n); 70 kfree(n);
66} 71}
67 72
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index b25c8d3c1c31..94c1fe0e9787 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -536,6 +536,17 @@ menuconfig CEC_PLATFORM_DRIVERS
536 536
537if CEC_PLATFORM_DRIVERS 537if CEC_PLATFORM_DRIVERS
538 538
539config VIDEO_CROS_EC_CEC
540 tristate "ChromeOS EC CEC driver"
541 depends on MFD_CROS_EC
542 select CEC_CORE
543 select CEC_NOTIFIER
544 ---help---
545 If you say yes here you will get support for the
546 ChromeOS Embedded Controller's CEC.
547 The CEC bus is present in the HDMI connector and enables communication
548 between compatible devices.
549
539config VIDEO_MESON_AO_CEC 550config VIDEO_MESON_AO_CEC
540 tristate "Amlogic Meson AO CEC driver" 551 tristate "Amlogic Meson AO CEC driver"
541 depends on ARCH_MESON || COMPILE_TEST 552 depends on ARCH_MESON || COMPILE_TEST
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index 08640ba87fc2..41322ab65802 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -94,3 +94,5 @@ obj-$(CONFIG_VIDEO_QCOM_CAMSS) += qcom/camss/
94obj-$(CONFIG_VIDEO_QCOM_VENUS) += qcom/venus/ 94obj-$(CONFIG_VIDEO_QCOM_VENUS) += qcom/venus/
95 95
96obj-y += meson/ 96obj-y += meson/
97
98obj-y += cros-ec-cec/
diff --git a/drivers/media/platform/cros-ec-cec/Makefile b/drivers/media/platform/cros-ec-cec/Makefile
new file mode 100644
index 000000000000..9ce97f93febe
--- /dev/null
+++ b/drivers/media/platform/cros-ec-cec/Makefile
@@ -0,0 +1 @@
obj-$(CONFIG_VIDEO_CROS_EC_CEC) += cros-ec-cec.o
diff --git a/drivers/media/platform/cros-ec-cec/cros-ec-cec.c b/drivers/media/platform/cros-ec-cec/cros-ec-cec.c
new file mode 100644
index 000000000000..7bc4d8a9af28
--- /dev/null
+++ b/drivers/media/platform/cros-ec-cec/cros-ec-cec.c
@@ -0,0 +1,347 @@
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * CEC driver for ChromeOS Embedded Controller
4 *
5 * Copyright (c) 2018 BayLibre, SAS
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 */
8
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/dmi.h>
13#include <linux/pci.h>
14#include <linux/cec.h>
15#include <linux/slab.h>
16#include <linux/interrupt.h>
17#include <media/cec.h>
18#include <media/cec-notifier.h>
19#include <linux/mfd/cros_ec.h>
20#include <linux/mfd/cros_ec_commands.h>
21
22#define DRV_NAME "cros-ec-cec"
23
24/**
25 * struct cros_ec_cec - Driver data for EC CEC
26 *
27 * @cros_ec: Pointer to EC device
28 * @notifier: Notifier info for responding to EC events
29 * @adap: CEC adapter
30 * @notify: CEC notifier pointer
31 * @rx_msg: storage for a received message
32 */
33struct cros_ec_cec {
34 struct cros_ec_device *cros_ec;
35 struct notifier_block notifier;
36 struct cec_adapter *adap;
37 struct cec_notifier *notify;
38 struct cec_msg rx_msg;
39};
40
41static void handle_cec_message(struct cros_ec_cec *cros_ec_cec)
42{
43 struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec;
44 uint8_t *cec_message = cros_ec->event_data.data.cec_message;
45 unsigned int len = cros_ec->event_size;
46
47 cros_ec_cec->rx_msg.len = len;
48 memcpy(cros_ec_cec->rx_msg.msg, cec_message, len);
49
50 cec_received_msg(cros_ec_cec->adap, &cros_ec_cec->rx_msg);
51}
52
53static void handle_cec_event(struct cros_ec_cec *cros_ec_cec)
54{
55 struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec;
56 uint32_t events = cros_ec->event_data.data.cec_events;
57
58 if (events & EC_MKBP_CEC_SEND_OK)
59 cec_transmit_attempt_done(cros_ec_cec->adap,
60 CEC_TX_STATUS_OK);
61
62 /* FW takes care of all retries, tell core to avoid more retries */
63 if (events & EC_MKBP_CEC_SEND_FAILED)
64 cec_transmit_attempt_done(cros_ec_cec->adap,
65 CEC_TX_STATUS_MAX_RETRIES |
66 CEC_TX_STATUS_NACK);
67}
68
69static int cros_ec_cec_event(struct notifier_block *nb,
70 unsigned long queued_during_suspend,
71 void *_notify)
72{
73 struct cros_ec_cec *cros_ec_cec;
74 struct cros_ec_device *cros_ec;
75
76 cros_ec_cec = container_of(nb, struct cros_ec_cec, notifier);
77 cros_ec = cros_ec_cec->cros_ec;
78
79 if (cros_ec->event_data.event_type == EC_MKBP_EVENT_CEC_EVENT) {
80 handle_cec_event(cros_ec_cec);
81 return NOTIFY_OK;
82 }
83
84 if (cros_ec->event_data.event_type == EC_MKBP_EVENT_CEC_MESSAGE) {
85 handle_cec_message(cros_ec_cec);
86 return NOTIFY_OK;
87 }
88
89 return NOTIFY_DONE;
90}
91
92static int cros_ec_cec_set_log_addr(struct cec_adapter *adap, u8 logical_addr)
93{
94 struct cros_ec_cec *cros_ec_cec = adap->priv;
95 struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec;
96 struct {
97 struct cros_ec_command msg;
98 struct ec_params_cec_set data;
99 } __packed msg = {};
100 int ret;
101
102 msg.msg.command = EC_CMD_CEC_SET;
103 msg.msg.outsize = sizeof(msg.data);
104 msg.data.cmd = CEC_CMD_LOGICAL_ADDRESS;
105 msg.data.val = logical_addr;
106
107 ret = cros_ec_cmd_xfer_status(cros_ec, &msg.msg);
108 if (ret < 0) {
109 dev_err(cros_ec->dev,
110 "error setting CEC logical address on EC: %d\n", ret);
111 return ret;
112 }
113
114 return 0;
115}
116
117static int cros_ec_cec_transmit(struct cec_adapter *adap, u8 attempts,
118 u32 signal_free_time, struct cec_msg *cec_msg)
119{
120 struct cros_ec_cec *cros_ec_cec = adap->priv;
121 struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec;
122 struct {
123 struct cros_ec_command msg;
124 struct ec_params_cec_write data;
125 } __packed msg = {};
126 int ret;
127
128 msg.msg.command = EC_CMD_CEC_WRITE_MSG;
129 msg.msg.outsize = cec_msg->len;
130 memcpy(msg.data.msg, cec_msg->msg, cec_msg->len);
131
132 ret = cros_ec_cmd_xfer_status(cros_ec, &msg.msg);
133 if (ret < 0) {
134 dev_err(cros_ec->dev,
135 "error writing CEC msg on EC: %d\n", ret);
136 return ret;
137 }
138
139 return 0;
140}
141
142static int cros_ec_cec_adap_enable(struct cec_adapter *adap, bool enable)
143{
144 struct cros_ec_cec *cros_ec_cec = adap->priv;
145 struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec;
146 struct {
147 struct cros_ec_command msg;
148 struct ec_params_cec_set data;
149 } __packed msg = {};
150 int ret;
151
152 msg.msg.command = EC_CMD_CEC_SET;
153 msg.msg.outsize = sizeof(msg.data);
154 msg.data.cmd = CEC_CMD_ENABLE;
155 msg.data.val = enable;
156
157 ret = cros_ec_cmd_xfer_status(cros_ec, &msg.msg);
158 if (ret < 0) {
159 dev_err(cros_ec->dev,
160 "error %sabling CEC on EC: %d\n",
161 (enable ? "en" : "dis"), ret);
162 return ret;
163 }
164
165 return 0;
166}
167
168static const struct cec_adap_ops cros_ec_cec_ops = {
169 .adap_enable = cros_ec_cec_adap_enable,
170 .adap_log_addr = cros_ec_cec_set_log_addr,
171 .adap_transmit = cros_ec_cec_transmit,
172};
173
174#ifdef CONFIG_PM_SLEEP
175static int cros_ec_cec_suspend(struct device *dev)
176{
177 struct platform_device *pdev = to_platform_device(dev);
178 struct cros_ec_cec *cros_ec_cec = dev_get_drvdata(&pdev->dev);
179
180 if (device_may_wakeup(dev))
181 enable_irq_wake(cros_ec_cec->cros_ec->irq);
182
183 return 0;
184}
185
186static int cros_ec_cec_resume(struct device *dev)
187{
188 struct platform_device *pdev = to_platform_device(dev);
189 struct cros_ec_cec *cros_ec_cec = dev_get_drvdata(&pdev->dev);
190
191 if (device_may_wakeup(dev))
192 disable_irq_wake(cros_ec_cec->cros_ec->irq);
193
194 return 0;
195}
196#endif
197
198static SIMPLE_DEV_PM_OPS(cros_ec_cec_pm_ops,
199 cros_ec_cec_suspend, cros_ec_cec_resume);
200
201#if IS_ENABLED(CONFIG_PCI) && IS_ENABLED(CONFIG_DMI)
202
203/*
204 * The Firmware only handles a single CEC interface tied to a single HDMI
205 * connector we specify along with the DRM device name handling the HDMI output
206 */
207
208struct cec_dmi_match {
209 char *sys_vendor;
210 char *product_name;
211 char *devname;
212 char *conn;
213};
214
215static const struct cec_dmi_match cec_dmi_match_table[] = {
216 /* Google Fizz */
217 { "Google", "Fizz", "0000:00:02.0", "Port B" },
218};
219
220static int cros_ec_cec_get_notifier(struct device *dev,
221 struct cec_notifier **notify)
222{
223 int i;
224
225 for (i = 0 ; i < ARRAY_SIZE(cec_dmi_match_table) ; ++i) {
226 const struct cec_dmi_match *m = &cec_dmi_match_table[i];
227
228 if (dmi_match(DMI_SYS_VENDOR, m->sys_vendor) &&
229 dmi_match(DMI_PRODUCT_NAME, m->product_name)) {
230 struct device *d;
231
232 /* Find the device, bail out if not yet registered */
233 d = bus_find_device_by_name(&pci_bus_type, NULL,
234 m->devname);
235 if (!d)
236 return -EPROBE_DEFER;
237
238 *notify = cec_notifier_get_conn(d, m->conn);
239 return 0;
240 }
241 }
242
243 /* Hardware support must be added in the cec_dmi_match_table */
244 dev_warn(dev, "CEC notifier not configured for this hardware\n");
245
246 return -ENODEV;
247}
248
249#else
250
251static int cros_ec_cec_get_notifier(struct device *dev,
252 struct cec_notifier **notify)
253{
254 return -ENODEV;
255}
256
257#endif
258
259static int cros_ec_cec_probe(struct platform_device *pdev)
260{
261 struct cros_ec_dev *ec_dev = dev_get_drvdata(pdev->dev.parent);
262 struct cros_ec_device *cros_ec = ec_dev->ec_dev;
263 struct cros_ec_cec *cros_ec_cec;
264 int ret;
265
266 cros_ec_cec = devm_kzalloc(&pdev->dev, sizeof(*cros_ec_cec),
267 GFP_KERNEL);
268 if (!cros_ec_cec)
269 return -ENOMEM;
270
271 platform_set_drvdata(pdev, cros_ec_cec);
272 cros_ec_cec->cros_ec = cros_ec;
273
274 ret = cros_ec_cec_get_notifier(&pdev->dev, &cros_ec_cec->notify);
275 if (ret)
276 return ret;
277
278 ret = device_init_wakeup(&pdev->dev, 1);
279 if (ret) {
280 dev_err(&pdev->dev, "failed to initialize wakeup\n");
281 return ret;
282 }
283
284 cros_ec_cec->adap = cec_allocate_adapter(&cros_ec_cec_ops, cros_ec_cec,
285 DRV_NAME, CEC_CAP_DEFAULTS, 1);
286 if (IS_ERR(cros_ec_cec->adap))
287 return PTR_ERR(cros_ec_cec->adap);
288
289 /* Get CEC events from the EC. */
290 cros_ec_cec->notifier.notifier_call = cros_ec_cec_event;
291 ret = blocking_notifier_chain_register(&cros_ec->event_notifier,
292 &cros_ec_cec->notifier);
293 if (ret) {
294 dev_err(&pdev->dev, "failed to register notifier\n");
295 cec_delete_adapter(cros_ec_cec->adap);
296 return ret;
297 }
298
299 ret = cec_register_adapter(cros_ec_cec->adap, &pdev->dev);
300 if (ret < 0) {
301 cec_delete_adapter(cros_ec_cec->adap);
302 return ret;
303 }
304
305 cec_register_cec_notifier(cros_ec_cec->adap, cros_ec_cec->notify);
306
307 return 0;
308}
309
310static int cros_ec_cec_remove(struct platform_device *pdev)
311{
312 struct cros_ec_cec *cros_ec_cec = platform_get_drvdata(pdev);
313 struct device *dev = &pdev->dev;
314 int ret;
315
316 ret = blocking_notifier_chain_unregister(
317 &cros_ec_cec->cros_ec->event_notifier,
318 &cros_ec_cec->notifier);
319
320 if (ret) {
321 dev_err(dev, "failed to unregister notifier\n");
322 return ret;
323 }
324
325 cec_unregister_adapter(cros_ec_cec->adap);
326
327 if (cros_ec_cec->notify)
328 cec_notifier_put(cros_ec_cec->notify);
329
330 return 0;
331}
332
333static struct platform_driver cros_ec_cec_driver = {
334 .probe = cros_ec_cec_probe,
335 .remove = cros_ec_cec_remove,
336 .driver = {
337 .name = DRV_NAME,
338 .pm = &cros_ec_cec_pm_ops,
339 },
340};
341
342module_platform_driver(cros_ec_cec_driver);
343
344MODULE_DESCRIPTION("CEC driver for ChromeOS ECs");
345MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
346MODULE_LICENSE("GPL");
347MODULE_ALIAS("platform:" DRV_NAME);
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index b860eb5aa194..11841f4b7b2b 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -202,26 +202,6 @@ config MFD_CROS_EC
202 You also need to enable the driver for the bus you are using. The 202 You also need to enable the driver for the bus you are using. The
203 protocol for talking to the EC is defined by the bus driver. 203 protocol for talking to the EC is defined by the bus driver.
204 204
205config MFD_CROS_EC_I2C
206 tristate "ChromeOS Embedded Controller (I2C)"
207 depends on MFD_CROS_EC && I2C
208
209 help
210 If you say Y here, you get support for talking to the ChromeOS
211 EC through an I2C bus. This uses a simple byte-level protocol with
212 a checksum. Failing accesses will be retried three times to
213 improve reliability.
214
215config MFD_CROS_EC_SPI
216 tristate "ChromeOS Embedded Controller (SPI)"
217 depends on MFD_CROS_EC && SPI
218
219 ---help---
220 If you say Y here, you get support for talking to the ChromeOS EC
221 through a SPI bus, using a byte-level protocol. Since the EC's
222 response time cannot be guaranteed, we support ignoring
223 'pre-amble' bytes before the response actually starts.
224
225config MFD_CROS_EC_CHARDEV 205config MFD_CROS_EC_CHARDEV
226 tristate "Chrome OS Embedded Controller userspace device interface" 206 tristate "Chrome OS Embedded Controller userspace device interface"
227 depends on MFD_CROS_EC 207 depends on MFD_CROS_EC
@@ -232,6 +212,56 @@ config MFD_CROS_EC_CHARDEV
232 If you have a supported Chromebook, choose Y or M here. 212 If you have a supported Chromebook, choose Y or M here.
233 The module will be called cros_ec_dev. 213 The module will be called cros_ec_dev.
234 214
215config MFD_MADERA
216 tristate "Cirrus Logic Madera codecs"
217 select MFD_CORE
218 select REGMAP
219 select REGMAP_IRQ
220 select MADERA_IRQ
221 select PINCTRL
222 select PINCTRL_MADERA
223 help
224 Support for the Cirrus Logic Madera platform audio codecs
225
226config MFD_MADERA_I2C
227 tristate "Cirrus Logic Madera codecs with I2C"
228 depends on MFD_MADERA
229 depends on I2C
230 select REGMAP_I2C
231 help
232 Support for the Cirrus Logic Madera platform audio SoC
233 core functionality controlled via I2C.
234
235config MFD_MADERA_SPI
236 tristate "Cirrus Logic Madera codecs with SPI"
237 depends on MFD_MADERA
238 depends on SPI_MASTER
239 select REGMAP_SPI
240 help
241 Support for the Cirrus Logic Madera platform audio SoC
242 core functionality controlled via SPI.
243
244config MFD_CS47L35
245 bool "Cirrus Logic CS47L35"
246 select PINCTRL_CS47L35
247 depends on MFD_MADERA
248 help
249 Support for Cirrus Logic CS47L35 Smart Codec
250
251config MFD_CS47L85
252 bool "Cirrus Logic CS47L85"
253 select PINCTRL_CS47L85
254 depends on MFD_MADERA
255 help
256 Support for Cirrus Logic CS47L85 Smart Codec
257
258config MFD_CS47L90
259 bool "Cirrus Logic CS47L90/91"
260 select PINCTRL_CS47L90
261 depends on MFD_MADERA
262 help
263 Support for Cirrus Logic CS47L90 and CS47L91 Smart Codecs
264
235config MFD_ASIC3 265config MFD_ASIC3
236 bool "Compaq ASIC3" 266 bool "Compaq ASIC3"
237 depends on GPIOLIB && ARM 267 depends on GPIOLIB && ARM
@@ -1787,6 +1817,19 @@ config MFD_STW481X
1787 in various ST Microelectronics and ST-Ericsson embedded 1817 in various ST Microelectronics and ST-Ericsson embedded
1788 Nomadik series. 1818 Nomadik series.
1789 1819
1820config MFD_ROHM_BD718XX
1821 tristate "ROHM BD71837 Power Management IC"
1822 depends on I2C=y
1823 depends on OF
1824 select REGMAP_I2C
1825 select REGMAP_IRQ
1826 select MFD_CORE
1827 help
1828 Select this option to get support for the ROHM BD71837
1829 Power Management ICs. BD71837 is designed to power processors like
1830 NXP i.MX8. It contains 8 BUCK outputs and 7 LDOs, voltage monitoring
1831 and emergency shut down as well as 32,768KHz clock output.
1832
1790config MFD_STM32_LPTIMER 1833config MFD_STM32_LPTIMER
1791 tristate "Support for STM32 Low-Power Timer" 1834 tristate "Support for STM32 Low-Power Timer"
1792 depends on (ARCH_STM32 && OF) || COMPILE_TEST 1835 depends on (ARCH_STM32 && OF) || COMPILE_TEST
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index e9fd20dba18d..5856a9489cbd 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -14,8 +14,6 @@ obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o
14obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o 14obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o
15cros_ec_core-objs := cros_ec.o 15cros_ec_core-objs := cros_ec.o
16obj-$(CONFIG_MFD_CROS_EC) += cros_ec_core.o 16obj-$(CONFIG_MFD_CROS_EC) += cros_ec_core.o
17obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o
18obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o
19obj-$(CONFIG_MFD_CROS_EC_CHARDEV) += cros_ec_dev.o 17obj-$(CONFIG_MFD_CROS_EC_CHARDEV) += cros_ec_dev.o
20obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o 18obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o
21 19
@@ -72,6 +70,20 @@ wm8994-objs := wm8994-core.o wm8994-irq.o wm8994-regmap.o
72obj-$(CONFIG_MFD_WM8994) += wm8994.o 70obj-$(CONFIG_MFD_WM8994) += wm8994.o
73obj-$(CONFIG_MFD_WM97xx) += wm97xx-core.o 71obj-$(CONFIG_MFD_WM97xx) += wm97xx-core.o
74 72
73madera-objs := madera-core.o
74ifeq ($(CONFIG_MFD_CS47L35),y)
75madera-objs += cs47l35-tables.o
76endif
77ifeq ($(CONFIG_MFD_CS47L85),y)
78madera-objs += cs47l85-tables.o
79endif
80ifeq ($(CONFIG_MFD_CS47L90),y)
81madera-objs += cs47l90-tables.o
82endif
83obj-$(CONFIG_MFD_MADERA) += madera.o
84obj-$(CONFIG_MFD_MADERA_I2C) += madera-i2c.o
85obj-$(CONFIG_MFD_MADERA_SPI) += madera-spi.o
86
75obj-$(CONFIG_TPS6105X) += tps6105x.o 87obj-$(CONFIG_TPS6105X) += tps6105x.o
76obj-$(CONFIG_TPS65010) += tps65010.o 88obj-$(CONFIG_TPS65010) += tps65010.o
77obj-$(CONFIG_TPS6507X) += tps6507x.o 89obj-$(CONFIG_TPS6507X) += tps6507x.o
@@ -227,4 +239,5 @@ obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o
227obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o 239obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
228obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o 240obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
229obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o 241obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
242obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
230 243
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index 83f1c5a516d9..5f1e37d23943 100644
--- a/drivers/mfd/arizona-core.c
+++ b/drivers/mfd/arizona-core.c
@@ -24,6 +24,7 @@
24#include <linux/regulator/consumer.h> 24#include <linux/regulator/consumer.h>
25#include <linux/regulator/machine.h> 25#include <linux/regulator/machine.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/ktime.h>
27#include <linux/platform_device.h> 28#include <linux/platform_device.h>
28 29
29#include <linux/mfd/arizona/core.h> 30#include <linux/mfd/arizona/core.h>
@@ -236,22 +237,39 @@ static irqreturn_t arizona_overclocked(int irq, void *data)
236 237
237#define ARIZONA_REG_POLL_DELAY_US 7500 238#define ARIZONA_REG_POLL_DELAY_US 7500
238 239
240static inline bool arizona_poll_reg_delay(ktime_t timeout)
241{
242 if (ktime_compare(ktime_get(), timeout) > 0)
243 return false;
244
245 usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US);
246
247 return true;
248}
249
239static int arizona_poll_reg(struct arizona *arizona, 250static int arizona_poll_reg(struct arizona *arizona,
240 int timeout_ms, unsigned int reg, 251 int timeout_ms, unsigned int reg,
241 unsigned int mask, unsigned int target) 252 unsigned int mask, unsigned int target)
242{ 253{
254 ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC);
243 unsigned int val = 0; 255 unsigned int val = 0;
244 int ret; 256 int ret;
245 257
246 ret = regmap_read_poll_timeout(arizona->regmap, 258 do {
247 reg, val, ((val & mask) == target), 259 ret = regmap_read(arizona->regmap, reg, &val);
248 ARIZONA_REG_POLL_DELAY_US,
249 timeout_ms * 1000);
250 if (ret)
251 dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n",
252 reg, val);
253 260
254 return ret; 261 if ((val & mask) == target)
262 return 0;
263 } while (arizona_poll_reg_delay(timeout));
264
265 if (ret) {
266 dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n",
267 reg, ret);
268 return ret;
269 }
270
271 dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val);
272 return -ETIMEDOUT;
255} 273}
256 274
257static int arizona_wait_for_boot(struct arizona *arizona) 275static int arizona_wait_for_boot(struct arizona *arizona)
diff --git a/drivers/mfd/as3722.c b/drivers/mfd/as3722.c
index f87342c211bc..4d069ed21ff6 100644
--- a/drivers/mfd/as3722.c
+++ b/drivers/mfd/as3722.c
@@ -349,6 +349,8 @@ static int as3722_i2c_of_probe(struct i2c_client *i2c,
349 "ams,enable-internal-int-pullup"); 349 "ams,enable-internal-int-pullup");
350 as3722->en_intern_i2c_pullup = of_property_read_bool(np, 350 as3722->en_intern_i2c_pullup = of_property_read_bool(np,
351 "ams,enable-internal-i2c-pullup"); 351 "ams,enable-internal-i2c-pullup");
352 as3722->en_ac_ok_pwr_on = of_property_read_bool(np,
353 "ams,enable-ac-ok-power-on");
352 as3722->irq_flags = irqd_get_trigger_type(irq_data); 354 as3722->irq_flags = irqd_get_trigger_type(irq_data);
353 dev_dbg(&i2c->dev, "IRQ flags are 0x%08lx\n", as3722->irq_flags); 355 dev_dbg(&i2c->dev, "IRQ flags are 0x%08lx\n", as3722->irq_flags);
354 return 0; 356 return 0;
@@ -360,6 +362,7 @@ static int as3722_i2c_probe(struct i2c_client *i2c,
360 struct as3722 *as3722; 362 struct as3722 *as3722;
361 unsigned long irq_flags; 363 unsigned long irq_flags;
362 int ret; 364 int ret;
365 u8 val = 0;
363 366
364 as3722 = devm_kzalloc(&i2c->dev, sizeof(struct as3722), GFP_KERNEL); 367 as3722 = devm_kzalloc(&i2c->dev, sizeof(struct as3722), GFP_KERNEL);
365 if (!as3722) 368 if (!as3722)
@@ -398,6 +401,15 @@ static int as3722_i2c_probe(struct i2c_client *i2c,
398 if (ret < 0) 401 if (ret < 0)
399 return ret; 402 return ret;
400 403
404 if (as3722->en_ac_ok_pwr_on)
405 val = AS3722_CTRL_SEQU1_AC_OK_PWR_ON;
406 ret = as3722_update_bits(as3722, AS3722_CTRL_SEQU1_REG,
407 AS3722_CTRL_SEQU1_AC_OK_PWR_ON, val);
408 if (ret < 0) {
409 dev_err(as3722->dev, "CTRLsequ1 update failed: %d\n", ret);
410 return ret;
411 }
412
401 ret = devm_mfd_add_devices(&i2c->dev, -1, as3722_devs, 413 ret = devm_mfd_add_devices(&i2c->dev, -1, as3722_devs,
402 ARRAY_SIZE(as3722_devs), NULL, 0, 414 ARRAY_SIZE(as3722_devs), NULL, 0,
403 regmap_irq_get_domain(as3722->irq_data)); 415 regmap_irq_get_domain(as3722->irq_data));
diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c
index d35a5fe6c950..a7b7c5423ea5 100644
--- a/drivers/mfd/axp20x-i2c.c
+++ b/drivers/mfd/axp20x-i2c.c
@@ -65,6 +65,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = {
65 { .compatible = "x-powers,axp202", .data = (void *)AXP202_ID }, 65 { .compatible = "x-powers,axp202", .data = (void *)AXP202_ID },
66 { .compatible = "x-powers,axp209", .data = (void *)AXP209_ID }, 66 { .compatible = "x-powers,axp209", .data = (void *)AXP209_ID },
67 { .compatible = "x-powers,axp221", .data = (void *)AXP221_ID }, 67 { .compatible = "x-powers,axp221", .data = (void *)AXP221_ID },
68 { .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
68 { }, 69 { },
69}; 70};
70MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match); 71MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match);
@@ -74,6 +75,7 @@ static const struct i2c_device_id axp20x_i2c_id[] = {
74 { "axp202", 0 }, 75 { "axp202", 0 },
75 { "axp209", 0 }, 76 { "axp209", 0 },
76 { "axp221", 0 }, 77 { "axp221", 0 },
78 { "axp806", 0 },
77 { }, 79 { },
78}; 80};
79MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); 81MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 9a2ef3d9b8f8..0be511dd93d0 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -221,6 +221,11 @@ static const struct resource axp803_pek_resources[] = {
221 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 221 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
222}; 222};
223 223
224static const struct resource axp806_pek_resources[] = {
225 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
226 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
227};
228
224static const struct resource axp809_pek_resources[] = { 229static const struct resource axp809_pek_resources[] = {
225 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 230 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
226 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 231 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
@@ -730,6 +735,15 @@ static const struct mfd_cell axp803_cells[] = {
730 { .name = "axp20x-regulator" }, 735 { .name = "axp20x-regulator" },
731}; 736};
732 737
738static const struct mfd_cell axp806_self_working_cells[] = {
739 {
740 .name = "axp221-pek",
741 .num_resources = ARRAY_SIZE(axp806_pek_resources),
742 .resources = axp806_pek_resources,
743 },
744 { .name = "axp20x-regulator" },
745};
746
733static const struct mfd_cell axp806_cells[] = { 747static const struct mfd_cell axp806_cells[] = {
734 { 748 {
735 .id = 2, 749 .id = 2,
@@ -842,8 +856,14 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
842 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 856 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
843 break; 857 break;
844 case AXP806_ID: 858 case AXP806_ID:
845 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 859 if (of_property_read_bool(axp20x->dev->of_node,
846 axp20x->cells = axp806_cells; 860 "x-powers,self-working-mode")) {
861 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
862 axp20x->cells = axp806_self_working_cells;
863 } else {
864 axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
865 axp20x->cells = axp806_cells;
866 }
847 axp20x->regmap_cfg = &axp806_regmap_config; 867 axp20x->regmap_cfg = &axp806_regmap_config;
848 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 868 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
849 break; 869 break;
@@ -901,7 +921,9 @@ int axp20x_device_probe(struct axp20x_dev *axp20x)
901 */ 921 */
902 if (axp20x->variant == AXP806_ID) { 922 if (axp20x->variant == AXP806_ID) {
903 if (of_property_read_bool(axp20x->dev->of_node, 923 if (of_property_read_bool(axp20x->dev->of_node,
904 "x-powers,master-mode")) 924 "x-powers,master-mode") ||
925 of_property_read_bool(axp20x->dev->of_node,
926 "x-powers,self-working-mode"))
905 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 927 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
906 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 928 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
907 else 929 else
diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c
index 27af62ed480a..999dac752bcc 100644
--- a/drivers/mfd/cros_ec_dev.c
+++ b/drivers/mfd/cros_ec_dev.c
@@ -378,10 +378,18 @@ error:
378 kfree(msg); 378 kfree(msg);
379} 379}
380 380
381static const struct mfd_cell cros_ec_cec_cells[] = {
382 { .name = "cros-ec-cec" }
383};
384
381static const struct mfd_cell cros_ec_rtc_cells[] = { 385static const struct mfd_cell cros_ec_rtc_cells[] = {
382 { .name = "cros-ec-rtc" } 386 { .name = "cros-ec-rtc" }
383}; 387};
384 388
389static const struct mfd_cell cros_usbpd_charger_cells[] = {
390 { .name = "cros-usbpd-charger" }
391};
392
385static int ec_device_probe(struct platform_device *pdev) 393static int ec_device_probe(struct platform_device *pdev)
386{ 394{
387 int retval = -ENOMEM; 395 int retval = -ENOMEM;
@@ -420,6 +428,18 @@ static int ec_device_probe(struct platform_device *pdev)
420 if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE)) 428 if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE))
421 cros_ec_sensors_register(ec); 429 cros_ec_sensors_register(ec);
422 430
431 /* Check whether this EC instance has CEC host command support */
432 if (cros_ec_check_features(ec, EC_FEATURE_CEC)) {
433 retval = mfd_add_devices(ec->dev, PLATFORM_DEVID_AUTO,
434 cros_ec_cec_cells,
435 ARRAY_SIZE(cros_ec_cec_cells),
436 NULL, 0, NULL);
437 if (retval)
438 dev_err(ec->dev,
439 "failed to add cros-ec-cec device: %d\n",
440 retval);
441 }
442
423 /* Check whether this EC instance has RTC host command support */ 443 /* Check whether this EC instance has RTC host command support */
424 if (cros_ec_check_features(ec, EC_FEATURE_RTC)) { 444 if (cros_ec_check_features(ec, EC_FEATURE_RTC)) {
425 retval = mfd_add_devices(ec->dev, PLATFORM_DEVID_AUTO, 445 retval = mfd_add_devices(ec->dev, PLATFORM_DEVID_AUTO,
@@ -432,6 +452,18 @@ static int ec_device_probe(struct platform_device *pdev)
432 retval); 452 retval);
433 } 453 }
434 454
455 /* Check whether this EC instance has the PD charge manager */
456 if (cros_ec_check_features(ec, EC_FEATURE_USB_PD)) {
457 retval = mfd_add_devices(ec->dev, PLATFORM_DEVID_AUTO,
458 cros_usbpd_charger_cells,
459 ARRAY_SIZE(cros_usbpd_charger_cells),
460 NULL, 0, NULL);
461 if (retval)
462 dev_err(ec->dev,
463 "failed to add cros-usbpd-charger device: %d\n",
464 retval);
465 }
466
435 /* Take control of the lightbar from the EC. */ 467 /* Take control of the lightbar from the EC. */
436 lb_manual_suspend_ctrl(ec, 1); 468 lb_manual_suspend_ctrl(ec, 1);
437 469
diff --git a/drivers/mfd/cs47l35-tables.c b/drivers/mfd/cs47l35-tables.c
new file mode 100644
index 000000000000..604c9dd14df5
--- /dev/null
+++ b/drivers/mfd/cs47l35-tables.c
@@ -0,0 +1,1609 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Regmap tables for CS47L35 codec
4 *
5 * Copyright (C) 2015-2017 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/device.h>
13#include <linux/module.h>
14#include <linux/regmap.h>
15
16#include <linux/mfd/madera/core.h>
17#include <linux/mfd/madera/registers.h>
18
19#include "madera.h"
20
21static const struct reg_sequence cs47l35_reva_16_patch[] = {
22 { 0x460, 0x0c40 },
23 { 0x461, 0xcd1a },
24 { 0x462, 0x0c40 },
25 { 0x463, 0xb53b },
26 { 0x464, 0x0c40 },
27 { 0x465, 0x7503 },
28 { 0x466, 0x0c40 },
29 { 0x467, 0x4a41 },
30 { 0x468, 0x0041 },
31 { 0x469, 0x3491 },
32 { 0x46a, 0x0841 },
33 { 0x46b, 0x1f50 },
34 { 0x46c, 0x0446 },
35 { 0x46d, 0x14ed },
36 { 0x46e, 0x0446 },
37 { 0x46f, 0x1455 },
38 { 0x470, 0x04c6 },
39 { 0x471, 0x1220 },
40 { 0x472, 0x04c6 },
41 { 0x473, 0x040f },
42 { 0x474, 0x04ce },
43 { 0x475, 0x0339 },
44 { 0x476, 0x05df },
45 { 0x477, 0x028f },
46 { 0x478, 0x05df },
47 { 0x479, 0x0209 },
48 { 0x47a, 0x05df },
49 { 0x47b, 0x00cf },
50 { 0x47c, 0x05df },
51 { 0x47d, 0x0001 },
52 { 0x47e, 0x07ff },
53};
54
55int cs47l35_patch(struct madera *madera)
56{
57 int ret;
58
59 ret = regmap_register_patch(madera->regmap, cs47l35_reva_16_patch,
60 ARRAY_SIZE(cs47l35_reva_16_patch));
61 if (ret < 0)
62 dev_err(madera->dev, "Error applying patch: %d\n", ret);
63
64 return ret;
65}
66EXPORT_SYMBOL_GPL(cs47l35_patch);
67
68static const struct reg_default cs47l35_reg_default[] = {
69 { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */
70 { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */
71 { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */
72 { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */
73 { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */
74 { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */
75 { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */
76 { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */
77 { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */
78 { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */
79 { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */
80 { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4*/
81 { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1*/
82 { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2*/
83 { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */
84 { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */
85 { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */
86 { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */
87 { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */
88 { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */
89 { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */
90 { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */
91 { 0x000000A0, 0x0000 }, /* R160 (0xa0) - Comfort Noise Generator */
92 { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */
93 { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */
94 { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */
95 { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */
96 { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */
97 { 0x00000120, 0x0305 }, /* R288 (0x120) - DSP Clock 1 */
98 { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */
99 { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */
100 { 0x0000014a, 0x0000 }, /* R330 (0x14a) - Output async clock */
101 { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */
102 { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */
103 { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */
104 { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */
105 { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */
106 { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */
107 { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */
108 { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */
109 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */
110 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */
111 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */
112 { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */
113 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */
114 { 0x0000017a, 0x0b06 }, /* R378 (0x17a) - FLL1 EFS2 */
115 { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */
116 { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */
117 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */
118 { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 4 */
119 { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 5 */
120 { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 6 */
121 { 0x00000185, 0x0001 }, /* R389 (0x185) - FLL1 Synchroniser 7 */
122 { 0x00000187, 0x0000 }, /* R391 (0x187) - FLL1 Spread Spectrum */
123 { 0x00000188, 0x000c }, /* R392 (0x188) - FLL1 GPIO Clock */
124 { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */
125 { 0x0000020b, 0x0400 }, /* R523 (0x20b) - HP Charge Pump 8 */
126 { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */
127 { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */
128 { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */
129 { 0x0000021c, 0x0022 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */
130 { 0x0000021e, 0x0022 }, /* R542 (0x21e) - Mic Bias Ctrl 6 */
131 { 0x0000027e, 0x0000 }, /* R638 (0x27e) - EDRE HP stereo control */
132 { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */
133 { 0x0000029b, 0x0000 }, /* R667 (0x29b) - Headphone Detect 1 */
134 { 0x000002a3, 0x1102 }, /* R675 (0x2a3) - Mic Detect Control 1 */
135 { 0x000002a4, 0x009f }, /* R676 (0x2a4) - Mic Detect Control 2 */
136 { 0x000002a6, 0x3d3d }, /* R678 (0x2a6) - Mic Detect Level 1 */
137 { 0x000002a7, 0x3d3d }, /* R679 (0x2a7) - Mic Detect Level 2 */
138 { 0x000002a8, 0x333d }, /* R680 (0x2a8) - Mic Detect Level 3 */
139 { 0x000002a9, 0x202d }, /* R681 (0x2a9) - Mic Detect Level 4 */
140 { 0x000002c6, 0x0010 }, /* R710 (0x2c5) - Mic Clamp control */
141 { 0x000002c8, 0x0000 }, /* R712 (0x2c8) - GP switch 1 */
142 { 0x000002d3, 0x0000 }, /* R723 (0x2d3) - Jack detect analogue */
143 { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */
144 { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */
145 { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */
146 { 0x0000030c, 0x0002 }, /* R780 (0x30c) - HPF Control */
147 { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */
148 { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */
149 { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */
150 { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */
151 { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */
152 { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */
153 { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */
154 { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */
155 { 0x0000031a, 0x0500 }, /* R794 (0x31a) - DMIC2L Control */
156 { 0x0000031c, 0x0080 }, /* R796 (0x31c) - IN2R Control */
157 { 0x0000031d, 0x0180 }, /* R797 (0x31d) - ADC Digital Volume 2R */
158 { 0x0000031e, 0x0000 }, /* R798 (0x31e) - DMIC2R Control */
159 { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */
160 { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */
161 { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */
162 { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */
163 { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */
164 { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */
165 { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */
166 { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */
167 { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */
168 { 0x00000428, 0x0000 }, /* R1064 (0x428) - Output Path Config 4L */
169 { 0x00000429, 0x0180 }, /* R1065 (0x429) - DAC Digital Volume 4L */
170 { 0x0000042b, 0x0040 }, /* R1067 (0x42b) - Noise Gate Select 4L */
171 { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */
172 { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */
173 { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */
174 { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */
175 { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */
176 { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */
177 { 0x00000440, 0x0003 }, /* R1088 (0x440) - DRE Enable */
178 { 0x00000448, 0x0a83 }, /* R1096 (0x448) - eDRE Enable */
179 { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - eDRE Manual */
180 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */
181 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */
182 { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */
183 { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */
184 { 0x000004a0, 0x3080 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */
185 { 0x000004a8, 0x7120 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */
186 { 0x000004a9, 0x7120 }, /* R1193 (0x4a9) - HP Test Ctrl 6 */
187 { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */
188 { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */
189 { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */
190 { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */
191 { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */
192 { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */
193 { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */
194 { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */
195 { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */
196 { 0x0000050a, 0x0001 }, /* R1290 (0x50a) - AIF1 Frame Ctrl 4 */
197 { 0x0000050b, 0x0002 }, /* R1291 (0x50b) - AIF1 Frame Ctrl 5 */
198 { 0x0000050c, 0x0003 }, /* R1292 (0x50c) - AIF1 Frame Ctrl 6 */
199 { 0x0000050d, 0x0004 }, /* R1293 (0x50d) - AIF1 Frame Ctrl 7 */
200 { 0x0000050e, 0x0005 }, /* R1294 (0x50e) - AIF1 Frame Ctrl 8 */
201 { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */
202 { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */
203 { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */
204 { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */
205 { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */
206 { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */
207 { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */
208 { 0x0000051a, 0x0000 }, /* R1306 (0x51a) - AIF1 Rx Enables */
209 { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */
210 { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */
211 { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */
212 { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */
213 { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */
214 { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */
215 { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */
216 { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */
217 { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */
218 { 0x0000054a, 0x0001 }, /* R1354 (0x54a) - AIF2 Frame Ctrl 4 */
219 { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */
220 { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */
221 { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */
222 { 0x0000055a, 0x0000 }, /* R1370 (0x55a) - AIF2 Rx Enables */
223 { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */
224 { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */
225 { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */
226 { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */
227 { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */
228 { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */
229 { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */
230 { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */
231 { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */
232 { 0x0000058a, 0x0001 }, /* R1418 (0x58a) - AIF3 Frame Ctrl 4 */
233 { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */
234 { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */
235 { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */
236 { 0x0000059a, 0x0000 }, /* R1434 (0x59a) - AIF3 Rx Enables */
237 { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */
238 { 0x000005e3, 0x0000 }, /* R1507 (0x5e3) - SLIMbus Framer Ref Gear */
239 { 0x000005e5, 0x0000 }, /* R1509 (0x5e5) - SLIMbus Rates 1 */
240 { 0x000005e6, 0x0000 }, /* R1510 (0x5e6) - SLIMbus Rates 2 */
241 { 0x000005e7, 0x0000 }, /* R1511 (0x5e7) - SLIMbus Rates 3 */
242 { 0x000005e9, 0x0000 }, /* R1513 (0x5e9) - SLIMbus Rates 5 */
243 { 0x000005ea, 0x0000 }, /* R1514 (0x5ea) - SLIMbus Rates 6 */
244 { 0x000005eb, 0x0000 }, /* R1515 (0x5eb) - SLIMbus Rates 7 */
245 { 0x000005f5, 0x0000 }, /* R1525 (0x5f5) - SLIMbus RX Channel Enable */
246 { 0x000005f6, 0x0000 }, /* R1526 (0x5f6) - SLIMbus TX Channel Enable */
247 { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */
248 { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */
249 { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */
250 { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */
251 { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */
252 { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */
253 { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */
254 { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */
255 { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */
256 { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */
257 { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */
258 { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */
259 { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */
260 { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */
261 { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */
262 { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */
263 { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */
264 { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */
265 { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */
266 { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */
267 { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */
268 { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */
269 { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */
270 { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */
271 { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */
272 { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */
273 { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */
274 { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */
275 { 0x0000068c, 0x0000 }, /* R1672 (0x68c) - OUT1RMIX Input 3 Source */
276 { 0x0000068d, 0x0080 }, /* R1673 (0x68d) - OUT1RMIX Input 3 Volume */
277 { 0x0000068e, 0x0000 }, /* R1674 (0x68e) - OUT1RMIX Input 4 Source */
278 { 0x0000068f, 0x0080 }, /* R1675 (0x68f) - OUT1RMIX Input 4 Volume */
279 { 0x000006b0, 0x0000 }, /* R1712 (0x6b0) - OUT4LMIX Input 1 Source */
280 { 0x000006b1, 0x0080 }, /* R1713 (0x6b1) - OUT4LMIX Input 1 Volume */
281 { 0x000006b2, 0x0000 }, /* R1714 (0x6b2) - OUT4LMIX Input 2 Source */
282 { 0x000006b3, 0x0080 }, /* R1715 (0x6b3) - OUT4LMIX Input 2 Volume */
283 { 0x000006b4, 0x0000 }, /* R1716 (0x6b4) - OUT4LMIX Input 3 Source */
284 { 0x000006b5, 0x0080 }, /* R1717 (0x6b5) - OUT4LMIX Input 3 Volume */
285 { 0x000006b6, 0x0000 }, /* R1718 (0x6b6) - OUT4LMIX Input 4 Source */
286 { 0x000006b7, 0x0080 }, /* R1719 (0x6b7) - OUT4LMIX Input 4 Volume */
287 { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */
288 { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */
289 { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */
290 { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */
291 { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */
292 { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */
293 { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */
294 { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */
295 { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */
296 { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */
297 { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */
298 { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */
299 { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */
300 { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */
301 { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */
302 { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */
303 { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */
304 { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */
305 { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */
306 { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */
307 { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */
308 { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */
309 { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */
310 { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */
311 { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */
312 { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */
313 { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */
314 { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */
315 { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */
316 { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */
317 { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */
318 { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */
319 { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */
320 { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */
321 { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */
322 { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */
323 { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */
324 { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */
325 { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */
326 { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */
327 { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */
328 { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */
329 { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */
330 { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */
331 { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */
332 { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */
333 { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */
334 { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */
335 { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */
336 { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */
337 { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */
338 { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */
339 { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */
340 { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */
341 { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */
342 { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */
343 { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */
344 { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */
345 { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */
346 { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */
347 { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */
348 { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */
349 { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */
350 { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */
351 { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */
352 { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */
353 { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */
354 { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */
355 { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */
356 { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */
357 { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */
358 { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */
359 { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */
360 { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */
361 { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */
362 { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */
363 { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */
364 { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */
365 { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */
366 { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */
367 { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */
368 { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */
369 { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */
370 { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */
371 { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */
372 { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */
373 { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */
374 { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */
375 { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */
376 { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */
377 { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */
378 { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */
379 { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */
380 { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */
381 { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */
382 { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */
383 { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */
384 { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */
385 { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */
386 { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */
387 { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */
388 { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */
389 { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */
390 { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */
391 { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */
392 { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */
393 { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */
394 { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */
395 { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */
396 { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */
397 { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */
398 { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */
399 { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */
400 { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */
401 { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */
402 { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */
403 { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */
404 { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */
405 { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */
406 { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */
407 { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */
408 { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */
409 { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */
410 { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */
411 { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */
412 { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */
413 { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */
414 { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */
415 { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */
416 { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */
417 { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */
418 { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */
419 { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */
420 { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */
421 { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */
422 { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */
423 { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */
424 { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */
425 { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */
426 { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */
427 { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */
428 { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */
429 { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */
430 { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */
431 { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source*/
432 { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume*/
433 { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source*/
434 { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume*/
435 { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */
436 { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */
437 { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */
438 { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */
439 { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */
440 { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */
441 { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */
442 { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */
443 { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */
444 { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */
445 { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */
446 { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */
447 { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */
448 { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */
449 { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */
450 { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */
451 { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */
452 { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */
453 { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */
454 { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */
455 { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */
456 { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */
457 { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */
458 { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */
459 { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */
460 { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */
461 { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */
462 { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */
463 { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */
464 { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */
465 { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */
466 { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */
467 { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */
468 { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */
469 { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */
470 { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */
471 { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */
472 { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */
473 { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */
474 { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */
475 { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */
476 { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */
477 { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */
478 { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */
479 { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */
480 { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */
481 { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */
482 { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */
483 { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */
484 { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */
485 { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */
486 { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */
487 { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */
488 { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */
489 { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */
490 { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */
491 { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */
492 { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */
493 { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */
494 { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */
495 { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */
496 { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */
497 { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */
498 { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */
499 { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */
500 { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */
501 { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */
502 { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */
503 { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */
504 { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */
505 { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */
506 { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */
507 { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */
508 { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */
509 { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */
510 { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */
511 { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */
512 { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */
513 { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */
514 { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */
515 { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */
516 { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */
517 { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */
518 { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */
519 { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */
520 { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */
521 { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */
522 { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */
523 { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */
524 { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */
525 { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */
526 { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */
527 { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */
528 { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */
529 { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */
530 { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */
531 { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */
532 { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */
533 { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */
534 { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */
535 { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */
536 { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */
537 { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */
538 { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */
539 { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */
540 { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */
541 { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */
542 { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */
543 { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */
544 { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */
545 { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */
546 { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */
547 { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */
548 { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */
549 { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */
550 { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */
551 { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */
552 { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */
553 { 0x00000980, 0x0000 }, /* R2432 (0x980) - DSP2LMIX Input 1 Source */
554 { 0x00000981, 0x0080 }, /* R2433 (0x981) - DSP2LMIX Input 1 Volume */
555 { 0x00000982, 0x0000 }, /* R2434 (0x982) - DSP2LMIX Input 2 Source */
556 { 0x00000983, 0x0080 }, /* R2435 (0x983) - DSP2LMIX Input 2 Volume */
557 { 0x00000984, 0x0000 }, /* R2436 (0x984) - DSP2LMIX Input 3 Source */
558 { 0x00000985, 0x0080 }, /* R2437 (0x985) - DSP2LMIX Input 3 Volume */
559 { 0x00000986, 0x0000 }, /* R2438 (0x986) - DSP2LMIX Input 4 Source */
560 { 0x00000987, 0x0080 }, /* R2439 (0x987) - DSP2LMIX Input 4 Volume */
561 { 0x00000988, 0x0000 }, /* R2440 (0x988) - DSP2RMIX Input 1 Source */
562 { 0x00000989, 0x0080 }, /* R2441 (0x989) - DSP2RMIX Input 1 Volume */
563 { 0x0000098a, 0x0000 }, /* R2442 (0x98a) - DSP2RMIX Input 2 Source */
564 { 0x0000098b, 0x0080 }, /* R2443 (0x98b) - DSP2RMIX Input 2 Volume */
565 { 0x0000098c, 0x0000 }, /* R2444 (0x98c) - DSP2RMIX Input 3 Source */
566 { 0x0000098d, 0x0080 }, /* R2445 (0x98d) - DSP2RMIX Input 3 Volume */
567 { 0x0000098e, 0x0000 }, /* R2446 (0x98e) - DSP2RMIX Input 4 Source */
568 { 0x0000098f, 0x0080 }, /* R2447 (0x98f) - DSP2RMIX Input 4 Volume */
569 { 0x00000990, 0x0000 }, /* R2448 (0x990) - DSP2AUX1MIX Input 1 Source */
570 { 0x00000998, 0x0000 }, /* R2456 (0x998) - DSP2AUX2MIX Input 1 Source */
571 { 0x000009a0, 0x0000 }, /* R2464 (0x9a0) - DSP2AUX3MIX Input 1 Source */
572 { 0x000009a8, 0x0000 }, /* R2472 (0x9a8) - DSP2AUX4MIX Input 1 Source */
573 { 0x000009b0, 0x0000 }, /* R2480 (0x9b0) - DSP2AUX5MIX Input 1 Source */
574 { 0x000009b8, 0x0000 }, /* R2488 (0x9b8) - DSP2AUX6MIX Input 1 Source */
575 { 0x000009c0, 0x0000 }, /* R2496 (0x9c0) - DSP3LMIX Input 1 Source */
576 { 0x000009c1, 0x0080 }, /* R2497 (0x9c1) - DSP3LMIX Input 1 Volume */
577 { 0x000009c2, 0x0000 }, /* R2498 (0x9c2) - DSP3LMIX Input 2 Source */
578 { 0x000009c3, 0x0080 }, /* R2499 (0x9c3) - DSP3LMIX Input 2 Volume */
579 { 0x000009c4, 0x0000 }, /* R2500 (0x9c4) - DSP3LMIX Input 3 Source */
580 { 0x000009c5, 0x0080 }, /* R2501 (0x9c5) - DSP3LMIX Input 3 Volume */
581 { 0x000009c6, 0x0000 }, /* R2502 (0x9c6) - DSP3LMIX Input 4 Source */
582 { 0x000009c7, 0x0080 }, /* R2503 (0x9c7) - DSP3LMIX Input 4 Volume */
583 { 0x000009c8, 0x0000 }, /* R2504 (0x9c8) - DSP3RMIX Input 1 Source */
584 { 0x000009c9, 0x0080 }, /* R2505 (0x9c9) - DSP3RMIX Input 1 Volume */
585 { 0x000009ca, 0x0000 }, /* R2506 (0x9ca) - DSP3RMIX Input 2 Source */
586 { 0x000009cb, 0x0080 }, /* R2507 (0x9cb) - DSP3RMIX Input 2 Volume */
587 { 0x000009cc, 0x0000 }, /* R2508 (0x9cc) - DSP3RMIX Input 3 Source */
588 { 0x000009cd, 0x0080 }, /* R2509 (0x9cd) - DSP3RMIX Input 3 Volume */
589 { 0x000009ce, 0x0000 }, /* R2510 (0x9ce) - DSP3RMIX Input 4 Source */
590 { 0x000009cf, 0x0080 }, /* R2511 (0x9cf) - DSP3RMIX Input 4 Volume */
591 { 0x000009d0, 0x0000 }, /* R2512 (0x9d0) - DSP3AUX1MIX Input 1 Source */
592 { 0x000009d8, 0x0000 }, /* R2520 (0x9d8) - DSP3AUX2MIX Input 1 Source */
593 { 0x000009e0, 0x0000 }, /* R2528 (0x9e0) - DSP3AUX3MIX Input 1 Source */
594 { 0x000009e8, 0x0000 }, /* R2536 (0x9e8) - DSP3AUX4MIX Input 1 Source */
595 { 0x000009f0, 0x0000 }, /* R2544 (0x9f0) - DSP3AUX5MIX Input 1 Source */
596 { 0x000009f8, 0x0000 }, /* R2552 (0x9f8) - DSP3AUX6MIX Input 1 Source */
597 { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source*/
598 { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source*/
599 { 0x00000b10, 0x0000 }, /* R2832 (0xb10) - ISRC1DEC3MIX Input 1 Source*/
600 { 0x00000b18, 0x0000 }, /* R2840 (0xb18) - ISRC1DEC4MIX Input 1 Source*/
601 { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source*/
602 { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source*/
603 { 0x00000b30, 0x0000 }, /* R2864 (0xb30) - ISRC1INT3MIX Input 1 Source*/
604 { 0x00000b38, 0x0000 }, /* R2872 (0xb38) - ISRC1INT4MIX Input 1 Source*/
605 { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source*/
606 { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source*/
607 { 0x00000b50, 0x0000 }, /* R2896 (0xb50) - ISRC2DEC3MIX Input 1 Source*/
608 { 0x00000b58, 0x0000 }, /* R2904 (0xb58) - ISRC2DEC4MIX Input 1 Source*/
609 { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source*/
610 { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source*/
611 { 0x00000b70, 0x0000 }, /* R2928 (0xb70) - ISRC2INT3MIX Input 1 Source*/
612 { 0x00000b78, 0x0000 }, /* R2936 (0xb78) - ISRC2INT4MIX Input 1 Source*/
613 { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX Ctrl1 */
614 { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1_1 */
615 { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1_2 */
616 { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1_3 */
617 { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1_4 */
618 { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1_5 */
619 { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1_6 */
620 { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1_7 */
621 { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1_8 */
622 { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1_9 */
623 { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1_10 */
624 { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1_11 */
625 { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1_12 */
626 { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1_13 */
627 { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1_14 */
628 { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1_15 */
629 { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1_16 */
630 { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1_17 */
631 { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1_18 */
632 { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1_19 */
633 { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1_20 */
634 { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1_21 */
635 { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2_1 */
636 { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2_2 */
637 { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2_3 */
638 { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2_4 */
639 { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2_5 */
640 { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2_6 */
641 { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2_7 */
642 { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2_8 */
643 { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2_9 */
644 { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2_10 */
645 { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2_11 */
646 { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2_12 */
647 { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2_13 */
648 { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2_14 */
649 { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2_15 */
650 { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2_16 */
651 { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2_17 */
652 { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2_18 */
653 { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2_19 */
654 { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2_20 */
655 { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2_21 */
656 { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3_1 */
657 { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3_2 */
658 { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3_3 */
659 { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3_4 */
660 { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3_5 */
661 { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3_6 */
662 { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3_7 */
663 { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3_8 */
664 { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3_9 */
665 { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3_10 */
666 { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3_11 */
667 { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3_12 */
668 { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3_13 */
669 { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3_14 */
670 { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3_15 */
671 { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3_16 */
672 { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3_17 */
673 { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3_18 */
674 { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3_19 */
675 { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3_20 */
676 { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3_21 */
677 { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4_1 */
678 { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4_2 */
679 { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4_3 */
680 { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4_4 */
681 { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4_5 */
682 { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4_6 */
683 { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4_7 */
684 { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4_8 */
685 { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4_9 */
686 { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4_10 */
687 { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4_11 */
688 { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4_12 */
689 { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4_13 */
690 { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4_14 */
691 { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4_15 */
692 { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4_16 */
693 { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4_17 */
694 { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4_18 */
695 { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4_19 */
696 { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4_20 */
697 { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4_21 */
698 { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 ctrl1 */
699 { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 ctrl2 */
700 { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */
701 { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */
702 { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */
703 { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 ctrl1 */
704 { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 ctrl2 */
705 { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 ctrl3 */
706 { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */
707 { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 ctrl5 */
708 { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */
709 { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */
710 { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */
711 { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2_2 */
712 { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3_1 */
713 { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3_2 */
714 { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4_1 */
715 { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4_2 */
716 { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC 1 CTRL 1 */
717 { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC 1 CTRL 2 */
718 { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC 1 CTRL 3 */
719 { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */
720 { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */
721 { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */
722 { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */
723 { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */
724 { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */
725 { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */
726 { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */
727 { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */
728 { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */
729 { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */
730 { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */
731 { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */
732 { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 4L 1 */
733 { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 4L 2 */
734 { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 4L 3 */
735 { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 4L 4 */
736 { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 5L 1 */
737 { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 5L 2 */
738 { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 5L 3 */
739 { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 5L 4 */
740 { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 5R 1 */
741 { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 5R 2 */
742 { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 5R 3 */
743 { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 5R 4 */
744 { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */
745 { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */
746 { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */
747 { 0x00001703, 0xf000 }, /* R5891 (0x1703) - GPIO2 Control 2 */
748 { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */
749 { 0x00001705, 0xf000 }, /* R5893 (0x1705) - GPIO3 Control 2 */
750 { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */
751 { 0x00001707, 0xf000 }, /* R5895 (0x1707) - GPIO4 Control 2 */
752 { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */
753 { 0x00001709, 0xf000 }, /* R5897 (0x1709) - GPIO5 Control 2 */
754 { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */
755 { 0x0000170b, 0xf000 }, /* R5899 (0x170b) - GPIO6 Control 2 */
756 { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */
757 { 0x0000170d, 0xf000 }, /* R5901 (0x170d) - GPIO7 Control 2 */
758 { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */
759 { 0x0000170f, 0xf000 }, /* R5903 (0x170f) - GPIO8 Control 2 */
760 { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */
761 { 0x00001711, 0xf000 }, /* R5905 (0x1711) - GPIO9 Control 2 */
762 { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */
763 { 0x00001713, 0xf000 }, /* R5907 (0x1713) - GPIO10 Control 2 */
764 { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */
765 { 0x00001715, 0xf000 }, /* R5909 (0x1715) - GPIO11 Control 2 */
766 { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */
767 { 0x00001717, 0xf000 }, /* R5911 (0x1717) - GPIO12 Control 2 */
768 { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */
769 { 0x00001719, 0xf000 }, /* R5913 (0x1719) - GPIO13 Control 2 */
770 { 0x0000171a, 0x2001 }, /* R5914 (0x171a) - GPIO14 Control 1 */
771 { 0x0000171b, 0xf000 }, /* R5915 (0x171b) - GPIO14 Control 2 */
772 { 0x0000171c, 0x2001 }, /* R5916 (0x171c) - GPIO15 Control 1 */
773 { 0x0000171d, 0xf000 }, /* R5917 (0x171d) - GPIO15 Control 2 */
774 { 0x0000171e, 0x2001 }, /* R5918 (0x171e) - GPIO16 Control 1 */
775 { 0x0000171f, 0xf000 }, /* R5919 (0x171f) - GPIO16 Control 2 */
776 { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */
777 { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */
778 { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */
779 { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */
780 { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */
781 { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */
782 { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */
783 { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */
784 { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */
785 { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */
786 { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */
787 { 0x0000184b, 0xffff }, /* R6219 (0x184b) - IRQ1 Mask 12 */
788 { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */
789 { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */
790 { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */
791 { 0x0000184f, 0xffff }, /* R6223 (0x184f) - IRQ1 Mask 16 */
792 { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */
793 { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */
794 { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */
795 { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */
796 { 0x00001854, 0xffff }, /* R6228 (0x1854) - IRQ1 Mask 21 */
797 { 0x00001855, 0xffff }, /* R6229 (0x1855) - IRQ1 Mask 22 */
798 { 0x00001856, 0xffff }, /* R6230 (0x1856) - IRQ1 Mask 23 */
799 { 0x00001857, 0xffff }, /* R6231 (0x1857) - IRQ1 Mask 24 */
800 { 0x00001858, 0xffff }, /* R6232 (0x1858) - IRQ1 Mask 25 */
801 { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */
802 { 0x0000185a, 0xffff }, /* R6234 (0x185a) - IRQ1 Mask 27 */
803 { 0x0000185b, 0xffff }, /* R6235 (0x185b) - IRQ1 Mask 28 */
804 { 0x0000185c, 0xffff }, /* R6236 (0x185c) - IRQ1 Mask 29 */
805 { 0x0000185d, 0xffff }, /* R6237 (0x185d) - IRQ1 Mask 30 */
806 { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */
807 { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */
808 { 0x00001860, 0xffff }, /* R6240 (0x1860) - IRQ1 Mask 33 */
809 { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */
810 { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */
811};
812
813static bool cs47l35_is_adsp_memory(unsigned int reg)
814{
815 switch (reg) {
816 case 0x080000 ... 0x085ffe:
817 case 0x0a0000 ... 0x0a7ffe:
818 case 0x0c0000 ... 0x0c1ffe:
819 case 0x0e0000 ... 0x0e1ffe:
820 case 0x100000 ... 0x10effe:
821 case 0x120000 ... 0x12bffe:
822 case 0x136000 ... 0x137ffe:
823 case 0x140000 ... 0x14bffe:
824 case 0x160000 ... 0x161ffe:
825 case 0x180000 ... 0x18effe:
826 case 0x1a0000 ... 0x1b1ffe:
827 case 0x1b6000 ... 0x1b7ffe:
828 case 0x1c0000 ... 0x1cbffe:
829 case 0x1e0000 ... 0x1e1ffe:
830 return true;
831 default:
832 return false;
833 }
834}
835
836static bool cs47l35_16bit_readable_register(struct device *dev,
837 unsigned int reg)
838{
839 switch (reg) {
840 case MADERA_SOFTWARE_RESET:
841 case MADERA_HARDWARE_REVISION:
842 case MADERA_WRITE_SEQUENCER_CTRL_0:
843 case MADERA_WRITE_SEQUENCER_CTRL_1:
844 case MADERA_WRITE_SEQUENCER_CTRL_2:
845 case MADERA_TONE_GENERATOR_1:
846 case MADERA_TONE_GENERATOR_2:
847 case MADERA_TONE_GENERATOR_3:
848 case MADERA_TONE_GENERATOR_4:
849 case MADERA_TONE_GENERATOR_5:
850 case MADERA_PWM_DRIVE_1:
851 case MADERA_PWM_DRIVE_2:
852 case MADERA_PWM_DRIVE_3:
853 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1:
854 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2:
855 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3:
856 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4:
857 case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1:
858 case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2:
859 case MADERA_HAPTICS_CONTROL_1:
860 case MADERA_HAPTICS_CONTROL_2:
861 case MADERA_HAPTICS_PHASE_1_INTENSITY:
862 case MADERA_HAPTICS_PHASE_1_DURATION:
863 case MADERA_HAPTICS_PHASE_2_INTENSITY:
864 case MADERA_HAPTICS_PHASE_2_DURATION:
865 case MADERA_HAPTICS_PHASE_3_INTENSITY:
866 case MADERA_HAPTICS_PHASE_3_DURATION:
867 case MADERA_HAPTICS_STATUS:
868 case MADERA_COMFORT_NOISE_GENERATOR:
869 case MADERA_CLOCK_32K_1:
870 case MADERA_SYSTEM_CLOCK_1:
871 case MADERA_SAMPLE_RATE_1:
872 case MADERA_SAMPLE_RATE_2:
873 case MADERA_SAMPLE_RATE_3:
874 case MADERA_SAMPLE_RATE_1_STATUS:
875 case MADERA_SAMPLE_RATE_2_STATUS:
876 case MADERA_SAMPLE_RATE_3_STATUS:
877 case MADERA_DSP_CLOCK_1:
878 case MADERA_DSP_CLOCK_2:
879 case MADERA_OUTPUT_SYSTEM_CLOCK:
880 case MADERA_OUTPUT_ASYNC_CLOCK:
881 case MADERA_RATE_ESTIMATOR_1:
882 case MADERA_RATE_ESTIMATOR_2:
883 case MADERA_RATE_ESTIMATOR_3:
884 case MADERA_RATE_ESTIMATOR_4:
885 case MADERA_RATE_ESTIMATOR_5:
886 case MADERA_FLL1_CONTROL_1:
887 case MADERA_FLL1_CONTROL_2:
888 case MADERA_FLL1_CONTROL_3:
889 case MADERA_FLL1_CONTROL_4:
890 case MADERA_FLL1_CONTROL_5:
891 case MADERA_FLL1_CONTROL_6:
892 case MADERA_FLL1_CONTROL_7:
893 case MADERA_FLL1_EFS_2:
894 case MADERA_FLL1_LOOP_FILTER_TEST_1:
895 case CS47L35_FLL1_SYNCHRONISER_1:
896 case CS47L35_FLL1_SYNCHRONISER_2:
897 case CS47L35_FLL1_SYNCHRONISER_3:
898 case CS47L35_FLL1_SYNCHRONISER_4:
899 case CS47L35_FLL1_SYNCHRONISER_5:
900 case CS47L35_FLL1_SYNCHRONISER_6:
901 case CS47L35_FLL1_SYNCHRONISER_7:
902 case CS47L35_FLL1_SPREAD_SPECTRUM:
903 case CS47L35_FLL1_GPIO_CLOCK:
904 case MADERA_MIC_CHARGE_PUMP_1:
905 case MADERA_HP_CHARGE_PUMP_8:
906 case MADERA_LDO2_CONTROL_1:
907 case MADERA_MIC_BIAS_CTRL_1:
908 case MADERA_MIC_BIAS_CTRL_2:
909 case MADERA_MIC_BIAS_CTRL_5:
910 case MADERA_MIC_BIAS_CTRL_6:
911 case MADERA_HP_CTRL_1L:
912 case MADERA_HP_CTRL_1R:
913 case MADERA_DCS_HP1L_CONTROL:
914 case MADERA_DCS_HP1R_CONTROL:
915 case MADERA_EDRE_HP_STEREO_CONTROL:
916 case MADERA_ACCESSORY_DETECT_MODE_1:
917 case MADERA_HEADPHONE_DETECT_1:
918 case MADERA_HEADPHONE_DETECT_2:
919 case MADERA_HEADPHONE_DETECT_3:
920 case MADERA_HEADPHONE_DETECT_5:
921 case MADERA_MICD_CLAMP_CONTROL:
922 case MADERA_MIC_DETECT_1_CONTROL_1:
923 case MADERA_MIC_DETECT_1_CONTROL_2:
924 case MADERA_MIC_DETECT_1_CONTROL_3:
925 case MADERA_MIC_DETECT_1_LEVEL_1:
926 case MADERA_MIC_DETECT_1_LEVEL_2:
927 case MADERA_MIC_DETECT_1_LEVEL_3:
928 case MADERA_MIC_DETECT_1_LEVEL_4:
929 case MADERA_MIC_DETECT_1_CONTROL_4:
930 case MADERA_GP_SWITCH_1:
931 case MADERA_JACK_DETECT_ANALOGUE:
932 case MADERA_INPUT_ENABLES:
933 case MADERA_INPUT_ENABLES_STATUS:
934 case MADERA_INPUT_RATE:
935 case MADERA_INPUT_VOLUME_RAMP:
936 case MADERA_HPF_CONTROL:
937 case MADERA_IN1L_CONTROL:
938 case MADERA_ADC_DIGITAL_VOLUME_1L:
939 case MADERA_DMIC1L_CONTROL:
940 case MADERA_IN1R_CONTROL:
941 case MADERA_ADC_DIGITAL_VOLUME_1R:
942 case MADERA_DMIC1R_CONTROL:
943 case MADERA_IN2L_CONTROL:
944 case MADERA_ADC_DIGITAL_VOLUME_2L:
945 case MADERA_DMIC2L_CONTROL:
946 case MADERA_IN2R_CONTROL:
947 case MADERA_ADC_DIGITAL_VOLUME_2R:
948 case MADERA_DMIC2R_CONTROL:
949 case MADERA_OUTPUT_ENABLES_1:
950 case MADERA_OUTPUT_STATUS_1:
951 case MADERA_RAW_OUTPUT_STATUS_1:
952 case MADERA_OUTPUT_RATE_1:
953 case MADERA_OUTPUT_VOLUME_RAMP:
954 case MADERA_OUTPUT_PATH_CONFIG_1L:
955 case MADERA_DAC_DIGITAL_VOLUME_1L:
956 case MADERA_NOISE_GATE_SELECT_1L:
957 case MADERA_OUTPUT_PATH_CONFIG_1R:
958 case MADERA_DAC_DIGITAL_VOLUME_1R:
959 case MADERA_NOISE_GATE_SELECT_1R:
960 case MADERA_OUTPUT_PATH_CONFIG_4L:
961 case MADERA_DAC_DIGITAL_VOLUME_4L:
962 case MADERA_NOISE_GATE_SELECT_4L:
963 case MADERA_OUTPUT_PATH_CONFIG_5L:
964 case MADERA_DAC_DIGITAL_VOLUME_5L:
965 case MADERA_NOISE_GATE_SELECT_5L:
966 case MADERA_OUTPUT_PATH_CONFIG_5R:
967 case MADERA_DAC_DIGITAL_VOLUME_5R:
968 case MADERA_NOISE_GATE_SELECT_5R:
969 case MADERA_DRE_ENABLE:
970 case MADERA_EDRE_ENABLE:
971 case MADERA_EDRE_MANUAL:
972 case MADERA_DAC_AEC_CONTROL_1:
973 case MADERA_NOISE_GATE_CONTROL:
974 case MADERA_PDM_SPK1_CTRL_1:
975 case MADERA_PDM_SPK1_CTRL_2:
976 case MADERA_HP1_SHORT_CIRCUIT_CTRL:
977 case MADERA_HP_TEST_CTRL_5:
978 case MADERA_HP_TEST_CTRL_6:
979 case MADERA_AIF1_BCLK_CTRL:
980 case MADERA_AIF1_TX_PIN_CTRL:
981 case MADERA_AIF1_RX_PIN_CTRL:
982 case MADERA_AIF1_RATE_CTRL:
983 case MADERA_AIF1_FORMAT:
984 case MADERA_AIF1_RX_BCLK_RATE:
985 case MADERA_AIF1_FRAME_CTRL_1:
986 case MADERA_AIF1_FRAME_CTRL_2:
987 case MADERA_AIF1_FRAME_CTRL_3:
988 case MADERA_AIF1_FRAME_CTRL_4:
989 case MADERA_AIF1_FRAME_CTRL_5:
990 case MADERA_AIF1_FRAME_CTRL_6:
991 case MADERA_AIF1_FRAME_CTRL_7:
992 case MADERA_AIF1_FRAME_CTRL_8:
993 case MADERA_AIF1_FRAME_CTRL_11:
994 case MADERA_AIF1_FRAME_CTRL_12:
995 case MADERA_AIF1_FRAME_CTRL_13:
996 case MADERA_AIF1_FRAME_CTRL_14:
997 case MADERA_AIF1_FRAME_CTRL_15:
998 case MADERA_AIF1_FRAME_CTRL_16:
999 case MADERA_AIF1_TX_ENABLES:
1000 case MADERA_AIF1_RX_ENABLES:
1001 case MADERA_AIF2_BCLK_CTRL:
1002 case MADERA_AIF2_TX_PIN_CTRL:
1003 case MADERA_AIF2_RX_PIN_CTRL:
1004 case MADERA_AIF2_RATE_CTRL:
1005 case MADERA_AIF2_FORMAT:
1006 case MADERA_AIF2_RX_BCLK_RATE:
1007 case MADERA_AIF2_FRAME_CTRL_1:
1008 case MADERA_AIF2_FRAME_CTRL_2:
1009 case MADERA_AIF2_FRAME_CTRL_3:
1010 case MADERA_AIF2_FRAME_CTRL_4:
1011 case MADERA_AIF2_FRAME_CTRL_11:
1012 case MADERA_AIF2_FRAME_CTRL_12:
1013 case MADERA_AIF2_TX_ENABLES:
1014 case MADERA_AIF2_RX_ENABLES:
1015 case MADERA_AIF3_BCLK_CTRL:
1016 case MADERA_AIF3_TX_PIN_CTRL:
1017 case MADERA_AIF3_RX_PIN_CTRL:
1018 case MADERA_AIF3_RATE_CTRL:
1019 case MADERA_AIF3_FORMAT:
1020 case MADERA_AIF3_RX_BCLK_RATE:
1021 case MADERA_AIF3_FRAME_CTRL_1:
1022 case MADERA_AIF3_FRAME_CTRL_2:
1023 case MADERA_AIF3_FRAME_CTRL_3:
1024 case MADERA_AIF3_FRAME_CTRL_4:
1025 case MADERA_AIF3_FRAME_CTRL_11:
1026 case MADERA_AIF3_FRAME_CTRL_12:
1027 case MADERA_AIF3_TX_ENABLES:
1028 case MADERA_AIF3_RX_ENABLES:
1029 case MADERA_SPD1_TX_CONTROL:
1030 case MADERA_SPD1_TX_CHANNEL_STATUS_1:
1031 case MADERA_SPD1_TX_CHANNEL_STATUS_2:
1032 case MADERA_SPD1_TX_CHANNEL_STATUS_3:
1033 case MADERA_SLIMBUS_FRAMER_REF_GEAR:
1034 case MADERA_SLIMBUS_RATES_1:
1035 case MADERA_SLIMBUS_RATES_2:
1036 case MADERA_SLIMBUS_RATES_3:
1037 case MADERA_SLIMBUS_RATES_5:
1038 case MADERA_SLIMBUS_RATES_6:
1039 case MADERA_SLIMBUS_RATES_7:
1040 case MADERA_SLIMBUS_RX_CHANNEL_ENABLE:
1041 case MADERA_SLIMBUS_TX_CHANNEL_ENABLE:
1042 case MADERA_SLIMBUS_RX_PORT_STATUS:
1043 case MADERA_SLIMBUS_TX_PORT_STATUS:
1044 case MADERA_PWM1MIX_INPUT_1_SOURCE:
1045 case MADERA_PWM1MIX_INPUT_1_VOLUME:
1046 case MADERA_PWM1MIX_INPUT_2_SOURCE:
1047 case MADERA_PWM1MIX_INPUT_2_VOLUME:
1048 case MADERA_PWM1MIX_INPUT_3_SOURCE:
1049 case MADERA_PWM1MIX_INPUT_3_VOLUME:
1050 case MADERA_PWM1MIX_INPUT_4_SOURCE:
1051 case MADERA_PWM1MIX_INPUT_4_VOLUME:
1052 case MADERA_PWM2MIX_INPUT_1_SOURCE:
1053 case MADERA_PWM2MIX_INPUT_1_VOLUME:
1054 case MADERA_PWM2MIX_INPUT_2_SOURCE:
1055 case MADERA_PWM2MIX_INPUT_2_VOLUME:
1056 case MADERA_PWM2MIX_INPUT_3_SOURCE:
1057 case MADERA_PWM2MIX_INPUT_3_VOLUME:
1058 case MADERA_PWM2MIX_INPUT_4_SOURCE:
1059 case MADERA_PWM2MIX_INPUT_4_VOLUME:
1060 case MADERA_OUT1LMIX_INPUT_1_SOURCE:
1061 case MADERA_OUT1LMIX_INPUT_1_VOLUME:
1062 case MADERA_OUT1LMIX_INPUT_2_SOURCE:
1063 case MADERA_OUT1LMIX_INPUT_2_VOLUME:
1064 case MADERA_OUT1LMIX_INPUT_3_SOURCE:
1065 case MADERA_OUT1LMIX_INPUT_3_VOLUME:
1066 case MADERA_OUT1LMIX_INPUT_4_SOURCE:
1067 case MADERA_OUT1LMIX_INPUT_4_VOLUME:
1068 case MADERA_OUT1RMIX_INPUT_1_SOURCE:
1069 case MADERA_OUT1RMIX_INPUT_1_VOLUME:
1070 case MADERA_OUT1RMIX_INPUT_2_SOURCE:
1071 case MADERA_OUT1RMIX_INPUT_2_VOLUME:
1072 case MADERA_OUT1RMIX_INPUT_3_SOURCE:
1073 case MADERA_OUT1RMIX_INPUT_3_VOLUME:
1074 case MADERA_OUT1RMIX_INPUT_4_SOURCE:
1075 case MADERA_OUT1RMIX_INPUT_4_VOLUME:
1076 case MADERA_OUT4LMIX_INPUT_1_SOURCE:
1077 case MADERA_OUT4LMIX_INPUT_1_VOLUME:
1078 case MADERA_OUT4LMIX_INPUT_2_SOURCE:
1079 case MADERA_OUT4LMIX_INPUT_2_VOLUME:
1080 case MADERA_OUT4LMIX_INPUT_3_SOURCE:
1081 case MADERA_OUT4LMIX_INPUT_3_VOLUME:
1082 case MADERA_OUT4LMIX_INPUT_4_SOURCE:
1083 case MADERA_OUT4LMIX_INPUT_4_VOLUME:
1084 case MADERA_OUT5LMIX_INPUT_1_SOURCE:
1085 case MADERA_OUT5LMIX_INPUT_1_VOLUME:
1086 case MADERA_OUT5LMIX_INPUT_2_SOURCE:
1087 case MADERA_OUT5LMIX_INPUT_2_VOLUME:
1088 case MADERA_OUT5LMIX_INPUT_3_SOURCE:
1089 case MADERA_OUT5LMIX_INPUT_3_VOLUME:
1090 case MADERA_OUT5LMIX_INPUT_4_SOURCE:
1091 case MADERA_OUT5LMIX_INPUT_4_VOLUME:
1092 case MADERA_OUT5RMIX_INPUT_1_SOURCE:
1093 case MADERA_OUT5RMIX_INPUT_1_VOLUME:
1094 case MADERA_OUT5RMIX_INPUT_2_SOURCE:
1095 case MADERA_OUT5RMIX_INPUT_2_VOLUME:
1096 case MADERA_OUT5RMIX_INPUT_3_SOURCE:
1097 case MADERA_OUT5RMIX_INPUT_3_VOLUME:
1098 case MADERA_OUT5RMIX_INPUT_4_SOURCE:
1099 case MADERA_OUT5RMIX_INPUT_4_VOLUME:
1100 case MADERA_AIF1TX1MIX_INPUT_1_SOURCE:
1101 case MADERA_AIF1TX1MIX_INPUT_1_VOLUME:
1102 case MADERA_AIF1TX1MIX_INPUT_2_SOURCE:
1103 case MADERA_AIF1TX1MIX_INPUT_2_VOLUME:
1104 case MADERA_AIF1TX1MIX_INPUT_3_SOURCE:
1105 case MADERA_AIF1TX1MIX_INPUT_3_VOLUME:
1106 case MADERA_AIF1TX1MIX_INPUT_4_SOURCE:
1107 case MADERA_AIF1TX1MIX_INPUT_4_VOLUME:
1108 case MADERA_AIF1TX2MIX_INPUT_1_SOURCE:
1109 case MADERA_AIF1TX2MIX_INPUT_1_VOLUME:
1110 case MADERA_AIF1TX2MIX_INPUT_2_SOURCE:
1111 case MADERA_AIF1TX2MIX_INPUT_2_VOLUME:
1112 case MADERA_AIF1TX2MIX_INPUT_3_SOURCE:
1113 case MADERA_AIF1TX2MIX_INPUT_3_VOLUME:
1114 case MADERA_AIF1TX2MIX_INPUT_4_SOURCE:
1115 case MADERA_AIF1TX2MIX_INPUT_4_VOLUME:
1116 case MADERA_AIF1TX3MIX_INPUT_1_SOURCE:
1117 case MADERA_AIF1TX3MIX_INPUT_1_VOLUME:
1118 case MADERA_AIF1TX3MIX_INPUT_2_SOURCE:
1119 case MADERA_AIF1TX3MIX_INPUT_2_VOLUME:
1120 case MADERA_AIF1TX3MIX_INPUT_3_SOURCE:
1121 case MADERA_AIF1TX3MIX_INPUT_3_VOLUME:
1122 case MADERA_AIF1TX3MIX_INPUT_4_SOURCE:
1123 case MADERA_AIF1TX3MIX_INPUT_4_VOLUME:
1124 case MADERA_AIF1TX4MIX_INPUT_1_SOURCE:
1125 case MADERA_AIF1TX4MIX_INPUT_1_VOLUME:
1126 case MADERA_AIF1TX4MIX_INPUT_2_SOURCE:
1127 case MADERA_AIF1TX4MIX_INPUT_2_VOLUME:
1128 case MADERA_AIF1TX4MIX_INPUT_3_SOURCE:
1129 case MADERA_AIF1TX4MIX_INPUT_3_VOLUME:
1130 case MADERA_AIF1TX4MIX_INPUT_4_SOURCE:
1131 case MADERA_AIF1TX4MIX_INPUT_4_VOLUME:
1132 case MADERA_AIF1TX5MIX_INPUT_1_SOURCE:
1133 case MADERA_AIF1TX5MIX_INPUT_1_VOLUME:
1134 case MADERA_AIF1TX5MIX_INPUT_2_SOURCE:
1135 case MADERA_AIF1TX5MIX_INPUT_2_VOLUME:
1136 case MADERA_AIF1TX5MIX_INPUT_3_SOURCE:
1137 case MADERA_AIF1TX5MIX_INPUT_3_VOLUME:
1138 case MADERA_AIF1TX5MIX_INPUT_4_SOURCE:
1139 case MADERA_AIF1TX5MIX_INPUT_4_VOLUME:
1140 case MADERA_AIF1TX6MIX_INPUT_1_SOURCE:
1141 case MADERA_AIF1TX6MIX_INPUT_1_VOLUME:
1142 case MADERA_AIF1TX6MIX_INPUT_2_SOURCE:
1143 case MADERA_AIF1TX6MIX_INPUT_2_VOLUME:
1144 case MADERA_AIF1TX6MIX_INPUT_3_SOURCE:
1145 case MADERA_AIF1TX6MIX_INPUT_3_VOLUME:
1146 case MADERA_AIF1TX6MIX_INPUT_4_SOURCE:
1147 case MADERA_AIF1TX6MIX_INPUT_4_VOLUME:
1148 case MADERA_AIF2TX1MIX_INPUT_1_SOURCE:
1149 case MADERA_AIF2TX1MIX_INPUT_1_VOLUME:
1150 case MADERA_AIF2TX1MIX_INPUT_2_SOURCE:
1151 case MADERA_AIF2TX1MIX_INPUT_2_VOLUME:
1152 case MADERA_AIF2TX1MIX_INPUT_3_SOURCE:
1153 case MADERA_AIF2TX1MIX_INPUT_3_VOLUME:
1154 case MADERA_AIF2TX1MIX_INPUT_4_SOURCE:
1155 case MADERA_AIF2TX1MIX_INPUT_4_VOLUME:
1156 case MADERA_AIF2TX2MIX_INPUT_1_SOURCE:
1157 case MADERA_AIF2TX2MIX_INPUT_1_VOLUME:
1158 case MADERA_AIF2TX2MIX_INPUT_2_SOURCE:
1159 case MADERA_AIF2TX2MIX_INPUT_2_VOLUME:
1160 case MADERA_AIF2TX2MIX_INPUT_3_SOURCE:
1161 case MADERA_AIF2TX2MIX_INPUT_3_VOLUME:
1162 case MADERA_AIF2TX2MIX_INPUT_4_SOURCE:
1163 case MADERA_AIF2TX2MIX_INPUT_4_VOLUME:
1164 case MADERA_AIF3TX1MIX_INPUT_1_SOURCE:
1165 case MADERA_AIF3TX1MIX_INPUT_1_VOLUME:
1166 case MADERA_AIF3TX1MIX_INPUT_2_SOURCE:
1167 case MADERA_AIF3TX1MIX_INPUT_2_VOLUME:
1168 case MADERA_AIF3TX1MIX_INPUT_3_SOURCE:
1169 case MADERA_AIF3TX1MIX_INPUT_3_VOLUME:
1170 case MADERA_AIF3TX1MIX_INPUT_4_SOURCE:
1171 case MADERA_AIF3TX1MIX_INPUT_4_VOLUME:
1172 case MADERA_AIF3TX2MIX_INPUT_1_SOURCE:
1173 case MADERA_AIF3TX2MIX_INPUT_1_VOLUME:
1174 case MADERA_AIF3TX2MIX_INPUT_2_SOURCE:
1175 case MADERA_AIF3TX2MIX_INPUT_2_VOLUME:
1176 case MADERA_AIF3TX2MIX_INPUT_3_SOURCE:
1177 case MADERA_AIF3TX2MIX_INPUT_3_VOLUME:
1178 case MADERA_AIF3TX2MIX_INPUT_4_SOURCE:
1179 case MADERA_AIF3TX2MIX_INPUT_4_VOLUME:
1180 case MADERA_SLIMTX1MIX_INPUT_1_SOURCE:
1181 case MADERA_SLIMTX1MIX_INPUT_1_VOLUME:
1182 case MADERA_SLIMTX1MIX_INPUT_2_SOURCE:
1183 case MADERA_SLIMTX1MIX_INPUT_2_VOLUME:
1184 case MADERA_SLIMTX1MIX_INPUT_3_SOURCE:
1185 case MADERA_SLIMTX1MIX_INPUT_3_VOLUME:
1186 case MADERA_SLIMTX1MIX_INPUT_4_SOURCE:
1187 case MADERA_SLIMTX1MIX_INPUT_4_VOLUME:
1188 case MADERA_SLIMTX2MIX_INPUT_1_SOURCE:
1189 case MADERA_SLIMTX2MIX_INPUT_1_VOLUME:
1190 case MADERA_SLIMTX2MIX_INPUT_2_SOURCE:
1191 case MADERA_SLIMTX2MIX_INPUT_2_VOLUME:
1192 case MADERA_SLIMTX2MIX_INPUT_3_SOURCE:
1193 case MADERA_SLIMTX2MIX_INPUT_3_VOLUME:
1194 case MADERA_SLIMTX2MIX_INPUT_4_SOURCE:
1195 case MADERA_SLIMTX2MIX_INPUT_4_VOLUME:
1196 case MADERA_SLIMTX3MIX_INPUT_1_SOURCE:
1197 case MADERA_SLIMTX3MIX_INPUT_1_VOLUME:
1198 case MADERA_SLIMTX3MIX_INPUT_2_SOURCE:
1199 case MADERA_SLIMTX3MIX_INPUT_2_VOLUME:
1200 case MADERA_SLIMTX3MIX_INPUT_3_SOURCE:
1201 case MADERA_SLIMTX3MIX_INPUT_3_VOLUME:
1202 case MADERA_SLIMTX3MIX_INPUT_4_SOURCE:
1203 case MADERA_SLIMTX3MIX_INPUT_4_VOLUME:
1204 case MADERA_SLIMTX4MIX_INPUT_1_SOURCE:
1205 case MADERA_SLIMTX4MIX_INPUT_1_VOLUME:
1206 case MADERA_SLIMTX4MIX_INPUT_2_SOURCE:
1207 case MADERA_SLIMTX4MIX_INPUT_2_VOLUME:
1208 case MADERA_SLIMTX4MIX_INPUT_3_SOURCE:
1209 case MADERA_SLIMTX4MIX_INPUT_3_VOLUME:
1210 case MADERA_SLIMTX4MIX_INPUT_4_SOURCE:
1211 case MADERA_SLIMTX4MIX_INPUT_4_VOLUME:
1212 case MADERA_SLIMTX5MIX_INPUT_1_SOURCE:
1213 case MADERA_SLIMTX5MIX_INPUT_1_VOLUME:
1214 case MADERA_SLIMTX5MIX_INPUT_2_SOURCE:
1215 case MADERA_SLIMTX5MIX_INPUT_2_VOLUME:
1216 case MADERA_SLIMTX5MIX_INPUT_3_SOURCE:
1217 case MADERA_SLIMTX5MIX_INPUT_3_VOLUME:
1218 case MADERA_SLIMTX5MIX_INPUT_4_SOURCE:
1219 case MADERA_SLIMTX5MIX_INPUT_4_VOLUME:
1220 case MADERA_SLIMTX6MIX_INPUT_1_SOURCE:
1221 case MADERA_SLIMTX6MIX_INPUT_1_VOLUME:
1222 case MADERA_SLIMTX6MIX_INPUT_2_SOURCE:
1223 case MADERA_SLIMTX6MIX_INPUT_2_VOLUME:
1224 case MADERA_SLIMTX6MIX_INPUT_3_SOURCE:
1225 case MADERA_SLIMTX6MIX_INPUT_3_VOLUME:
1226 case MADERA_SLIMTX6MIX_INPUT_4_SOURCE:
1227 case MADERA_SLIMTX6MIX_INPUT_4_VOLUME:
1228 case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE:
1229 case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME:
1230 case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE:
1231 case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME:
1232 case MADERA_EQ1MIX_INPUT_1_SOURCE:
1233 case MADERA_EQ1MIX_INPUT_1_VOLUME:
1234 case MADERA_EQ1MIX_INPUT_2_SOURCE:
1235 case MADERA_EQ1MIX_INPUT_2_VOLUME:
1236 case MADERA_EQ1MIX_INPUT_3_SOURCE:
1237 case MADERA_EQ1MIX_INPUT_3_VOLUME:
1238 case MADERA_EQ1MIX_INPUT_4_SOURCE:
1239 case MADERA_EQ1MIX_INPUT_4_VOLUME:
1240 case MADERA_EQ2MIX_INPUT_1_SOURCE:
1241 case MADERA_EQ2MIX_INPUT_1_VOLUME:
1242 case MADERA_EQ2MIX_INPUT_2_SOURCE:
1243 case MADERA_EQ2MIX_INPUT_2_VOLUME:
1244 case MADERA_EQ2MIX_INPUT_3_SOURCE:
1245 case MADERA_EQ2MIX_INPUT_3_VOLUME:
1246 case MADERA_EQ2MIX_INPUT_4_SOURCE:
1247 case MADERA_EQ2MIX_INPUT_4_VOLUME:
1248 case MADERA_EQ3MIX_INPUT_1_SOURCE:
1249 case MADERA_EQ3MIX_INPUT_1_VOLUME:
1250 case MADERA_EQ3MIX_INPUT_2_SOURCE:
1251 case MADERA_EQ3MIX_INPUT_2_VOLUME:
1252 case MADERA_EQ3MIX_INPUT_3_SOURCE:
1253 case MADERA_EQ3MIX_INPUT_3_VOLUME:
1254 case MADERA_EQ3MIX_INPUT_4_SOURCE:
1255 case MADERA_EQ3MIX_INPUT_4_VOLUME:
1256 case MADERA_EQ4MIX_INPUT_1_SOURCE:
1257 case MADERA_EQ4MIX_INPUT_1_VOLUME:
1258 case MADERA_EQ4MIX_INPUT_2_SOURCE:
1259 case MADERA_EQ4MIX_INPUT_2_VOLUME:
1260 case MADERA_EQ4MIX_INPUT_3_SOURCE:
1261 case MADERA_EQ4MIX_INPUT_3_VOLUME:
1262 case MADERA_EQ4MIX_INPUT_4_SOURCE:
1263 case MADERA_EQ4MIX_INPUT_4_VOLUME:
1264 case MADERA_DRC1LMIX_INPUT_1_SOURCE:
1265 case MADERA_DRC1LMIX_INPUT_1_VOLUME:
1266 case MADERA_DRC1LMIX_INPUT_2_SOURCE:
1267 case MADERA_DRC1LMIX_INPUT_2_VOLUME:
1268 case MADERA_DRC1LMIX_INPUT_3_SOURCE:
1269 case MADERA_DRC1LMIX_INPUT_3_VOLUME:
1270 case MADERA_DRC1LMIX_INPUT_4_SOURCE:
1271 case MADERA_DRC1LMIX_INPUT_4_VOLUME:
1272 case MADERA_DRC1RMIX_INPUT_1_SOURCE:
1273 case MADERA_DRC1RMIX_INPUT_1_VOLUME:
1274 case MADERA_DRC1RMIX_INPUT_2_SOURCE:
1275 case MADERA_DRC1RMIX_INPUT_2_VOLUME:
1276 case MADERA_DRC1RMIX_INPUT_3_SOURCE:
1277 case MADERA_DRC1RMIX_INPUT_3_VOLUME:
1278 case MADERA_DRC1RMIX_INPUT_4_SOURCE:
1279 case MADERA_DRC1RMIX_INPUT_4_VOLUME:
1280 case MADERA_DRC2LMIX_INPUT_1_SOURCE:
1281 case MADERA_DRC2LMIX_INPUT_1_VOLUME:
1282 case MADERA_DRC2LMIX_INPUT_2_SOURCE:
1283 case MADERA_DRC2LMIX_INPUT_2_VOLUME:
1284 case MADERA_DRC2LMIX_INPUT_3_SOURCE:
1285 case MADERA_DRC2LMIX_INPUT_3_VOLUME:
1286 case MADERA_DRC2LMIX_INPUT_4_SOURCE:
1287 case MADERA_DRC2LMIX_INPUT_4_VOLUME:
1288 case MADERA_DRC2RMIX_INPUT_1_SOURCE:
1289 case MADERA_DRC2RMIX_INPUT_1_VOLUME:
1290 case MADERA_DRC2RMIX_INPUT_2_SOURCE:
1291 case MADERA_DRC2RMIX_INPUT_2_VOLUME:
1292 case MADERA_DRC2RMIX_INPUT_3_SOURCE:
1293 case MADERA_DRC2RMIX_INPUT_3_VOLUME:
1294 case MADERA_DRC2RMIX_INPUT_4_SOURCE:
1295 case MADERA_DRC2RMIX_INPUT_4_VOLUME:
1296 case MADERA_HPLP1MIX_INPUT_1_SOURCE:
1297 case MADERA_HPLP1MIX_INPUT_1_VOLUME:
1298 case MADERA_HPLP1MIX_INPUT_2_SOURCE:
1299 case MADERA_HPLP1MIX_INPUT_2_VOLUME:
1300 case MADERA_HPLP1MIX_INPUT_3_SOURCE:
1301 case MADERA_HPLP1MIX_INPUT_3_VOLUME:
1302 case MADERA_HPLP1MIX_INPUT_4_SOURCE:
1303 case MADERA_HPLP1MIX_INPUT_4_VOLUME:
1304 case MADERA_HPLP2MIX_INPUT_1_SOURCE:
1305 case MADERA_HPLP2MIX_INPUT_1_VOLUME:
1306 case MADERA_HPLP2MIX_INPUT_2_SOURCE:
1307 case MADERA_HPLP2MIX_INPUT_2_VOLUME:
1308 case MADERA_HPLP2MIX_INPUT_3_SOURCE:
1309 case MADERA_HPLP2MIX_INPUT_3_VOLUME:
1310 case MADERA_HPLP2MIX_INPUT_4_SOURCE:
1311 case MADERA_HPLP2MIX_INPUT_4_VOLUME:
1312 case MADERA_HPLP3MIX_INPUT_1_SOURCE:
1313 case MADERA_HPLP3MIX_INPUT_1_VOLUME:
1314 case MADERA_HPLP3MIX_INPUT_2_SOURCE:
1315 case MADERA_HPLP3MIX_INPUT_2_VOLUME:
1316 case MADERA_HPLP3MIX_INPUT_3_SOURCE:
1317 case MADERA_HPLP3MIX_INPUT_3_VOLUME:
1318 case MADERA_HPLP3MIX_INPUT_4_SOURCE:
1319 case MADERA_HPLP3MIX_INPUT_4_VOLUME:
1320 case MADERA_HPLP4MIX_INPUT_1_SOURCE:
1321 case MADERA_HPLP4MIX_INPUT_1_VOLUME:
1322 case MADERA_HPLP4MIX_INPUT_2_SOURCE:
1323 case MADERA_HPLP4MIX_INPUT_2_VOLUME:
1324 case MADERA_HPLP4MIX_INPUT_3_SOURCE:
1325 case MADERA_HPLP4MIX_INPUT_3_VOLUME:
1326 case MADERA_HPLP4MIX_INPUT_4_SOURCE:
1327 case MADERA_HPLP4MIX_INPUT_4_VOLUME:
1328 case MADERA_DSP1LMIX_INPUT_1_SOURCE:
1329 case MADERA_DSP1LMIX_INPUT_1_VOLUME:
1330 case MADERA_DSP1LMIX_INPUT_2_SOURCE:
1331 case MADERA_DSP1LMIX_INPUT_2_VOLUME:
1332 case MADERA_DSP1LMIX_INPUT_3_SOURCE:
1333 case MADERA_DSP1LMIX_INPUT_3_VOLUME:
1334 case MADERA_DSP1LMIX_INPUT_4_SOURCE:
1335 case MADERA_DSP1LMIX_INPUT_4_VOLUME:
1336 case MADERA_DSP1RMIX_INPUT_1_SOURCE:
1337 case MADERA_DSP1RMIX_INPUT_1_VOLUME:
1338 case MADERA_DSP1RMIX_INPUT_2_SOURCE:
1339 case MADERA_DSP1RMIX_INPUT_2_VOLUME:
1340 case MADERA_DSP1RMIX_INPUT_3_SOURCE:
1341 case MADERA_DSP1RMIX_INPUT_3_VOLUME:
1342 case MADERA_DSP1RMIX_INPUT_4_SOURCE:
1343 case MADERA_DSP1RMIX_INPUT_4_VOLUME:
1344 case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE:
1345 case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE:
1346 case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE:
1347 case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE:
1348 case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE:
1349 case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE:
1350 case MADERA_DSP2LMIX_INPUT_1_SOURCE:
1351 case MADERA_DSP2LMIX_INPUT_1_VOLUME:
1352 case MADERA_DSP2LMIX_INPUT_2_SOURCE:
1353 case MADERA_DSP2LMIX_INPUT_2_VOLUME:
1354 case MADERA_DSP2LMIX_INPUT_3_SOURCE:
1355 case MADERA_DSP2LMIX_INPUT_3_VOLUME:
1356 case MADERA_DSP2LMIX_INPUT_4_SOURCE:
1357 case MADERA_DSP2LMIX_INPUT_4_VOLUME:
1358 case MADERA_DSP2RMIX_INPUT_1_SOURCE:
1359 case MADERA_DSP2RMIX_INPUT_1_VOLUME:
1360 case MADERA_DSP2RMIX_INPUT_2_SOURCE:
1361 case MADERA_DSP2RMIX_INPUT_2_VOLUME:
1362 case MADERA_DSP2RMIX_INPUT_3_SOURCE:
1363 case MADERA_DSP2RMIX_INPUT_3_VOLUME:
1364 case MADERA_DSP2RMIX_INPUT_4_SOURCE:
1365 case MADERA_DSP2RMIX_INPUT_4_VOLUME:
1366 case MADERA_DSP2AUX1MIX_INPUT_1_SOURCE:
1367 case MADERA_DSP2AUX2MIX_INPUT_1_SOURCE:
1368 case MADERA_DSP2AUX3MIX_INPUT_1_SOURCE:
1369 case MADERA_DSP2AUX4MIX_INPUT_1_SOURCE:
1370 case MADERA_DSP2AUX5MIX_INPUT_1_SOURCE:
1371 case MADERA_DSP2AUX6MIX_INPUT_1_SOURCE:
1372 case MADERA_DSP3LMIX_INPUT_1_SOURCE:
1373 case MADERA_DSP3LMIX_INPUT_1_VOLUME:
1374 case MADERA_DSP3LMIX_INPUT_2_SOURCE:
1375 case MADERA_DSP3LMIX_INPUT_2_VOLUME:
1376 case MADERA_DSP3LMIX_INPUT_3_SOURCE:
1377 case MADERA_DSP3LMIX_INPUT_3_VOLUME:
1378 case MADERA_DSP3LMIX_INPUT_4_SOURCE:
1379 case MADERA_DSP3LMIX_INPUT_4_VOLUME:
1380 case MADERA_DSP3RMIX_INPUT_1_SOURCE:
1381 case MADERA_DSP3RMIX_INPUT_1_VOLUME:
1382 case MADERA_DSP3RMIX_INPUT_2_SOURCE:
1383 case MADERA_DSP3RMIX_INPUT_2_VOLUME:
1384 case MADERA_DSP3RMIX_INPUT_3_SOURCE:
1385 case MADERA_DSP3RMIX_INPUT_3_VOLUME:
1386 case MADERA_DSP3RMIX_INPUT_4_SOURCE:
1387 case MADERA_DSP3RMIX_INPUT_4_VOLUME:
1388 case MADERA_DSP3AUX1MIX_INPUT_1_SOURCE:
1389 case MADERA_DSP3AUX2MIX_INPUT_1_SOURCE:
1390 case MADERA_DSP3AUX3MIX_INPUT_1_SOURCE:
1391 case MADERA_DSP3AUX4MIX_INPUT_1_SOURCE:
1392 case MADERA_DSP3AUX5MIX_INPUT_1_SOURCE:
1393 case MADERA_DSP3AUX6MIX_INPUT_1_SOURCE:
1394 case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE:
1395 case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE:
1396 case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE:
1397 case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE:
1398 case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE:
1399 case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE:
1400 case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE:
1401 case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE:
1402 case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE:
1403 case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE:
1404 case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE:
1405 case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE:
1406 case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE:
1407 case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE:
1408 case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE:
1409 case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE:
1410 case MADERA_FX_CTRL1:
1411 case MADERA_FX_CTRL2:
1412 case MADERA_EQ1_1 ... MADERA_EQ1_21:
1413 case MADERA_EQ2_1 ... MADERA_EQ2_21:
1414 case MADERA_EQ3_1 ... MADERA_EQ3_21:
1415 case MADERA_EQ4_1 ... MADERA_EQ4_21:
1416 case MADERA_DRC1_CTRL1:
1417 case MADERA_DRC1_CTRL2:
1418 case MADERA_DRC1_CTRL3:
1419 case MADERA_DRC1_CTRL4:
1420 case MADERA_DRC1_CTRL5:
1421 case MADERA_DRC2_CTRL1:
1422 case MADERA_DRC2_CTRL2:
1423 case MADERA_DRC2_CTRL3:
1424 case MADERA_DRC2_CTRL4:
1425 case MADERA_DRC2_CTRL5:
1426 case MADERA_HPLPF1_1:
1427 case MADERA_HPLPF1_2:
1428 case MADERA_HPLPF2_1:
1429 case MADERA_HPLPF2_2:
1430 case MADERA_HPLPF3_1:
1431 case MADERA_HPLPF3_2:
1432 case MADERA_HPLPF4_1:
1433 case MADERA_HPLPF4_2:
1434 case MADERA_ISRC_1_CTRL_1:
1435 case MADERA_ISRC_1_CTRL_2:
1436 case MADERA_ISRC_1_CTRL_3:
1437 case MADERA_ISRC_2_CTRL_1:
1438 case MADERA_ISRC_2_CTRL_2:
1439 case MADERA_ISRC_2_CTRL_3:
1440 case MADERA_DAC_COMP_1:
1441 case MADERA_DAC_COMP_2:
1442 case MADERA_FRF_COEFFICIENT_1L_1:
1443 case MADERA_FRF_COEFFICIENT_1L_2:
1444 case MADERA_FRF_COEFFICIENT_1L_3:
1445 case MADERA_FRF_COEFFICIENT_1L_4:
1446 case MADERA_FRF_COEFFICIENT_1R_1:
1447 case MADERA_FRF_COEFFICIENT_1R_2:
1448 case MADERA_FRF_COEFFICIENT_1R_3:
1449 case MADERA_FRF_COEFFICIENT_1R_4:
1450 case CS47L35_FRF_COEFFICIENT_4L_1:
1451 case CS47L35_FRF_COEFFICIENT_4L_2:
1452 case CS47L35_FRF_COEFFICIENT_4L_3:
1453 case CS47L35_FRF_COEFFICIENT_4L_4:
1454 case CS47L35_FRF_COEFFICIENT_5L_1:
1455 case CS47L35_FRF_COEFFICIENT_5L_2:
1456 case CS47L35_FRF_COEFFICIENT_5L_3:
1457 case CS47L35_FRF_COEFFICIENT_5L_4:
1458 case CS47L35_FRF_COEFFICIENT_5R_1:
1459 case CS47L35_FRF_COEFFICIENT_5R_2:
1460 case CS47L35_FRF_COEFFICIENT_5R_3:
1461 case CS47L35_FRF_COEFFICIENT_5R_4:
1462 case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO16_CTRL_2:
1463 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33:
1464 case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33:
1465 case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33:
1466 case MADERA_INTERRUPT_DEBOUNCE_7:
1467 case MADERA_IRQ1_CTRL:
1468 return true;
1469 default:
1470 return false;
1471 }
1472}
1473
1474static bool cs47l35_16bit_volatile_register(struct device *dev,
1475 unsigned int reg)
1476{
1477 switch (reg) {
1478 case MADERA_SOFTWARE_RESET:
1479 case MADERA_HARDWARE_REVISION:
1480 case MADERA_WRITE_SEQUENCER_CTRL_0:
1481 case MADERA_WRITE_SEQUENCER_CTRL_1:
1482 case MADERA_WRITE_SEQUENCER_CTRL_2:
1483 case MADERA_HAPTICS_STATUS:
1484 case MADERA_SAMPLE_RATE_1_STATUS:
1485 case MADERA_SAMPLE_RATE_2_STATUS:
1486 case MADERA_SAMPLE_RATE_3_STATUS:
1487 case MADERA_HP_CTRL_1L:
1488 case MADERA_HP_CTRL_1R:
1489 case MADERA_DCS_HP1L_CONTROL:
1490 case MADERA_DCS_HP1R_CONTROL:
1491 case MADERA_MIC_DETECT_1_CONTROL_3:
1492 case MADERA_MIC_DETECT_1_CONTROL_4:
1493 case MADERA_HEADPHONE_DETECT_2:
1494 case MADERA_HEADPHONE_DETECT_3:
1495 case MADERA_HEADPHONE_DETECT_5:
1496 case MADERA_INPUT_ENABLES_STATUS:
1497 case MADERA_OUTPUT_STATUS_1:
1498 case MADERA_RAW_OUTPUT_STATUS_1:
1499 case MADERA_SPD1_TX_CHANNEL_STATUS_1:
1500 case MADERA_SPD1_TX_CHANNEL_STATUS_2:
1501 case MADERA_SPD1_TX_CHANNEL_STATUS_3:
1502 case MADERA_SLIMBUS_RX_PORT_STATUS:
1503 case MADERA_SLIMBUS_TX_PORT_STATUS:
1504 case MADERA_FX_CTRL2:
1505 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33:
1506 case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33:
1507 return true;
1508 default:
1509 return false;
1510 }
1511}
1512
1513static bool cs47l35_32bit_readable_register(struct device *dev,
1514 unsigned int reg)
1515{
1516 switch (reg) {
1517 case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_252:
1518 case CS47L35_OTP_HPDET_CAL_1 ... CS47L35_OTP_HPDET_CAL_2:
1519 case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2:
1520 case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2:
1521 case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2:
1522 return true;
1523 default:
1524 return cs47l35_is_adsp_memory(reg);
1525 }
1526}
1527
1528static bool cs47l35_32bit_volatile_register(struct device *dev,
1529 unsigned int reg)
1530{
1531 switch (reg) {
1532 case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_252:
1533 case CS47L35_OTP_HPDET_CAL_1 ... CS47L35_OTP_HPDET_CAL_2:
1534 case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2:
1535 case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2:
1536 case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2:
1537 return true;
1538 default:
1539 return cs47l35_is_adsp_memory(reg);
1540 }
1541}
1542
1543const struct regmap_config cs47l35_16bit_spi_regmap = {
1544 .name = "cs47l35_16bit",
1545 .reg_bits = 32,
1546 .pad_bits = 16,
1547 .val_bits = 16,
1548 .reg_format_endian = REGMAP_ENDIAN_BIG,
1549 .val_format_endian = REGMAP_ENDIAN_BIG,
1550
1551 .max_register = 0x1b00,
1552 .readable_reg = cs47l35_16bit_readable_register,
1553 .volatile_reg = cs47l35_16bit_volatile_register,
1554
1555 .cache_type = REGCACHE_RBTREE,
1556 .reg_defaults = cs47l35_reg_default,
1557 .num_reg_defaults = ARRAY_SIZE(cs47l35_reg_default),
1558};
1559EXPORT_SYMBOL_GPL(cs47l35_16bit_spi_regmap);
1560
1561const struct regmap_config cs47l35_16bit_i2c_regmap = {
1562 .name = "cs47l35_16bit",
1563 .reg_bits = 32,
1564 .val_bits = 16,
1565 .reg_format_endian = REGMAP_ENDIAN_BIG,
1566 .val_format_endian = REGMAP_ENDIAN_BIG,
1567
1568 .max_register = 0x1b00,
1569 .readable_reg = cs47l35_16bit_readable_register,
1570 .volatile_reg = cs47l35_16bit_volatile_register,
1571
1572 .cache_type = REGCACHE_RBTREE,
1573 .reg_defaults = cs47l35_reg_default,
1574 .num_reg_defaults = ARRAY_SIZE(cs47l35_reg_default),
1575};
1576EXPORT_SYMBOL_GPL(cs47l35_16bit_i2c_regmap);
1577
1578const struct regmap_config cs47l35_32bit_spi_regmap = {
1579 .name = "cs47l35_32bit",
1580 .reg_bits = 32,
1581 .reg_stride = 2,
1582 .pad_bits = 16,
1583 .val_bits = 32,
1584 .reg_format_endian = REGMAP_ENDIAN_BIG,
1585 .val_format_endian = REGMAP_ENDIAN_BIG,
1586
1587 .max_register = MADERA_DSP3_SCRATCH_2,
1588 .readable_reg = cs47l35_32bit_readable_register,
1589 .volatile_reg = cs47l35_32bit_volatile_register,
1590
1591 .cache_type = REGCACHE_RBTREE,
1592};
1593EXPORT_SYMBOL_GPL(cs47l35_32bit_spi_regmap);
1594
1595const struct regmap_config cs47l35_32bit_i2c_regmap = {
1596 .name = "cs47l35_32bit",
1597 .reg_bits = 32,
1598 .reg_stride = 2,
1599 .val_bits = 32,
1600 .reg_format_endian = REGMAP_ENDIAN_BIG,
1601 .val_format_endian = REGMAP_ENDIAN_BIG,
1602
1603 .max_register = MADERA_DSP3_SCRATCH_2,
1604 .readable_reg = cs47l35_32bit_readable_register,
1605 .volatile_reg = cs47l35_32bit_volatile_register,
1606
1607 .cache_type = REGCACHE_RBTREE,
1608};
1609EXPORT_SYMBOL_GPL(cs47l35_32bit_i2c_regmap);
diff --git a/drivers/mfd/cs47l85-tables.c b/drivers/mfd/cs47l85-tables.c
new file mode 100644
index 000000000000..43803145d8e5
--- /dev/null
+++ b/drivers/mfd/cs47l85-tables.c
@@ -0,0 +1,3009 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Regmap tables for CS47L85 codec
4 *
5 * Copyright (C) 2015-2017 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/device.h>
13#include <linux/module.h>
14#include <linux/regmap.h>
15
16#include <linux/mfd/madera/core.h>
17#include <linux/mfd/madera/registers.h>
18
19#include "madera.h"
20
21static const struct reg_sequence cs47l85_reva_16_patch[] = {
22 { 0x80, 0x0003 },
23 { 0x213, 0x03E4 },
24 { 0x177, 0x0281 },
25 { 0x197, 0x0281 },
26 { 0x1B7, 0x0281 },
27 { 0x4B1, 0x010A },
28 { 0x4CF, 0x0933 },
29 { 0x36C, 0x011B },
30 { 0x4B8, 0x1120 },
31 { 0x4A0, 0x3280 },
32 { 0x4A1, 0x3200 },
33 { 0x4A2, 0x3200 },
34 { 0x441, 0xC050 },
35 { 0x4A4, 0x000B },
36 { 0x4A5, 0x000B },
37 { 0x4A6, 0x000B },
38 { 0x4E2, 0x1E1D },
39 { 0x4E3, 0x1E1D },
40 { 0x4E4, 0x1E1D },
41 { 0x293, 0x0080 },
42 { 0x17D, 0x0303 },
43 { 0x19D, 0x0303 },
44 { 0x27E, 0x0000 },
45 { 0x80, 0x0000 },
46 { 0x80, 0x0000 },
47 { 0x448, 0x003f },
48};
49
50static const struct reg_sequence cs47l85_revc_16_patch[] = {
51 { 0x27E, 0x0000 },
52 { 0x2C2, 0x0005 },
53 { 0x448, 0x003f },
54};
55
56static const struct reg_sequence cs47l85_reva_32_patch[] = {
57 { 0x3000, 0xC2253632 },
58 { 0x3002, 0xC2300001 },
59 { 0x3004, 0x8225100E },
60 { 0x3006, 0x22251803 },
61 { 0x3008, 0x82310B00 },
62 { 0x300A, 0xE231023B },
63 { 0x300C, 0x02313B01 },
64 { 0x300E, 0x62300000 },
65 { 0x3010, 0xE2314288 },
66 { 0x3012, 0x02310B00 },
67 { 0x3014, 0x02310B00 },
68 { 0x3016, 0x04050100 },
69 { 0x3018, 0x42310C02 },
70 { 0x301A, 0xE2310227 },
71 { 0x301C, 0x02313B01 },
72 { 0x301E, 0xE2314266 },
73 { 0x3020, 0xE2315294 },
74 { 0x3022, 0x02310B00 },
75 { 0x3024, 0x02310B00 },
76 { 0x3026, 0x02251100 },
77 { 0x3028, 0x02251401 },
78 { 0x302A, 0x02250200 },
79 { 0x302C, 0x02251001 },
80 { 0x302E, 0x02250200 },
81 { 0x3030, 0xE2310266 },
82 { 0x3032, 0x82314B15 },
83 { 0x3034, 0x82310B15 },
84 { 0x3036, 0xE2315294 },
85 { 0x3038, 0x02310B00 },
86 { 0x303A, 0x8225160D },
87 { 0x303C, 0x0225F501 },
88 { 0x303E, 0x8225061C },
89 { 0x3040, 0x02251000 },
90 { 0x3042, 0x04051101 },
91 { 0x3044, 0x02251800 },
92 { 0x3046, 0x42251203 },
93 { 0x3048, 0x02251101 },
94 { 0x304A, 0xC2251300 },
95 { 0x304C, 0x2225FB02 },
96 { 0x3050, 0xC2263632 },
97 { 0x3052, 0xC2300001 },
98 { 0x3054, 0x8226100E },
99 { 0x3056, 0x22261803 },
100 { 0x3058, 0x82310B02 },
101 { 0x305A, 0xE231023B },
102 { 0x305C, 0x02313B01 },
103 { 0x305E, 0x62300000 },
104 { 0x3060, 0xE2314288 },
105 { 0x3062, 0x02310B00 },
106 { 0x3064, 0x02310B00 },
107 { 0x3066, 0x04050000 },
108 { 0x3068, 0x42310C03 },
109 { 0x306A, 0xE2310227 },
110 { 0x306C, 0x02313B01 },
111 { 0x306E, 0xE2314266 },
112 { 0x3070, 0xE2315294 },
113 { 0x3072, 0x02310B00 },
114 { 0x3074, 0x02310B00 },
115 { 0x3076, 0x02261100 },
116 { 0x3078, 0x02261401 },
117 { 0x307A, 0x02260200 },
118 { 0x307C, 0x02261001 },
119 { 0x307E, 0x02260200 },
120 { 0x3080, 0xE2310266 },
121 { 0x3082, 0x82314B17 },
122 { 0x3084, 0x82310B17 },
123 { 0x3086, 0xE2315294 },
124 { 0x3088, 0x02310B00 },
125 { 0x308A, 0x8226160D },
126 { 0x308C, 0x0226F501 },
127 { 0x308E, 0x8226061C },
128 { 0x3090, 0x02261000 },
129 { 0x3092, 0x04051101 },
130 { 0x3094, 0x02261800 },
131 { 0x3096, 0x42261203 },
132 { 0x3098, 0x02261101 },
133 { 0x309A, 0xC2261300 },
134 { 0x309C, 0x2226FB02 },
135 { 0x309E, 0x0000F000 },
136 { 0x30A0, 0xC2273632 },
137 { 0x30A2, 0xC2400001 },
138 { 0x30A4, 0x8227100E },
139 { 0x30A6, 0x22271803 },
140 { 0x30A8, 0x82410B00 },
141 { 0x30AA, 0xE241023B },
142 { 0x30AC, 0x02413B01 },
143 { 0x30AE, 0x62400000 },
144 { 0x30B0, 0xE2414288 },
145 { 0x30B2, 0x02410B00 },
146 { 0x30B4, 0x02410B00 },
147 { 0x30B6, 0x04050300 },
148 { 0x30B8, 0x42410C02 },
149 { 0x30BA, 0xE2410227 },
150 { 0x30BC, 0x02413B01 },
151 { 0x30BE, 0xE2414266 },
152 { 0x30C0, 0xE2415294 },
153 { 0x30C2, 0x02410B00 },
154 { 0x30C4, 0x02410B00 },
155 { 0x30C6, 0x02271100 },
156 { 0x30C8, 0x02271401 },
157 { 0x30CA, 0x02270200 },
158 { 0x30CC, 0x02271001 },
159 { 0x30CE, 0x02270200 },
160 { 0x30D0, 0xE2410266 },
161 { 0x30D2, 0x82414B15 },
162 { 0x30D4, 0x82410B15 },
163 { 0x30D6, 0xE2415294 },
164 { 0x30D8, 0x02410B00 },
165 { 0x30DA, 0x8227160D },
166 { 0x30DC, 0x0227F501 },
167 { 0x30DE, 0x8227061C },
168 { 0x30E0, 0x02271000 },
169 { 0x30E2, 0x04051101 },
170 { 0x30E4, 0x02271800 },
171 { 0x30E6, 0x42271203 },
172 { 0x30E8, 0x02271101 },
173 { 0x30EA, 0xC2271300 },
174 { 0x30EC, 0x2227FB02 },
175 { 0x30F0, 0xC2283632 },
176 { 0x30F2, 0xC2400001 },
177 { 0x30F4, 0x8228100E },
178 { 0x30F6, 0x22281803 },
179 { 0x30F8, 0x82410B02 },
180 { 0x30FA, 0xE241023B },
181 { 0x30FC, 0x02413B01 },
182 { 0x30FE, 0x62400000 },
183 { 0x3100, 0xE2414288 },
184 { 0x3102, 0x02410B00 },
185 { 0x3104, 0x02410B00 },
186 { 0x3106, 0x04050200 },
187 { 0x3108, 0x42410C03 },
188 { 0x310A, 0xE2410227 },
189 { 0x310C, 0x02413B01 },
190 { 0x310E, 0xE2414266 },
191 { 0x3110, 0xE2415294 },
192 { 0x3112, 0x02410B00 },
193 { 0x3114, 0x02410B00 },
194 { 0x3116, 0x02281100 },
195 { 0x3118, 0x02281401 },
196 { 0x311A, 0x02280200 },
197 { 0x311C, 0x02281001 },
198 { 0x311E, 0x02280200 },
199 { 0x3120, 0xE2410266 },
200 { 0x3122, 0x82414B17 },
201 { 0x3124, 0x82410B17 },
202 { 0x3126, 0xE2415294 },
203 { 0x3128, 0x02410B00 },
204 { 0x312A, 0x8228160D },
205 { 0x312C, 0x0228F501 },
206 { 0x312E, 0x8228061C },
207 { 0x3130, 0x02281000 },
208 { 0x3132, 0x04051101 },
209 { 0x3134, 0x02281800 },
210 { 0x3136, 0x42281203 },
211 { 0x3138, 0x02281101 },
212 { 0x313A, 0xC2281300 },
213 { 0x313C, 0x2228FB02 },
214 { 0x3140, 0xC2293632 },
215 { 0x3142, 0xC2500001 },
216 { 0x3144, 0x8229100E },
217 { 0x3146, 0x22291803 },
218 { 0x3148, 0x82510B00 },
219 { 0x314A, 0xE251023B },
220 { 0x314C, 0x02513B01 },
221 { 0x314E, 0x62500000 },
222 { 0x3150, 0xE2514288 },
223 { 0x3152, 0x02510B00 },
224 { 0x3154, 0x02510B00 },
225 { 0x3156, 0x04050500 },
226 { 0x3158, 0x42510C02 },
227 { 0x315A, 0xE2510227 },
228 { 0x315C, 0x02513B01 },
229 { 0x315E, 0xE2514266 },
230 { 0x3160, 0xE2515294 },
231 { 0x3162, 0x02510B00 },
232 { 0x3164, 0x02510B00 },
233 { 0x3166, 0x02291100 },
234 { 0x3168, 0x02291401 },
235 { 0x316A, 0x02290200 },
236 { 0x316C, 0x02291001 },
237 { 0x316E, 0x02290200 },
238 { 0x3170, 0xE2510266 },
239 { 0x3172, 0x82514B15 },
240 { 0x3174, 0x82510B15 },
241 { 0x3176, 0xE2515294 },
242 { 0x3178, 0x02510B00 },
243 { 0x317A, 0x8229160D },
244 { 0x317C, 0x0229F501 },
245 { 0x317E, 0x8229061C },
246 { 0x3180, 0x02291000 },
247 { 0x3182, 0x04051101 },
248 { 0x3184, 0x02291800 },
249 { 0x3186, 0x42291203 },
250 { 0x3188, 0x02291101 },
251 { 0x318A, 0xC2291300 },
252 { 0x318C, 0x2229FB02 },
253 { 0x3190, 0xC22A3632 },
254 { 0x3192, 0xC2500001 },
255 { 0x3194, 0x822A100E },
256 { 0x3196, 0x222A1803 },
257 { 0x3198, 0x82510B02 },
258 { 0x319A, 0xE251023B },
259 { 0x319C, 0x02513B01 },
260 { 0x319E, 0x62500000 },
261 { 0x31A0, 0xE2514288 },
262 { 0x31A2, 0x02510B00 },
263 { 0x31A4, 0x02510B00 },
264 { 0x31A6, 0x04050400 },
265 { 0x31A8, 0x42510C03 },
266 { 0x31AA, 0xE2510227 },
267 { 0x31AC, 0x02513B01 },
268 { 0x31AE, 0xE2514266 },
269 { 0x31B0, 0xE2515294 },
270 { 0x31B2, 0x02510B00 },
271 { 0x31B4, 0x02510B00 },
272 { 0x31B6, 0x022A1100 },
273 { 0x31B8, 0x022A1401 },
274 { 0x31BA, 0x022A0200 },
275 { 0x31BC, 0x022A1001 },
276 { 0x31BE, 0x022A0200 },
277 { 0x31C0, 0xE2510266 },
278 { 0x31C2, 0x82514B17 },
279 { 0x31C4, 0x82510B17 },
280 { 0x31C6, 0xE2515294 },
281 { 0x31C8, 0x02510B00 },
282 { 0x31CA, 0x822A160D },
283 { 0x31CC, 0x022AF501 },
284 { 0x31CE, 0x822A061C },
285 { 0x31D0, 0x022A1000 },
286 { 0x31D2, 0x04051101 },
287 { 0x31D4, 0x022A1800 },
288 { 0x31D6, 0x422A1203 },
289 { 0x31D8, 0x022A1101 },
290 { 0x31DA, 0xC22A1300 },
291 { 0x31DC, 0x222AFB02 },
292};
293
294static const struct reg_sequence cs47l85_revc_32_patch[] = {
295 { 0x3380, 0xE4103066 },
296 { 0x3382, 0xE4103070 },
297 { 0x3384, 0xE4103078 },
298 { 0x3386, 0xE4103080 },
299 { 0x3388, 0xE410F080 },
300 { 0x338A, 0xE4143066 },
301 { 0x338C, 0xE4143070 },
302 { 0x338E, 0xE4143078 },
303 { 0x3390, 0xE4143080 },
304 { 0x3392, 0xE414F080 },
305 { 0x3394, 0xE4103078 },
306 { 0x3396, 0xE4103070 },
307 { 0x3398, 0xE4103066 },
308 { 0x339A, 0xE410F056 },
309 { 0x339C, 0xE4143078 },
310 { 0x339E, 0xE4143070 },
311 { 0x33A0, 0xE4143066 },
312 { 0x33A2, 0xE414F056 },
313};
314
315int cs47l85_patch(struct madera *madera)
316{
317 int ret = 0;
318 const struct reg_sequence *patch16;
319 const struct reg_sequence *patch32;
320 unsigned int num16, num32;
321
322 switch (madera->rev) {
323 case 0:
324 case 1:
325 patch16 = cs47l85_reva_16_patch;
326 num16 = ARRAY_SIZE(cs47l85_reva_16_patch);
327
328 patch32 = cs47l85_reva_32_patch;
329 num32 = ARRAY_SIZE(cs47l85_reva_32_patch);
330 break;
331 default:
332 patch16 = cs47l85_revc_16_patch;
333 num16 = ARRAY_SIZE(cs47l85_revc_16_patch);
334
335 patch32 = cs47l85_revc_32_patch;
336 num32 = ARRAY_SIZE(cs47l85_revc_32_patch);
337 break;
338 }
339
340 ret = regmap_register_patch(madera->regmap, patch16, num16);
341 if (ret < 0) {
342 dev_err(madera->dev,
343 "Error in applying 16-bit patch: %d\n", ret);
344 return ret;
345 }
346
347 ret = regmap_register_patch(madera->regmap_32bit, patch32, num32);
348 if (ret < 0) {
349 dev_err(madera->dev,
350 "Error in applying 32-bit patch: %d\n", ret);
351 return ret;
352 }
353
354 return 0;
355}
356EXPORT_SYMBOL_GPL(cs47l85_patch);
357
358static const struct reg_default cs47l85_reg_default[] = {
359 { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */
360 { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */
361 { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */
362 { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */
363 { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */
364 { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */
365 { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */
366 { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */
367 { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */
368 { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */
369 { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */
370 { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */
371 { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1*/
372 { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2*/
373 { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */
374 { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */
375 { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */
376 { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */
377 { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */
378 { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */
379 { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */
380 { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */
381 { 0x000000a0, 0x0000 }, /* R160 (0xa0) - Comfort Noise Generator */
382 { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */
383 { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */
384 { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */
385 { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */
386 { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */
387 { 0x00000112, 0x0305 }, /* R274 (0x112) - Async clock 1 */
388 { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */
389 { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */
390 { 0x00000120, 0x0305 }, /* R288 (0x120) - DSP Clock 1 */
391 { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */
392 { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */
393 { 0x0000014a, 0x0000 }, /* R330 (0x14a) - Output async clock */
394 { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */
395 { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */
396 { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */
397 { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */
398 { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */
399 { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */
400 { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */
401 { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */
402 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */
403 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */
404 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */
405 { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */
406 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */
407 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */
408 { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */
409 { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */
410 { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */
411 { 0x00000185, 0x0000 }, /* R389 (0x185) - FLL1 Synchroniser 5 */
412 { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */
413 { 0x00000187, 0x0001 }, /* R391 (0x187) - FLL1 Synchroniser 7 */
414 { 0x00000189, 0x0000 }, /* R393 (0x189) - FLL1 Spread Spectrum */
415 { 0x0000018a, 0x000c }, /* R394 (0x18a) - FLL1 GPIO Clock */
416 { 0x00000191, 0x0002 }, /* R401 (0x191) - FLL2 Control 1 */
417 { 0x00000192, 0x0008 }, /* R402 (0x192) - FLL2 Control 2 */
418 { 0x00000193, 0x0018 }, /* R403 (0x193) - FLL2 Control 3 */
419 { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */
420 { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */
421 { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */
422 { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */
423 { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */
424 { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */
425 { 0x000001a2, 0x0000 }, /* R418 (0x1a2) - FLL2 Synchroniser 2 */
426 { 0x000001a3, 0x0000 }, /* R419 (0x1a3) - FLL2 Synchroniser 3 */
427 { 0x000001a4, 0x0000 }, /* R420 (0x1a4) - FLL2 Synchroniser 4 */
428 { 0x000001a5, 0x0000 }, /* R421 (0x1a5) - FLL2 Synchroniser 5 */
429 { 0x000001a6, 0x0000 }, /* R422 (0x1a6) - FLL2 Synchroniser 6 */
430 { 0x000001a7, 0x0001 }, /* R423 (0x1a7) - FLL2 Synchroniser 7 */
431 { 0x000001a9, 0x0000 }, /* R425 (0x1a9) - FLL2 Spread Spectrum */
432 { 0x000001aa, 0x000c }, /* R426 (0x1aa) - FLL2 GPIO Clock */
433 { 0x000001b1, 0x0002 }, /* R433 (0x1b1) - FLL3 Control 1 */
434 { 0x000001b2, 0x0008 }, /* R434 (0x1b2) - FLL3 Control 2 */
435 { 0x000001b3, 0x0018 }, /* R435 (0x1b3) - FLL3 Control 3 */
436 { 0x000001b4, 0x007d }, /* R436 (0x1b4) - FLL3 Control 4 */
437 { 0x000001b5, 0x0000 }, /* R437 (0x1b5) - FLL3 Control 5 */
438 { 0x000001b6, 0x0000 }, /* R438 (0x1b6) - FLL3 Control 6 */
439 { 0x000001b7, 0x0281 }, /* R439 (0x1b7) - FLL3 Loop Filter Test 1 */
440 { 0x000001b9, 0x0000 }, /* R441 (0x1b9) - FLL3 Control 7 */
441 { 0x000001c1, 0x0000 }, /* R449 (0x1c1) - FLL3 Synchroniser 1 */
442 { 0x000001c2, 0x0000 }, /* R450 (0x1c2) - FLL3 Synchroniser 2 */
443 { 0x000001c3, 0x0000 }, /* R451 (0x1c3) - FLL3 Synchroniser 3 */
444 { 0x000001c4, 0x0000 }, /* R452 (0x1c4) - FLL3 Synchroniser 4 */
445 { 0x000001c5, 0x0000 }, /* R453 (0x1c5) - FLL3 Synchroniser 5 */
446 { 0x000001c6, 0x0000 }, /* R454 (0x1c6) - FLL3 Synchroniser 6 */
447 { 0x000001c7, 0x0001 }, /* R455 (0x1c7) - FLL3 Synchroniser 7 */
448 { 0x000001c9, 0x0000 }, /* R457 (0x1c9) - FLL3 Spread Spectrum */
449 { 0x000001ca, 0x000C }, /* R458 (0x1ca) - FLL3 GPIO Clock */
450 { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */
451 { 0x0000020b, 0x0400 }, /* R523 (0x20B) - HP Charge Pump 8 */
452 { 0x00000210, 0x0184 }, /* R528 (0x210) - LDO1 Control 1 */
453 { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */
454 { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */
455 { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */
456 { 0x0000021a, 0x00e6 }, /* R538 (0x21a) - Mic Bias Ctrl 3 */
457 { 0x0000021b, 0x00e6 }, /* R539 (0x21b) - Mic Bias Ctrl 4 */
458 { 0x0000027e, 0x0000 }, /* R638 (0x27e) - EDRE HP stereo control */
459 { 0x00000293, 0x0000 }, /* R659 (0x293) - Accessory Detect Mode 1 */
460 { 0x0000029b, 0x0000 }, /* R667 (0x29b) - Headphone Detect 1 */
461 { 0x000002a3, 0x1102 }, /* R675 (0x2a3) - Mic Detect Control 1 */
462 { 0x000002a4, 0x009f }, /* R676 (0x2a4) - Mic Detect Control 2 */
463 { 0x000002a6, 0x3737 }, /* R678 (0x2a6) - Mic Detect Level 1 */
464 { 0x000002a7, 0x2c37 }, /* R679 (0x2a7) - Mic Detect Level 2 */
465 { 0x000002a8, 0x1422 }, /* R680 (0x2a8) - Mic Detect Level 3 */
466 { 0x000002a9, 0x030a }, /* R681 (0x2a9) - Mic Detect Level 4 */
467 { 0x000002c6, 0x0010 }, /* R710 (0x2c6) - Mic Clamp control */
468 { 0x000002c8, 0x0000 }, /* R712 (0x2c8) - GP switch 1 */
469 { 0x000002d3, 0x0000 }, /* R723 (0x2d3) - Jack detect analogue */
470 { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */
471 { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */
472 { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */
473 { 0x0000030c, 0x0002 }, /* R780 (0x30c) - HPF Control */
474 { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */
475 { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */
476 { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */
477 { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */
478 { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */
479 { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */
480 { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */
481 { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */
482 { 0x0000031a, 0x0500 }, /* R794 (0x31a) - DMIC2L Control */
483 { 0x0000031c, 0x0080 }, /* R796 (0x31c) - IN2R Control */
484 { 0x0000031d, 0x0180 }, /* R797 (0x31d) - ADC Digital Volume 2R */
485 { 0x0000031e, 0x0000 }, /* R798 (0x31e) - DMIC2R Control */
486 { 0x00000320, 0x0080 }, /* R800 (0x320) - IN3L Control */
487 { 0x00000321, 0x0180 }, /* R801 (0x321) - ADC Digital Volume 3L */
488 { 0x00000322, 0x0500 }, /* R802 (0x322) - DMIC3L Control */
489 { 0x00000324, 0x0080 }, /* R804 (0x324) - IN3R Control */
490 { 0x00000325, 0x0180 }, /* R805 (0x325) - ADC Digital Volume 3R */
491 { 0x00000326, 0x0000 }, /* R806 (0x326) - DMIC3R Control */
492 { 0x00000328, 0x0000 }, /* R808 (0x328) - IN4 Control */
493 { 0x00000329, 0x0180 }, /* R809 (0x329) - ADC Digital Volume 4L */
494 { 0x0000032a, 0x0500 }, /* R810 (0x32a) - DMIC4L Control */
495 { 0x0000032c, 0x0000 }, /* R812 (0x32c) - IN4R Control */
496 { 0x0000032d, 0x0180 }, /* R813 (0x32d) - ADC Digital Volume 4R */
497 { 0x0000032e, 0x0000 }, /* R814 (0x32e) - DMIC4R Control */
498 { 0x00000330, 0x0000 }, /* R816 (0x330) - IN5L Control */
499 { 0x00000331, 0x0180 }, /* R817 (0x331) - ADC Digital Volume 5L */
500 { 0x00000332, 0x0500 }, /* R818 (0x332) - DMIC5L Control */
501 { 0x00000334, 0x0000 }, /* R820 (0x334) - IN5R Control */
502 { 0x00000335, 0x0180 }, /* R821 (0x335) - ADC Digital Volume 5R */
503 { 0x00000336, 0x0000 }, /* R822 (0x336) - DMIC5R Control */
504 { 0x00000338, 0x0000 }, /* R824 (0x338) - IN6L Control */
505 { 0x00000339, 0x0180 }, /* R825 (0x339) - ADC Digital Volume 6L */
506 { 0x0000033a, 0x0500 }, /* R826 (0x33a) - DMIC6L Control */
507 { 0x0000033c, 0x0000 }, /* R828 (0x33c) - IN6R Control */
508 { 0x0000033d, 0x0180 }, /* R829 (0x33d) - ADC Digital Volume 6R */
509 { 0x0000033e, 0x0000 }, /* R830 (0x33e) - DMIC6R Control */
510 { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */
511 { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */
512 { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */
513 { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */
514 { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */
515 { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */
516 { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */
517 { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */
518 { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */
519 { 0x00000418, 0x0080 }, /* R1048 (0x418) - Output Path Config 2L */
520 { 0x00000419, 0x0180 }, /* R1049 (0x419) - DAC Digital Volume 2L */
521 { 0x0000041b, 0x0004 }, /* R1051 (0x41b) - Noise Gate Select 2L */
522 { 0x0000041c, 0x0080 }, /* R1052 (0x41c) - Output Path Config 2R */
523 { 0x0000041d, 0x0180 }, /* R1053 (0x41d) - DAC Digital Volume 2R */
524 { 0x0000041f, 0x0008 }, /* R1055 (0x41f) - Noise Gate Select 2R */
525 { 0x00000420, 0x0080 }, /* R1056 (0x420) - Output Path Config 3L */
526 { 0x00000421, 0x0180 }, /* R1057 (0x421) - DAC Digital Volume 3L */
527 { 0x00000423, 0x0010 }, /* R1059 (0x423) - Noise Gate Select 3L */
528 { 0x00000424, 0x0080 }, /* R1060 (0x424) - Output Path Config 3R */
529 { 0x00000425, 0x0180 }, /* R1061 (0x425) - DAC Digital Volume 3R */
530 { 0x00000427, 0x0020 }, /* R1063 (0x427) - Noise Gate Select 3R */
531 { 0x00000428, 0x0000 }, /* R1064 (0x428) - Output Path Config 4L */
532 { 0x00000429, 0x0180 }, /* R1065 (0x429) - DAC Digital Volume 4L */
533 { 0x0000042b, 0x0040 }, /* R1067 (0x42b) - Noise Gate Select 4L */
534 { 0x0000042c, 0x0000 }, /* R1068 (0x42c) - Output Path Config 4R */
535 { 0x0000042d, 0x0180 }, /* R1069 (0x42d) - DAC Digital Volume 4R */
536 { 0x0000042f, 0x0080 }, /* R1071 (0x42f) - Noise Gate Select 4R */
537 { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */
538 { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */
539 { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */
540 { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */
541 { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */
542 { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */
543 { 0x00000438, 0x0000 }, /* R1080 (0x438) - Output Path Config 6L */
544 { 0x00000439, 0x0180 }, /* R1081 (0x439) - DAC Digital Volume 6L */
545 { 0x0000043b, 0x0400 }, /* R1083 (0x43b) - Noise Gate Select 6L */
546 { 0x0000043c, 0x0000 }, /* R1084 (0x43c) - Output Path Config 6R */
547 { 0x0000043d, 0x0180 }, /* R1085 (0x43d) - DAC Digital Volume 6R */
548 { 0x0000043f, 0x0800 }, /* R1087 (0x43f) - Noise Gate Select 6R */
549 { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */
550 { 0x00000448, 0x003f }, /* R1096 (0x448) - EDRE Enable */
551 { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - EDRE Manual */
552 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */
553 { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */
554 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */
555 { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */
556 { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */
557 { 0x00000492, 0x0069 }, /* R1170 (0x492) - PDM SPK2 CTRL 1 */
558 { 0x00000493, 0x0000 }, /* R1171 (0x493) - PDM SPK2 CTRL 2 */
559 { 0x000004a0, 0x3210 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */
560 { 0x000004a1, 0x3200 }, /* R1185 (0x4a1) - HP2 Short Circuit Ctrl */
561 { 0x000004a2, 0x3200 }, /* R1186 (0x4a2) - HP3 Short Circuit Ctrl */
562 { 0x000004a8, 0x7020 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */
563 { 0x000004a9, 0x7020 }, /* R1193 (0x4a9) - HP Test Ctrl 6 */
564 { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */
565 { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */
566 { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */
567 { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */
568 { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */
569 { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */
570 { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */
571 { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */
572 { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */
573 { 0x0000050a, 0x0001 }, /* R1290 (0x50a) - AIF1 Frame Ctrl 4 */
574 { 0x0000050b, 0x0002 }, /* R1291 (0x50b) - AIF1 Frame Ctrl 5 */
575 { 0x0000050c, 0x0003 }, /* R1292 (0x50c) - AIF1 Frame Ctrl 6 */
576 { 0x0000050d, 0x0004 }, /* R1293 (0x50d) - AIF1 Frame Ctrl 7 */
577 { 0x0000050e, 0x0005 }, /* R1294 (0x50e) - AIF1 Frame Ctrl 8 */
578 { 0x0000050f, 0x0006 }, /* R1295 (0x50f) - AIF1 Frame Ctrl 9 */
579 { 0x00000510, 0x0007 }, /* R1296 (0x510) - AIF1 Frame Ctrl 10 */
580 { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */
581 { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */
582 { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */
583 { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */
584 { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */
585 { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */
586 { 0x00000517, 0x0006 }, /* R1303 (0x517) - AIF1 Frame Ctrl 17 */
587 { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */
588 { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */
589 { 0x0000051a, 0x0000 }, /* R1306 (0x51a) - AIF1 Rx Enables */
590 { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */
591 { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */
592 { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */
593 { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */
594 { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */
595 { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */
596 { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */
597 { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */
598 { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */
599 { 0x0000054a, 0x0001 }, /* R1354 (0x54a) - AIF2 Frame Ctrl 4 */
600 { 0x0000054b, 0x0002 }, /* R1355 (0x54b) - AIF2 Frame Ctrl 5 */
601 { 0x0000054c, 0x0003 }, /* R1356 (0x54c) - AIF2 Frame Ctrl 6 */
602 { 0x0000054d, 0x0004 }, /* R1357 (0x54d) - AIF2 Frame Ctrl 7 */
603 { 0x0000054e, 0x0005 }, /* R1358 (0x54e) - AIF2 Frame Ctrl 8 */
604 { 0x0000054f, 0x0006 }, /* R1359 (0x54f) - AIF2 Frame Ctrl 9 */
605 { 0x00000550, 0x0007 }, /* R1360 (0x550) - AIF2 Frame Ctrl 10 */
606 { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */
607 { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */
608 { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */
609 { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */
610 { 0x00000555, 0x0004 }, /* R1365 (0x555) - AIF2 Frame Ctrl 15 */
611 { 0x00000556, 0x0005 }, /* R1366 (0x556) - AIF2 Frame Ctrl 16 */
612 { 0x00000557, 0x0006 }, /* R1367 (0x557) - AIF2 Frame Ctrl 17 */
613 { 0x00000558, 0x0007 }, /* R1368 (0x558) - AIF2 Frame Ctrl 18 */
614 { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */
615 { 0x0000055a, 0x0000 }, /* R1370 (0x55a) - AIF2 Rx Enables */
616 { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */
617 { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */
618 { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */
619 { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */
620 { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */
621 { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */
622 { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */
623 { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */
624 { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */
625 { 0x0000058a, 0x0001 }, /* R1418 (0x58a) - AIF3 Frame Ctrl 4 */
626 { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */
627 { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */
628 { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */
629 { 0x0000059a, 0x0000 }, /* R1434 (0x59a) - AIF3 Rx Enables */
630 { 0x000005a0, 0x000c }, /* R1440 (0x5a0) - AIF4 BCLK Ctrl */
631 { 0x000005a1, 0x0000 }, /* R1441 (0x5a1) - AIF4 Tx Pin Ctrl */
632 { 0x000005a2, 0x0000 }, /* R1442 (0x5a2) - AIF4 Rx Pin Ctrl */
633 { 0x000005a3, 0x0000 }, /* R1443 (0x5a3) - AIF4 Rate Ctrl */
634 { 0x000005a4, 0x0000 }, /* R1444 (0x5a4) - AIF4 Format */
635 { 0x000005a6, 0x0040 }, /* R1446 (0x5a6) - AIF4 Rx BCLK Rate */
636 { 0x000005a7, 0x1818 }, /* R1447 (0x5a7) - AIF4 Frame Ctrl 1 */
637 { 0x000005a8, 0x1818 }, /* R1448 (0x5a8) - AIF4 Frame Ctrl 2 */
638 { 0x000005a9, 0x0000 }, /* R1449 (0x5a9) - AIF4 Frame Ctrl 3 */
639 { 0x000005aa, 0x0001 }, /* R1450 (0x5aa) - AIF4 Frame Ctrl 4 */
640 { 0x000005b1, 0x0000 }, /* R1457 (0x5b1) - AIF4 Frame Ctrl 11 */
641 { 0x000005b2, 0x0001 }, /* R1458 (0x5b2) - AIF4 Frame Ctrl 12 */
642 { 0x000005b9, 0x0000 }, /* R1465 (0x5b9) - AIF4 Tx Enables */
643 { 0x000005ba, 0x0000 }, /* R1466 (0x5ba) - AIF4 Rx Enables */
644 { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */
645 { 0x000005e3, 0x0000 }, /* R1507 (0x5e3) - SLIMbus Framer Ref Gear */
646 { 0x000005e5, 0x0000 }, /* R1509 (0x5e5) - SLIMbus Rates 1 */
647 { 0x000005e6, 0x0000 }, /* R1510 (0x5e6) - SLIMbus Rates 2 */
648 { 0x000005e7, 0x0000 }, /* R1511 (0x5e7) - SLIMbus Rates 3 */
649 { 0x000005e8, 0x0000 }, /* R1512 (0x5e8) - SLIMbus Rates 4 */
650 { 0x000005e9, 0x0000 }, /* R1513 (0x5e9) - SLIMbus Rates 5 */
651 { 0x000005ea, 0x0000 }, /* R1514 (0x5ea) - SLIMbus Rates 6 */
652 { 0x000005eb, 0x0000 }, /* R1515 (0x5eb) - SLIMbus Rates 7 */
653 { 0x000005ec, 0x0000 }, /* R1516 (0x5ec) - SLIMbus Rates 8 */
654 { 0x000005f5, 0x0000 }, /* R1525 (0x5f5) - SLIMbus RX Channel Enable */
655 { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */
656 { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */
657 { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */
658 { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */
659 { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */
660 { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */
661 { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */
662 { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */
663 { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */
664 { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */
665 { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */
666 { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */
667 { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */
668 { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */
669 { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */
670 { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */
671 { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */
672 { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */
673 { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */
674 { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */
675 { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */
676 { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */
677 { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */
678 { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */
679 { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */
680 { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */
681 { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */
682 { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */
683 { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */
684 { 0x0000068c, 0x0000 }, /* R1672 (0x68c) - OUT1RMIX Input 3 Source */
685 { 0x0000068d, 0x0080 }, /* R1673 (0x68d) - OUT1RMIX Input 3 Volume */
686 { 0x0000068e, 0x0000 }, /* R1674 (0x68e) - OUT1RMIX Input 4 Source */
687 { 0x0000068f, 0x0080 }, /* R1675 (0x68f) - OUT1RMIX Input 4 Volume */
688 { 0x00000690, 0x0000 }, /* R1680 (0x690) - OUT2LMIX Input 1 Source */
689 { 0x00000691, 0x0080 }, /* R1681 (0x691) - OUT2LMIX Input 1 Volume */
690 { 0x00000692, 0x0000 }, /* R1682 (0x692) - OUT2LMIX Input 2 Source */
691 { 0x00000693, 0x0080 }, /* R1683 (0x693) - OUT2LMIX Input 2 Volume */
692 { 0x00000694, 0x0000 }, /* R1684 (0x694) - OUT2LMIX Input 3 Source */
693 { 0x00000695, 0x0080 }, /* R1685 (0x695) - OUT2LMIX Input 3 Volume */
694 { 0x00000696, 0x0000 }, /* R1686 (0x696) - OUT2LMIX Input 4 Source */
695 { 0x00000697, 0x0080 }, /* R1687 (0x697) - OUT2LMIX Input 4 Volume */
696 { 0x00000698, 0x0000 }, /* R1688 (0x698) - OUT2RMIX Input 1 Source */
697 { 0x00000699, 0x0080 }, /* R1689 (0x699) - OUT2RMIX Input 1 Volume */
698 { 0x0000069a, 0x0000 }, /* R1690 (0x69a) - OUT2RMIX Input 2 Source */
699 { 0x0000069b, 0x0080 }, /* R1691 (0x69b) - OUT2RMIX Input 2 Volume */
700 { 0x0000069c, 0x0000 }, /* R1692 (0x69c) - OUT2RMIX Input 3 Source */
701 { 0x0000069d, 0x0080 }, /* R1693 (0x69d) - OUT2RMIX Input 3 Volume */
702 { 0x0000069e, 0x0000 }, /* R1694 (0x69e) - OUT2RMIX Input 4 Source */
703 { 0x0000069f, 0x0080 }, /* R1695 (0x69f) - OUT2RMIX Input 4 Volume */
704 { 0x000006a0, 0x0000 }, /* R1696 (0x6a0) - OUT3LMIX Input 1 Source */
705 { 0x000006a1, 0x0080 }, /* R1697 (0x6a1) - OUT3LMIX Input 1 Volume */
706 { 0x000006a2, 0x0000 }, /* R1698 (0x6a2) - OUT3LMIX Input 2 Source */
707 { 0x000006a3, 0x0080 }, /* R1699 (0x6a3) - OUT3LMIX Input 2 Volume */
708 { 0x000006a4, 0x0000 }, /* R1700 (0x6a4) - OUT3LMIX Input 3 Source */
709 { 0x000006a5, 0x0080 }, /* R1701 (0x6a5) - OUT3LMIX Input 3 Volume */
710 { 0x000006a6, 0x0000 }, /* R1702 (0x6a6) - OUT3LMIX Input 4 Source */
711 { 0x000006a7, 0x0080 }, /* R1703 (0x6a7) - OUT3LMIX Input 4 Volume */
712 { 0x000006a8, 0x0000 }, /* R1704 (0x6a8) - OUT3RMIX Input 1 Source */
713 { 0x000006a9, 0x0080 }, /* R1705 (0x6a9) - OUT3RMIX Input 1 Volume */
714 { 0x000006aa, 0x0000 }, /* R1706 (0x6aa) - OUT3RMIX Input 2 Source */
715 { 0x000006ab, 0x0080 }, /* R1707 (0x6ab) - OUT3RMIX Input 2 Volume */
716 { 0x000006ac, 0x0000 }, /* R1708 (0x6ac) - OUT3RMIX Input 3 Source */
717 { 0x000006ad, 0x0080 }, /* R1709 (0x6ad) - OUT3RMIX Input 3 Volume */
718 { 0x000006ae, 0x0000 }, /* R1710 (0x6ae) - OUT3RMIX Input 4 Source */
719 { 0x000006af, 0x0080 }, /* R1711 (0x6af) - OUT3RMIX Input 4 Volume */
720 { 0x000006b0, 0x0000 }, /* R1712 (0x6b0) - OUT4LMIX Input 1 Source */
721 { 0x000006b1, 0x0080 }, /* R1713 (0x6b1) - OUT4LMIX Input 1 Volume */
722 { 0x000006b2, 0x0000 }, /* R1714 (0x6b2) - OUT4LMIX Input 2 Source */
723 { 0x000006b3, 0x0080 }, /* R1715 (0x6b3) - OUT4LMIX Input 2 Volume */
724 { 0x000006b4, 0x0000 }, /* R1716 (0x6b4) - OUT4LMIX Input 3 Source */
725 { 0x000006b5, 0x0080 }, /* R1717 (0x6b5) - OUT4LMIX Input 3 Volume */
726 { 0x000006b6, 0x0000 }, /* R1718 (0x6b6) - OUT4LMIX Input 4 Source */
727 { 0x000006b7, 0x0080 }, /* R1719 (0x6b7) - OUT4LMIX Input 4 Volume */
728 { 0x000006b8, 0x0000 }, /* R1720 (0x6b8) - OUT4RMIX Input 1 Source */
729 { 0x000006b9, 0x0080 }, /* R1721 (0x6b9) - OUT4RMIX Input 1 Volume */
730 { 0x000006ba, 0x0000 }, /* R1722 (0x6ba) - OUT4RMIX Input 2 Source */
731 { 0x000006bb, 0x0080 }, /* R1723 (0x6bb) - OUT4RMIX Input 2 Volume */
732 { 0x000006bc, 0x0000 }, /* R1724 (0x6bc) - OUT4RMIX Input 3 Source */
733 { 0x000006bd, 0x0080 }, /* R1725 (0x6bd) - OUT4RMIX Input 3 Volume */
734 { 0x000006be, 0x0000 }, /* R1726 (0x6be) - OUT4RMIX Input 4 Source */
735 { 0x000006bf, 0x0080 }, /* R1727 (0x6bf) - OUT4RMIX Input 4 Volume */
736 { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */
737 { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */
738 { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */
739 { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */
740 { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */
741 { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */
742 { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */
743 { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */
744 { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */
745 { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */
746 { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */
747 { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */
748 { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */
749 { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */
750 { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */
751 { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */
752 { 0x000006d0, 0x0000 }, /* R1744 (0x6d0) - OUT6LMIX Input 1 Source */
753 { 0x000006d1, 0x0080 }, /* R1745 (0x6d1) - OUT6LMIX Input 1 Volume */
754 { 0x000006d2, 0x0000 }, /* R1746 (0x6d2) - OUT6LMIX Input 2 Source */
755 { 0x000006d3, 0x0080 }, /* R1747 (0x6d3) - OUT6LMIX Input 2 Volume */
756 { 0x000006d4, 0x0000 }, /* R1748 (0x6d4) - OUT6LMIX Input 3 Source */
757 { 0x000006d5, 0x0080 }, /* R1749 (0x6d5) - OUT6LMIX Input 3 Volume */
758 { 0x000006d6, 0x0000 }, /* R1750 (0x6d6) - OUT6LMIX Input 4 Source */
759 { 0x000006d7, 0x0080 }, /* R1751 (0x6d7) - OUT6LMIX Input 4 Volume */
760 { 0x000006d8, 0x0000 }, /* R1752 (0x6d8) - OUT6RMIX Input 1 Source */
761 { 0x000006d9, 0x0080 }, /* R1753 (0x6d9) - OUT6RMIX Input 1 Volume */
762 { 0x000006da, 0x0000 }, /* R1754 (0x6da) - OUT6RMIX Input 2 Source */
763 { 0x000006db, 0x0080 }, /* R1755 (0x6db) - OUT6RMIX Input 2 Volume */
764 { 0x000006dc, 0x0000 }, /* R1756 (0x6dc) - OUT6RMIX Input 3 Source */
765 { 0x000006dd, 0x0080 }, /* R1757 (0x6dd) - OUT6RMIX Input 3 Volume */
766 { 0x000006de, 0x0000 }, /* R1758 (0x6de) - OUT6RMIX Input 4 Source */
767 { 0x000006df, 0x0080 }, /* R1759 (0x6df) - OUT6RMIX Input 4 Volume */
768 { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */
769 { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */
770 { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */
771 { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */
772 { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */
773 { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */
774 { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */
775 { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */
776 { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */
777 { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */
778 { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */
779 { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */
780 { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */
781 { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */
782 { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */
783 { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */
784 { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */
785 { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */
786 { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */
787 { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */
788 { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */
789 { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */
790 { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */
791 { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */
792 { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */
793 { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */
794 { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */
795 { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */
796 { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */
797 { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */
798 { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */
799 { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */
800 { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */
801 { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */
802 { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */
803 { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */
804 { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */
805 { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */
806 { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */
807 { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */
808 { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */
809 { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */
810 { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */
811 { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */
812 { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */
813 { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */
814 { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */
815 { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */
816 { 0x00000730, 0x0000 }, /* R1840 (0x730) - AIF1TX7MIX Input 1 Source */
817 { 0x00000731, 0x0080 }, /* R1841 (0x731) - AIF1TX7MIX Input 1 Volume */
818 { 0x00000732, 0x0000 }, /* R1842 (0x732) - AIF1TX7MIX Input 2 Source */
819 { 0x00000733, 0x0080 }, /* R1843 (0x733) - AIF1TX7MIX Input 2 Volume */
820 { 0x00000734, 0x0000 }, /* R1844 (0x734) - AIF1TX7MIX Input 3 Source */
821 { 0x00000735, 0x0080 }, /* R1845 (0x735) - AIF1TX7MIX Input 3 Volume */
822 { 0x00000736, 0x0000 }, /* R1846 (0x736) - AIF1TX7MIX Input 4 Source */
823 { 0x00000737, 0x0080 }, /* R1847 (0x737) - AIF1TX7MIX Input 4 Volume */
824 { 0x00000738, 0x0000 }, /* R1848 (0x738) - AIF1TX8MIX Input 1 Source */
825 { 0x00000739, 0x0080 }, /* R1849 (0x739) - AIF1TX8MIX Input 1 Volume */
826 { 0x0000073a, 0x0000 }, /* R1850 (0x73a) - AIF1TX8MIX Input 2 Source */
827 { 0x0000073b, 0x0080 }, /* R1851 (0x73b) - AIF1TX8MIX Input 2 Volume */
828 { 0x0000073c, 0x0000 }, /* R1852 (0x73c) - AIF1TX8MIX Input 3 Source */
829 { 0x0000073d, 0x0080 }, /* R1853 (0x73d) - AIF1TX8MIX Input 3 Volume */
830 { 0x0000073e, 0x0000 }, /* R1854 (0x73e) - AIF1TX8MIX Input 4 Source */
831 { 0x0000073f, 0x0080 }, /* R1855 (0x73f) - AIF1TX8MIX Input 4 Volume */
832 { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */
833 { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */
834 { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */
835 { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */
836 { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */
837 { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */
838 { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */
839 { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */
840 { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */
841 { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */
842 { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */
843 { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */
844 { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */
845 { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */
846 { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */
847 { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */
848 { 0x00000750, 0x0000 }, /* R1872 (0x750) - AIF2TX3MIX Input 1 Source */
849 { 0x00000751, 0x0080 }, /* R1873 (0x751) - AIF2TX3MIX Input 1 Volume */
850 { 0x00000752, 0x0000 }, /* R1874 (0x752) - AIF2TX3MIX Input 2 Source */
851 { 0x00000753, 0x0080 }, /* R1875 (0x753) - AIF2TX3MIX Input 2 Volume */
852 { 0x00000754, 0x0000 }, /* R1876 (0x754) - AIF2TX3MIX Input 3 Source */
853 { 0x00000755, 0x0080 }, /* R1877 (0x755) - AIF2TX3MIX Input 3 Volume */
854 { 0x00000756, 0x0000 }, /* R1878 (0x756) - AIF2TX3MIX Input 4 Source */
855 { 0x00000757, 0x0080 }, /* R1879 (0x757) - AIF2TX3MIX Input 4 Volume */
856 { 0x00000758, 0x0000 }, /* R1880 (0x758) - AIF2TX4MIX Input 1 Source */
857 { 0x00000759, 0x0080 }, /* R1881 (0x759) - AIF2TX4MIX Input 1 Volume */
858 { 0x0000075a, 0x0000 }, /* R1882 (0x75a) - AIF2TX4MIX Input 2 Source */
859 { 0x0000075b, 0x0080 }, /* R1883 (0x75b) - AIF2TX4MIX Input 2 Volume */
860 { 0x0000075c, 0x0000 }, /* R1884 (0x75c) - AIF2TX4MIX Input 3 Source */
861 { 0x0000075d, 0x0080 }, /* R1885 (0x75d) - AIF2TX4MIX Input 3 Volume */
862 { 0x0000075e, 0x0000 }, /* R1886 (0x75e) - AIF2TX4MIX Input 4 Source */
863 { 0x0000075f, 0x0080 }, /* R1887 (0x75f) - AIF2TX4MIX Input 4 Volume */
864 { 0x00000760, 0x0000 }, /* R1888 (0x760) - AIF2TX5MIX Input 1 Source */
865 { 0x00000761, 0x0080 }, /* R1889 (0x761) - AIF2TX5MIX Input 1 Volume */
866 { 0x00000762, 0x0000 }, /* R1890 (0x762) - AIF2TX5MIX Input 2 Source */
867 { 0x00000763, 0x0080 }, /* R1891 (0x763) - AIF2TX5MIX Input 2 Volume */
868 { 0x00000764, 0x0000 }, /* R1892 (0x764) - AIF2TX5MIX Input 3 Source */
869 { 0x00000765, 0x0080 }, /* R1893 (0x765) - AIF2TX5MIX Input 3 Volume */
870 { 0x00000766, 0x0000 }, /* R1894 (0x766) - AIF2TX5MIX Input 4 Source */
871 { 0x00000767, 0x0080 }, /* R1895 (0x767) - AIF2TX5MIX Input 4 Volume */
872 { 0x00000768, 0x0000 }, /* R1896 (0x768) - AIF2TX6MIX Input 1 Source */
873 { 0x00000769, 0x0080 }, /* R1897 (0x769) - AIF2TX6MIX Input 1 Volume */
874 { 0x0000076a, 0x0000 }, /* R1898 (0x76a) - AIF2TX6MIX Input 2 Source */
875 { 0x0000076b, 0x0080 }, /* R1899 (0x76b) - AIF2TX6MIX Input 2 Volume */
876 { 0x0000076c, 0x0000 }, /* R1900 (0x76c) - AIF2TX6MIX Input 3 Source */
877 { 0x0000076d, 0x0080 }, /* R1901 (0x76d) - AIF2TX6MIX Input 3 Volume */
878 { 0x0000076e, 0x0000 }, /* R1902 (0x76e) - AIF2TX6MIX Input 4 Source */
879 { 0x0000076f, 0x0080 }, /* R1903 (0x76f) - AIF2TX6MIX Input 4 Volume */
880 { 0x00000770, 0x0000 }, /* R1904 (0x770) - AIF2TX7MIX Input 1 Source */
881 { 0x00000771, 0x0080 }, /* R1905 (0x771) - AIF2TX7MIX Input 1 Volume */
882 { 0x00000772, 0x0000 }, /* R1906 (0x772) - AIF2TX7MIX Input 2 Source */
883 { 0x00000773, 0x0080 }, /* R1907 (0x773) - AIF2TX7MIX Input 2 Volume */
884 { 0x00000774, 0x0000 }, /* R1908 (0x774) - AIF2TX7MIX Input 3 Source */
885 { 0x00000775, 0x0080 }, /* R1909 (0x775) - AIF2TX7MIX Input 3 Volume */
886 { 0x00000776, 0x0000 }, /* R1910 (0x776) - AIF2TX7MIX Input 4 Source */
887 { 0x00000777, 0x0080 }, /* R1911 (0x777) - AIF2TX7MIX Input 4 Volume */
888 { 0x00000778, 0x0000 }, /* R1912 (0x778) - AIF2TX8MIX Input 1 Source */
889 { 0x00000779, 0x0080 }, /* R1913 (0x779) - AIF2TX8MIX Input 1 Volume */
890 { 0x0000077a, 0x0000 }, /* R1914 (0x77a) - AIF2TX8MIX Input 2 Source */
891 { 0x0000077b, 0x0080 }, /* R1915 (0x77b) - AIF2TX8MIX Input 2 Volume */
892 { 0x0000077c, 0x0000 }, /* R1916 (0x77c) - AIF2TX8MIX Input 3 Source */
893 { 0x0000077d, 0x0080 }, /* R1917 (0x77d) - AIF2TX8MIX Input 3 Volume */
894 { 0x0000077e, 0x0000 }, /* R1918 (0x77e) - AIF2TX8MIX Input 4 Source */
895 { 0x0000077f, 0x0080 }, /* R1919 (0x77f) - AIF2TX8MIX Input 4 Volume */
896 { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */
897 { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */
898 { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */
899 { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */
900 { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */
901 { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */
902 { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */
903 { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */
904 { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */
905 { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */
906 { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */
907 { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */
908 { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */
909 { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */
910 { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */
911 { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */
912 { 0x000007a0, 0x0000 }, /* R1952 (0x7a0) - AIF4TX1MIX Input 1 Source */
913 { 0x000007a1, 0x0080 }, /* R1953 (0x7a1) - AIF4TX1MIX Input 1 Volume */
914 { 0x000007a2, 0x0000 }, /* R1954 (0x7a2) - AIF4TX1MIX Input 2 Source */
915 { 0x000007a3, 0x0080 }, /* R1955 (0x7a3) - AIF4TX1MIX Input 2 Volume */
916 { 0x000007a4, 0x0000 }, /* R1956 (0x7a4) - AIF4TX1MIX Input 3 Source */
917 { 0x000007a5, 0x0080 }, /* R1957 (0x7a5) - AIF4TX1MIX Input 3 Volume */
918 { 0x000007a6, 0x0000 }, /* R1958 (0x7a6) - AIF4TX1MIX Input 4 Source */
919 { 0x000007a7, 0x0080 }, /* R1959 (0x7a7) - AIF4TX1MIX Input 4 Volume */
920 { 0x000007a8, 0x0000 }, /* R1960 (0x7a8) - AIF4TX2MIX Input 1 Source */
921 { 0x000007a9, 0x0080 }, /* R1961 (0x7a9) - AIF4TX2MIX Input 1 Volume */
922 { 0x000007aa, 0x0000 }, /* R1962 (0x7aa) - AIF4TX2MIX Input 2 Source */
923 { 0x000007ab, 0x0080 }, /* R1963 (0x7ab) - AIF4TX2MIX Input 2 Volume */
924 { 0x000007ac, 0x0000 }, /* R1964 (0x7ac) - AIF4TX2MIX Input 3 Source */
925 { 0x000007ad, 0x0080 }, /* R1965 (0x7ad) - AIF4TX2MIX Input 3 Volume */
926 { 0x000007ae, 0x0000 }, /* R1966 (0x7ae) - AIF4TX2MIX Input 4 Source */
927 { 0x000007af, 0x0080 }, /* R1967 (0x7af) - AIF4TX2MIX Input 4 Volume */
928 { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */
929 { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */
930 { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */
931 { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */
932 { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */
933 { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */
934 { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */
935 { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */
936 { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */
937 { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */
938 { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */
939 { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */
940 { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */
941 { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */
942 { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */
943 { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */
944 { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */
945 { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */
946 { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */
947 { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */
948 { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */
949 { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */
950 { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */
951 { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */
952 { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */
953 { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */
954 { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */
955 { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */
956 { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */
957 { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */
958 { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */
959 { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */
960 { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */
961 { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */
962 { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */
963 { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */
964 { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */
965 { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */
966 { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */
967 { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */
968 { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */
969 { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */
970 { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */
971 { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */
972 { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */
973 { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */
974 { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */
975 { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */
976 { 0x000007f0, 0x0000 }, /* R2032 (0x7f0) - SLIMTX7MIX Input 1 Source */
977 { 0x000007f1, 0x0080 }, /* R2033 (0x7f1) - SLIMTX7MIX Input 1 Volume */
978 { 0x000007f2, 0x0000 }, /* R2034 (0x7f2) - SLIMTX7MIX Input 2 Source */
979 { 0x000007f3, 0x0080 }, /* R2035 (0x7f3) - SLIMTX7MIX Input 2 Volume */
980 { 0x000007f4, 0x0000 }, /* R2036 (0x7f4) - SLIMTX7MIX Input 3 Source */
981 { 0x000007f5, 0x0080 }, /* R2037 (0x7f5) - SLIMTX7MIX Input 3 Volume */
982 { 0x000007f6, 0x0000 }, /* R2038 (0x7f6) - SLIMTX7MIX Input 4 Source */
983 { 0x000007f7, 0x0080 }, /* R2039 (0x7f7) - SLIMTX7MIX Input 4 Volume */
984 { 0x000007f8, 0x0000 }, /* R2040 (0x7f8) - SLIMTX8MIX Input 1 Source */
985 { 0x000007f9, 0x0080 }, /* R2041 (0x7f9) - SLIMTX8MIX Input 1 Volume */
986 { 0x000007fa, 0x0000 }, /* R2042 (0x7fa) - SLIMTX8MIX Input 2 Source */
987 { 0x000007fb, 0x0080 }, /* R2043 (0x7fb) - SLIMTX8MIX Input 2 Volume */
988 { 0x000007fc, 0x0000 }, /* R2044 (0x7fc) - SLIMTX8MIX Input 3 Source */
989 { 0x000007fd, 0x0080 }, /* R2045 (0x7fd) - SLIMTX8MIX Input 3 Volume */
990 { 0x000007fe, 0x0000 }, /* R2046 (0x7fe) - SLIMTX8MIX Input 4 Source */
991 { 0x000007ff, 0x0080 }, /* R2047 (0x7ff) - SLIMTX8MIX Input 4 Volume */
992 { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source */
993 { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume */
994 { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source */
995 { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume */
996 { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */
997 { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */
998 { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */
999 { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */
1000 { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */
1001 { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */
1002 { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */
1003 { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */
1004 { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */
1005 { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */
1006 { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */
1007 { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */
1008 { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */
1009 { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */
1010 { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */
1011 { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */
1012 { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */
1013 { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */
1014 { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */
1015 { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */
1016 { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */
1017 { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */
1018 { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */
1019 { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */
1020 { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */
1021 { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */
1022 { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */
1023 { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */
1024 { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */
1025 { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */
1026 { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */
1027 { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */
1028 { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */
1029 { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */
1030 { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */
1031 { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */
1032 { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */
1033 { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */
1034 { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */
1035 { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */
1036 { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */
1037 { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */
1038 { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */
1039 { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */
1040 { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */
1041 { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */
1042 { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */
1043 { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */
1044 { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */
1045 { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */
1046 { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */
1047 { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */
1048 { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */
1049 { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */
1050 { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */
1051 { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */
1052 { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */
1053 { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */
1054 { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */
1055 { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */
1056 { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */
1057 { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */
1058 { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */
1059 { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */
1060 { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */
1061 { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */
1062 { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */
1063 { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */
1064 { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */
1065 { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */
1066 { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */
1067 { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */
1068 { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */
1069 { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */
1070 { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */
1071 { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */
1072 { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */
1073 { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */
1074 { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */
1075 { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */
1076 { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */
1077 { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */
1078 { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */
1079 { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */
1080 { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */
1081 { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */
1082 { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */
1083 { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */
1084 { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */
1085 { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */
1086 { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */
1087 { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */
1088 { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */
1089 { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */
1090 { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */
1091 { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */
1092 { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */
1093 { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */
1094 { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */
1095 { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */
1096 { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */
1097 { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */
1098 { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */
1099 { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */
1100 { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */
1101 { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */
1102 { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */
1103 { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */
1104 { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */
1105 { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */
1106 { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */
1107 { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */
1108 { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */
1109 { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */
1110 { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */
1111 { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */
1112 { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */
1113 { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */
1114 { 0x00000980, 0x0000 }, /* R2432 (0x980) - DSP2LMIX Input 1 Source */
1115 { 0x00000981, 0x0080 }, /* R2433 (0x981) - DSP2LMIX Input 1 Volume */
1116 { 0x00000982, 0x0000 }, /* R2434 (0x982) - DSP2LMIX Input 2 Source */
1117 { 0x00000983, 0x0080 }, /* R2435 (0x983) - DSP2LMIX Input 2 Volume */
1118 { 0x00000984, 0x0000 }, /* R2436 (0x984) - DSP2LMIX Input 3 Source */
1119 { 0x00000985, 0x0080 }, /* R2437 (0x985) - DSP2LMIX Input 3 Volume */
1120 { 0x00000986, 0x0000 }, /* R2438 (0x986) - DSP2LMIX Input 4 Source */
1121 { 0x00000987, 0x0080 }, /* R2439 (0x987) - DSP2LMIX Input 4 Volume */
1122 { 0x00000988, 0x0000 }, /* R2440 (0x988) - DSP2RMIX Input 1 Source */
1123 { 0x00000989, 0x0080 }, /* R2441 (0x989) - DSP2RMIX Input 1 Volume */
1124 { 0x0000098a, 0x0000 }, /* R2442 (0x98a) - DSP2RMIX Input 2 Source */
1125 { 0x0000098b, 0x0080 }, /* R2443 (0x98b) - DSP2RMIX Input 2 Volume */
1126 { 0x0000098c, 0x0000 }, /* R2444 (0x98c) - DSP2RMIX Input 3 Source */
1127 { 0x0000098d, 0x0080 }, /* R2445 (0x98d) - DSP2RMIX Input 3 Volume */
1128 { 0x0000098e, 0x0000 }, /* R2446 (0x98e) - DSP2RMIX Input 4 Source */
1129 { 0x0000098f, 0x0080 }, /* R2447 (0x98f) - DSP2RMIX Input 4 Volume */
1130 { 0x00000990, 0x0000 }, /* R2448 (0x990) - DSP2AUX1MIX Input 1 Source */
1131 { 0x00000998, 0x0000 }, /* R2456 (0x998) - DSP2AUX2MIX Input 1 Source */
1132 { 0x000009a0, 0x0000 }, /* R2464 (0x9a0) - DSP2AUX3MIX Input 1 Source */
1133 { 0x000009a8, 0x0000 }, /* R2472 (0x9a8) - DSP2AUX4MIX Input 1 Source */
1134 { 0x000009b0, 0x0000 }, /* R2480 (0x9b0) - DSP2AUX5MIX Input 1 Source */
1135 { 0x000009b8, 0x0000 }, /* R2488 (0x9b8) - DSP2AUX6MIX Input 1 Source */
1136 { 0x000009c0, 0x0000 }, /* R2496 (0x9c0) - DSP3LMIX Input 1 Source */
1137 { 0x000009c1, 0x0080 }, /* R2497 (0x9c1) - DSP3LMIX Input 1 Volume */
1138 { 0x000009c2, 0x0000 }, /* R2498 (0x9c2) - DSP3LMIX Input 2 Source */
1139 { 0x000009c3, 0x0080 }, /* R2499 (0x9c3) - DSP3LMIX Input 2 Volume */
1140 { 0x000009c4, 0x0000 }, /* R2500 (0x9c4) - DSP3LMIX Input 3 Source */
1141 { 0x000009c5, 0x0080 }, /* R2501 (0x9c5) - DSP3LMIX Input 3 Volume */
1142 { 0x000009c6, 0x0000 }, /* R2502 (0x9c6) - DSP3LMIX Input 4 Source */
1143 { 0x000009c7, 0x0080 }, /* R2503 (0x9c7) - DSP3LMIX Input 4 Volume */
1144 { 0x000009c8, 0x0000 }, /* R2504 (0x9c8) - DSP3RMIX Input 1 Source */
1145 { 0x000009c9, 0x0080 }, /* R2505 (0x9c9) - DSP3RMIX Input 1 Volume */
1146 { 0x000009ca, 0x0000 }, /* R2506 (0x9ca) - DSP3RMIX Input 2 Source */
1147 { 0x000009cb, 0x0080 }, /* R2507 (0x9cb) - DSP3RMIX Input 2 Volume */
1148 { 0x000009cc, 0x0000 }, /* R2508 (0x9cc) - DSP3RMIX Input 3 Source */
1149 { 0x000009cd, 0x0080 }, /* R2509 (0x9cd) - DSP3RMIX Input 3 Volume */
1150 { 0x000009ce, 0x0000 }, /* R2510 (0x9ce) - DSP3RMIX Input 4 Source */
1151 { 0x000009cf, 0x0080 }, /* R2511 (0x9cf) - DSP3RMIX Input 4 Volume */
1152 { 0x000009d0, 0x0000 }, /* R2512 (0x9d0) - DSP3AUX1MIX Input 1 Source */
1153 { 0x000009d8, 0x0000 }, /* R2520 (0x9d8) - DSP3AUX2MIX Input 1 Source */
1154 { 0x000009e0, 0x0000 }, /* R2528 (0x9e0) - DSP3AUX3MIX Input 1 Source */
1155 { 0x000009e8, 0x0000 }, /* R2536 (0x9e8) - DSP3AUX4MIX Input 1 Source */
1156 { 0x000009f0, 0x0000 }, /* R2544 (0x9f0) - DSP3AUX5MIX Input 1 Source */
1157 { 0x000009f8, 0x0000 }, /* R2552 (0x9f8) - DSP3AUX6MIX Input 1 Source */
1158 { 0x00000a00, 0x0000 }, /* R2560 (0xa00) - DSP4LMIX Input 1 Source */
1159 { 0x00000a01, 0x0080 }, /* R2561 (0xa01) - DSP4LMIX Input 1 Volume */
1160 { 0x00000a02, 0x0000 }, /* R2562 (0xa02) - DSP4LMIX Input 2 Source */
1161 { 0x00000a03, 0x0080 }, /* R2563 (0xa03) - DSP4LMIX Input 2 Volume */
1162 { 0x00000a04, 0x0000 }, /* R2564 (0xa04) - DSP4LMIX Input 3 Source */
1163 { 0x00000a05, 0x0080 }, /* R2565 (0xa05) - DSP4LMIX Input 3 Volume */
1164 { 0x00000a06, 0x0000 }, /* R2566 (0xa06) - DSP4LMIX Input 4 Source */
1165 { 0x00000a07, 0x0080 }, /* R2567 (0xa07) - DSP4LMIX Input 4 Volume */
1166 { 0x00000a08, 0x0000 }, /* R2568 (0xa08) - DSP4RMIX Input 1 Source */
1167 { 0x00000a09, 0x0080 }, /* R2569 (0xa09) - DSP4RMIX Input 1 Volume */
1168 { 0x00000a0a, 0x0000 }, /* R2570 (0xa0a) - DSP4RMIX Input 2 Source */
1169 { 0x00000a0b, 0x0080 }, /* R2571 (0xa0b) - DSP4RMIX Input 2 Volume */
1170 { 0x00000a0c, 0x0000 }, /* R2572 (0xa0c) - DSP4RMIX Input 3 Source */
1171 { 0x00000a0d, 0x0080 }, /* R2573 (0xa0d) - DSP4RMIX Input 3 Volume */
1172 { 0x00000a0e, 0x0000 }, /* R2574 (0xa0e) - DSP4RMIX Input 4 Source */
1173 { 0x00000a0f, 0x0080 }, /* R2575 (0xa0f) - DSP4RMIX Input 4 Volume */
1174 { 0x00000a10, 0x0000 }, /* R2576 (0xa10) - DSP4AUX1MIX Input 1 Source */
1175 { 0x00000a18, 0x0000 }, /* R2584 (0xa18) - DSP4AUX2MIX Input 1 Source */
1176 { 0x00000a20, 0x0000 }, /* R2592 (0xa20) - DSP4AUX3MIX Input 1 Source */
1177 { 0x00000a28, 0x0000 }, /* R2600 (0xa28) - DSP4AUX4MIX Input 1 Source */
1178 { 0x00000a30, 0x0000 }, /* R2608 (0xa30) - DSP4AUX5MIX Input 1 Source */
1179 { 0x00000a38, 0x0000 }, /* R2616 (0xa38) - DSP4AUX6MIX Input 1 Source */
1180 { 0x00000a40, 0x0000 }, /* R2624 (0xa40) - DSP5LMIX Input 1 Source */
1181 { 0x00000a41, 0x0080 }, /* R2625 (0xa41) - DSP5LMIX Input 1 Volume */
1182 { 0x00000a42, 0x0000 }, /* R2626 (0xa42) - DSP5LMIX Input 2 Source */
1183 { 0x00000a43, 0x0080 }, /* R2627 (0xa43) - DSP5LMIX Input 2 Volume */
1184 { 0x00000a44, 0x0000 }, /* R2628 (0xa44) - DSP5LMIX Input 3 Source */
1185 { 0x00000a45, 0x0080 }, /* R2629 (0xa45) - DSP5LMIX Input 3 Volume */
1186 { 0x00000a46, 0x0000 }, /* R2630 (0xa46) - DSP5LMIX Input 4 Source */
1187 { 0x00000a47, 0x0080 }, /* R2631 (0xa47) - DSP5LMIX Input 4 Volume */
1188 { 0x00000a48, 0x0000 }, /* R2632 (0xa48) - DSP5RMIX Input 1 Source */
1189 { 0x00000a49, 0x0080 }, /* R2633 (0xa49) - DSP5RMIX Input 1 Volume */
1190 { 0x00000a4a, 0x0000 }, /* R2634 (0xa4a) - DSP5RMIX Input 2 Source */
1191 { 0x00000a4b, 0x0080 }, /* R2635 (0xa4b) - DSP5RMIX Input 2 Volume */
1192 { 0x00000a4c, 0x0000 }, /* R2636 (0xa4c) - DSP5RMIX Input 3 Source */
1193 { 0x00000a4d, 0x0080 }, /* R2637 (0xa4d) - DSP5RMIX Input 3 Volume */
1194 { 0x00000a4e, 0x0000 }, /* R2638 (0xa4e) - DSP5RMIX Input 4 Source */
1195 { 0x00000a4f, 0x0080 }, /* R2639 (0xa4f) - DSP5RMIX Input 4 Volume */
1196 { 0x00000a50, 0x0000 }, /* R2640 (0xa50) - DSP5AUX1MIX Input 1 Source */
1197 { 0x00000a58, 0x0000 }, /* R2658 (0xa58) - DSP5AUX2MIX Input 1 Source */
1198 { 0x00000a60, 0x0000 }, /* R2656 (0xa60) - DSP5AUX3MIX Input 1 Source */
1199 { 0x00000a68, 0x0000 }, /* R2664 (0xa68) - DSP5AUX4MIX Input 1 Source */
1200 { 0x00000a70, 0x0000 }, /* R2672 (0xa70) - DSP5AUX5MIX Input 1 Source */
1201 { 0x00000a78, 0x0000 }, /* R2680 (0xa78) - DSP5AUX6MIX Input 1 Source */
1202 { 0x00000a80, 0x0000 }, /* R2688 (0xa80) - ASRC1_1LMIX Input 1 Source */
1203 { 0x00000a88, 0x0000 }, /* R2696 (0xa88) - ASRC1_1RMIX Input 1 Source */
1204 { 0x00000a90, 0x0000 }, /* R2704 (0xa90) - ASRC1_2LMIX Input 1 Source */
1205 { 0x00000a98, 0x0000 }, /* R2712 (0xa98) - ASRC1_2RMIX Input 1 Source */
1206 { 0x00000aa0, 0x0000 }, /* R2720 (0xaa0) - ASRC2_1LMIX Input 1 Source */
1207 { 0x00000aa8, 0x0000 }, /* R2728 (0xaa8) - ASRC2_1RMIX Input 1 Source */
1208 { 0x00000ab0, 0x0000 }, /* R2736 (0xab0) - ASRC2_2LMIX Input 1 Source */
1209 { 0x00000ab8, 0x0000 }, /* R2744 (0xab8) - ASRC2_2RMIX Input 1 Source */
1210 { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source*/
1211 { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source*/
1212 { 0x00000b10, 0x0000 }, /* R2832 (0xb10) - ISRC1DEC3MIX Input 1 Source*/
1213 { 0x00000b18, 0x0000 }, /* R2840 (0xb18) - ISRC1DEC4MIX Input 1 Source*/
1214 { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source*/
1215 { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source*/
1216 { 0x00000b30, 0x0000 }, /* R2864 (0xb30) - ISRC1INT3MIX Input 1 Source*/
1217 { 0x00000b38, 0x0000 }, /* R2872 (0xb38) - ISRC1INT4MIX Input 1 Source*/
1218 { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source*/
1219 { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source*/
1220 { 0x00000b50, 0x0000 }, /* R2896 (0xb50) - ISRC2DEC3MIX Input 1 Source*/
1221 { 0x00000b58, 0x0000 }, /* R2904 (0xb58) - ISRC2DEC4MIX Input 1 Source*/
1222 { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source*/
1223 { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source*/
1224 { 0x00000b70, 0x0000 }, /* R2928 (0xb70) - ISRC2INT3MIX Input 1 Source*/
1225 { 0x00000b78, 0x0000 }, /* R2936 (0xb78) - ISRC2INT4MIX Input 1 Source*/
1226 { 0x00000b80, 0x0000 }, /* R2944 (0xb80) - ISRC3DEC1MIX Input 1 Source*/
1227 { 0x00000b88, 0x0000 }, /* R2952 (0xb88) - ISRC3DEC2MIX Input 1 Source*/
1228 { 0x00000ba0, 0x0000 }, /* R2976 (0xb80) - ISRC3INT1MIX Input 1 Source*/
1229 { 0x00000ba8, 0x0000 }, /* R2984 (0xb88) - ISRC3INT2MIX Input 1 Source*/
1230 { 0x00000bc0, 0x0000 }, /* R3008 (0xbc0) - ISRC4DEC1MIX Input 1 Source */
1231 { 0x00000bc8, 0x0000 }, /* R3016 (0xbc8) - ISRC4DEC2MIX Input 1 Source */
1232 { 0x00000be0, 0x0000 }, /* R3040 (0xbe0) - ISRC4INT1MIX Input 1 Source */
1233 { 0x00000be8, 0x0000 }, /* R3048 (0xbe8) - ISRC4INT2MIX Input 1 Source */
1234 { 0x00000c00, 0x0000 }, /* R3072 (0xc00) - DSP6LMIX Input 1 Source */
1235 { 0x00000c01, 0x0080 }, /* R3073 (0xc01) - DSP6LMIX Input 1 Volume */
1236 { 0x00000c02, 0x0000 }, /* R3074 (0xc02) - DSP6LMIX Input 2 Source */
1237 { 0x00000c03, 0x0080 }, /* R3075 (0xc03) - DSP6LMIX Input 2 Volume */
1238 { 0x00000c04, 0x0000 }, /* R3076 (0xc04) - DSP6LMIX Input 3 Source */
1239 { 0x00000c05, 0x0080 }, /* R3077 (0xc05) - DSP6LMIX Input 3 Volume */
1240 { 0x00000c06, 0x0000 }, /* R3078 (0xc06) - DSP6LMIX Input 4 Source */
1241 { 0x00000c07, 0x0080 }, /* R3079 (0xc07) - DSP6LMIX Input 4 Volume */
1242 { 0x00000c08, 0x0000 }, /* R3080 (0xc08) - DSP6RMIX Input 1 Source */
1243 { 0x00000c09, 0x0080 }, /* R3081 (0xc09) - DSP6RMIX Input 1 Volume */
1244 { 0x00000c0a, 0x0000 }, /* R3082 (0xc0a) - DSP6RMIX Input 2 Source */
1245 { 0x00000c0b, 0x0080 }, /* R3083 (0xc0b) - DSP6RMIX Input 2 Volume */
1246 { 0x00000c0c, 0x0000 }, /* R3084 (0xc0c) - DSP6RMIX Input 3 Source */
1247 { 0x00000c0d, 0x0080 }, /* R3085 (0xc0d) - DSP6RMIX Input 3 Volume */
1248 { 0x00000c0e, 0x0000 }, /* R3086 (0xc0e) - DSP6RMIX Input 4 Source */
1249 { 0x00000c0f, 0x0080 }, /* R3087 (0xc0f) - DSP6RMIX Input 4 Volume */
1250 { 0x00000c10, 0x0000 }, /* R3088 (0xc10) - DSP6AUX1MIX Input 1 Source */
1251 { 0x00000c18, 0x0000 }, /* R3088 (0xc18) - DSP6AUX2MIX Input 1 Source */
1252 { 0x00000c20, 0x0000 }, /* R3088 (0xc20) - DSP6AUX3MIX Input 1 Source */
1253 { 0x00000c28, 0x0000 }, /* R3088 (0xc28) - DSP6AUX4MIX Input 1 Source */
1254 { 0x00000c30, 0x0000 }, /* R3088 (0xc30) - DSP6AUX5MIX Input 1 Source */
1255 { 0x00000c38, 0x0000 }, /* R3088 (0xc38) - DSP6AUX6MIX Input 1 Source */
1256 { 0x00000c40, 0x0000 }, /* R3136 (0xc40) - DSP7LMIX Input 1 Source */
1257 { 0x00000c41, 0x0080 }, /* R3137 (0xc41) - DSP7LMIX Input 1 Volume */
1258 { 0x00000c42, 0x0000 }, /* R3138 (0xc42) - DSP7LMIX Input 2 Source */
1259 { 0x00000c43, 0x0080 }, /* R3139 (0xc43) - DSP7LMIX Input 2 Volume */
1260 { 0x00000c44, 0x0000 }, /* R3140 (0xc44) - DSP7LMIX Input 3 Source */
1261 { 0x00000c45, 0x0080 }, /* R3141 (0xc45) - DSP7lMIX Input 3 Volume */
1262 { 0x00000c46, 0x0000 }, /* R3142 (0xc46) - DSP7lMIX Input 4 Source */
1263 { 0x00000c47, 0x0080 }, /* R3143 (0xc47) - DSP7LMIX Input 4 Volume */
1264 { 0x00000c48, 0x0000 }, /* R3144 (0xc48) - DSP7RMIX Input 1 Source */
1265 { 0x00000c49, 0x0080 }, /* R3145 (0xc49) - DSP7RMIX Input 1 Volume */
1266 { 0x00000c4a, 0x0000 }, /* R3146 (0xc4a) - DSP7RMIX Input 2 Source */
1267 { 0x00000c4b, 0x0080 }, /* R3147 (0xc4b) - DSP7RMIX Input 2 Volume */
1268 { 0x00000c4c, 0x0000 }, /* R3148 (0xc4c) - DSP7RMIX Input 3 Source */
1269 { 0x00000c4d, 0x0080 }, /* R3159 (0xc4d) - DSP7RMIX Input 3 Volume */
1270 { 0x00000c4e, 0x0000 }, /* R3150 (0xc4e) - DSP7RMIX Input 4 Source */
1271 { 0x00000c4f, 0x0080 }, /* R3151 (0xc4f) - DSP7RMIX Input 4 Volume */
1272 { 0x00000c50, 0x0000 }, /* R3152 (0xc50) - DSP7AUX1MIX Input 1 Source */
1273 { 0x00000c58, 0x0000 }, /* R3160 (0xc58) - DSP7AUX2MIX Input 1 Source */
1274 { 0x00000c60, 0x0000 }, /* R3168 (0xc60) - DSP7AUX3MIX Input 1 Source */
1275 { 0x00000c68, 0x0000 }, /* R3176 (0xc68) - DSP7AUX4MIX Input 1 Source */
1276 { 0x00000c70, 0x0000 }, /* R3184 (0xc70) - DSP7AUX5MIX Input 1 Source */
1277 { 0x00000c78, 0x0000 }, /* R3192 (0xc78) - DSP7AUX6MIX Input 1 Source */
1278 { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX Ctrl1 */
1279 { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1_1 */
1280 { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1_2 */
1281 { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1_3 */
1282 { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1_4 */
1283 { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1_5 */
1284 { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1_6 */
1285 { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1_7 */
1286 { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1_8 */
1287 { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1_9 */
1288 { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1_10 */
1289 { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1_11 */
1290 { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1_12 */
1291 { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1_13 */
1292 { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1_14 */
1293 { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1_15 */
1294 { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1_16 */
1295 { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1_17 */
1296 { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1_18 */
1297 { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1_19 */
1298 { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1_20 */
1299 { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1_21 */
1300 { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2_1 */
1301 { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2_2 */
1302 { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2_3 */
1303 { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2_4 */
1304 { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2_5 */
1305 { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2_6 */
1306 { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2_7 */
1307 { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2_8 */
1308 { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2_9 */
1309 { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2_10 */
1310 { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2_11 */
1311 { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2_12 */
1312 { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2_13 */
1313 { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2_14 */
1314 { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2_15 */
1315 { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2_16 */
1316 { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2_17 */
1317 { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2_18 */
1318 { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2_19 */
1319 { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2_20 */
1320 { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2_21 */
1321 { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3_1 */
1322 { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3_2 */
1323 { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3_3 */
1324 { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3_4 */
1325 { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3_5 */
1326 { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3_6 */
1327 { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3_7 */
1328 { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3_8 */
1329 { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3_9 */
1330 { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3_10 */
1331 { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3_11 */
1332 { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3_12 */
1333 { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3_13 */
1334 { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3_14 */
1335 { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3_15 */
1336 { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3_16 */
1337 { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3_17 */
1338 { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3_18 */
1339 { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3_19 */
1340 { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3_20 */
1341 { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3_21 */
1342 { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4_1 */
1343 { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4_2 */
1344 { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4_3 */
1345 { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4_4 */
1346 { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4_5 */
1347 { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4_6 */
1348 { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4_7 */
1349 { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4_8 */
1350 { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4_9 */
1351 { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4_10 */
1352 { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4_11 */
1353 { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4_12 */
1354 { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4_13 */
1355 { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4_14 */
1356 { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4_15 */
1357 { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4_16 */
1358 { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4_17 */
1359 { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4_18 */
1360 { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4_19 */
1361 { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4_20 */
1362 { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4_21 */
1363 { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 ctrl1 */
1364 { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 ctrl2 */
1365 { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */
1366 { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */
1367 { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */
1368 { 0x00000e88, 0x0933 }, /* R3720 (0xe88) - DRC2 ctrl1 */
1369 { 0x00000e89, 0x0018 }, /* R3721 (0xe89) - DRC2 ctrl2 */
1370 { 0x00000e8a, 0x0000 }, /* R3722 (0xe8a) - DRC2 ctrl3 */
1371 { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */
1372 { 0x00000e8c, 0x0040 }, /* R3724 (0xe8c) - DRC2 ctrl5 */
1373 { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */
1374 { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */
1375 { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */
1376 { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2_2 */
1377 { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3_1 */
1378 { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3_2 */
1379 { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4_1 */
1380 { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4_2 */
1381 { 0x00000ed0, 0x0000 }, /* R3792 (0xed0) - ASRC2_ENABLE */
1382 { 0x00000ed2, 0x0000 }, /* R3794 (0xed2) - ASRC2_RATE1 */
1383 { 0x00000ed3, 0x4000 }, /* R3795 (0xed3) - ASRC2_RATE2 */
1384 { 0x00000ee0, 0x0000 }, /* R3808 (0xee0) - ASRC1_ENABLE */
1385 { 0x00000ee2, 0x0000 }, /* R3810 (0xee2) - ASRC1_RATE1 */
1386 { 0x00000ee3, 0x4000 }, /* R3811 (0xee3) - ASRC1_RATE2 */
1387 { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC 1 CTRL 1 */
1388 { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC 1 CTRL 2 */
1389 { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC 1 CTRL 3 */
1390 { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */
1391 { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */
1392 { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */
1393 { 0x00000ef6, 0x0000 }, /* R3830 (0xef6) - ISRC 3 CTRL 1 */
1394 { 0x00000ef7, 0x0001 }, /* R3831 (0xef7) - ISRC 3 CTRL 2 */
1395 { 0x00000ef8, 0x0000 }, /* R3832 (0xef8) - ISRC 3 CTRL 3 */
1396 { 0x00000ef9, 0x0000 }, /* R3833 (0xef9) - ISRC 4 CTRL 1 */
1397 { 0x00000efa, 0x0001 }, /* R3834 (0xefa) - ISRC 4 CTRL 2 */
1398 { 0x00000efb, 0x0000 }, /* R3835 (0xefb) - ISRC 4 CTRL 3 */
1399 { 0x00000f01, 0x0000 }, /* R3841 (0xf01) - ANC_SRC */
1400 { 0x00000f02, 0x0000 }, /* R3842 (0xf02) - DSP Status */
1401 { 0x00000f08, 0x001c }, /* R3848 (0xf08) - ANC Coefficient */
1402 { 0x00000f09, 0x0000 }, /* R3849 (0xf09) - ANC Coefficient */
1403 { 0x00000f0a, 0x0000 }, /* R3850 (0xf0a) - ANC Coefficient */
1404 { 0x00000f0b, 0x0000 }, /* R3851 (0xf0b) - ANC Coefficient */
1405 { 0x00000f0c, 0x0000 }, /* R3852 (0xf0c) - ANC Coefficient */
1406 { 0x00000f0d, 0x0000 }, /* R3853 (0xf0d) - ANC Coefficient */
1407 { 0x00000f0e, 0x0000 }, /* R3854 (0xf0e) - ANC Coefficient */
1408 { 0x00000f0f, 0x0000 }, /* R3855 (0xf0f) - ANC Coefficient */
1409 { 0x00000f10, 0x0000 }, /* R3856 (0xf10) - ANC Coefficient */
1410 { 0x00000f11, 0x0000 }, /* R3857 (0xf11) - ANC Coefficient */
1411 { 0x00000f12, 0x0000 }, /* R3858 (0xf12) - ANC Coefficient */
1412 { 0x00000f15, 0x0000 }, /* R3861 (0xf15) - FCL Filter Control */
1413 { 0x00000f17, 0x0004 }, /* R3863 (0xf17) - FCL ADC Reformatter Control */
1414 { 0x00000f18, 0x0004 }, /* R3864 (0xf18) - ANC Coefficient */
1415 { 0x00000f19, 0x0002 }, /* R3865 (0xf19) - ANC Coefficient */
1416 { 0x00000f1a, 0x0000 }, /* R3866 (0xf1a) - ANC Coefficient */
1417 { 0x00000f1b, 0x0010 }, /* R3867 (0xf1b) - ANC Coefficient */
1418 { 0x00000f1c, 0x0000 }, /* R3868 (0xf1c) - ANC Coefficient */
1419 { 0x00000f1d, 0x0000 }, /* R3869 (0xf1d) - ANC Coefficient */
1420 { 0x00000f1e, 0x0000 }, /* R3870 (0xf1e) - ANC Coefficient */
1421 { 0x00000f1f, 0x0000 }, /* R3871 (0xf1f) - ANC Coefficient */
1422 { 0x00000f20, 0x0000 }, /* R3872 (0xf20) - ANC Coefficient */
1423 { 0x00000f21, 0x0000 }, /* R3873 (0xf21) - ANC Coefficient */
1424 { 0x00000f22, 0x0000 }, /* R3874 (0xf22) - ANC Coefficient */
1425 { 0x00000f23, 0x0000 }, /* R3875 (0xf23) - ANC Coefficient */
1426 { 0x00000f24, 0x0000 }, /* R3876 (0xf24) - ANC Coefficient */
1427 { 0x00000f25, 0x0000 }, /* R3877 (0xf25) - ANC Coefficient */
1428 { 0x00000f26, 0x0000 }, /* R3878 (0xf26) - ANC Coefficient */
1429 { 0x00000f27, 0x0000 }, /* R3879 (0xf27) - ANC Coefficient */
1430 { 0x00000f28, 0x0000 }, /* R3880 (0xf28) - ANC Coefficient */
1431 { 0x00000f29, 0x0000 }, /* R3881 (0xf29) - ANC Coefficient */
1432 { 0x00000f2a, 0x0000 }, /* R3882 (0xf2a) - ANC Coefficient */
1433 { 0x00000f2b, 0x0000 }, /* R3883 (0xf2b) - ANC Coefficient */
1434 { 0x00000f2c, 0x0000 }, /* R3884 (0xf2c) - ANC Coefficient */
1435 { 0x00000f2d, 0x0000 }, /* R3885 (0xf2d) - ANC Coefficient */
1436 { 0x00000f2e, 0x0000 }, /* R3886 (0xf2e) - ANC Coefficient */
1437 { 0x00000f2f, 0x0000 }, /* R3887 (0xf2f) - ANC Coefficient */
1438 { 0x00000f30, 0x0000 }, /* R3888 (0xf30) - ANC Coefficient */
1439 { 0x00000f31, 0x0000 }, /* R3889 (0xf31) - ANC Coefficient */
1440 { 0x00000f32, 0x0000 }, /* R3890 (0xf32) - ANC Coefficient */
1441 { 0x00000f33, 0x0000 }, /* R3891 (0xf33) - ANC Coefficient */
1442 { 0x00000f34, 0x0000 }, /* R3892 (0xf34) - ANC Coefficient */
1443 { 0x00000f35, 0x0000 }, /* R3893 (0xf35) - ANC Coefficient */
1444 { 0x00000f36, 0x0000 }, /* R3894 (0xf36) - ANC Coefficient */
1445 { 0x00000f37, 0x0000 }, /* R3895 (0xf37) - ANC Coefficient */
1446 { 0x00000f38, 0x0000 }, /* R3896 (0xf38) - ANC Coefficient */
1447 { 0x00000f39, 0x0000 }, /* R3897 (0xf39) - ANC Coefficient */
1448 { 0x00000f3a, 0x0000 }, /* R3898 (0xf3a) - ANC Coefficient */
1449 { 0x00000f3b, 0x0000 }, /* R3899 (0xf3b) - ANC Coefficient */
1450 { 0x00000f3c, 0x0000 }, /* R3900 (0xf3c) - ANC Coefficient */
1451 { 0x00000f3d, 0x0000 }, /* R3901 (0xf3d) - ANC Coefficient */
1452 { 0x00000f3e, 0x0000 }, /* R3902 (0xf3e) - ANC Coefficient */
1453 { 0x00000f3f, 0x0000 }, /* R3903 (0xf3f) - ANC Coefficient */
1454 { 0x00000f40, 0x0000 }, /* R3904 (0xf40) - ANC Coefficient */
1455 { 0x00000f41, 0x0000 }, /* R3905 (0xf41) - ANC Coefficient */
1456 { 0x00000f42, 0x0000 }, /* R3906 (0xf42) - ANC Coefficient */
1457 { 0x00000f43, 0x0000 }, /* R3907 (0xf43) - ANC Coefficient */
1458 { 0x00000f44, 0x0000 }, /* R3908 (0xf44) - ANC Coefficient */
1459 { 0x00000f45, 0x0000 }, /* R3909 (0xf45) - ANC Coefficient */
1460 { 0x00000f46, 0x0000 }, /* R3910 (0xf46) - ANC Coefficient */
1461 { 0x00000f47, 0x0000 }, /* R3911 (0xf47) - ANC Coefficient */
1462 { 0x00000f48, 0x0000 }, /* R3912 (0xf48) - ANC Coefficient */
1463 { 0x00000f49, 0x0000 }, /* R3913 (0xf49) - ANC Coefficient */
1464 { 0x00000f4a, 0x0000 }, /* R3914 (0xf4a) - ANC Coefficient */
1465 { 0x00000f4b, 0x0000 }, /* R3915 (0xf4b) - ANC Coefficient */
1466 { 0x00000f4c, 0x0000 }, /* R3916 (0xf4c) - ANC Coefficient */
1467 { 0x00000f4d, 0x0000 }, /* R3917 (0xf4d) - ANC Coefficient */
1468 { 0x00000f4e, 0x0000 }, /* R3918 (0xf4e) - ANC Coefficient */
1469 { 0x00000f4f, 0x0000 }, /* R3919 (0xf4f) - ANC Coefficient */
1470 { 0x00000f50, 0x0000 }, /* R3920 (0xf50) - ANC Coefficient */
1471 { 0x00000f51, 0x0000 }, /* R3921 (0xf51) - ANC Coefficient */
1472 { 0x00000f52, 0x0000 }, /* R3922 (0xf52) - ANC Coefficient */
1473 { 0x00000f53, 0x0000 }, /* R3923 (0xf53) - ANC Coefficient */
1474 { 0x00000f54, 0x0000 }, /* R3924 (0xf54) - ANC Coefficient */
1475 { 0x00000f55, 0x0000 }, /* R3925 (0xf55) - ANC Coefficient */
1476 { 0x00000f56, 0x0000 }, /* R3926 (0xf56) - ANC Coefficient */
1477 { 0x00000f57, 0x0000 }, /* R3927 (0xf57) - ANC Coefficient */
1478 { 0x00000f58, 0x0000 }, /* R3928 (0xf58) - ANC Coefficient */
1479 { 0x00000f59, 0x0000 }, /* R3929 (0xf59) - ANC Coefficient */
1480 { 0x00000f5a, 0x0000 }, /* R3930 (0xf5a) - ANC Coefficient */
1481 { 0x00000f5b, 0x0000 }, /* R3931 (0xf5b) - ANC Coefficient */
1482 { 0x00000f5c, 0x0000 }, /* R3932 (0xf5c) - ANC Coefficient */
1483 { 0x00000f5d, 0x0000 }, /* R3933 (0xf5d) - ANC Coefficient */
1484 { 0x00000f5e, 0x0000 }, /* R3934 (0xf5e) - ANC Coefficient */
1485 { 0x00000f5f, 0x0000 }, /* R3935 (0xf5f) - ANC Coefficient */
1486 { 0x00000f60, 0x0000 }, /* R3936 (0xf60) - ANC Coefficient */
1487 { 0x00000f61, 0x0000 }, /* R3937 (0xf61) - ANC Coefficient */
1488 { 0x00000f62, 0x0000 }, /* R3938 (0xf62) - ANC Coefficient */
1489 { 0x00000f63, 0x0000 }, /* R3939 (0xf63) - ANC Coefficient */
1490 { 0x00000f64, 0x0000 }, /* R3940 (0xf64) - ANC Coefficient */
1491 { 0x00000f65, 0x0000 }, /* R3941 (0xf65) - ANC Coefficient */
1492 { 0x00000f66, 0x0000 }, /* R3942 (0xf66) - ANC Coefficient */
1493 { 0x00000f67, 0x0000 }, /* R3943 (0xf67) - ANC Coefficient */
1494 { 0x00000f68, 0x0000 }, /* R3944 (0xf68) - ANC Coefficient */
1495 { 0x00000f69, 0x0000 }, /* R3945 (0xf69) - ANC Coefficient */
1496 { 0x00000f71, 0x0000 }, /* R3953 (0xf71) - FCR Filter Control */
1497 { 0x00000f73, 0x0004 }, /* R3955 (0xf73) - FCR ADC Reformatter Control */
1498 { 0x00000f74, 0x0004 }, /* R3956 (0xf74) - ANC Coefficient */
1499 { 0x00000f75, 0x0002 }, /* R3957 (0xf75) - ANC Coefficient */
1500 { 0x00000f76, 0x0000 }, /* R3958 (0xf76) - ANC Coefficient */
1501 { 0x00000f77, 0x0010 }, /* R3959 (0xf77) - ANC Coefficient */
1502 { 0x00000f78, 0x0000 }, /* R3960 (0xf78) - ANC Coefficient */
1503 { 0x00000f79, 0x0000 }, /* R3961 (0xf79) - ANC Coefficient */
1504 { 0x00000f7a, 0x0000 }, /* R3962 (0xf7a) - ANC Coefficient */
1505 { 0x00000f7b, 0x0000 }, /* R3963 (0xf7b) - ANC Coefficient */
1506 { 0x00000f7c, 0x0000 }, /* R3964 (0xf7c) - ANC Coefficient */
1507 { 0x00000f7d, 0x0000 }, /* R3965 (0xf7d) - ANC Coefficient */
1508 { 0x00000f7e, 0x0000 }, /* R3966 (0xf7e) - ANC Coefficient */
1509 { 0x00000f7f, 0x0000 }, /* R3967 (0xf7f) - ANC Coefficient */
1510 { 0x00000f80, 0x0000 }, /* R3968 (0xf80) - ANC Coefficient */
1511 { 0x00000f81, 0x0000 }, /* R3969 (0xf81) - ANC Coefficient */
1512 { 0x00000f82, 0x0000 }, /* R3970 (0xf82) - ANC Coefficient */
1513 { 0x00000f83, 0x0000 }, /* R3971 (0xf83) - ANC Coefficient */
1514 { 0x00000f84, 0x0000 }, /* R3972 (0xf84) - ANC Coefficient */
1515 { 0x00000f85, 0x0000 }, /* R3973 (0xf85) - ANC Coefficient */
1516 { 0x00000f86, 0x0000 }, /* R3974 (0xf86) - ANC Coefficient */
1517 { 0x00000f87, 0x0000 }, /* R3975 (0xf87) - ANC Coefficient */
1518 { 0x00000f88, 0x0000 }, /* R3976 (0xf88) - ANC Coefficient */
1519 { 0x00000f89, 0x0000 }, /* R3977 (0xf89) - ANC Coefficient */
1520 { 0x00000f8a, 0x0000 }, /* R3978 (0xf8a) - ANC Coefficient */
1521 { 0x00000f8b, 0x0000 }, /* R3979 (0xf8b) - ANC Coefficient */
1522 { 0x00000f8c, 0x0000 }, /* R3980 (0xf8c) - ANC Coefficient */
1523 { 0x00000f8d, 0x0000 }, /* R3981 (0xf8d) - ANC Coefficient */
1524 { 0x00000f8e, 0x0000 }, /* R3982 (0xf8e) - ANC Coefficient */
1525 { 0x00000f8f, 0x0000 }, /* R3983 (0xf8f) - ANC Coefficient */
1526 { 0x00000f90, 0x0000 }, /* R3984 (0xf90) - ANC Coefficient */
1527 { 0x00000f91, 0x0000 }, /* R3985 (0xf91) - ANC Coefficient */
1528 { 0x00000f92, 0x0000 }, /* R3986 (0xf92) - ANC Coefficient */
1529 { 0x00000f93, 0x0000 }, /* R3987 (0xf93) - ANC Coefficient */
1530 { 0x00000f94, 0x0000 }, /* R3988 (0xf94) - ANC Coefficient */
1531 { 0x00000f95, 0x0000 }, /* R3989 (0xf95) - ANC Coefficient */
1532 { 0x00000f96, 0x0000 }, /* R3990 (0xf96) - ANC Coefficient */
1533 { 0x00000f97, 0x0000 }, /* R3991 (0xf97) - ANC Coefficient */
1534 { 0x00000f98, 0x0000 }, /* R3992 (0xf98) - ANC Coefficient */
1535 { 0x00000f99, 0x0000 }, /* R3993 (0xf99) - ANC Coefficient */
1536 { 0x00000f9a, 0x0000 }, /* R3994 (0xf9a) - ANC Coefficient */
1537 { 0x00000f9b, 0x0000 }, /* R3995 (0xf9b) - ANC Coefficient */
1538 { 0x00000f9c, 0x0000 }, /* R3996 (0xf9c) - ANC Coefficient */
1539 { 0x00000f9d, 0x0000 }, /* R3997 (0xf9d) - ANC Coefficient */
1540 { 0x00000f9e, 0x0000 }, /* R3998 (0xf9e) - ANC Coefficient */
1541 { 0x00000f9f, 0x0000 }, /* R3999 (0xf9f) - ANC Coefficient */
1542 { 0x00000fa0, 0x0000 }, /* R4000 (0xfa0) - ANC Coefficient */
1543 { 0x00000fa1, 0x0000 }, /* R4001 (0xfa1) - ANC Coefficient */
1544 { 0x00000fa2, 0x0000 }, /* R4002 (0xfa2) - ANC Coefficient */
1545 { 0x00000fa3, 0x0000 }, /* R4003 (0xfa3) - ANC Coefficient */
1546 { 0x00000fa4, 0x0000 }, /* R4004 (0xfa4) - ANC Coefficient */
1547 { 0x00000fa5, 0x0000 }, /* R4005 (0xfa5) - ANC Coefficient */
1548 { 0x00000fa6, 0x0000 }, /* R4006 (0xfa6) - ANC Coefficient */
1549 { 0x00000fa7, 0x0000 }, /* R4007 (0xfa7) - ANC Coefficient */
1550 { 0x00000fa8, 0x0000 }, /* R4008 (0xfa8) - ANC Coefficient */
1551 { 0x00000fa9, 0x0000 }, /* R4009 (0xfa9) - ANC Coefficient */
1552 { 0x00000faa, 0x0000 }, /* R4010 (0xfaa) - ANC Coefficient */
1553 { 0x00000fab, 0x0000 }, /* R4011 (0xfab) - ANC Coefficient */
1554 { 0x00000fac, 0x0000 }, /* R4012 (0xfac) - ANC Coefficient */
1555 { 0x00000fad, 0x0000 }, /* R4013 (0xfad) - ANC Coefficient */
1556 { 0x00000fae, 0x0000 }, /* R4014 (0xfae) - ANC Coefficient */
1557 { 0x00000faf, 0x0000 }, /* R4015 (0xfaf) - ANC Coefficient */
1558 { 0x00000fb0, 0x0000 }, /* R4016 (0xfb0) - ANC Coefficient */
1559 { 0x00000fb1, 0x0000 }, /* R4017 (0xfb1) - ANC Coefficient */
1560 { 0x00000fb2, 0x0000 }, /* R4018 (0xfb2) - ANC Coefficient */
1561 { 0x00000fb3, 0x0000 }, /* R4019 (0xfb3) - ANC Coefficient */
1562 { 0x00000fb4, 0x0000 }, /* R4020 (0xfb4) - ANC Coefficient */
1563 { 0x00000fb5, 0x0000 }, /* R4021 (0xfb5) - ANC Coefficient */
1564 { 0x00000fb6, 0x0000 }, /* R4022 (0xfb6) - ANC Coefficient */
1565 { 0x00000fb7, 0x0000 }, /* R4023 (0xfb7) - ANC Coefficient */
1566 { 0x00000fb8, 0x0000 }, /* R4024 (0xfb8) - ANC Coefficient */
1567 { 0x00000fb9, 0x0000 }, /* R4025 (0xfb9) - ANC Coefficient */
1568 { 0x00000fba, 0x0000 }, /* R4026 (0xfba) - ANC Coefficient */
1569 { 0x00000fbb, 0x0000 }, /* R4027 (0xfbb) - ANC Coefficient */
1570 { 0x00000fbc, 0x0000 }, /* R4028 (0xfbc) - ANC Coefficient */
1571 { 0x00000fbd, 0x0000 }, /* R4029 (0xfbd) - ANC Coefficient */
1572 { 0x00000fbe, 0x0000 }, /* R4030 (0xfbe) - ANC Coefficient */
1573 { 0x00000fbf, 0x0000 }, /* R4031 (0xfbf) - ANC Coefficient */
1574 { 0x00000fc0, 0x0000 }, /* R4032 (0xfc0) - ANC Coefficient */
1575 { 0x00000fc1, 0x0000 }, /* R4033 (0xfc1) - ANC Coefficient */
1576 { 0x00000fc2, 0x0000 }, /* R4034 (0xfc2) - ANC Coefficient */
1577 { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */
1578 { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */
1579 { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */
1580 { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */
1581 { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */
1582 { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */
1583 { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */
1584 { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */
1585 { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */
1586 { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */
1587 { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */
1588 { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */
1589 { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */
1590 { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 2L 1 */
1591 { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 2L 2 */
1592 { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 2L 3 */
1593 { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 2L 4 */
1594 { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 2R 1 */
1595 { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 2R 2 */
1596 { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 2R 3 */
1597 { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 2R 4 */
1598 { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 3L 1 */
1599 { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 3L 2 */
1600 { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 3L 3 */
1601 { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 3L 4 */
1602 { 0x000013d0, 0x0000 }, /* R5072 (0x13d0) - FRF Coefficient 3R 1 */
1603 { 0x000013d1, 0x0000 }, /* R5073 (0x13d1) - FRF Coefficient 3R 2 */
1604 { 0x000013d2, 0x0000 }, /* R5074 (0x13d2) - FRF Coefficient 3R 3 */
1605 { 0x000013d3, 0x0000 }, /* R5075 (0x13d3) - FRF Coefficient 3R 4 */
1606 { 0x000013e0, 0x0000 }, /* R5088 (0x13e0) - FRF Coefficient 4L 1 */
1607 { 0x000013e1, 0x0000 }, /* R5089 (0x13e1) - FRF Coefficient 4L 2 */
1608 { 0x000013e2, 0x0000 }, /* R5090 (0x13e2) - FRF Coefficient 4L 3 */
1609 { 0x000013e3, 0x0000 }, /* R5091 (0x13e3) - FRF Coefficient 4L 4 */
1610 { 0x000013f0, 0x0000 }, /* R5104 (0x13f0) - FRF Coefficient 4R 1 */
1611 { 0x000013f1, 0x0000 }, /* R5105 (0x13f1) - FRF Coefficient 4R 2 */
1612 { 0x000013f2, 0x0000 }, /* R5106 (0x13f2) - FRF Coefficient 4R 3 */
1613 { 0x000013f3, 0x0000 }, /* R5107 (0x13f3) - FRF Coefficient 4R 4 */
1614 { 0x00001400, 0x0000 }, /* R5120 (0x1400) - FRF Coefficient 5L 1 */
1615 { 0x00001401, 0x0000 }, /* R5121 (0x1401) - FRF Coefficient 5L 2 */
1616 { 0x00001402, 0x0000 }, /* R5122 (0x1402) - FRF Coefficient 5L 3 */
1617 { 0x00001403, 0x0000 }, /* R5123 (0x1403) - FRF Coefficient 5L 4 */
1618 { 0x00001410, 0x0000 }, /* R5136 (0x1410) - FRF Coefficient 5R 1 */
1619 { 0x00001411, 0x0000 }, /* R5137 (0x1411) - FRF Coefficient 5R 2 */
1620 { 0x00001412, 0x0000 }, /* R5138 (0x1412) - FRF Coefficient 5R 3 */
1621 { 0x00001413, 0x0000 }, /* R5139 (0x1413) - FRF Coefficient 5R 4 */
1622 { 0x00001420, 0x0000 }, /* R5152 (0x1420) - FRF Coefficient 6L 1 */
1623 { 0x00001421, 0x0000 }, /* R5153 (0x1421) - FRF Coefficient 6L 2 */
1624 { 0x00001422, 0x0000 }, /* R5154 (0x1422) - FRF Coefficient 6L 3 */
1625 { 0x00001423, 0x0000 }, /* R5155 (0x1423) - FRF Coefficient 6L 4 */
1626 { 0x00001430, 0x0000 }, /* R5168 (0x1430) - FRF Coefficient 6R 1 */
1627 { 0x00001431, 0x0000 }, /* R5169 (0x1431) - FRF Coefficient 6R 2 */
1628 { 0x00001432, 0x0000 }, /* R5170 (0x1432) - FRF Coefficient 6R 3 */
1629 { 0x00001433, 0x0000 }, /* R5171 (0x1433) - FRF Coefficient 6R 4 */
1630 { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */
1631 { 0x00001701, 0xe000 }, /* R5889 (0x1701) - GPIO1 Control 2 */
1632 { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */
1633 { 0x00001703, 0xe000 }, /* R5891 (0x1703) - GPIO2 Control 2 */
1634 { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */
1635 { 0x00001705, 0xe000 }, /* R5893 (0x1705) - GPIO3 Control 2 */
1636 { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */
1637 { 0x00001707, 0xe000 }, /* R5895 (0x1707) - GPIO4 Control 2 */
1638 { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */
1639 { 0x00001709, 0xe000 }, /* R5897 (0x1709) - GPIO5 Control 2 */
1640 { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */
1641 { 0x0000170b, 0xe000 }, /* R5899 (0x170b) - GPIO6 Control 2 */
1642 { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */
1643 { 0x0000170d, 0xe000 }, /* R5901 (0x170d) - GPIO7 Control 2 */
1644 { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */
1645 { 0x0000170f, 0xe000 }, /* R5903 (0x170f) - GPIO8 Control 2 */
1646 { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */
1647 { 0x00001711, 0xe000 }, /* R5905 (0x1711) - GPIO9 Control 2 */
1648 { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */
1649 { 0x00001713, 0xe000 }, /* R5907 (0x1713) - GPIO10 Control 2 */
1650 { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */
1651 { 0x00001715, 0xe000 }, /* R5909 (0x1715) - GPIO11 Control 2 */
1652 { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */
1653 { 0x00001717, 0xe000 }, /* R5911 (0x1717) - GPIO12 Control 2 */
1654 { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */
1655 { 0x00001719, 0xE000 }, /* R5913 (0x1719) - GPIO13 Control 2 */
1656 { 0x0000171a, 0x2001 }, /* R5914 (0x171a) - GPIO14 Control 1 */
1657 { 0x0000171b, 0xE000 }, /* R5915 (0x171b) - GPIO14 Control 2 */
1658 { 0x0000171c, 0x2001 }, /* R5916 (0x171c) - GPIO15 Control 1 */
1659 { 0x0000171d, 0xE000 }, /* R5917 (0x171d) - GPIO15 Control 2 */
1660 { 0x0000171e, 0x2001 }, /* R5918 (0x171e) - GPIO16 Control 1 */
1661 { 0x0000171f, 0xE000 }, /* R5919 (0x171f) - GPIO16 Control 2 */
1662 { 0x00001720, 0x2001 }, /* R5920 (0x1720) - GPIO17 Control 1 */
1663 { 0x00001721, 0xe000 }, /* R5921 (0x1721) - GPIO17 Control 2 */
1664 { 0x00001722, 0x2001 }, /* R5922 (0x1722) - GPIO18 Control 1 */
1665 { 0x00001723, 0xe000 }, /* R5923 (0x1723) - GPIO18 Control 2 */
1666 { 0x00001724, 0x2001 }, /* R5924 (0x1724) - GPIO19 Control 1 */
1667 { 0x00001725, 0xe000 }, /* R5925 (0x1725) - GPIO19 Control 2 */
1668 { 0x00001726, 0x2001 }, /* R5926 (0x1726) - GPIO20 Control 1 */
1669 { 0x00001727, 0xe000 }, /* R5927 (0x1727) - GPIO20 Control 2 */
1670 { 0x00001728, 0x2001 }, /* R5928 (0x1728) - GPIO21 Control 1 */
1671 { 0x00001729, 0xe000 }, /* R5929 (0x1729) - GPIO21 Control 2 */
1672 { 0x0000172a, 0x2001 }, /* R5930 (0x172a) - GPIO22 Control 1 */
1673 { 0x0000172b, 0xe000 }, /* R5931 (0x172b) - GPIO22 Control 2 */
1674 { 0x0000172c, 0x2001 }, /* R5932 (0x172c) - GPIO23 Control 1 */
1675 { 0x0000172d, 0xe000 }, /* R5933 (0x172d) - GPIO23 Control 2 */
1676 { 0x0000172e, 0x2001 }, /* R5934 (0x172e) - GPIO24 Control 1 */
1677 { 0x0000172f, 0xe000 }, /* R5935 (0x172f) - GPIO24 Control 2 */
1678 { 0x00001730, 0x2001 }, /* R5936 (0x1730) - GPIO25 Control 1 */
1679 { 0x00001731, 0xe000 }, /* R5937 (0x1731) - GPIO25 Control 2 */
1680 { 0x00001732, 0x2001 }, /* R5938 (0x1732) - GPIO26 Control 1 */
1681 { 0x00001733, 0xe000 }, /* R5939 (0x1733) - GPIO26 Control 2 */
1682 { 0x00001734, 0x2001 }, /* R5940 (0x1734) - GPIO27 Control 1 */
1683 { 0x00001735, 0xe000 }, /* R5941 (0x1735) - GPIO27 Control 2 */
1684 { 0x00001736, 0x2001 }, /* R5942 (0x1736) - GPIO28 Control 1 */
1685 { 0x00001737, 0xe000 }, /* R5943 (0x1737) - GPIO28 Control 2 */
1686 { 0x00001738, 0x2001 }, /* R5944 (0x1738) - GPIO29 Control 1 */
1687 { 0x00001739, 0xe000 }, /* R5945 (0x1739) - GPIO29 Control 2 */
1688 { 0x0000173a, 0x2001 }, /* R5946 (0x173a) - GPIO30 Control 1 */
1689 { 0x0000173b, 0xe000 }, /* R5947 (0x173b) - GPIO30 Control 2 */
1690 { 0x0000173c, 0x2001 }, /* R5948 (0x173c) - GPIO31 Control 1 */
1691 { 0x0000173d, 0xe000 }, /* R5949 (0x173d) - GPIO31 Control 2 */
1692 { 0x0000173e, 0x2001 }, /* R5950 (0x173e) - GPIO32 Control 1 */
1693 { 0x0000173f, 0xe000 }, /* R5951 (0x173f) - GPIO32 Control 2 */
1694 { 0x00001740, 0x2001 }, /* R5952 (0x1740) - GPIO33 Control 1 */
1695 { 0x00001741, 0xe000 }, /* R5953 (0x1741) - GPIO33 Control 2 */
1696 { 0x00001742, 0x2001 }, /* R5954 (0x1742) - GPIO34 Control 1 */
1697 { 0x00001743, 0xe000 }, /* R5955 (0x1743) - GPIO34 Control 2 */
1698 { 0x00001744, 0x2001 }, /* R5956 (0x1744) - GPIO35 Control 1 */
1699 { 0x00001745, 0xe000 }, /* R5957 (0x1745) - GPIO35 Control 2 */
1700 { 0x00001746, 0x2001 }, /* R5958 (0x1746) - GPIO36 Control 1 */
1701 { 0x00001747, 0xe000 }, /* R5959 (0x1747) - GPIO36 Control 2 */
1702 { 0x00001748, 0x2001 }, /* R5960 (0x1748) - GPIO37 Control 1 */
1703 { 0x00001749, 0xe000 }, /* R5961 (0x1749) - GPIO37 Control 2 */
1704 { 0x0000174a, 0x2001 }, /* R5962 (0x174a) - GPIO38 Control 1 */
1705 { 0x0000174b, 0xe000 }, /* R5963 (0x174b) - GPIO38 Control 2 */
1706 { 0x0000174c, 0x2001 }, /* R5964 (0x174c) - GPIO39 Control 1 */
1707 { 0x0000174d, 0xe000 }, /* R5965 (0x174d) - GPIO39 Control 2 */
1708 { 0x0000174e, 0x2001 }, /* R5966 (0x174e) - GPIO40 Control 1 */
1709 { 0x0000174f, 0xe000 }, /* R5967 (0x174f) - GPIO40 Control 2 */
1710 { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */
1711 { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */
1712 { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */
1713 { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */
1714 { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */
1715 { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */
1716 { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */
1717 { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */
1718 { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */
1719 { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */
1720 { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */
1721 { 0x0000184b, 0xffff }, /* R6219 (0x184b) - IRQ1 Mask 12 */
1722 { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */
1723 { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */
1724 { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */
1725 { 0x0000184f, 0xffff }, /* R6223 (0x184f) - IRQ1 Mask 16 */
1726 { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */
1727 { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */
1728 { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */
1729 { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */
1730 { 0x00001854, 0xffff }, /* R6228 (0x1854) - IRQ1 Mask 21 */
1731 { 0x00001855, 0xffff }, /* R6229 (0x1855) - IRQ1 Mask 22 */
1732 { 0x00001856, 0xffff }, /* R6230 (0x1856) - IRQ1 Mask 23 */
1733 { 0x00001857, 0xffff }, /* R6231 (0x1857) - IRQ1 Mask 24 */
1734 { 0x00001858, 0xffff }, /* R6232 (0x1858) - IRQ1 Mask 25 */
1735 { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */
1736 { 0x0000185a, 0xffff }, /* R6234 (0x185a) - IRQ1 Mask 27 */
1737 { 0x0000185b, 0xffff }, /* R6235 (0x185b) - IRQ1 Mask 28 */
1738 { 0x0000185c, 0xffff }, /* R6236 (0x185c) - IRQ1 Mask 29 */
1739 { 0x0000185d, 0xffff }, /* R6237 (0x185d) - IRQ1 Mask 30 */
1740 { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */
1741 { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */
1742 { 0x00001860, 0xffff }, /* R6240 (0x1860) - IRQ1 Mask 33 */
1743 { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */
1744 { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */
1745};
1746
1747static bool cs47l85_is_adsp_memory(unsigned int reg)
1748{
1749 switch (reg) {
1750 case 0x080000 ... 0x085ffe:
1751 case 0x0a0000 ... 0x0a7ffe:
1752 case 0x0c0000 ... 0x0c1ffe:
1753 case 0x0e0000 ... 0x0e1ffe:
1754 case 0x100000 ... 0x10effe:
1755 case 0x120000 ... 0x12bffe:
1756 case 0x136000 ... 0x137ffe:
1757 case 0x140000 ... 0x14bffe:
1758 case 0x160000 ... 0x161ffe:
1759 case 0x180000 ... 0x18effe:
1760 case 0x1a0000 ... 0x1b1ffe:
1761 case 0x1b6000 ... 0x1b7ffe:
1762 case 0x1c0000 ... 0x1cbffe:
1763 case 0x1e0000 ... 0x1e1ffe:
1764 case 0x200000 ... 0x208ffe:
1765 case 0x220000 ... 0x231ffe:
1766 case 0x240000 ... 0x24bffe:
1767 case 0x260000 ... 0x261ffe:
1768 case 0x280000 ... 0x288ffe:
1769 case 0x2a0000 ... 0x2a9ffe:
1770 case 0x2c0000 ... 0x2c3ffe:
1771 case 0x2e0000 ... 0x2e1ffe:
1772 case 0x300000 ... 0x305ffe:
1773 case 0x320000 ... 0x333ffe:
1774 case 0x340000 ... 0x34bffe:
1775 case 0x360000 ... 0x361ffe:
1776 case 0x380000 ... 0x388ffe:
1777 case 0x3a0000 ... 0x3a7ffe:
1778 case 0x3c0000 ... 0x3c1ffe:
1779 case 0x3e0000 ... 0x3e1ffe:
1780 return true;
1781 default:
1782 return false;
1783 }
1784}
1785
1786static bool cs47l85_16bit_readable_register(struct device *dev,
1787 unsigned int reg)
1788{
1789 switch (reg) {
1790 case MADERA_SOFTWARE_RESET:
1791 case MADERA_HARDWARE_REVISION:
1792 case MADERA_WRITE_SEQUENCER_CTRL_0:
1793 case MADERA_WRITE_SEQUENCER_CTRL_1:
1794 case MADERA_WRITE_SEQUENCER_CTRL_2:
1795 case MADERA_TONE_GENERATOR_1:
1796 case MADERA_TONE_GENERATOR_2:
1797 case MADERA_TONE_GENERATOR_3:
1798 case MADERA_TONE_GENERATOR_4:
1799 case MADERA_TONE_GENERATOR_5:
1800 case MADERA_PWM_DRIVE_1:
1801 case MADERA_PWM_DRIVE_2:
1802 case MADERA_PWM_DRIVE_3:
1803 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1:
1804 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2:
1805 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3:
1806 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4:
1807 case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1:
1808 case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2:
1809 case MADERA_HAPTICS_CONTROL_1:
1810 case MADERA_HAPTICS_CONTROL_2:
1811 case MADERA_HAPTICS_PHASE_1_INTENSITY:
1812 case MADERA_HAPTICS_PHASE_1_DURATION:
1813 case MADERA_HAPTICS_PHASE_2_INTENSITY:
1814 case MADERA_HAPTICS_PHASE_2_DURATION:
1815 case MADERA_HAPTICS_PHASE_3_INTENSITY:
1816 case MADERA_HAPTICS_PHASE_3_DURATION:
1817 case MADERA_HAPTICS_STATUS:
1818 case MADERA_COMFORT_NOISE_GENERATOR:
1819 case MADERA_CLOCK_32K_1:
1820 case MADERA_SYSTEM_CLOCK_1:
1821 case MADERA_SAMPLE_RATE_1:
1822 case MADERA_SAMPLE_RATE_2:
1823 case MADERA_SAMPLE_RATE_3:
1824 case MADERA_SAMPLE_RATE_1_STATUS:
1825 case MADERA_SAMPLE_RATE_2_STATUS:
1826 case MADERA_SAMPLE_RATE_3_STATUS:
1827 case MADERA_ASYNC_CLOCK_1:
1828 case MADERA_ASYNC_SAMPLE_RATE_1:
1829 case MADERA_ASYNC_SAMPLE_RATE_1_STATUS:
1830 case MADERA_ASYNC_SAMPLE_RATE_2:
1831 case MADERA_ASYNC_SAMPLE_RATE_2_STATUS:
1832 case MADERA_DSP_CLOCK_1:
1833 case MADERA_DSP_CLOCK_2:
1834 case MADERA_OUTPUT_SYSTEM_CLOCK:
1835 case MADERA_OUTPUT_ASYNC_CLOCK:
1836 case MADERA_RATE_ESTIMATOR_1:
1837 case MADERA_RATE_ESTIMATOR_2:
1838 case MADERA_RATE_ESTIMATOR_3:
1839 case MADERA_RATE_ESTIMATOR_4:
1840 case MADERA_RATE_ESTIMATOR_5:
1841 case MADERA_FLL1_CONTROL_1:
1842 case MADERA_FLL1_CONTROL_2:
1843 case MADERA_FLL1_CONTROL_3:
1844 case MADERA_FLL1_CONTROL_4:
1845 case MADERA_FLL1_CONTROL_5:
1846 case MADERA_FLL1_CONTROL_6:
1847 case MADERA_FLL1_CONTROL_7:
1848 case MADERA_FLL1_LOOP_FILTER_TEST_1:
1849 case MADERA_FLL1_SYNCHRONISER_1:
1850 case MADERA_FLL1_SYNCHRONISER_2:
1851 case MADERA_FLL1_SYNCHRONISER_3:
1852 case MADERA_FLL1_SYNCHRONISER_4:
1853 case MADERA_FLL1_SYNCHRONISER_5:
1854 case MADERA_FLL1_SYNCHRONISER_6:
1855 case MADERA_FLL1_SYNCHRONISER_7:
1856 case MADERA_FLL1_SPREAD_SPECTRUM:
1857 case MADERA_FLL1_GPIO_CLOCK:
1858 case MADERA_FLL2_CONTROL_1:
1859 case MADERA_FLL2_CONTROL_2:
1860 case MADERA_FLL2_CONTROL_3:
1861 case MADERA_FLL2_CONTROL_4:
1862 case MADERA_FLL2_CONTROL_5:
1863 case MADERA_FLL2_CONTROL_6:
1864 case MADERA_FLL2_CONTROL_7:
1865 case MADERA_FLL2_LOOP_FILTER_TEST_1:
1866 case MADERA_FLL2_SYNCHRONISER_1:
1867 case MADERA_FLL2_SYNCHRONISER_2:
1868 case MADERA_FLL2_SYNCHRONISER_3:
1869 case MADERA_FLL2_SYNCHRONISER_4:
1870 case MADERA_FLL2_SYNCHRONISER_5:
1871 case MADERA_FLL2_SYNCHRONISER_6:
1872 case MADERA_FLL2_SYNCHRONISER_7:
1873 case MADERA_FLL2_SPREAD_SPECTRUM:
1874 case MADERA_FLL2_GPIO_CLOCK:
1875 case MADERA_FLL3_CONTROL_1:
1876 case MADERA_FLL3_CONTROL_2:
1877 case MADERA_FLL3_CONTROL_3:
1878 case MADERA_FLL3_CONTROL_4:
1879 case MADERA_FLL3_CONTROL_5:
1880 case MADERA_FLL3_CONTROL_6:
1881 case MADERA_FLL3_CONTROL_7:
1882 case MADERA_FLL3_LOOP_FILTER_TEST_1:
1883 case MADERA_FLL3_SYNCHRONISER_1:
1884 case MADERA_FLL3_SYNCHRONISER_2:
1885 case MADERA_FLL3_SYNCHRONISER_3:
1886 case MADERA_FLL3_SYNCHRONISER_4:
1887 case MADERA_FLL3_SYNCHRONISER_5:
1888 case MADERA_FLL3_SYNCHRONISER_6:
1889 case MADERA_FLL3_SYNCHRONISER_7:
1890 case MADERA_FLL3_SPREAD_SPECTRUM:
1891 case MADERA_FLL3_GPIO_CLOCK:
1892 case MADERA_MIC_CHARGE_PUMP_1:
1893 case MADERA_HP_CHARGE_PUMP_8:
1894 case MADERA_LDO1_CONTROL_1:
1895 case MADERA_LDO2_CONTROL_1:
1896 case MADERA_MIC_BIAS_CTRL_1:
1897 case MADERA_MIC_BIAS_CTRL_2:
1898 case MADERA_MIC_BIAS_CTRL_3:
1899 case MADERA_MIC_BIAS_CTRL_4:
1900 case MADERA_HP_CTRL_1L:
1901 case MADERA_HP_CTRL_1R:
1902 case MADERA_HP_CTRL_2L:
1903 case MADERA_HP_CTRL_2R:
1904 case MADERA_HP_CTRL_3L:
1905 case MADERA_HP_CTRL_3R:
1906 case MADERA_DCS_HP1L_CONTROL:
1907 case MADERA_DCS_HP1R_CONTROL:
1908 case MADERA_EDRE_HP_STEREO_CONTROL:
1909 case MADERA_ACCESSORY_DETECT_MODE_1:
1910 case MADERA_HEADPHONE_DETECT_1:
1911 case MADERA_HEADPHONE_DETECT_2:
1912 case MADERA_HEADPHONE_DETECT_3:
1913 case MADERA_HEADPHONE_DETECT_5:
1914 case MADERA_MICD_CLAMP_CONTROL:
1915 case MADERA_MIC_DETECT_1_CONTROL_1:
1916 case MADERA_MIC_DETECT_1_CONTROL_2:
1917 case MADERA_MIC_DETECT_1_CONTROL_3:
1918 case MADERA_MIC_DETECT_1_LEVEL_1:
1919 case MADERA_MIC_DETECT_1_LEVEL_2:
1920 case MADERA_MIC_DETECT_1_LEVEL_3:
1921 case MADERA_MIC_DETECT_1_LEVEL_4:
1922 case MADERA_MIC_DETECT_1_CONTROL_4:
1923 case MADERA_GP_SWITCH_1:
1924 case MADERA_JACK_DETECT_ANALOGUE:
1925 case MADERA_INPUT_ENABLES:
1926 case MADERA_INPUT_ENABLES_STATUS:
1927 case MADERA_INPUT_RATE:
1928 case MADERA_INPUT_VOLUME_RAMP:
1929 case MADERA_HPF_CONTROL:
1930 case MADERA_IN1L_CONTROL:
1931 case MADERA_ADC_DIGITAL_VOLUME_1L:
1932 case MADERA_DMIC1L_CONTROL:
1933 case MADERA_IN1R_CONTROL:
1934 case MADERA_ADC_DIGITAL_VOLUME_1R:
1935 case MADERA_DMIC1R_CONTROL:
1936 case MADERA_IN2L_CONTROL:
1937 case MADERA_ADC_DIGITAL_VOLUME_2L:
1938 case MADERA_DMIC2L_CONTROL:
1939 case MADERA_IN2R_CONTROL:
1940 case MADERA_ADC_DIGITAL_VOLUME_2R:
1941 case MADERA_DMIC2R_CONTROL:
1942 case MADERA_IN3L_CONTROL:
1943 case MADERA_ADC_DIGITAL_VOLUME_3L:
1944 case MADERA_DMIC3L_CONTROL:
1945 case MADERA_IN3R_CONTROL:
1946 case MADERA_ADC_DIGITAL_VOLUME_3R:
1947 case MADERA_DMIC3R_CONTROL:
1948 case MADERA_IN4L_CONTROL:
1949 case MADERA_ADC_DIGITAL_VOLUME_4L:
1950 case MADERA_DMIC4L_CONTROL:
1951 case MADERA_IN4R_CONTROL:
1952 case MADERA_ADC_DIGITAL_VOLUME_4R:
1953 case MADERA_DMIC4R_CONTROL:
1954 case MADERA_IN5L_CONTROL:
1955 case MADERA_ADC_DIGITAL_VOLUME_5L:
1956 case MADERA_DMIC5L_CONTROL:
1957 case MADERA_IN5R_CONTROL:
1958 case MADERA_ADC_DIGITAL_VOLUME_5R:
1959 case MADERA_DMIC5R_CONTROL:
1960 case MADERA_IN6L_CONTROL:
1961 case MADERA_ADC_DIGITAL_VOLUME_6L:
1962 case MADERA_DMIC6L_CONTROL:
1963 case MADERA_IN6R_CONTROL:
1964 case MADERA_ADC_DIGITAL_VOLUME_6R:
1965 case MADERA_DMIC6R_CONTROL:
1966 case MADERA_OUTPUT_ENABLES_1:
1967 case MADERA_OUTPUT_STATUS_1:
1968 case MADERA_RAW_OUTPUT_STATUS_1:
1969 case MADERA_OUTPUT_RATE_1:
1970 case MADERA_OUTPUT_VOLUME_RAMP:
1971 case MADERA_OUTPUT_PATH_CONFIG_1L:
1972 case MADERA_DAC_DIGITAL_VOLUME_1L:
1973 case MADERA_NOISE_GATE_SELECT_1L:
1974 case MADERA_OUTPUT_PATH_CONFIG_1R:
1975 case MADERA_DAC_DIGITAL_VOLUME_1R:
1976 case MADERA_NOISE_GATE_SELECT_1R:
1977 case MADERA_OUTPUT_PATH_CONFIG_2L:
1978 case MADERA_DAC_DIGITAL_VOLUME_2L:
1979 case MADERA_NOISE_GATE_SELECT_2L:
1980 case MADERA_OUTPUT_PATH_CONFIG_2R:
1981 case MADERA_DAC_DIGITAL_VOLUME_2R:
1982 case MADERA_NOISE_GATE_SELECT_2R:
1983 case MADERA_OUTPUT_PATH_CONFIG_3L:
1984 case MADERA_DAC_DIGITAL_VOLUME_3L:
1985 case MADERA_NOISE_GATE_SELECT_3L:
1986 case MADERA_OUTPUT_PATH_CONFIG_3R:
1987 case MADERA_DAC_DIGITAL_VOLUME_3R:
1988 case MADERA_NOISE_GATE_SELECT_3R:
1989 case MADERA_OUTPUT_PATH_CONFIG_4L:
1990 case MADERA_DAC_DIGITAL_VOLUME_4L:
1991 case MADERA_NOISE_GATE_SELECT_4L:
1992 case MADERA_OUTPUT_PATH_CONFIG_4R:
1993 case MADERA_DAC_DIGITAL_VOLUME_4R:
1994 case MADERA_NOISE_GATE_SELECT_4R:
1995 case MADERA_OUTPUT_PATH_CONFIG_5L:
1996 case MADERA_DAC_DIGITAL_VOLUME_5L:
1997 case MADERA_NOISE_GATE_SELECT_5L:
1998 case MADERA_OUTPUT_PATH_CONFIG_5R:
1999 case MADERA_DAC_DIGITAL_VOLUME_5R:
2000 case MADERA_NOISE_GATE_SELECT_5R:
2001 case MADERA_OUTPUT_PATH_CONFIG_6L:
2002 case MADERA_DAC_DIGITAL_VOLUME_6L:
2003 case MADERA_NOISE_GATE_SELECT_6L:
2004 case MADERA_OUTPUT_PATH_CONFIG_6R:
2005 case MADERA_DAC_DIGITAL_VOLUME_6R:
2006 case MADERA_NOISE_GATE_SELECT_6R:
2007 case MADERA_DRE_ENABLE:
2008 case MADERA_EDRE_ENABLE:
2009 case MADERA_EDRE_MANUAL:
2010 case MADERA_DAC_AEC_CONTROL_1:
2011 case MADERA_DAC_AEC_CONTROL_2:
2012 case MADERA_NOISE_GATE_CONTROL:
2013 case MADERA_PDM_SPK1_CTRL_1:
2014 case MADERA_PDM_SPK1_CTRL_2:
2015 case MADERA_PDM_SPK2_CTRL_1:
2016 case MADERA_PDM_SPK2_CTRL_2:
2017 case MADERA_HP1_SHORT_CIRCUIT_CTRL:
2018 case MADERA_HP2_SHORT_CIRCUIT_CTRL:
2019 case MADERA_HP3_SHORT_CIRCUIT_CTRL:
2020 case MADERA_HP_TEST_CTRL_5:
2021 case MADERA_HP_TEST_CTRL_6:
2022 case MADERA_AIF1_BCLK_CTRL:
2023 case MADERA_AIF1_TX_PIN_CTRL:
2024 case MADERA_AIF1_RX_PIN_CTRL:
2025 case MADERA_AIF1_RATE_CTRL:
2026 case MADERA_AIF1_FORMAT:
2027 case MADERA_AIF1_RX_BCLK_RATE:
2028 case MADERA_AIF1_FRAME_CTRL_1:
2029 case MADERA_AIF1_FRAME_CTRL_2:
2030 case MADERA_AIF1_FRAME_CTRL_3:
2031 case MADERA_AIF1_FRAME_CTRL_4:
2032 case MADERA_AIF1_FRAME_CTRL_5:
2033 case MADERA_AIF1_FRAME_CTRL_6:
2034 case MADERA_AIF1_FRAME_CTRL_7:
2035 case MADERA_AIF1_FRAME_CTRL_8:
2036 case MADERA_AIF1_FRAME_CTRL_9:
2037 case MADERA_AIF1_FRAME_CTRL_10:
2038 case MADERA_AIF1_FRAME_CTRL_11:
2039 case MADERA_AIF1_FRAME_CTRL_12:
2040 case MADERA_AIF1_FRAME_CTRL_13:
2041 case MADERA_AIF1_FRAME_CTRL_14:
2042 case MADERA_AIF1_FRAME_CTRL_15:
2043 case MADERA_AIF1_FRAME_CTRL_16:
2044 case MADERA_AIF1_FRAME_CTRL_17:
2045 case MADERA_AIF1_FRAME_CTRL_18:
2046 case MADERA_AIF1_TX_ENABLES:
2047 case MADERA_AIF1_RX_ENABLES:
2048 case MADERA_AIF2_BCLK_CTRL:
2049 case MADERA_AIF2_TX_PIN_CTRL:
2050 case MADERA_AIF2_RX_PIN_CTRL:
2051 case MADERA_AIF2_RATE_CTRL:
2052 case MADERA_AIF2_FORMAT:
2053 case MADERA_AIF2_RX_BCLK_RATE:
2054 case MADERA_AIF2_FRAME_CTRL_1:
2055 case MADERA_AIF2_FRAME_CTRL_2:
2056 case MADERA_AIF2_FRAME_CTRL_3:
2057 case MADERA_AIF2_FRAME_CTRL_4:
2058 case MADERA_AIF2_FRAME_CTRL_5:
2059 case MADERA_AIF2_FRAME_CTRL_6:
2060 case MADERA_AIF2_FRAME_CTRL_7:
2061 case MADERA_AIF2_FRAME_CTRL_8:
2062 case MADERA_AIF2_FRAME_CTRL_9:
2063 case MADERA_AIF2_FRAME_CTRL_10:
2064 case MADERA_AIF2_FRAME_CTRL_11:
2065 case MADERA_AIF2_FRAME_CTRL_12:
2066 case MADERA_AIF2_FRAME_CTRL_13:
2067 case MADERA_AIF2_FRAME_CTRL_14:
2068 case MADERA_AIF2_FRAME_CTRL_15:
2069 case MADERA_AIF2_FRAME_CTRL_16:
2070 case MADERA_AIF2_FRAME_CTRL_17:
2071 case MADERA_AIF2_FRAME_CTRL_18:
2072 case MADERA_AIF2_TX_ENABLES:
2073 case MADERA_AIF2_RX_ENABLES:
2074 case MADERA_AIF3_BCLK_CTRL:
2075 case MADERA_AIF3_TX_PIN_CTRL:
2076 case MADERA_AIF3_RX_PIN_CTRL:
2077 case MADERA_AIF3_RATE_CTRL:
2078 case MADERA_AIF3_FORMAT:
2079 case MADERA_AIF3_RX_BCLK_RATE:
2080 case MADERA_AIF3_FRAME_CTRL_1:
2081 case MADERA_AIF3_FRAME_CTRL_2:
2082 case MADERA_AIF3_FRAME_CTRL_3:
2083 case MADERA_AIF3_FRAME_CTRL_4:
2084 case MADERA_AIF3_FRAME_CTRL_11:
2085 case MADERA_AIF3_FRAME_CTRL_12:
2086 case MADERA_AIF3_TX_ENABLES:
2087 case MADERA_AIF3_RX_ENABLES:
2088 case MADERA_AIF4_BCLK_CTRL:
2089 case MADERA_AIF4_TX_PIN_CTRL:
2090 case MADERA_AIF4_RX_PIN_CTRL:
2091 case MADERA_AIF4_RATE_CTRL:
2092 case MADERA_AIF4_FORMAT:
2093 case MADERA_AIF4_RX_BCLK_RATE:
2094 case MADERA_AIF4_FRAME_CTRL_1:
2095 case MADERA_AIF4_FRAME_CTRL_2:
2096 case MADERA_AIF4_FRAME_CTRL_3:
2097 case MADERA_AIF4_FRAME_CTRL_4:
2098 case MADERA_AIF4_FRAME_CTRL_11:
2099 case MADERA_AIF4_FRAME_CTRL_12:
2100 case MADERA_AIF4_TX_ENABLES:
2101 case MADERA_AIF4_RX_ENABLES:
2102 case MADERA_SPD1_TX_CONTROL:
2103 case MADERA_SPD1_TX_CHANNEL_STATUS_1:
2104 case MADERA_SPD1_TX_CHANNEL_STATUS_2:
2105 case MADERA_SPD1_TX_CHANNEL_STATUS_3:
2106 case MADERA_SLIMBUS_FRAMER_REF_GEAR:
2107 case MADERA_SLIMBUS_RATES_1:
2108 case MADERA_SLIMBUS_RATES_2:
2109 case MADERA_SLIMBUS_RATES_3:
2110 case MADERA_SLIMBUS_RATES_4:
2111 case MADERA_SLIMBUS_RATES_5:
2112 case MADERA_SLIMBUS_RATES_6:
2113 case MADERA_SLIMBUS_RATES_7:
2114 case MADERA_SLIMBUS_RATES_8:
2115 case MADERA_SLIMBUS_RX_CHANNEL_ENABLE:
2116 case MADERA_SLIMBUS_TX_CHANNEL_ENABLE:
2117 case MADERA_SLIMBUS_RX_PORT_STATUS:
2118 case MADERA_SLIMBUS_TX_PORT_STATUS:
2119 case MADERA_PWM1MIX_INPUT_1_SOURCE:
2120 case MADERA_PWM1MIX_INPUT_1_VOLUME:
2121 case MADERA_PWM1MIX_INPUT_2_SOURCE:
2122 case MADERA_PWM1MIX_INPUT_2_VOLUME:
2123 case MADERA_PWM1MIX_INPUT_3_SOURCE:
2124 case MADERA_PWM1MIX_INPUT_3_VOLUME:
2125 case MADERA_PWM1MIX_INPUT_4_SOURCE:
2126 case MADERA_PWM1MIX_INPUT_4_VOLUME:
2127 case MADERA_PWM2MIX_INPUT_1_SOURCE:
2128 case MADERA_PWM2MIX_INPUT_1_VOLUME:
2129 case MADERA_PWM2MIX_INPUT_2_SOURCE:
2130 case MADERA_PWM2MIX_INPUT_2_VOLUME:
2131 case MADERA_PWM2MIX_INPUT_3_SOURCE:
2132 case MADERA_PWM2MIX_INPUT_3_VOLUME:
2133 case MADERA_PWM2MIX_INPUT_4_SOURCE:
2134 case MADERA_PWM2MIX_INPUT_4_VOLUME:
2135 case MADERA_OUT1LMIX_INPUT_1_SOURCE:
2136 case MADERA_OUT1LMIX_INPUT_1_VOLUME:
2137 case MADERA_OUT1LMIX_INPUT_2_SOURCE:
2138 case MADERA_OUT1LMIX_INPUT_2_VOLUME:
2139 case MADERA_OUT1LMIX_INPUT_3_SOURCE:
2140 case MADERA_OUT1LMIX_INPUT_3_VOLUME:
2141 case MADERA_OUT1LMIX_INPUT_4_SOURCE:
2142 case MADERA_OUT1LMIX_INPUT_4_VOLUME:
2143 case MADERA_OUT1RMIX_INPUT_1_SOURCE:
2144 case MADERA_OUT1RMIX_INPUT_1_VOLUME:
2145 case MADERA_OUT1RMIX_INPUT_2_SOURCE:
2146 case MADERA_OUT1RMIX_INPUT_2_VOLUME:
2147 case MADERA_OUT1RMIX_INPUT_3_SOURCE:
2148 case MADERA_OUT1RMIX_INPUT_3_VOLUME:
2149 case MADERA_OUT1RMIX_INPUT_4_SOURCE:
2150 case MADERA_OUT1RMIX_INPUT_4_VOLUME:
2151 case MADERA_OUT2LMIX_INPUT_1_SOURCE:
2152 case MADERA_OUT2LMIX_INPUT_1_VOLUME:
2153 case MADERA_OUT2LMIX_INPUT_2_SOURCE:
2154 case MADERA_OUT2LMIX_INPUT_2_VOLUME:
2155 case MADERA_OUT2LMIX_INPUT_3_SOURCE:
2156 case MADERA_OUT2LMIX_INPUT_3_VOLUME:
2157 case MADERA_OUT2LMIX_INPUT_4_SOURCE:
2158 case MADERA_OUT2LMIX_INPUT_4_VOLUME:
2159 case MADERA_OUT2RMIX_INPUT_1_SOURCE:
2160 case MADERA_OUT2RMIX_INPUT_1_VOLUME:
2161 case MADERA_OUT2RMIX_INPUT_2_SOURCE:
2162 case MADERA_OUT2RMIX_INPUT_2_VOLUME:
2163 case MADERA_OUT2RMIX_INPUT_3_SOURCE:
2164 case MADERA_OUT2RMIX_INPUT_3_VOLUME:
2165 case MADERA_OUT2RMIX_INPUT_4_SOURCE:
2166 case MADERA_OUT2RMIX_INPUT_4_VOLUME:
2167 case MADERA_OUT3LMIX_INPUT_1_SOURCE:
2168 case MADERA_OUT3LMIX_INPUT_1_VOLUME:
2169 case MADERA_OUT3LMIX_INPUT_2_SOURCE:
2170 case MADERA_OUT3LMIX_INPUT_2_VOLUME:
2171 case MADERA_OUT3LMIX_INPUT_3_SOURCE:
2172 case MADERA_OUT3LMIX_INPUT_3_VOLUME:
2173 case MADERA_OUT3LMIX_INPUT_4_SOURCE:
2174 case MADERA_OUT3LMIX_INPUT_4_VOLUME:
2175 case MADERA_OUT3RMIX_INPUT_1_SOURCE:
2176 case MADERA_OUT3RMIX_INPUT_1_VOLUME:
2177 case MADERA_OUT3RMIX_INPUT_2_SOURCE:
2178 case MADERA_OUT3RMIX_INPUT_2_VOLUME:
2179 case MADERA_OUT3RMIX_INPUT_3_SOURCE:
2180 case MADERA_OUT3RMIX_INPUT_3_VOLUME:
2181 case MADERA_OUT3RMIX_INPUT_4_SOURCE:
2182 case MADERA_OUT3RMIX_INPUT_4_VOLUME:
2183 case MADERA_OUT4LMIX_INPUT_1_SOURCE:
2184 case MADERA_OUT4LMIX_INPUT_1_VOLUME:
2185 case MADERA_OUT4LMIX_INPUT_2_SOURCE:
2186 case MADERA_OUT4LMIX_INPUT_2_VOLUME:
2187 case MADERA_OUT4LMIX_INPUT_3_SOURCE:
2188 case MADERA_OUT4LMIX_INPUT_3_VOLUME:
2189 case MADERA_OUT4LMIX_INPUT_4_SOURCE:
2190 case MADERA_OUT4LMIX_INPUT_4_VOLUME:
2191 case MADERA_OUT4RMIX_INPUT_1_SOURCE:
2192 case MADERA_OUT4RMIX_INPUT_1_VOLUME:
2193 case MADERA_OUT4RMIX_INPUT_2_SOURCE:
2194 case MADERA_OUT4RMIX_INPUT_2_VOLUME:
2195 case MADERA_OUT4RMIX_INPUT_3_SOURCE:
2196 case MADERA_OUT4RMIX_INPUT_3_VOLUME:
2197 case MADERA_OUT4RMIX_INPUT_4_SOURCE:
2198 case MADERA_OUT4RMIX_INPUT_4_VOLUME:
2199 case MADERA_OUT5LMIX_INPUT_1_SOURCE:
2200 case MADERA_OUT5LMIX_INPUT_1_VOLUME:
2201 case MADERA_OUT5LMIX_INPUT_2_SOURCE:
2202 case MADERA_OUT5LMIX_INPUT_2_VOLUME:
2203 case MADERA_OUT5LMIX_INPUT_3_SOURCE:
2204 case MADERA_OUT5LMIX_INPUT_3_VOLUME:
2205 case MADERA_OUT5LMIX_INPUT_4_SOURCE:
2206 case MADERA_OUT5LMIX_INPUT_4_VOLUME:
2207 case MADERA_OUT5RMIX_INPUT_1_SOURCE:
2208 case MADERA_OUT5RMIX_INPUT_1_VOLUME:
2209 case MADERA_OUT5RMIX_INPUT_2_SOURCE:
2210 case MADERA_OUT5RMIX_INPUT_2_VOLUME:
2211 case MADERA_OUT5RMIX_INPUT_3_SOURCE:
2212 case MADERA_OUT5RMIX_INPUT_3_VOLUME:
2213 case MADERA_OUT5RMIX_INPUT_4_SOURCE:
2214 case MADERA_OUT5RMIX_INPUT_4_VOLUME:
2215 case MADERA_OUT6LMIX_INPUT_1_SOURCE:
2216 case MADERA_OUT6LMIX_INPUT_1_VOLUME:
2217 case MADERA_OUT6LMIX_INPUT_2_SOURCE:
2218 case MADERA_OUT6LMIX_INPUT_2_VOLUME:
2219 case MADERA_OUT6LMIX_INPUT_3_SOURCE:
2220 case MADERA_OUT6LMIX_INPUT_3_VOLUME:
2221 case MADERA_OUT6LMIX_INPUT_4_SOURCE:
2222 case MADERA_OUT6LMIX_INPUT_4_VOLUME:
2223 case MADERA_OUT6RMIX_INPUT_1_SOURCE:
2224 case MADERA_OUT6RMIX_INPUT_1_VOLUME:
2225 case MADERA_OUT6RMIX_INPUT_2_SOURCE:
2226 case MADERA_OUT6RMIX_INPUT_2_VOLUME:
2227 case MADERA_OUT6RMIX_INPUT_3_SOURCE:
2228 case MADERA_OUT6RMIX_INPUT_3_VOLUME:
2229 case MADERA_OUT6RMIX_INPUT_4_SOURCE:
2230 case MADERA_OUT6RMIX_INPUT_4_VOLUME:
2231 case MADERA_AIF1TX1MIX_INPUT_1_SOURCE:
2232 case MADERA_AIF1TX1MIX_INPUT_1_VOLUME:
2233 case MADERA_AIF1TX1MIX_INPUT_2_SOURCE:
2234 case MADERA_AIF1TX1MIX_INPUT_2_VOLUME:
2235 case MADERA_AIF1TX1MIX_INPUT_3_SOURCE:
2236 case MADERA_AIF1TX1MIX_INPUT_3_VOLUME:
2237 case MADERA_AIF1TX1MIX_INPUT_4_SOURCE:
2238 case MADERA_AIF1TX1MIX_INPUT_4_VOLUME:
2239 case MADERA_AIF1TX2MIX_INPUT_1_SOURCE:
2240 case MADERA_AIF1TX2MIX_INPUT_1_VOLUME:
2241 case MADERA_AIF1TX2MIX_INPUT_2_SOURCE:
2242 case MADERA_AIF1TX2MIX_INPUT_2_VOLUME:
2243 case MADERA_AIF1TX2MIX_INPUT_3_SOURCE:
2244 case MADERA_AIF1TX2MIX_INPUT_3_VOLUME:
2245 case MADERA_AIF1TX2MIX_INPUT_4_SOURCE:
2246 case MADERA_AIF1TX2MIX_INPUT_4_VOLUME:
2247 case MADERA_AIF1TX3MIX_INPUT_1_SOURCE:
2248 case MADERA_AIF1TX3MIX_INPUT_1_VOLUME:
2249 case MADERA_AIF1TX3MIX_INPUT_2_SOURCE:
2250 case MADERA_AIF1TX3MIX_INPUT_2_VOLUME:
2251 case MADERA_AIF1TX3MIX_INPUT_3_SOURCE:
2252 case MADERA_AIF1TX3MIX_INPUT_3_VOLUME:
2253 case MADERA_AIF1TX3MIX_INPUT_4_SOURCE:
2254 case MADERA_AIF1TX3MIX_INPUT_4_VOLUME:
2255 case MADERA_AIF1TX4MIX_INPUT_1_SOURCE:
2256 case MADERA_AIF1TX4MIX_INPUT_1_VOLUME:
2257 case MADERA_AIF1TX4MIX_INPUT_2_SOURCE:
2258 case MADERA_AIF1TX4MIX_INPUT_2_VOLUME:
2259 case MADERA_AIF1TX4MIX_INPUT_3_SOURCE:
2260 case MADERA_AIF1TX4MIX_INPUT_3_VOLUME:
2261 case MADERA_AIF1TX4MIX_INPUT_4_SOURCE:
2262 case MADERA_AIF1TX4MIX_INPUT_4_VOLUME:
2263 case MADERA_AIF1TX5MIX_INPUT_1_SOURCE:
2264 case MADERA_AIF1TX5MIX_INPUT_1_VOLUME:
2265 case MADERA_AIF1TX5MIX_INPUT_2_SOURCE:
2266 case MADERA_AIF1TX5MIX_INPUT_2_VOLUME:
2267 case MADERA_AIF1TX5MIX_INPUT_3_SOURCE:
2268 case MADERA_AIF1TX5MIX_INPUT_3_VOLUME:
2269 case MADERA_AIF1TX5MIX_INPUT_4_SOURCE:
2270 case MADERA_AIF1TX5MIX_INPUT_4_VOLUME:
2271 case MADERA_AIF1TX6MIX_INPUT_1_SOURCE:
2272 case MADERA_AIF1TX6MIX_INPUT_1_VOLUME:
2273 case MADERA_AIF1TX6MIX_INPUT_2_SOURCE:
2274 case MADERA_AIF1TX6MIX_INPUT_2_VOLUME:
2275 case MADERA_AIF1TX6MIX_INPUT_3_SOURCE:
2276 case MADERA_AIF1TX6MIX_INPUT_3_VOLUME:
2277 case MADERA_AIF1TX6MIX_INPUT_4_SOURCE:
2278 case MADERA_AIF1TX6MIX_INPUT_4_VOLUME:
2279 case MADERA_AIF1TX7MIX_INPUT_1_SOURCE:
2280 case MADERA_AIF1TX7MIX_INPUT_1_VOLUME:
2281 case MADERA_AIF1TX7MIX_INPUT_2_SOURCE:
2282 case MADERA_AIF1TX7MIX_INPUT_2_VOLUME:
2283 case MADERA_AIF1TX7MIX_INPUT_3_SOURCE:
2284 case MADERA_AIF1TX7MIX_INPUT_3_VOLUME:
2285 case MADERA_AIF1TX7MIX_INPUT_4_SOURCE:
2286 case MADERA_AIF1TX7MIX_INPUT_4_VOLUME:
2287 case MADERA_AIF1TX8MIX_INPUT_1_SOURCE:
2288 case MADERA_AIF1TX8MIX_INPUT_1_VOLUME:
2289 case MADERA_AIF1TX8MIX_INPUT_2_SOURCE:
2290 case MADERA_AIF1TX8MIX_INPUT_2_VOLUME:
2291 case MADERA_AIF1TX8MIX_INPUT_3_SOURCE:
2292 case MADERA_AIF1TX8MIX_INPUT_3_VOLUME:
2293 case MADERA_AIF1TX8MIX_INPUT_4_SOURCE:
2294 case MADERA_AIF1TX8MIX_INPUT_4_VOLUME:
2295 case MADERA_AIF2TX1MIX_INPUT_1_SOURCE:
2296 case MADERA_AIF2TX1MIX_INPUT_1_VOLUME:
2297 case MADERA_AIF2TX1MIX_INPUT_2_SOURCE:
2298 case MADERA_AIF2TX1MIX_INPUT_2_VOLUME:
2299 case MADERA_AIF2TX1MIX_INPUT_3_SOURCE:
2300 case MADERA_AIF2TX1MIX_INPUT_3_VOLUME:
2301 case MADERA_AIF2TX1MIX_INPUT_4_SOURCE:
2302 case MADERA_AIF2TX1MIX_INPUT_4_VOLUME:
2303 case MADERA_AIF2TX2MIX_INPUT_1_SOURCE:
2304 case MADERA_AIF2TX2MIX_INPUT_1_VOLUME:
2305 case MADERA_AIF2TX2MIX_INPUT_2_SOURCE:
2306 case MADERA_AIF2TX2MIX_INPUT_2_VOLUME:
2307 case MADERA_AIF2TX2MIX_INPUT_3_SOURCE:
2308 case MADERA_AIF2TX2MIX_INPUT_3_VOLUME:
2309 case MADERA_AIF2TX2MIX_INPUT_4_SOURCE:
2310 case MADERA_AIF2TX2MIX_INPUT_4_VOLUME:
2311 case MADERA_AIF2TX3MIX_INPUT_1_SOURCE:
2312 case MADERA_AIF2TX3MIX_INPUT_1_VOLUME:
2313 case MADERA_AIF2TX3MIX_INPUT_2_SOURCE:
2314 case MADERA_AIF2TX3MIX_INPUT_2_VOLUME:
2315 case MADERA_AIF2TX3MIX_INPUT_3_SOURCE:
2316 case MADERA_AIF2TX3MIX_INPUT_3_VOLUME:
2317 case MADERA_AIF2TX3MIX_INPUT_4_SOURCE:
2318 case MADERA_AIF2TX3MIX_INPUT_4_VOLUME:
2319 case MADERA_AIF2TX4MIX_INPUT_1_SOURCE:
2320 case MADERA_AIF2TX4MIX_INPUT_1_VOLUME:
2321 case MADERA_AIF2TX4MIX_INPUT_2_SOURCE:
2322 case MADERA_AIF2TX4MIX_INPUT_2_VOLUME:
2323 case MADERA_AIF2TX4MIX_INPUT_3_SOURCE:
2324 case MADERA_AIF2TX4MIX_INPUT_3_VOLUME:
2325 case MADERA_AIF2TX4MIX_INPUT_4_SOURCE:
2326 case MADERA_AIF2TX4MIX_INPUT_4_VOLUME:
2327 case MADERA_AIF2TX5MIX_INPUT_1_SOURCE:
2328 case MADERA_AIF2TX5MIX_INPUT_1_VOLUME:
2329 case MADERA_AIF2TX5MIX_INPUT_2_SOURCE:
2330 case MADERA_AIF2TX5MIX_INPUT_2_VOLUME:
2331 case MADERA_AIF2TX5MIX_INPUT_3_SOURCE:
2332 case MADERA_AIF2TX5MIX_INPUT_3_VOLUME:
2333 case MADERA_AIF2TX5MIX_INPUT_4_SOURCE:
2334 case MADERA_AIF2TX5MIX_INPUT_4_VOLUME:
2335 case MADERA_AIF2TX6MIX_INPUT_1_SOURCE:
2336 case MADERA_AIF2TX6MIX_INPUT_1_VOLUME:
2337 case MADERA_AIF2TX6MIX_INPUT_2_SOURCE:
2338 case MADERA_AIF2TX6MIX_INPUT_2_VOLUME:
2339 case MADERA_AIF2TX6MIX_INPUT_3_SOURCE:
2340 case MADERA_AIF2TX6MIX_INPUT_3_VOLUME:
2341 case MADERA_AIF2TX6MIX_INPUT_4_SOURCE:
2342 case MADERA_AIF2TX6MIX_INPUT_4_VOLUME:
2343 case MADERA_AIF2TX7MIX_INPUT_1_SOURCE:
2344 case MADERA_AIF2TX7MIX_INPUT_1_VOLUME:
2345 case MADERA_AIF2TX7MIX_INPUT_2_SOURCE:
2346 case MADERA_AIF2TX7MIX_INPUT_2_VOLUME:
2347 case MADERA_AIF2TX7MIX_INPUT_3_SOURCE:
2348 case MADERA_AIF2TX7MIX_INPUT_3_VOLUME:
2349 case MADERA_AIF2TX7MIX_INPUT_4_SOURCE:
2350 case MADERA_AIF2TX7MIX_INPUT_4_VOLUME:
2351 case MADERA_AIF2TX8MIX_INPUT_1_SOURCE:
2352 case MADERA_AIF2TX8MIX_INPUT_1_VOLUME:
2353 case MADERA_AIF2TX8MIX_INPUT_2_SOURCE:
2354 case MADERA_AIF2TX8MIX_INPUT_2_VOLUME:
2355 case MADERA_AIF2TX8MIX_INPUT_3_SOURCE:
2356 case MADERA_AIF2TX8MIX_INPUT_3_VOLUME:
2357 case MADERA_AIF2TX8MIX_INPUT_4_SOURCE:
2358 case MADERA_AIF2TX8MIX_INPUT_4_VOLUME:
2359 case MADERA_AIF3TX1MIX_INPUT_1_SOURCE:
2360 case MADERA_AIF3TX1MIX_INPUT_1_VOLUME:
2361 case MADERA_AIF3TX1MIX_INPUT_2_SOURCE:
2362 case MADERA_AIF3TX1MIX_INPUT_2_VOLUME:
2363 case MADERA_AIF3TX1MIX_INPUT_3_SOURCE:
2364 case MADERA_AIF3TX1MIX_INPUT_3_VOLUME:
2365 case MADERA_AIF3TX1MIX_INPUT_4_SOURCE:
2366 case MADERA_AIF3TX1MIX_INPUT_4_VOLUME:
2367 case MADERA_AIF3TX2MIX_INPUT_1_SOURCE:
2368 case MADERA_AIF3TX2MIX_INPUT_1_VOLUME:
2369 case MADERA_AIF3TX2MIX_INPUT_2_SOURCE:
2370 case MADERA_AIF3TX2MIX_INPUT_2_VOLUME:
2371 case MADERA_AIF3TX2MIX_INPUT_3_SOURCE:
2372 case MADERA_AIF3TX2MIX_INPUT_3_VOLUME:
2373 case MADERA_AIF3TX2MIX_INPUT_4_SOURCE:
2374 case MADERA_AIF3TX2MIX_INPUT_4_VOLUME:
2375 case MADERA_AIF4TX1MIX_INPUT_1_SOURCE:
2376 case MADERA_AIF4TX1MIX_INPUT_1_VOLUME:
2377 case MADERA_AIF4TX1MIX_INPUT_2_SOURCE:
2378 case MADERA_AIF4TX1MIX_INPUT_2_VOLUME:
2379 case MADERA_AIF4TX1MIX_INPUT_3_SOURCE:
2380 case MADERA_AIF4TX1MIX_INPUT_3_VOLUME:
2381 case MADERA_AIF4TX1MIX_INPUT_4_SOURCE:
2382 case MADERA_AIF4TX1MIX_INPUT_4_VOLUME:
2383 case MADERA_AIF4TX2MIX_INPUT_1_SOURCE:
2384 case MADERA_AIF4TX2MIX_INPUT_1_VOLUME:
2385 case MADERA_AIF4TX2MIX_INPUT_2_SOURCE:
2386 case MADERA_AIF4TX2MIX_INPUT_2_VOLUME:
2387 case MADERA_AIF4TX2MIX_INPUT_3_SOURCE:
2388 case MADERA_AIF4TX2MIX_INPUT_3_VOLUME:
2389 case MADERA_AIF4TX2MIX_INPUT_4_SOURCE:
2390 case MADERA_AIF4TX2MIX_INPUT_4_VOLUME:
2391 case MADERA_SLIMTX1MIX_INPUT_1_SOURCE:
2392 case MADERA_SLIMTX1MIX_INPUT_1_VOLUME:
2393 case MADERA_SLIMTX1MIX_INPUT_2_SOURCE:
2394 case MADERA_SLIMTX1MIX_INPUT_2_VOLUME:
2395 case MADERA_SLIMTX1MIX_INPUT_3_SOURCE:
2396 case MADERA_SLIMTX1MIX_INPUT_3_VOLUME:
2397 case MADERA_SLIMTX1MIX_INPUT_4_SOURCE:
2398 case MADERA_SLIMTX1MIX_INPUT_4_VOLUME:
2399 case MADERA_SLIMTX2MIX_INPUT_1_SOURCE:
2400 case MADERA_SLIMTX2MIX_INPUT_1_VOLUME:
2401 case MADERA_SLIMTX2MIX_INPUT_2_SOURCE:
2402 case MADERA_SLIMTX2MIX_INPUT_2_VOLUME:
2403 case MADERA_SLIMTX2MIX_INPUT_3_SOURCE:
2404 case MADERA_SLIMTX2MIX_INPUT_3_VOLUME:
2405 case MADERA_SLIMTX2MIX_INPUT_4_SOURCE:
2406 case MADERA_SLIMTX2MIX_INPUT_4_VOLUME:
2407 case MADERA_SLIMTX3MIX_INPUT_1_SOURCE:
2408 case MADERA_SLIMTX3MIX_INPUT_1_VOLUME:
2409 case MADERA_SLIMTX3MIX_INPUT_2_SOURCE:
2410 case MADERA_SLIMTX3MIX_INPUT_2_VOLUME:
2411 case MADERA_SLIMTX3MIX_INPUT_3_SOURCE:
2412 case MADERA_SLIMTX3MIX_INPUT_3_VOLUME:
2413 case MADERA_SLIMTX3MIX_INPUT_4_SOURCE:
2414 case MADERA_SLIMTX3MIX_INPUT_4_VOLUME:
2415 case MADERA_SLIMTX4MIX_INPUT_1_SOURCE:
2416 case MADERA_SLIMTX4MIX_INPUT_1_VOLUME:
2417 case MADERA_SLIMTX4MIX_INPUT_2_SOURCE:
2418 case MADERA_SLIMTX4MIX_INPUT_2_VOLUME:
2419 case MADERA_SLIMTX4MIX_INPUT_3_SOURCE:
2420 case MADERA_SLIMTX4MIX_INPUT_3_VOLUME:
2421 case MADERA_SLIMTX4MIX_INPUT_4_SOURCE:
2422 case MADERA_SLIMTX4MIX_INPUT_4_VOLUME:
2423 case MADERA_SLIMTX5MIX_INPUT_1_SOURCE:
2424 case MADERA_SLIMTX5MIX_INPUT_1_VOLUME:
2425 case MADERA_SLIMTX5MIX_INPUT_2_SOURCE:
2426 case MADERA_SLIMTX5MIX_INPUT_2_VOLUME:
2427 case MADERA_SLIMTX5MIX_INPUT_3_SOURCE:
2428 case MADERA_SLIMTX5MIX_INPUT_3_VOLUME:
2429 case MADERA_SLIMTX5MIX_INPUT_4_SOURCE:
2430 case MADERA_SLIMTX5MIX_INPUT_4_VOLUME:
2431 case MADERA_SLIMTX6MIX_INPUT_1_SOURCE:
2432 case MADERA_SLIMTX6MIX_INPUT_1_VOLUME:
2433 case MADERA_SLIMTX6MIX_INPUT_2_SOURCE:
2434 case MADERA_SLIMTX6MIX_INPUT_2_VOLUME:
2435 case MADERA_SLIMTX6MIX_INPUT_3_SOURCE:
2436 case MADERA_SLIMTX6MIX_INPUT_3_VOLUME:
2437 case MADERA_SLIMTX6MIX_INPUT_4_SOURCE:
2438 case MADERA_SLIMTX6MIX_INPUT_4_VOLUME:
2439 case MADERA_SLIMTX7MIX_INPUT_1_SOURCE:
2440 case MADERA_SLIMTX7MIX_INPUT_1_VOLUME:
2441 case MADERA_SLIMTX7MIX_INPUT_2_SOURCE:
2442 case MADERA_SLIMTX7MIX_INPUT_2_VOLUME:
2443 case MADERA_SLIMTX7MIX_INPUT_3_SOURCE:
2444 case MADERA_SLIMTX7MIX_INPUT_3_VOLUME:
2445 case MADERA_SLIMTX7MIX_INPUT_4_SOURCE:
2446 case MADERA_SLIMTX7MIX_INPUT_4_VOLUME:
2447 case MADERA_SLIMTX8MIX_INPUT_1_SOURCE:
2448 case MADERA_SLIMTX8MIX_INPUT_1_VOLUME:
2449 case MADERA_SLIMTX8MIX_INPUT_2_SOURCE:
2450 case MADERA_SLIMTX8MIX_INPUT_2_VOLUME:
2451 case MADERA_SLIMTX8MIX_INPUT_3_SOURCE:
2452 case MADERA_SLIMTX8MIX_INPUT_3_VOLUME:
2453 case MADERA_SLIMTX8MIX_INPUT_4_SOURCE:
2454 case MADERA_SLIMTX8MIX_INPUT_4_VOLUME:
2455 case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE:
2456 case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME:
2457 case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE:
2458 case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME:
2459 case MADERA_EQ1MIX_INPUT_1_SOURCE:
2460 case MADERA_EQ1MIX_INPUT_1_VOLUME:
2461 case MADERA_EQ1MIX_INPUT_2_SOURCE:
2462 case MADERA_EQ1MIX_INPUT_2_VOLUME:
2463 case MADERA_EQ1MIX_INPUT_3_SOURCE:
2464 case MADERA_EQ1MIX_INPUT_3_VOLUME:
2465 case MADERA_EQ1MIX_INPUT_4_SOURCE:
2466 case MADERA_EQ1MIX_INPUT_4_VOLUME:
2467 case MADERA_EQ2MIX_INPUT_1_SOURCE:
2468 case MADERA_EQ2MIX_INPUT_1_VOLUME:
2469 case MADERA_EQ2MIX_INPUT_2_SOURCE:
2470 case MADERA_EQ2MIX_INPUT_2_VOLUME:
2471 case MADERA_EQ2MIX_INPUT_3_SOURCE:
2472 case MADERA_EQ2MIX_INPUT_3_VOLUME:
2473 case MADERA_EQ2MIX_INPUT_4_SOURCE:
2474 case MADERA_EQ2MIX_INPUT_4_VOLUME:
2475 case MADERA_EQ3MIX_INPUT_1_SOURCE:
2476 case MADERA_EQ3MIX_INPUT_1_VOLUME:
2477 case MADERA_EQ3MIX_INPUT_2_SOURCE:
2478 case MADERA_EQ3MIX_INPUT_2_VOLUME:
2479 case MADERA_EQ3MIX_INPUT_3_SOURCE:
2480 case MADERA_EQ3MIX_INPUT_3_VOLUME:
2481 case MADERA_EQ3MIX_INPUT_4_SOURCE:
2482 case MADERA_EQ3MIX_INPUT_4_VOLUME:
2483 case MADERA_EQ4MIX_INPUT_1_SOURCE:
2484 case MADERA_EQ4MIX_INPUT_1_VOLUME:
2485 case MADERA_EQ4MIX_INPUT_2_SOURCE:
2486 case MADERA_EQ4MIX_INPUT_2_VOLUME:
2487 case MADERA_EQ4MIX_INPUT_3_SOURCE:
2488 case MADERA_EQ4MIX_INPUT_3_VOLUME:
2489 case MADERA_EQ4MIX_INPUT_4_SOURCE:
2490 case MADERA_EQ4MIX_INPUT_4_VOLUME:
2491 case MADERA_DRC1LMIX_INPUT_1_SOURCE:
2492 case MADERA_DRC1LMIX_INPUT_1_VOLUME:
2493 case MADERA_DRC1LMIX_INPUT_2_SOURCE:
2494 case MADERA_DRC1LMIX_INPUT_2_VOLUME:
2495 case MADERA_DRC1LMIX_INPUT_3_SOURCE:
2496 case MADERA_DRC1LMIX_INPUT_3_VOLUME:
2497 case MADERA_DRC1LMIX_INPUT_4_SOURCE:
2498 case MADERA_DRC1LMIX_INPUT_4_VOLUME:
2499 case MADERA_DRC1RMIX_INPUT_1_SOURCE:
2500 case MADERA_DRC1RMIX_INPUT_1_VOLUME:
2501 case MADERA_DRC1RMIX_INPUT_2_SOURCE:
2502 case MADERA_DRC1RMIX_INPUT_2_VOLUME:
2503 case MADERA_DRC1RMIX_INPUT_3_SOURCE:
2504 case MADERA_DRC1RMIX_INPUT_3_VOLUME:
2505 case MADERA_DRC1RMIX_INPUT_4_SOURCE:
2506 case MADERA_DRC1RMIX_INPUT_4_VOLUME:
2507 case MADERA_DRC2LMIX_INPUT_1_SOURCE:
2508 case MADERA_DRC2LMIX_INPUT_1_VOLUME:
2509 case MADERA_DRC2LMIX_INPUT_2_SOURCE:
2510 case MADERA_DRC2LMIX_INPUT_2_VOLUME:
2511 case MADERA_DRC2LMIX_INPUT_3_SOURCE:
2512 case MADERA_DRC2LMIX_INPUT_3_VOLUME:
2513 case MADERA_DRC2LMIX_INPUT_4_SOURCE:
2514 case MADERA_DRC2LMIX_INPUT_4_VOLUME:
2515 case MADERA_DRC2RMIX_INPUT_1_SOURCE:
2516 case MADERA_DRC2RMIX_INPUT_1_VOLUME:
2517 case MADERA_DRC2RMIX_INPUT_2_SOURCE:
2518 case MADERA_DRC2RMIX_INPUT_2_VOLUME:
2519 case MADERA_DRC2RMIX_INPUT_3_SOURCE:
2520 case MADERA_DRC2RMIX_INPUT_3_VOLUME:
2521 case MADERA_DRC2RMIX_INPUT_4_SOURCE:
2522 case MADERA_DRC2RMIX_INPUT_4_VOLUME:
2523 case MADERA_HPLP1MIX_INPUT_1_SOURCE:
2524 case MADERA_HPLP1MIX_INPUT_1_VOLUME:
2525 case MADERA_HPLP1MIX_INPUT_2_SOURCE:
2526 case MADERA_HPLP1MIX_INPUT_2_VOLUME:
2527 case MADERA_HPLP1MIX_INPUT_3_SOURCE:
2528 case MADERA_HPLP1MIX_INPUT_3_VOLUME:
2529 case MADERA_HPLP1MIX_INPUT_4_SOURCE:
2530 case MADERA_HPLP1MIX_INPUT_4_VOLUME:
2531 case MADERA_HPLP2MIX_INPUT_1_SOURCE:
2532 case MADERA_HPLP2MIX_INPUT_1_VOLUME:
2533 case MADERA_HPLP2MIX_INPUT_2_SOURCE:
2534 case MADERA_HPLP2MIX_INPUT_2_VOLUME:
2535 case MADERA_HPLP2MIX_INPUT_3_SOURCE:
2536 case MADERA_HPLP2MIX_INPUT_3_VOLUME:
2537 case MADERA_HPLP2MIX_INPUT_4_SOURCE:
2538 case MADERA_HPLP2MIX_INPUT_4_VOLUME:
2539 case MADERA_HPLP3MIX_INPUT_1_SOURCE:
2540 case MADERA_HPLP3MIX_INPUT_1_VOLUME:
2541 case MADERA_HPLP3MIX_INPUT_2_SOURCE:
2542 case MADERA_HPLP3MIX_INPUT_2_VOLUME:
2543 case MADERA_HPLP3MIX_INPUT_3_SOURCE:
2544 case MADERA_HPLP3MIX_INPUT_3_VOLUME:
2545 case MADERA_HPLP3MIX_INPUT_4_SOURCE:
2546 case MADERA_HPLP3MIX_INPUT_4_VOLUME:
2547 case MADERA_HPLP4MIX_INPUT_1_SOURCE:
2548 case MADERA_HPLP4MIX_INPUT_1_VOLUME:
2549 case MADERA_HPLP4MIX_INPUT_2_SOURCE:
2550 case MADERA_HPLP4MIX_INPUT_2_VOLUME:
2551 case MADERA_HPLP4MIX_INPUT_3_SOURCE:
2552 case MADERA_HPLP4MIX_INPUT_3_VOLUME:
2553 case MADERA_HPLP4MIX_INPUT_4_SOURCE:
2554 case MADERA_HPLP4MIX_INPUT_4_VOLUME:
2555 case MADERA_DSP1LMIX_INPUT_1_SOURCE:
2556 case MADERA_DSP1LMIX_INPUT_1_VOLUME:
2557 case MADERA_DSP1LMIX_INPUT_2_SOURCE:
2558 case MADERA_DSP1LMIX_INPUT_2_VOLUME:
2559 case MADERA_DSP1LMIX_INPUT_3_SOURCE:
2560 case MADERA_DSP1LMIX_INPUT_3_VOLUME:
2561 case MADERA_DSP1LMIX_INPUT_4_SOURCE:
2562 case MADERA_DSP1LMIX_INPUT_4_VOLUME:
2563 case MADERA_DSP1RMIX_INPUT_1_SOURCE:
2564 case MADERA_DSP1RMIX_INPUT_1_VOLUME:
2565 case MADERA_DSP1RMIX_INPUT_2_SOURCE:
2566 case MADERA_DSP1RMIX_INPUT_2_VOLUME:
2567 case MADERA_DSP1RMIX_INPUT_3_SOURCE:
2568 case MADERA_DSP1RMIX_INPUT_3_VOLUME:
2569 case MADERA_DSP1RMIX_INPUT_4_SOURCE:
2570 case MADERA_DSP1RMIX_INPUT_4_VOLUME:
2571 case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE:
2572 case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE:
2573 case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE:
2574 case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE:
2575 case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE:
2576 case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE:
2577 case MADERA_DSP2LMIX_INPUT_1_SOURCE:
2578 case MADERA_DSP2LMIX_INPUT_1_VOLUME:
2579 case MADERA_DSP2LMIX_INPUT_2_SOURCE:
2580 case MADERA_DSP2LMIX_INPUT_2_VOLUME:
2581 case MADERA_DSP2LMIX_INPUT_3_SOURCE:
2582 case MADERA_DSP2LMIX_INPUT_3_VOLUME:
2583 case MADERA_DSP2LMIX_INPUT_4_SOURCE:
2584 case MADERA_DSP2LMIX_INPUT_4_VOLUME:
2585 case MADERA_DSP2RMIX_INPUT_1_SOURCE:
2586 case MADERA_DSP2RMIX_INPUT_1_VOLUME:
2587 case MADERA_DSP2RMIX_INPUT_2_SOURCE:
2588 case MADERA_DSP2RMIX_INPUT_2_VOLUME:
2589 case MADERA_DSP2RMIX_INPUT_3_SOURCE:
2590 case MADERA_DSP2RMIX_INPUT_3_VOLUME:
2591 case MADERA_DSP2RMIX_INPUT_4_SOURCE:
2592 case MADERA_DSP2RMIX_INPUT_4_VOLUME:
2593 case MADERA_DSP2AUX1MIX_INPUT_1_SOURCE:
2594 case MADERA_DSP2AUX2MIX_INPUT_1_SOURCE:
2595 case MADERA_DSP2AUX3MIX_INPUT_1_SOURCE:
2596 case MADERA_DSP2AUX4MIX_INPUT_1_SOURCE:
2597 case MADERA_DSP2AUX5MIX_INPUT_1_SOURCE:
2598 case MADERA_DSP2AUX6MIX_INPUT_1_SOURCE:
2599 case MADERA_DSP3LMIX_INPUT_1_SOURCE:
2600 case MADERA_DSP3LMIX_INPUT_1_VOLUME:
2601 case MADERA_DSP3LMIX_INPUT_2_SOURCE:
2602 case MADERA_DSP3LMIX_INPUT_2_VOLUME:
2603 case MADERA_DSP3LMIX_INPUT_3_SOURCE:
2604 case MADERA_DSP3LMIX_INPUT_3_VOLUME:
2605 case MADERA_DSP3LMIX_INPUT_4_SOURCE:
2606 case MADERA_DSP3LMIX_INPUT_4_VOLUME:
2607 case MADERA_DSP3RMIX_INPUT_1_SOURCE:
2608 case MADERA_DSP3RMIX_INPUT_1_VOLUME:
2609 case MADERA_DSP3RMIX_INPUT_2_SOURCE:
2610 case MADERA_DSP3RMIX_INPUT_2_VOLUME:
2611 case MADERA_DSP3RMIX_INPUT_3_SOURCE:
2612 case MADERA_DSP3RMIX_INPUT_3_VOLUME:
2613 case MADERA_DSP3RMIX_INPUT_4_SOURCE:
2614 case MADERA_DSP3RMIX_INPUT_4_VOLUME:
2615 case MADERA_DSP3AUX1MIX_INPUT_1_SOURCE:
2616 case MADERA_DSP3AUX2MIX_INPUT_1_SOURCE:
2617 case MADERA_DSP3AUX3MIX_INPUT_1_SOURCE:
2618 case MADERA_DSP3AUX4MIX_INPUT_1_SOURCE:
2619 case MADERA_DSP3AUX5MIX_INPUT_1_SOURCE:
2620 case MADERA_DSP3AUX6MIX_INPUT_1_SOURCE:
2621 case MADERA_DSP4LMIX_INPUT_1_SOURCE:
2622 case MADERA_DSP4LMIX_INPUT_1_VOLUME:
2623 case MADERA_DSP4LMIX_INPUT_2_SOURCE:
2624 case MADERA_DSP4LMIX_INPUT_2_VOLUME:
2625 case MADERA_DSP4LMIX_INPUT_3_SOURCE:
2626 case MADERA_DSP4LMIX_INPUT_3_VOLUME:
2627 case MADERA_DSP4LMIX_INPUT_4_SOURCE:
2628 case MADERA_DSP4LMIX_INPUT_4_VOLUME:
2629 case MADERA_DSP4RMIX_INPUT_1_SOURCE:
2630 case MADERA_DSP4RMIX_INPUT_1_VOLUME:
2631 case MADERA_DSP4RMIX_INPUT_2_SOURCE:
2632 case MADERA_DSP4RMIX_INPUT_2_VOLUME:
2633 case MADERA_DSP4RMIX_INPUT_3_SOURCE:
2634 case MADERA_DSP4RMIX_INPUT_3_VOLUME:
2635 case MADERA_DSP4RMIX_INPUT_4_SOURCE:
2636 case MADERA_DSP4RMIX_INPUT_4_VOLUME:
2637 case MADERA_DSP4AUX1MIX_INPUT_1_SOURCE:
2638 case MADERA_DSP4AUX2MIX_INPUT_1_SOURCE:
2639 case MADERA_DSP4AUX3MIX_INPUT_1_SOURCE:
2640 case MADERA_DSP4AUX4MIX_INPUT_1_SOURCE:
2641 case MADERA_DSP4AUX5MIX_INPUT_1_SOURCE:
2642 case MADERA_DSP4AUX6MIX_INPUT_1_SOURCE:
2643 case MADERA_DSP5LMIX_INPUT_1_SOURCE:
2644 case MADERA_DSP5LMIX_INPUT_1_VOLUME:
2645 case MADERA_DSP5LMIX_INPUT_2_SOURCE:
2646 case MADERA_DSP5LMIX_INPUT_2_VOLUME:
2647 case MADERA_DSP5LMIX_INPUT_3_SOURCE:
2648 case MADERA_DSP5LMIX_INPUT_3_VOLUME:
2649 case MADERA_DSP5LMIX_INPUT_4_SOURCE:
2650 case MADERA_DSP5LMIX_INPUT_4_VOLUME:
2651 case MADERA_DSP5RMIX_INPUT_1_SOURCE:
2652 case MADERA_DSP5RMIX_INPUT_1_VOLUME:
2653 case MADERA_DSP5RMIX_INPUT_2_SOURCE:
2654 case MADERA_DSP5RMIX_INPUT_2_VOLUME:
2655 case MADERA_DSP5RMIX_INPUT_3_SOURCE:
2656 case MADERA_DSP5RMIX_INPUT_3_VOLUME:
2657 case MADERA_DSP5RMIX_INPUT_4_SOURCE:
2658 case MADERA_DSP5RMIX_INPUT_4_VOLUME:
2659 case MADERA_DSP5AUX1MIX_INPUT_1_SOURCE:
2660 case MADERA_DSP5AUX2MIX_INPUT_1_SOURCE:
2661 case MADERA_DSP5AUX3MIX_INPUT_1_SOURCE:
2662 case MADERA_DSP5AUX4MIX_INPUT_1_SOURCE:
2663 case MADERA_DSP5AUX5MIX_INPUT_1_SOURCE:
2664 case MADERA_DSP5AUX6MIX_INPUT_1_SOURCE:
2665 case MADERA_ASRC1_1LMIX_INPUT_1_SOURCE:
2666 case MADERA_ASRC1_1RMIX_INPUT_1_SOURCE:
2667 case MADERA_ASRC1_2LMIX_INPUT_1_SOURCE:
2668 case MADERA_ASRC1_2RMIX_INPUT_1_SOURCE:
2669 case MADERA_ASRC2_1LMIX_INPUT_1_SOURCE:
2670 case MADERA_ASRC2_1RMIX_INPUT_1_SOURCE:
2671 case MADERA_ASRC2_2LMIX_INPUT_1_SOURCE:
2672 case MADERA_ASRC2_2RMIX_INPUT_1_SOURCE:
2673 case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE:
2674 case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE:
2675 case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE:
2676 case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE:
2677 case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE:
2678 case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE:
2679 case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE:
2680 case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE:
2681 case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE:
2682 case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE:
2683 case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE:
2684 case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE:
2685 case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE:
2686 case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE:
2687 case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE:
2688 case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE:
2689 case MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE:
2690 case MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE:
2691 case MADERA_ISRC3INT1MIX_INPUT_1_SOURCE:
2692 case MADERA_ISRC3INT2MIX_INPUT_1_SOURCE:
2693 case MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE:
2694 case MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE:
2695 case MADERA_ISRC4INT1MIX_INPUT_1_SOURCE:
2696 case MADERA_ISRC4INT2MIX_INPUT_1_SOURCE:
2697 case MADERA_DSP6LMIX_INPUT_1_SOURCE:
2698 case MADERA_DSP6LMIX_INPUT_1_VOLUME:
2699 case MADERA_DSP6LMIX_INPUT_2_SOURCE:
2700 case MADERA_DSP6LMIX_INPUT_2_VOLUME:
2701 case MADERA_DSP6LMIX_INPUT_3_SOURCE:
2702 case MADERA_DSP6LMIX_INPUT_3_VOLUME:
2703 case MADERA_DSP6LMIX_INPUT_4_SOURCE:
2704 case MADERA_DSP6LMIX_INPUT_4_VOLUME:
2705 case MADERA_DSP6RMIX_INPUT_1_SOURCE:
2706 case MADERA_DSP6RMIX_INPUT_1_VOLUME:
2707 case MADERA_DSP6RMIX_INPUT_2_SOURCE:
2708 case MADERA_DSP6RMIX_INPUT_2_VOLUME:
2709 case MADERA_DSP6RMIX_INPUT_3_SOURCE:
2710 case MADERA_DSP6RMIX_INPUT_3_VOLUME:
2711 case MADERA_DSP6RMIX_INPUT_4_SOURCE:
2712 case MADERA_DSP6RMIX_INPUT_4_VOLUME:
2713 case MADERA_DSP6AUX1MIX_INPUT_1_SOURCE:
2714 case MADERA_DSP6AUX2MIX_INPUT_1_SOURCE:
2715 case MADERA_DSP6AUX3MIX_INPUT_1_SOURCE:
2716 case MADERA_DSP6AUX4MIX_INPUT_1_SOURCE:
2717 case MADERA_DSP6AUX5MIX_INPUT_1_SOURCE:
2718 case MADERA_DSP6AUX6MIX_INPUT_1_SOURCE:
2719 case MADERA_DSP7LMIX_INPUT_1_SOURCE:
2720 case MADERA_DSP7LMIX_INPUT_1_VOLUME:
2721 case MADERA_DSP7LMIX_INPUT_2_SOURCE:
2722 case MADERA_DSP7LMIX_INPUT_2_VOLUME:
2723 case MADERA_DSP7LMIX_INPUT_3_SOURCE:
2724 case MADERA_DSP7LMIX_INPUT_3_VOLUME:
2725 case MADERA_DSP7LMIX_INPUT_4_SOURCE:
2726 case MADERA_DSP7LMIX_INPUT_4_VOLUME:
2727 case MADERA_DSP7RMIX_INPUT_1_SOURCE:
2728 case MADERA_DSP7RMIX_INPUT_1_VOLUME:
2729 case MADERA_DSP7RMIX_INPUT_2_SOURCE:
2730 case MADERA_DSP7RMIX_INPUT_2_VOLUME:
2731 case MADERA_DSP7RMIX_INPUT_3_SOURCE:
2732 case MADERA_DSP7RMIX_INPUT_3_VOLUME:
2733 case MADERA_DSP7RMIX_INPUT_4_SOURCE:
2734 case MADERA_DSP7RMIX_INPUT_4_VOLUME:
2735 case MADERA_DSP7AUX1MIX_INPUT_1_SOURCE:
2736 case MADERA_DSP7AUX2MIX_INPUT_1_SOURCE:
2737 case MADERA_DSP7AUX3MIX_INPUT_1_SOURCE:
2738 case MADERA_DSP7AUX4MIX_INPUT_1_SOURCE:
2739 case MADERA_DSP7AUX5MIX_INPUT_1_SOURCE:
2740 case MADERA_DSP7AUX6MIX_INPUT_1_SOURCE:
2741 case MADERA_FX_CTRL1:
2742 case MADERA_FX_CTRL2:
2743 case MADERA_EQ1_1 ... MADERA_EQ1_21:
2744 case MADERA_EQ2_1 ... MADERA_EQ2_21:
2745 case MADERA_EQ3_1 ... MADERA_EQ3_21:
2746 case MADERA_EQ4_1 ... MADERA_EQ4_21:
2747 case MADERA_DRC1_CTRL1:
2748 case MADERA_DRC1_CTRL2:
2749 case MADERA_DRC1_CTRL3:
2750 case MADERA_DRC1_CTRL4:
2751 case MADERA_DRC1_CTRL5:
2752 case MADERA_DRC2_CTRL1:
2753 case MADERA_DRC2_CTRL2:
2754 case MADERA_DRC2_CTRL3:
2755 case MADERA_DRC2_CTRL4:
2756 case MADERA_DRC2_CTRL5:
2757 case MADERA_HPLPF1_1:
2758 case MADERA_HPLPF1_2:
2759 case MADERA_HPLPF2_1:
2760 case MADERA_HPLPF2_2:
2761 case MADERA_HPLPF3_1:
2762 case MADERA_HPLPF3_2:
2763 case MADERA_HPLPF4_1:
2764 case MADERA_HPLPF4_2:
2765 case MADERA_ASRC1_ENABLE:
2766 case MADERA_ASRC1_STATUS:
2767 case MADERA_ASRC1_RATE1:
2768 case MADERA_ASRC1_RATE2:
2769 case MADERA_ASRC2_ENABLE:
2770 case MADERA_ASRC2_STATUS:
2771 case MADERA_ASRC2_RATE1:
2772 case MADERA_ASRC2_RATE2:
2773 case MADERA_ISRC_1_CTRL_1:
2774 case MADERA_ISRC_1_CTRL_2:
2775 case MADERA_ISRC_1_CTRL_3:
2776 case MADERA_ISRC_2_CTRL_1:
2777 case MADERA_ISRC_2_CTRL_2:
2778 case MADERA_ISRC_2_CTRL_3:
2779 case MADERA_ISRC_3_CTRL_1:
2780 case MADERA_ISRC_3_CTRL_2:
2781 case MADERA_ISRC_3_CTRL_3:
2782 case MADERA_ISRC_4_CTRL_1:
2783 case MADERA_ISRC_4_CTRL_2:
2784 case MADERA_ISRC_4_CTRL_3:
2785 case MADERA_CLOCK_CONTROL:
2786 case MADERA_ANC_SRC:
2787 case MADERA_DSP_STATUS:
2788 case MADERA_ANC_COEFF_START ... MADERA_ANC_COEFF_END:
2789 case MADERA_FCL_FILTER_CONTROL:
2790 case MADERA_FCL_ADC_REFORMATTER_CONTROL:
2791 case MADERA_FCL_COEFF_START ... MADERA_FCL_COEFF_END:
2792 case MADERA_FCR_FILTER_CONTROL:
2793 case MADERA_FCR_ADC_REFORMATTER_CONTROL:
2794 case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END:
2795 case MADERA_DAC_COMP_1:
2796 case MADERA_DAC_COMP_2:
2797 case MADERA_FRF_COEFFICIENT_1L_1:
2798 case MADERA_FRF_COEFFICIENT_1L_2:
2799 case MADERA_FRF_COEFFICIENT_1L_3:
2800 case MADERA_FRF_COEFFICIENT_1L_4:
2801 case MADERA_FRF_COEFFICIENT_1R_1:
2802 case MADERA_FRF_COEFFICIENT_1R_2:
2803 case MADERA_FRF_COEFFICIENT_1R_3:
2804 case MADERA_FRF_COEFFICIENT_1R_4:
2805 case MADERA_FRF_COEFFICIENT_2L_1:
2806 case MADERA_FRF_COEFFICIENT_2L_2:
2807 case MADERA_FRF_COEFFICIENT_2L_3:
2808 case MADERA_FRF_COEFFICIENT_2L_4:
2809 case MADERA_FRF_COEFFICIENT_2R_1:
2810 case MADERA_FRF_COEFFICIENT_2R_2:
2811 case MADERA_FRF_COEFFICIENT_2R_3:
2812 case MADERA_FRF_COEFFICIENT_2R_4:
2813 case MADERA_FRF_COEFFICIENT_3L_1:
2814 case MADERA_FRF_COEFFICIENT_3L_2:
2815 case MADERA_FRF_COEFFICIENT_3L_3:
2816 case MADERA_FRF_COEFFICIENT_3L_4:
2817 case MADERA_FRF_COEFFICIENT_3R_1:
2818 case MADERA_FRF_COEFFICIENT_3R_2:
2819 case MADERA_FRF_COEFFICIENT_3R_3:
2820 case MADERA_FRF_COEFFICIENT_3R_4:
2821 case MADERA_FRF_COEFFICIENT_4L_1:
2822 case MADERA_FRF_COEFFICIENT_4L_2:
2823 case MADERA_FRF_COEFFICIENT_4L_3:
2824 case MADERA_FRF_COEFFICIENT_4L_4:
2825 case MADERA_FRF_COEFFICIENT_4R_1:
2826 case MADERA_FRF_COEFFICIENT_4R_2:
2827 case MADERA_FRF_COEFFICIENT_4R_3:
2828 case MADERA_FRF_COEFFICIENT_4R_4:
2829 case MADERA_FRF_COEFFICIENT_5L_1:
2830 case MADERA_FRF_COEFFICIENT_5L_2:
2831 case MADERA_FRF_COEFFICIENT_5L_3:
2832 case MADERA_FRF_COEFFICIENT_5L_4:
2833 case MADERA_FRF_COEFFICIENT_5R_1:
2834 case MADERA_FRF_COEFFICIENT_5R_2:
2835 case MADERA_FRF_COEFFICIENT_5R_3:
2836 case MADERA_FRF_COEFFICIENT_5R_4:
2837 case MADERA_FRF_COEFFICIENT_6L_1:
2838 case MADERA_FRF_COEFFICIENT_6L_2:
2839 case MADERA_FRF_COEFFICIENT_6L_3:
2840 case MADERA_FRF_COEFFICIENT_6L_4:
2841 case MADERA_FRF_COEFFICIENT_6R_1:
2842 case MADERA_FRF_COEFFICIENT_6R_2:
2843 case MADERA_FRF_COEFFICIENT_6R_3:
2844 case MADERA_FRF_COEFFICIENT_6R_4:
2845 case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO40_CTRL_2:
2846 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33:
2847 case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33:
2848 case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33:
2849 case MADERA_INTERRUPT_DEBOUNCE_7:
2850 case MADERA_IRQ1_CTRL:
2851 return true;
2852 default:
2853 return false;
2854 }
2855}
2856
2857static bool cs47l85_16bit_volatile_register(struct device *dev,
2858 unsigned int reg)
2859{
2860 switch (reg) {
2861 case MADERA_SOFTWARE_RESET:
2862 case MADERA_HARDWARE_REVISION:
2863 case MADERA_WRITE_SEQUENCER_CTRL_0:
2864 case MADERA_WRITE_SEQUENCER_CTRL_1:
2865 case MADERA_WRITE_SEQUENCER_CTRL_2:
2866 case MADERA_HAPTICS_STATUS:
2867 case MADERA_SAMPLE_RATE_1_STATUS:
2868 case MADERA_SAMPLE_RATE_2_STATUS:
2869 case MADERA_SAMPLE_RATE_3_STATUS:
2870 case MADERA_ASYNC_SAMPLE_RATE_1_STATUS:
2871 case MADERA_ASYNC_SAMPLE_RATE_2_STATUS:
2872 case MADERA_HP_CTRL_1L:
2873 case MADERA_HP_CTRL_1R:
2874 case MADERA_HP_CTRL_2L:
2875 case MADERA_HP_CTRL_2R:
2876 case MADERA_HP_CTRL_3L:
2877 case MADERA_HP_CTRL_3R:
2878 case MADERA_DCS_HP1L_CONTROL:
2879 case MADERA_DCS_HP1R_CONTROL:
2880 case MADERA_MIC_DETECT_1_CONTROL_3:
2881 case MADERA_MIC_DETECT_1_CONTROL_4:
2882 case MADERA_HEADPHONE_DETECT_2:
2883 case MADERA_HEADPHONE_DETECT_3:
2884 case MADERA_HEADPHONE_DETECT_5:
2885 case MADERA_INPUT_ENABLES_STATUS:
2886 case MADERA_OUTPUT_STATUS_1:
2887 case MADERA_RAW_OUTPUT_STATUS_1:
2888 case MADERA_SPD1_TX_CHANNEL_STATUS_1:
2889 case MADERA_SPD1_TX_CHANNEL_STATUS_2:
2890 case MADERA_SPD1_TX_CHANNEL_STATUS_3:
2891 case MADERA_SLIMBUS_RX_PORT_STATUS:
2892 case MADERA_SLIMBUS_TX_PORT_STATUS:
2893 case MADERA_FX_CTRL2:
2894 case MADERA_ASRC2_STATUS:
2895 case MADERA_ASRC1_STATUS:
2896 case MADERA_CLOCK_CONTROL:
2897 case MADERA_IRQ1_STATUS_1 ...MADERA_IRQ1_STATUS_33:
2898 case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33:
2899 return true;
2900 default:
2901 return false;
2902 }
2903}
2904
2905static bool cs47l85_32bit_readable_register(struct device *dev,
2906 unsigned int reg)
2907{
2908 switch (reg) {
2909 case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508:
2910 case CS47L85_OTP_HPDET_CAL_1 ... CS47L85_OTP_HPDET_CAL_2:
2911 case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2:
2912 case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2:
2913 case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2:
2914 case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_SCRATCH_2:
2915 case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_SCRATCH_2:
2916 case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_SCRATCH_2:
2917 case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_SCRATCH_2:
2918 return true;
2919 default:
2920 return cs47l85_is_adsp_memory(reg);
2921 }
2922}
2923
2924static bool cs47l85_32bit_volatile_register(struct device *dev,
2925 unsigned int reg)
2926{
2927 switch (reg) {
2928 case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508:
2929 case CS47L85_OTP_HPDET_CAL_1 ... CS47L85_OTP_HPDET_CAL_2:
2930 case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2:
2931 case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2:
2932 case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2:
2933 case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_SCRATCH_2:
2934 case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_SCRATCH_2:
2935 case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_SCRATCH_2:
2936 case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_SCRATCH_2:
2937 return true;
2938 default:
2939 return cs47l85_is_adsp_memory(reg);
2940 }
2941}
2942
2943const struct regmap_config cs47l85_16bit_spi_regmap = {
2944 .name = "cs47l85_16bit",
2945 .reg_bits = 32,
2946 .pad_bits = 16,
2947 .val_bits = 16,
2948 .reg_format_endian = REGMAP_ENDIAN_BIG,
2949 .val_format_endian = REGMAP_ENDIAN_BIG,
2950
2951 .max_register = 0x2fff,
2952 .readable_reg = cs47l85_16bit_readable_register,
2953 .volatile_reg = cs47l85_16bit_volatile_register,
2954
2955 .cache_type = REGCACHE_RBTREE,
2956 .reg_defaults = cs47l85_reg_default,
2957 .num_reg_defaults = ARRAY_SIZE(cs47l85_reg_default),
2958};
2959EXPORT_SYMBOL_GPL(cs47l85_16bit_spi_regmap);
2960
2961const struct regmap_config cs47l85_16bit_i2c_regmap = {
2962 .name = "cs47l85_16bit",
2963 .reg_bits = 32,
2964 .val_bits = 16,
2965 .reg_format_endian = REGMAP_ENDIAN_BIG,
2966 .val_format_endian = REGMAP_ENDIAN_BIG,
2967
2968 .max_register = 0x2fff,
2969 .readable_reg = cs47l85_16bit_readable_register,
2970 .volatile_reg = cs47l85_16bit_volatile_register,
2971
2972 .cache_type = REGCACHE_RBTREE,
2973 .reg_defaults = cs47l85_reg_default,
2974 .num_reg_defaults = ARRAY_SIZE(cs47l85_reg_default),
2975};
2976EXPORT_SYMBOL_GPL(cs47l85_16bit_i2c_regmap);
2977
2978const struct regmap_config cs47l85_32bit_spi_regmap = {
2979 .name = "cs47l85_32bit",
2980 .reg_bits = 32,
2981 .reg_stride = 2,
2982 .pad_bits = 16,
2983 .val_bits = 32,
2984 .reg_format_endian = REGMAP_ENDIAN_BIG,
2985 .val_format_endian = REGMAP_ENDIAN_BIG,
2986
2987 .max_register = MADERA_DSP7_SCRATCH_2,
2988 .readable_reg = cs47l85_32bit_readable_register,
2989 .volatile_reg = cs47l85_32bit_volatile_register,
2990
2991 .cache_type = REGCACHE_RBTREE,
2992};
2993EXPORT_SYMBOL_GPL(cs47l85_32bit_spi_regmap);
2994
2995const struct regmap_config cs47l85_32bit_i2c_regmap = {
2996 .name = "cs47l85_32bit",
2997 .reg_bits = 32,
2998 .reg_stride = 2,
2999 .val_bits = 32,
3000 .reg_format_endian = REGMAP_ENDIAN_BIG,
3001 .val_format_endian = REGMAP_ENDIAN_BIG,
3002
3003 .max_register = MADERA_DSP7_SCRATCH_2,
3004 .readable_reg = cs47l85_32bit_readable_register,
3005 .volatile_reg = cs47l85_32bit_volatile_register,
3006
3007 .cache_type = REGCACHE_RBTREE,
3008};
3009EXPORT_SYMBOL_GPL(cs47l85_32bit_i2c_regmap);
diff --git a/drivers/mfd/cs47l90-tables.c b/drivers/mfd/cs47l90-tables.c
new file mode 100644
index 000000000000..77207d98f0cc
--- /dev/null
+++ b/drivers/mfd/cs47l90-tables.c
@@ -0,0 +1,2674 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Regmap tables for CS47L90 codec
4 *
5 * Copyright (C) 2015-2017 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/device.h>
13#include <linux/module.h>
14#include <linux/regmap.h>
15
16#include <linux/mfd/madera/core.h>
17#include <linux/mfd/madera/registers.h>
18
19#include "madera.h"
20
21static const struct reg_sequence cs47l90_reva_16_patch[] = {
22 { 0x8A, 0x5555 },
23 { 0x8A, 0xAAAA },
24 { 0x4CF, 0x0700 },
25 { 0x171, 0x0003 },
26 { 0x101, 0x0444 },
27 { 0x159, 0x0002 },
28 { 0x120, 0x0444 },
29 { 0x1D1, 0x0004 },
30 { 0x1E0, 0xC084 },
31 { 0x159, 0x0000 },
32 { 0x120, 0x0404 },
33 { 0x101, 0x0404 },
34 { 0x171, 0x0002 },
35 { 0x17A, 0x2906 },
36 { 0x19A, 0x2906 },
37 { 0x441, 0xC750 },
38 { 0x340, 0x0001 },
39 { 0x112, 0x0405 },
40 { 0x124, 0x0C49 },
41 { 0x1300, 0x050E },
42 { 0x1302, 0x0101 },
43 { 0x1380, 0x0425 },
44 { 0x1381, 0xF6D8 },
45 { 0x1382, 0x0632 },
46 { 0x1383, 0xFEC8 },
47 { 0x1390, 0x042F },
48 { 0x1391, 0xF6CA },
49 { 0x1392, 0x0637 },
50 { 0x1393, 0xFEC8 },
51 { 0x281, 0x0000 },
52 { 0x282, 0x0000 },
53 { 0x4EA, 0x0100 },
54 { 0x8A, 0xCCCC },
55 { 0x8A, 0x3333 },
56};
57
58int cs47l90_patch(struct madera *madera)
59{
60 int ret;
61
62 ret = regmap_register_patch(madera->regmap,
63 cs47l90_reva_16_patch,
64 ARRAY_SIZE(cs47l90_reva_16_patch));
65 if (ret < 0) {
66 dev_err(madera->dev,
67 "Error in applying 16-bit patch: %d\n", ret);
68 return ret;
69 }
70
71 return 0;
72}
73EXPORT_SYMBOL_GPL(cs47l90_patch);
74
75static const struct reg_default cs47l90_reg_default[] = {
76 { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */
77 { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */
78 { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */
79 { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */
80 { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */
81 { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */
82 { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */
83 { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */
84 { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */
85 { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */
86 { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */
87 { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */
88 { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1 */
89 { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2 */
90 { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */
91 { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */
92 { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */
93 { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */
94 { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */
95 { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */
96 { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */
97 { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */
98 { 0x000000a0, 0x0000 }, /* R160 (0xa0) - Comfort Noise Generator */
99 { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */
100 { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */
101 { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */
102 { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */
103 { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */
104 { 0x00000112, 0x0405 }, /* R274 (0x112) - Async clock 1 */
105 { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */
106 { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */
107 { 0x00000120, 0x0404 }, /* R288 (0x120) - DSP Clock 1 */
108 { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */
109 { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */
110 { 0x0000014a, 0x0000 }, /* R330 (0x14a) - Output async clock */
111 { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */
112 { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */
113 { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */
114 { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */
115 { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */
116 { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */
117 { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */
118 { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */
119 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */
120 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */
121 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */
122 { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */
123 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */
124 { 0x0000017a, 0x2906 }, /* R377 (0x17a) - FLL1 Efs 2 */
125 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */
126 { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */
127 { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */
128 { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */
129 { 0x00000185, 0x0000 }, /* R389 (0x185) - FLL1 Synchroniser 5 */
130 { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */
131 { 0x00000187, 0x0001 }, /* R391 (0x187) - FLL1 Synchroniser 7 */
132 { 0x00000189, 0x0000 }, /* R393 (0x189) - FLL1 Spread Spectrum */
133 { 0x0000018a, 0x0004 }, /* R394 (0x18a) - FLL1 GPIO Clock */
134 { 0x00000191, 0x0002 }, /* R401 (0x191) - FLL2 Control 1 */
135 { 0x00000192, 0x0008 }, /* R402 (0x192) - FLL2 Control 2 */
136 { 0x00000193, 0x0018 }, /* R403 (0x193) - FLL2 Control 3 */
137 { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */
138 { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */
139 { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */
140 { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */
141 { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */
142 { 0x0000019a, 0x2906 }, /* R410 (0x19a) - FLL2 Efs 2 */
143 { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */
144 { 0x000001a2, 0x0000 }, /* R418 (0x1a2) - FLL2 Synchroniser 2 */
145 { 0x000001a3, 0x0000 }, /* R419 (0x1a3) - FLL2 Synchroniser 3 */
146 { 0x000001a4, 0x0000 }, /* R420 (0x1a4) - FLL2 Synchroniser 4 */
147 { 0x000001a5, 0x0000 }, /* R421 (0x1a5) - FLL2 Synchroniser 5 */
148 { 0x000001a6, 0x0000 }, /* R422 (0x1a6) - FLL2 Synchroniser 6 */
149 { 0x000001a7, 0x0001 }, /* R423 (0x1a7) - FLL2 Synchroniser 7 */
150 { 0x000001a9, 0x0000 }, /* R425 (0x1a9) - FLL2 Spread Spectrum */
151 { 0x000001aa, 0x0004 }, /* R426 (0x1aa) - FLL2 GPIO Clock */
152 { 0x000001d1, 0x0004 }, /* R465 (0x1d1) - FLLAO_CONTROL_1 */
153 { 0x000001d2, 0x0004 }, /* R466 (0x1d2) - FLLAO_CONTROL_2 */
154 { 0x000001d3, 0x0000 }, /* R467 (0x1d3) - FLLAO_CONTROL_3 */
155 { 0x000001d4, 0x0000 }, /* R468 (0x1d4) - FLLAO_CONTROL_4 */
156 { 0x000001d5, 0x0001 }, /* R469 (0x1d5) - FLLAO_CONTROL_5 */
157 { 0x000001d6, 0x8004 }, /* R470 (0x1d6) - FLLAO_CONTROL_6 */
158 { 0x000001d8, 0x0000 }, /* R472 (0x1d8) - FLLAO_CONTROL_7 */
159 { 0x000001da, 0x0070 }, /* R474 (0x1da) - FLLAO_CONTROL_8 */
160 { 0x000001db, 0x0000 }, /* R475 (0x1db) - FLLAO_CONTROL_9 */
161 { 0x000001dc, 0x06da }, /* R476 (0x1dc) - FLLAO_CONTROL_10 */
162 { 0x000001dd, 0x0011 }, /* R477 (0x1dd) - FLLAO_CONTROL_11 */
163 { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */
164 { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */
165 { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */
166 { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */
167 { 0x0000021c, 0x2222 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */
168 { 0x0000021e, 0x2222 }, /* R542 (0x21e) - Mic Bias Ctrl 6 */
169 { 0x0000027e, 0x0000 }, /* R638 (0x27e) - EDRE HP stereo control */
170 { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */
171 { 0x00000299, 0x0000 }, /* R665 (0x299) - Headphone Detect 0 */
172 { 0x0000029b, 0x0000 }, /* R667 (0x29b) - Headphone Detect 1 */
173 { 0x000002a2, 0x0010 }, /* R674 (0x2a2) - Mic Detect 1 Control 0 */
174 { 0x000002a3, 0x1102 }, /* R675 (0x2a3) - Mic Detect 1 Control 1 */
175 { 0x000002a4, 0x009f }, /* R676 (0x2a4) - Mic Detect 1 Control 2 */
176 { 0x000002a6, 0x3d3d }, /* R678 (0x2a6) - Mic Detect 1 Level 1 */
177 { 0x000002a7, 0x3d3d }, /* R679 (0x2a7) - Mic Detect 1 Level 2 */
178 { 0x000002a8, 0x333d }, /* R680 (0x2a8) - Mic Detect 1 Level 3 */
179 { 0x000002a9, 0x202d }, /* R681 (0x2a9) - Mic Detect 1 Level 4 */
180 { 0x000002b2, 0x0010 }, /* R690 (0x2b2) - Mic Detect 2 Control 0 */
181 { 0x000002b3, 0x1102 }, /* R691 (0x2b3) - Mic Detect 2 Control 1 */
182 { 0x000002b4, 0x009f }, /* R692 (0x2b4) - Mic Detect 2 Control 2 */
183 { 0x000002b6, 0x3d3d }, /* R694 (0x2b6) - Mic Detect 2 Level 1 */
184 { 0x000002b7, 0x3d3d }, /* R695 (0x2b7) - Mic Detect 2 Level 2 */
185 { 0x000002b8, 0x333d }, /* R696 (0x2b8) - Mic Detect 2 Level 3 */
186 { 0x000002b9, 0x202d }, /* R697 (0x2b9) - Mic Detect 2 Level 4 */
187 { 0x000002c6, 0x0010 }, /* R710 (0x2c6) - Mic Clamp control */
188 { 0x000002c8, 0x0000 }, /* R712 (0x2c8) - GP switch 1 */
189 { 0x000002d3, 0x0000 }, /* R723 (0x2d3) - Jack detect analogue */
190 { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */
191 { 0x00000308, 0x0400 }, /* R776 (0x308) - Input Rate */
192 { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */
193 { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */
194 { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */
195 { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */
196 { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */
197 { 0x00000313, 0x0000 }, /* R787 (0x313) - IN1L Rate Control */
198 { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */
199 { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */
200 { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */
201 { 0x00000317, 0x0000 }, /* R791 (0x317) - IN1R Rate Control */
202 { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */
203 { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */
204 { 0x0000031a, 0x0500 }, /* R794 (0x31a) - DMIC2L Control */
205 { 0x0000031b, 0x0000 }, /* R795 (0x31b) - IN2L Rate Control */
206 { 0x0000031c, 0x0080 }, /* R796 (0x31c) - IN2R Control */
207 { 0x0000031d, 0x0180 }, /* R797 (0x31d) - ADC Digital Volume 2R */
208 { 0x0000031e, 0x0000 }, /* R798 (0x31e) - DMIC2R Control */
209 { 0x0000031f, 0x0000 }, /* R799 (0x31f) - IN2R Rate Control */
210 { 0x00000320, 0x0000 }, /* R800 (0x320) - IN3L Control */
211 { 0x00000321, 0x0180 }, /* R801 (0x321) - ADC Digital Volume 3L */
212 { 0x00000322, 0x0500 }, /* R802 (0x322) - DMIC3L Control */
213 { 0x00000323, 0x0000 }, /* R803 (0x323) - IN3L Rate Control */
214 { 0x00000324, 0x0000 }, /* R804 (0x324) - IN3R Control */
215 { 0x00000325, 0x0180 }, /* R805 (0x325) - ADC Digital Volume 3R */
216 { 0x00000326, 0x0000 }, /* R806 (0x326) - DMIC3R Control */
217 { 0x00000327, 0x0000 }, /* R807 (0x327) - IN3R Rate Control */
218 { 0x00000328, 0x0000 }, /* R808 (0x328) - IN4 Control */
219 { 0x00000329, 0x0180 }, /* R809 (0x329) - ADC Digital Volume 4L */
220 { 0x0000032a, 0x0500 }, /* R810 (0x32a) - DMIC4L Control */
221 { 0x0000032b, 0x0000 }, /* R811 (0x32b) - IN4L Rate Control */
222 { 0x0000032c, 0x0000 }, /* R812 (0x32c) - IN4R Control */
223 { 0x0000032d, 0x0180 }, /* R813 (0x32d) - ADC Digital Volume 4R */
224 { 0x0000032e, 0x0000 }, /* R814 (0x32e) - DMIC4R Control */
225 { 0x0000032f, 0x0000 }, /* R815 (0x32f) - IN4R Rate Control */
226 { 0x00000330, 0x0000 }, /* R816 (0x330) - IN5L Control */
227 { 0x00000331, 0x0180 }, /* R817 (0x331) - ADC Digital Volume 5L */
228 { 0x00000332, 0x0500 }, /* R818 (0x332) - DMIC5L Control */
229 { 0x00000333, 0x0000 }, /* R819 (0x333) - IN5L Rate Control */
230 { 0x00000334, 0x0000 }, /* R820 (0x334) - IN5R Control */
231 { 0x00000335, 0x0180 }, /* R821 (0x335) - ADC Digital Volume 5R */
232 { 0x00000336, 0x0000 }, /* R822 (0x336) - DMIC5R Control */
233 { 0x00000337, 0x0000 }, /* R823 (0x337) - IN5R Rate Control */
234 { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */
235 { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */
236 { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */
237 { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */
238 { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */
239 { 0x00000412, 0x0000 }, /* R1042 (0x412) - Output Path Config 1 */
240 { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */
241 { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */
242 { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */
243 { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */
244 { 0x00000418, 0x0080 }, /* R1048 (0x418) - Output Path Config 2L */
245 { 0x00000419, 0x0180 }, /* R1049 (0x419) - DAC Digital Volume 2L */
246 { 0x0000041a, 0x0002 }, /* R1050 (0x41a) - Output Path Config 2 */
247 { 0x0000041b, 0x0004 }, /* R1051 (0x41b) - Noise Gate Select 2L */
248 { 0x0000041c, 0x0080 }, /* R1052 (0x41c) - Output Path Config 2R */
249 { 0x0000041d, 0x0180 }, /* R1053 (0x41d) - DAC Digital Volume 2R */
250 { 0x0000041f, 0x0008 }, /* R1055 (0x41f) - Noise Gate Select 2R */
251 { 0x00000420, 0x0080 }, /* R1056 (0x420) - Output Path Config 3L */
252 { 0x00000421, 0x0180 }, /* R1057 (0x421) - DAC Digital Volume 3L */
253 { 0x00000423, 0x0010 }, /* R1059 (0x423) - Noise Gate Select 3L */
254 { 0x00000424, 0x0080 }, /* R1060 (0x424) - Output Path Config 3R */
255 { 0x00000425, 0x0180 }, /* R1061 (0x425) - DAC Digital Volume 3R */
256 { 0x00000427, 0x0020 }, /* R1063 (0x427) - Noise Gate Select 3R */
257 { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */
258 { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */
259 { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */
260 { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */
261 { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */
262 { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */
263 { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */
264 { 0x00000448, 0x003f }, /* R1096 (0x448) - eDRE Enable */
265 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */
266 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */
267 { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */
268 { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */
269 { 0x000004a0, 0x3080 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */
270 { 0x000004a1, 0x3000 }, /* R1185 (0x4a1) - HP2 Short Circuit Ctrl */
271 { 0x000004a2, 0x3000 }, /* R1186 (0x4a2) - HP3 Short Circuit Ctrl */
272 { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */
273 { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */
274 { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */
275 { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */
276 { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */
277 { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */
278 { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */
279 { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */
280 { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */
281 { 0x0000050a, 0x0001 }, /* R1290 (0x50a) - AIF1 Frame Ctrl 4 */
282 { 0x0000050b, 0x0002 }, /* R1291 (0x50b) - AIF1 Frame Ctrl 5 */
283 { 0x0000050c, 0x0003 }, /* R1292 (0x50c) - AIF1 Frame Ctrl 6 */
284 { 0x0000050d, 0x0004 }, /* R1293 (0x50d) - AIF1 Frame Ctrl 7 */
285 { 0x0000050e, 0x0005 }, /* R1294 (0x50e) - AIF1 Frame Ctrl 8 */
286 { 0x0000050f, 0x0006 }, /* R1295 (0x50f) - AIF1 Frame Ctrl 9 */
287 { 0x00000510, 0x0007 }, /* R1296 (0x510) - AIF1 Frame Ctrl 10 */
288 { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */
289 { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */
290 { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */
291 { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */
292 { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */
293 { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */
294 { 0x00000517, 0x0006 }, /* R1303 (0x517) - AIF1 Frame Ctrl 17 */
295 { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */
296 { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */
297 { 0x0000051a, 0x0000 }, /* R1306 (0x51a) - AIF1 Rx Enables */
298 { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */
299 { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */
300 { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */
301 { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */
302 { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */
303 { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */
304 { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */
305 { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */
306 { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */
307 { 0x0000054a, 0x0001 }, /* R1354 (0x54a) - AIF2 Frame Ctrl 4 */
308 { 0x0000054b, 0x0002 }, /* R1355 (0x54b) - AIF2 Frame Ctrl 5 */
309 { 0x0000054c, 0x0003 }, /* R1356 (0x54c) - AIF2 Frame Ctrl 6 */
310 { 0x0000054d, 0x0004 }, /* R1357 (0x54d) - AIF2 Frame Ctrl 7 */
311 { 0x0000054e, 0x0005 }, /* R1358 (0x54e) - AIF2 Frame Ctrl 8 */
312 { 0x0000054f, 0x0006 }, /* R1359 (0x54f) - AIF2 Frame Ctrl 9 */
313 { 0x00000550, 0x0007 }, /* R1360 (0x550) - AIF2 Frame Ctrl 10 */
314 { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */
315 { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */
316 { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */
317 { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */
318 { 0x00000555, 0x0004 }, /* R1365 (0x555) - AIF2 Frame Ctrl 15 */
319 { 0x00000556, 0x0005 }, /* R1366 (0x556) - AIF2 Frame Ctrl 16 */
320 { 0x00000557, 0x0006 }, /* R1367 (0x557) - AIF2 Frame Ctrl 17 */
321 { 0x00000558, 0x0007 }, /* R1368 (0x558) - AIF2 Frame Ctrl 18 */
322 { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */
323 { 0x0000055a, 0x0000 }, /* R1370 (0x55a) - AIF2 Rx Enables */
324 { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */
325 { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */
326 { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */
327 { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */
328 { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */
329 { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */
330 { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */
331 { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */
332 { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */
333 { 0x0000058a, 0x0001 }, /* R1418 (0x58a) - AIF3 Frame Ctrl 4 */
334 { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */
335 { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */
336 { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */
337 { 0x0000059a, 0x0000 }, /* R1434 (0x59a) - AIF3 Rx Enables */
338 { 0x000005a0, 0x000c }, /* R1440 (0x5a0) - AIF4 BCLK Ctrl */
339 { 0x000005a1, 0x0000 }, /* R1441 (0x5a1) - AIF4 Tx Pin Ctrl */
340 { 0x000005a2, 0x0000 }, /* R1442 (0x5a2) - AIF4 Rx Pin Ctrl */
341 { 0x000005a3, 0x0000 }, /* R1443 (0x5a3) - AIF4 Rate Ctrl */
342 { 0x000005a4, 0x0000 }, /* R1444 (0x5a4) - AIF4 Format */
343 { 0x000005a6, 0x0040 }, /* R1446 (0x5a6) - AIF4 Rx BCLK Rate */
344 { 0x000005a7, 0x1818 }, /* R1447 (0x5a7) - AIF4 Frame Ctrl 1 */
345 { 0x000005a8, 0x1818 }, /* R1448 (0x5a8) - AIF4 Frame Ctrl 2 */
346 { 0x000005a9, 0x0000 }, /* R1449 (0x5a9) - AIF4 Frame Ctrl 3 */
347 { 0x000005aa, 0x0001 }, /* R1450 (0x5aa) - AIF4 Frame Ctrl 4 */
348 { 0x000005b1, 0x0000 }, /* R1457 (0x5b1) - AIF4 Frame Ctrl 11 */
349 { 0x000005b2, 0x0001 }, /* R1458 (0x5b2) - AIF4 Frame Ctrl 12 */
350 { 0x000005b9, 0x0000 }, /* R1465 (0x5b9) - AIF4 Tx Enables */
351 { 0x000005ba, 0x0000 }, /* R1466 (0x5ba) - AIF4 Rx Enables */
352 { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */
353 { 0x000005e3, 0x0000 }, /* R1507 (0x5e3) - SLIMbus Framer Ref Gear */
354 { 0x000005e5, 0x0000 }, /* R1509 (0x5e5) - SLIMbus Rates 1 */
355 { 0x000005e6, 0x0000 }, /* R1510 (0x5e6) - SLIMbus Rates 2 */
356 { 0x000005e7, 0x0000 }, /* R1511 (0x5e7) - SLIMbus Rates 3 */
357 { 0x000005e8, 0x0000 }, /* R1512 (0x5e8) - SLIMbus Rates 4 */
358 { 0x000005e9, 0x0000 }, /* R1513 (0x5e9) - SLIMbus Rates 5 */
359 { 0x000005ea, 0x0000 }, /* R1514 (0x5ea) - SLIMbus Rates 6 */
360 { 0x000005eb, 0x0000 }, /* R1515 (0x5eb) - SLIMbus Rates 7 */
361 { 0x000005ec, 0x0000 }, /* R1516 (0x5ec) - SLIMbus Rates 8 */
362 { 0x000005f5, 0x0000 }, /* R1525 (0x5f5) - SLIMbus RX Channel Enable */
363 { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */
364 { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */
365 { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */
366 { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */
367 { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */
368 { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */
369 { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */
370 { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */
371 { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */
372 { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */
373 { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */
374 { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */
375 { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */
376 { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */
377 { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */
378 { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */
379 { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */
380 { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */
381 { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */
382 { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */
383 { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */
384 { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */
385 { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */
386 { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */
387 { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */
388 { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */
389 { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */
390 { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */
391 { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */
392 { 0x0000068c, 0x0000 }, /* R1672 (0x68c) - OUT1RMIX Input 3 Source */
393 { 0x0000068d, 0x0080 }, /* R1673 (0x68d) - OUT1RMIX Input 3 Volume */
394 { 0x0000068e, 0x0000 }, /* R1674 (0x68e) - OUT1RMIX Input 4 Source */
395 { 0x0000068f, 0x0080 }, /* R1675 (0x68f) - OUT1RMIX Input 4 Volume */
396 { 0x00000690, 0x0000 }, /* R1680 (0x690) - OUT2LMIX Input 1 Source */
397 { 0x00000691, 0x0080 }, /* R1681 (0x691) - OUT2LMIX Input 1 Volume */
398 { 0x00000692, 0x0000 }, /* R1682 (0x692) - OUT2LMIX Input 2 Source */
399 { 0x00000693, 0x0080 }, /* R1683 (0x693) - OUT2LMIX Input 2 Volume */
400 { 0x00000694, 0x0000 }, /* R1684 (0x694) - OUT2LMIX Input 3 Source */
401 { 0x00000695, 0x0080 }, /* R1685 (0x695) - OUT2LMIX Input 3 Volume */
402 { 0x00000696, 0x0000 }, /* R1686 (0x696) - OUT2LMIX Input 4 Source */
403 { 0x00000697, 0x0080 }, /* R1687 (0x697) - OUT2LMIX Input 4 Volume */
404 { 0x00000698, 0x0000 }, /* R1688 (0x698) - OUT2RMIX Input 1 Source */
405 { 0x00000699, 0x0080 }, /* R1689 (0x699) - OUT2RMIX Input 1 Volume */
406 { 0x0000069a, 0x0000 }, /* R1690 (0x69a) - OUT2RMIX Input 2 Source */
407 { 0x0000069b, 0x0080 }, /* R1691 (0x69b) - OUT2RMIX Input 2 Volume */
408 { 0x0000069c, 0x0000 }, /* R1692 (0x69c) - OUT2RMIX Input 3 Source */
409 { 0x0000069d, 0x0080 }, /* R1693 (0x69d) - OUT2RMIX Input 3 Volume */
410 { 0x0000069e, 0x0000 }, /* R1694 (0x69e) - OUT2RMIX Input 4 Source */
411 { 0x0000069f, 0x0080 }, /* R1695 (0x69f) - OUT2RMIX Input 4 Volume */
412 { 0x000006a0, 0x0000 }, /* R1696 (0x6a0) - OUT3LMIX Input 1 Source */
413 { 0x000006a1, 0x0080 }, /* R1697 (0x6a1) - OUT3LMIX Input 1 Volume */
414 { 0x000006a2, 0x0000 }, /* R1698 (0x6a2) - OUT3LMIX Input 2 Source */
415 { 0x000006a3, 0x0080 }, /* R1699 (0x6a3) - OUT3LMIX Input 2 Volume */
416 { 0x000006a4, 0x0000 }, /* R1700 (0x6a4) - OUT3LMIX Input 3 Source */
417 { 0x000006a5, 0x0080 }, /* R1701 (0x6a5) - OUT3LMIX Input 3 Volume */
418 { 0x000006a6, 0x0000 }, /* R1702 (0x6a6) - OUT3LMIX Input 4 Source */
419 { 0x000006a7, 0x0080 }, /* R1703 (0x6a7) - OUT3LMIX Input 4 Volume */
420 { 0x000006a8, 0x0000 }, /* R1704 (0x6a8) - OUT3RMIX Input 1 Source */
421 { 0x000006a9, 0x0080 }, /* R1705 (0x6a9) - OUT3RMIX Input 1 Volume */
422 { 0x000006aa, 0x0000 }, /* R1706 (0x6aa) - OUT3RMIX Input 2 Source */
423 { 0x000006ab, 0x0080 }, /* R1707 (0x6ab) - OUT3RMIX Input 2 Volume */
424 { 0x000006ac, 0x0000 }, /* R1708 (0x6ac) - OUT3RMIX Input 3 Source */
425 { 0x000006ad, 0x0080 }, /* R1709 (0x6ad) - OUT3RMIX Input 3 Volume */
426 { 0x000006ae, 0x0000 }, /* R1710 (0x6ae) - OUT3RMIX Input 4 Source */
427 { 0x000006af, 0x0080 }, /* R1711 (0x6af) - OUT3RMIX Input 4 Volume */
428 { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */
429 { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */
430 { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */
431 { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */
432 { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */
433 { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */
434 { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */
435 { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */
436 { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */
437 { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */
438 { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */
439 { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */
440 { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */
441 { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */
442 { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */
443 { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */
444 { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */
445 { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */
446 { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */
447 { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */
448 { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */
449 { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */
450 { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */
451 { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */
452 { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */
453 { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */
454 { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */
455 { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */
456 { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */
457 { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */
458 { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */
459 { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */
460 { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */
461 { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */
462 { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */
463 { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */
464 { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */
465 { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */
466 { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */
467 { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */
468 { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */
469 { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */
470 { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */
471 { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */
472 { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */
473 { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */
474 { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */
475 { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */
476 { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */
477 { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */
478 { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */
479 { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */
480 { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */
481 { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */
482 { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */
483 { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */
484 { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */
485 { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */
486 { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */
487 { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */
488 { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */
489 { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */
490 { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */
491 { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */
492 { 0x00000730, 0x0000 }, /* R1840 (0x730) - AIF1TX7MIX Input 1 Source */
493 { 0x00000731, 0x0080 }, /* R1841 (0x731) - AIF1TX7MIX Input 1 Volume */
494 { 0x00000732, 0x0000 }, /* R1842 (0x732) - AIF1TX7MIX Input 2 Source */
495 { 0x00000733, 0x0080 }, /* R1843 (0x733) - AIF1TX7MIX Input 2 Volume */
496 { 0x00000734, 0x0000 }, /* R1844 (0x734) - AIF1TX7MIX Input 3 Source */
497 { 0x00000735, 0x0080 }, /* R1845 (0x735) - AIF1TX7MIX Input 3 Volume */
498 { 0x00000736, 0x0000 }, /* R1846 (0x736) - AIF1TX7MIX Input 4 Source */
499 { 0x00000737, 0x0080 }, /* R1847 (0x737) - AIF1TX7MIX Input 4 Volume */
500 { 0x00000738, 0x0000 }, /* R1848 (0x738) - AIF1TX8MIX Input 1 Source */
501 { 0x00000739, 0x0080 }, /* R1849 (0x739) - AIF1TX8MIX Input 1 Volume */
502 { 0x0000073a, 0x0000 }, /* R1850 (0x73a) - AIF1TX8MIX Input 2 Source */
503 { 0x0000073b, 0x0080 }, /* R1851 (0x73b) - AIF1TX8MIX Input 2 Volume */
504 { 0x0000073c, 0x0000 }, /* R1852 (0x73c) - AIF1TX8MIX Input 3 Source */
505 { 0x0000073d, 0x0080 }, /* R1853 (0x73d) - AIF1TX8MIX Input 3 Volume */
506 { 0x0000073e, 0x0000 }, /* R1854 (0x73e) - AIF1TX8MIX Input 4 Source */
507 { 0x0000073f, 0x0080 }, /* R1855 (0x73f) - AIF1TX8MIX Input 4 Volume */
508 { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */
509 { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */
510 { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */
511 { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */
512 { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */
513 { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */
514 { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */
515 { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */
516 { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */
517 { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */
518 { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */
519 { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */
520 { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */
521 { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */
522 { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */
523 { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */
524 { 0x00000750, 0x0000 }, /* R1872 (0x750) - AIF2TX3MIX Input 1 Source */
525 { 0x00000751, 0x0080 }, /* R1873 (0x751) - AIF2TX3MIX Input 1 Volume */
526 { 0x00000752, 0x0000 }, /* R1874 (0x752) - AIF2TX3MIX Input 2 Source */
527 { 0x00000753, 0x0080 }, /* R1875 (0x753) - AIF2TX3MIX Input 2 Volume */
528 { 0x00000754, 0x0000 }, /* R1876 (0x754) - AIF2TX3MIX Input 3 Source */
529 { 0x00000755, 0x0080 }, /* R1877 (0x755) - AIF2TX3MIX Input 3 Volume */
530 { 0x00000756, 0x0000 }, /* R1878 (0x756) - AIF2TX3MIX Input 4 Source */
531 { 0x00000757, 0x0080 }, /* R1879 (0x757) - AIF2TX3MIX Input 4 Volume */
532 { 0x00000758, 0x0000 }, /* R1880 (0x758) - AIF2TX4MIX Input 1 Source */
533 { 0x00000759, 0x0080 }, /* R1881 (0x759) - AIF2TX4MIX Input 1 Volume */
534 { 0x0000075a, 0x0000 }, /* R1882 (0x75a) - AIF2TX4MIX Input 2 Source */
535 { 0x0000075b, 0x0080 }, /* R1883 (0x75b) - AIF2TX4MIX Input 2 Volume */
536 { 0x0000075c, 0x0000 }, /* R1884 (0x75c) - AIF2TX4MIX Input 3 Source */
537 { 0x0000075d, 0x0080 }, /* R1885 (0x75d) - AIF2TX4MIX Input 3 Volume */
538 { 0x0000075e, 0x0000 }, /* R1886 (0x75e) - AIF2TX4MIX Input 4 Source */
539 { 0x0000075f, 0x0080 }, /* R1887 (0x75f) - AIF2TX4MIX Input 4 Volume */
540 { 0x00000760, 0x0000 }, /* R1888 (0x760) - AIF2TX5MIX Input 1 Source */
541 { 0x00000761, 0x0080 }, /* R1889 (0x761) - AIF2TX5MIX Input 1 Volume */
542 { 0x00000762, 0x0000 }, /* R1890 (0x762) - AIF2TX5MIX Input 2 Source */
543 { 0x00000763, 0x0080 }, /* R1891 (0x763) - AIF2TX5MIX Input 2 Volume */
544 { 0x00000764, 0x0000 }, /* R1892 (0x764) - AIF2TX5MIX Input 3 Source */
545 { 0x00000765, 0x0080 }, /* R1893 (0x765) - AIF2TX5MIX Input 3 Volume */
546 { 0x00000766, 0x0000 }, /* R1894 (0x766) - AIF2TX5MIX Input 4 Source */
547 { 0x00000767, 0x0080 }, /* R1895 (0x767) - AIF2TX5MIX Input 4 Volume */
548 { 0x00000768, 0x0000 }, /* R1896 (0x768) - AIF2TX6MIX Input 1 Source */
549 { 0x00000769, 0x0080 }, /* R1897 (0x769) - AIF2TX6MIX Input 1 Volume */
550 { 0x0000076a, 0x0000 }, /* R1898 (0x76a) - AIF2TX6MIX Input 2 Source */
551 { 0x0000076b, 0x0080 }, /* R1899 (0x76b) - AIF2TX6MIX Input 2 Volume */
552 { 0x0000076c, 0x0000 }, /* R1900 (0x76c) - AIF2TX6MIX Input 3 Source */
553 { 0x0000076d, 0x0080 }, /* R1901 (0x76d) - AIF2TX6MIX Input 3 Volume */
554 { 0x0000076e, 0x0000 }, /* R1902 (0x76e) - AIF2TX6MIX Input 4 Source */
555 { 0x0000076f, 0x0080 }, /* R1903 (0x76f) - AIF2TX6MIX Input 4 Volume */
556 { 0x00000770, 0x0000 }, /* R1904 (0x770) - AIF2TX7MIX Input 1 Source */
557 { 0x00000771, 0x0080 }, /* R1905 (0x771) - AIF2TX7MIX Input 1 Volume */
558 { 0x00000772, 0x0000 }, /* R1906 (0x772) - AIF2TX7MIX Input 2 Source */
559 { 0x00000773, 0x0080 }, /* R1907 (0x773) - AIF2TX7MIX Input 2 Volume */
560 { 0x00000774, 0x0000 }, /* R1908 (0x774) - AIF2TX7MIX Input 3 Source */
561 { 0x00000775, 0x0080 }, /* R1909 (0x775) - AIF2TX7MIX Input 3 Volume */
562 { 0x00000776, 0x0000 }, /* R1910 (0x776) - AIF2TX7MIX Input 4 Source */
563 { 0x00000777, 0x0080 }, /* R1911 (0x777) - AIF2TX7MIX Input 4 Volume */
564 { 0x00000778, 0x0000 }, /* R1912 (0x778) - AIF2TX8MIX Input 1 Source */
565 { 0x00000779, 0x0080 }, /* R1913 (0x779) - AIF2TX8MIX Input 1 Volume */
566 { 0x0000077a, 0x0000 }, /* R1914 (0x77a) - AIF2TX8MIX Input 2 Source */
567 { 0x0000077b, 0x0080 }, /* R1915 (0x77b) - AIF2TX8MIX Input 2 Volume */
568 { 0x0000077c, 0x0000 }, /* R1916 (0x77c) - AIF2TX8MIX Input 3 Source */
569 { 0x0000077d, 0x0080 }, /* R1917 (0x77d) - AIF2TX8MIX Input 3 Volume */
570 { 0x0000077e, 0x0000 }, /* R1918 (0x77e) - AIF2TX8MIX Input 4 Source */
571 { 0x0000077f, 0x0080 }, /* R1919 (0x77f) - AIF2TX8MIX Input 4 Volume */
572 { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */
573 { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */
574 { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */
575 { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */
576 { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */
577 { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */
578 { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */
579 { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */
580 { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */
581 { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */
582 { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */
583 { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */
584 { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */
585 { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */
586 { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */
587 { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */
588 { 0x000007a0, 0x0000 }, /* R1952 (0x7a0) - AIF4TX1MIX Input 1 Source */
589 { 0x000007a1, 0x0080 }, /* R1953 (0x7a1) - AIF4TX1MIX Input 1 Volume */
590 { 0x000007a2, 0x0000 }, /* R1954 (0x7a2) - AIF4TX1MIX Input 2 Source */
591 { 0x000007a3, 0x0080 }, /* R1955 (0x7a3) - AIF4TX1MIX Input 2 Volume */
592 { 0x000007a4, 0x0000 }, /* R1956 (0x7a4) - AIF4TX1MIX Input 3 Source */
593 { 0x000007a5, 0x0080 }, /* R1957 (0x7a5) - AIF4TX1MIX Input 3 Volume */
594 { 0x000007a6, 0x0000 }, /* R1958 (0x7a6) - AIF4TX1MIX Input 4 Source */
595 { 0x000007a7, 0x0080 }, /* R1959 (0x7a7) - AIF4TX1MIX Input 4 Volume */
596 { 0x000007a8, 0x0000 }, /* R1960 (0x7a8) - AIF4TX2MIX Input 1 Source */
597 { 0x000007a9, 0x0080 }, /* R1961 (0x7a9) - AIF4TX2MIX Input 1 Volume */
598 { 0x000007aa, 0x0000 }, /* R1962 (0x7aa) - AIF4TX2MIX Input 2 Source */
599 { 0x000007ab, 0x0080 }, /* R1963 (0x7ab) - AIF4TX2MIX Input 2 Volume */
600 { 0x000007ac, 0x0000 }, /* R1964 (0x7ac) - AIF4TX2MIX Input 3 Source */
601 { 0x000007ad, 0x0080 }, /* R1965 (0x7ad) - AIF4TX2MIX Input 3 Volume */
602 { 0x000007ae, 0x0000 }, /* R1966 (0x7ae) - AIF4TX2MIX Input 4 Source */
603 { 0x000007af, 0x0080 }, /* R1967 (0x7af) - AIF4TX2MIX Input 4 Volume */
604 { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */
605 { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */
606 { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */
607 { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */
608 { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */
609 { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */
610 { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */
611 { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */
612 { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */
613 { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */
614 { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */
615 { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */
616 { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */
617 { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */
618 { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */
619 { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */
620 { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */
621 { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */
622 { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */
623 { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */
624 { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */
625 { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */
626 { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */
627 { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */
628 { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */
629 { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */
630 { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */
631 { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */
632 { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */
633 { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */
634 { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */
635 { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */
636 { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */
637 { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */
638 { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */
639 { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */
640 { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */
641 { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */
642 { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */
643 { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */
644 { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */
645 { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */
646 { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */
647 { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */
648 { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */
649 { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */
650 { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */
651 { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */
652 { 0x000007f0, 0x0000 }, /* R2032 (0x7f0) - SLIMTX7MIX Input 1 Source */
653 { 0x000007f1, 0x0080 }, /* R2033 (0x7f1) - SLIMTX7MIX Input 1 Volume */
654 { 0x000007f2, 0x0000 }, /* R2034 (0x7f2) - SLIMTX7MIX Input 2 Source */
655 { 0x000007f3, 0x0080 }, /* R2035 (0x7f3) - SLIMTX7MIX Input 2 Volume */
656 { 0x000007f4, 0x0000 }, /* R2036 (0x7f4) - SLIMTX7MIX Input 3 Source */
657 { 0x000007f5, 0x0080 }, /* R2037 (0x7f5) - SLIMTX7MIX Input 3 Volume */
658 { 0x000007f6, 0x0000 }, /* R2038 (0x7f6) - SLIMTX7MIX Input 4 Source */
659 { 0x000007f7, 0x0080 }, /* R2039 (0x7f7) - SLIMTX7MIX Input 4 Volume */
660 { 0x000007f8, 0x0000 }, /* R2040 (0x7f8) - SLIMTX8MIX Input 1 Source */
661 { 0x000007f9, 0x0080 }, /* R2041 (0x7f9) - SLIMTX8MIX Input 1 Volume */
662 { 0x000007fa, 0x0000 }, /* R2042 (0x7fa) - SLIMTX8MIX Input 2 Source */
663 { 0x000007fb, 0x0080 }, /* R2043 (0x7fb) - SLIMTX8MIX Input 2 Volume */
664 { 0x000007fc, 0x0000 }, /* R2044 (0x7fc) - SLIMTX8MIX Input 3 Source */
665 { 0x000007fd, 0x0080 }, /* R2045 (0x7fd) - SLIMTX8MIX Input 3 Volume */
666 { 0x000007fe, 0x0000 }, /* R2046 (0x7fe) - SLIMTX8MIX Input 4 Source */
667 { 0x000007ff, 0x0080 }, /* R2047 (0x7ff) - SLIMTX8MIX Input 4 Volume */
668 { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source */
669 { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume */
670 { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source */
671 { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume */
672 { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */
673 { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */
674 { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */
675 { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */
676 { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */
677 { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */
678 { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */
679 { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */
680 { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */
681 { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */
682 { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */
683 { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */
684 { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */
685 { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */
686 { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */
687 { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */
688 { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */
689 { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */
690 { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */
691 { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */
692 { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */
693 { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */
694 { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */
695 { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */
696 { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */
697 { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */
698 { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */
699 { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */
700 { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */
701 { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */
702 { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */
703 { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */
704 { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */
705 { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */
706 { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */
707 { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */
708 { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */
709 { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */
710 { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */
711 { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */
712 { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */
713 { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */
714 { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */
715 { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */
716 { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */
717 { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */
718 { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */
719 { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */
720 { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */
721 { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */
722 { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */
723 { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */
724 { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */
725 { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */
726 { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */
727 { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */
728 { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */
729 { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */
730 { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */
731 { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */
732 { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */
733 { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */
734 { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */
735 { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */
736 { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */
737 { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */
738 { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */
739 { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */
740 { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */
741 { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */
742 { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */
743 { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */
744 { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */
745 { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */
746 { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */
747 { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */
748 { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */
749 { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */
750 { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */
751 { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */
752 { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */
753 { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */
754 { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */
755 { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */
756 { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */
757 { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */
758 { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */
759 { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */
760 { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */
761 { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */
762 { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */
763 { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */
764 { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */
765 { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */
766 { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */
767 { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */
768 { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */
769 { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */
770 { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */
771 { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */
772 { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */
773 { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */
774 { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */
775 { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */
776 { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */
777 { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */
778 { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */
779 { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */
780 { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */
781 { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */
782 { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */
783 { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */
784 { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */
785 { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */
786 { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */
787 { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */
788 { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */
789 { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */
790 { 0x00000980, 0x0000 }, /* R2432 (0x980) - DSP2LMIX Input 1 Source */
791 { 0x00000981, 0x0080 }, /* R2433 (0x981) - DSP2LMIX Input 1 Volume */
792 { 0x00000982, 0x0000 }, /* R2434 (0x982) - DSP2LMIX Input 2 Source */
793 { 0x00000983, 0x0080 }, /* R2435 (0x983) - DSP2LMIX Input 2 Volume */
794 { 0x00000984, 0x0000 }, /* R2436 (0x984) - DSP2LMIX Input 3 Source */
795 { 0x00000985, 0x0080 }, /* R2437 (0x985) - DSP2LMIX Input 3 Volume */
796 { 0x00000986, 0x0000 }, /* R2438 (0x986) - DSP2LMIX Input 4 Source */
797 { 0x00000987, 0x0080 }, /* R2439 (0x987) - DSP2LMIX Input 4 Volume */
798 { 0x00000988, 0x0000 }, /* R2440 (0x988) - DSP2RMIX Input 1 Source */
799 { 0x00000989, 0x0080 }, /* R2441 (0x989) - DSP2RMIX Input 1 Volume */
800 { 0x0000098a, 0x0000 }, /* R2442 (0x98a) - DSP2RMIX Input 2 Source */
801 { 0x0000098b, 0x0080 }, /* R2443 (0x98b) - DSP2RMIX Input 2 Volume */
802 { 0x0000098c, 0x0000 }, /* R2444 (0x98c) - DSP2RMIX Input 3 Source */
803 { 0x0000098d, 0x0080 }, /* R2445 (0x98d) - DSP2RMIX Input 3 Volume */
804 { 0x0000098e, 0x0000 }, /* R2446 (0x98e) - DSP2RMIX Input 4 Source */
805 { 0x0000098f, 0x0080 }, /* R2447 (0x98f) - DSP2RMIX Input 4 Volume */
806 { 0x00000990, 0x0000 }, /* R2448 (0x990) - DSP2AUX1MIX Input 1 Source */
807 { 0x00000998, 0x0000 }, /* R2456 (0x998) - DSP2AUX2MIX Input 1 Source */
808 { 0x000009a0, 0x0000 }, /* R2464 (0x9a0) - DSP2AUX3MIX Input 1 Source */
809 { 0x000009a8, 0x0000 }, /* R2472 (0x9a8) - DSP2AUX4MIX Input 1 Source */
810 { 0x000009b0, 0x0000 }, /* R2480 (0x9b0) - DSP2AUX5MIX Input 1 Source */
811 { 0x000009b8, 0x0000 }, /* R2488 (0x9b8) - DSP2AUX6MIX Input 1 Source */
812 { 0x000009c0, 0x0000 }, /* R2496 (0x9c0) - DSP3LMIX Input 1 Source */
813 { 0x000009c1, 0x0080 }, /* R2497 (0x9c1) - DSP3LMIX Input 1 Volume */
814 { 0x000009c2, 0x0000 }, /* R2498 (0x9c2) - DSP3LMIX Input 2 Source */
815 { 0x000009c3, 0x0080 }, /* R2499 (0x9c3) - DSP3LMIX Input 2 Volume */
816 { 0x000009c4, 0x0000 }, /* R2500 (0x9c4) - DSP3LMIX Input 3 Source */
817 { 0x000009c5, 0x0080 }, /* R2501 (0x9c5) - DSP3LMIX Input 3 Volume */
818 { 0x000009c6, 0x0000 }, /* R2502 (0x9c6) - DSP3LMIX Input 4 Source */
819 { 0x000009c7, 0x0080 }, /* R2503 (0x9c7) - DSP3LMIX Input 4 Volume */
820 { 0x000009c8, 0x0000 }, /* R2504 (0x9c8) - DSP3RMIX Input 1 Source */
821 { 0x000009c9, 0x0080 }, /* R2505 (0x9c9) - DSP3RMIX Input 1 Volume */
822 { 0x000009ca, 0x0000 }, /* R2506 (0x9ca) - DSP3RMIX Input 2 Source */
823 { 0x000009cb, 0x0080 }, /* R2507 (0x9cb) - DSP3RMIX Input 2 Volume */
824 { 0x000009cc, 0x0000 }, /* R2508 (0x9cc) - DSP3RMIX Input 3 Source */
825 { 0x000009cd, 0x0080 }, /* R2509 (0x9cd) - DSP3RMIX Input 3 Volume */
826 { 0x000009ce, 0x0000 }, /* R2510 (0x9ce) - DSP3RMIX Input 4 Source */
827 { 0x000009cf, 0x0080 }, /* R2511 (0x9cf) - DSP3RMIX Input 4 Volume */
828 { 0x000009d0, 0x0000 }, /* R2512 (0x9d0) - DSP3AUX1MIX Input 1 Source */
829 { 0x000009d8, 0x0000 }, /* R2520 (0x9d8) - DSP3AUX2MIX Input 1 Source */
830 { 0x000009e0, 0x0000 }, /* R2528 (0x9e0) - DSP3AUX3MIX Input 1 Source */
831 { 0x000009e8, 0x0000 }, /* R2536 (0x9e8) - DSP3AUX4MIX Input 1 Source */
832 { 0x000009f0, 0x0000 }, /* R2544 (0x9f0) - DSP3AUX5MIX Input 1 Source */
833 { 0x000009f8, 0x0000 }, /* R2552 (0x9f8) - DSP3AUX6MIX Input 1 Source */
834 { 0x00000a00, 0x0000 }, /* R2560 (0xa00) - DSP4LMIX Input 1 Source */
835 { 0x00000a01, 0x0080 }, /* R2561 (0xa01) - DSP4LMIX Input 1 Volume */
836 { 0x00000a02, 0x0000 }, /* R2562 (0xa02) - DSP4LMIX Input 2 Source */
837 { 0x00000a03, 0x0080 }, /* R2563 (0xa03) - DSP4LMIX Input 2 Volume */
838 { 0x00000a04, 0x0000 }, /* R2564 (0xa04) - DSP4LMIX Input 3 Source */
839 { 0x00000a05, 0x0080 }, /* R2565 (0xa05) - DSP4LMIX Input 3 Volume */
840 { 0x00000a06, 0x0000 }, /* R2566 (0xa06) - DSP4LMIX Input 4 Source */
841 { 0x00000a07, 0x0080 }, /* R2567 (0xa07) - DSP4LMIX Input 4 Volume */
842 { 0x00000a08, 0x0000 }, /* R2568 (0xa08) - DSP4RMIX Input 1 Source */
843 { 0x00000a09, 0x0080 }, /* R2569 (0xa09) - DSP4RMIX Input 1 Volume */
844 { 0x00000a0a, 0x0000 }, /* R2570 (0xa0a) - DSP4RMIX Input 2 Source */
845 { 0x00000a0b, 0x0080 }, /* R2571 (0xa0b) - DSP4RMIX Input 2 Volume */
846 { 0x00000a0c, 0x0000 }, /* R2572 (0xa0c) - DSP4RMIX Input 3 Source */
847 { 0x00000a0d, 0x0080 }, /* R2573 (0xa0d) - DSP4RMIX Input 3 Volume */
848 { 0x00000a0e, 0x0000 }, /* R2574 (0xa0e) - DSP4RMIX Input 4 Source */
849 { 0x00000a0f, 0x0080 }, /* R2575 (0xa0f) - DSP4RMIX Input 4 Volume */
850 { 0x00000a10, 0x0000 }, /* R2576 (0xa10) - DSP4AUX1MIX Input 1 Source */
851 { 0x00000a18, 0x0000 }, /* R2584 (0xa18) - DSP4AUX2MIX Input 1 Source */
852 { 0x00000a20, 0x0000 }, /* R2592 (0xa20) - DSP4AUX3MIX Input 1 Source */
853 { 0x00000a28, 0x0000 }, /* R2600 (0xa28) - DSP4AUX4MIX Input 1 Source */
854 { 0x00000a30, 0x0000 }, /* R2608 (0xa30) - DSP4AUX5MIX Input 1 Source */
855 { 0x00000a38, 0x0000 }, /* R2616 (0xa38) - DSP4AUX6MIX Input 1 Source */
856 { 0x00000a40, 0x0000 }, /* R2624 (0xa40) - DSP5LMIX Input 1 Source */
857 { 0x00000a41, 0x0080 }, /* R2625 (0xa41) - DSP5LMIX Input 1 Volume */
858 { 0x00000a42, 0x0000 }, /* R2626 (0xa42) - DSP5LMIX Input 2 Source */
859 { 0x00000a43, 0x0080 }, /* R2627 (0xa43) - DSP5LMIX Input 2 Volume */
860 { 0x00000a44, 0x0000 }, /* R2628 (0xa44) - DSP5LMIX Input 3 Source */
861 { 0x00000a45, 0x0080 }, /* R2629 (0xa45) - DSP5LMIX Input 3 Volume */
862 { 0x00000a46, 0x0000 }, /* R2630 (0xa46) - DSP5LMIX Input 4 Source */
863 { 0x00000a47, 0x0080 }, /* R2631 (0xa47) - DSP5LMIX Input 4 Volume */
864 { 0x00000a48, 0x0000 }, /* R2632 (0xa48) - DSP5RMIX Input 1 Source */
865 { 0x00000a49, 0x0080 }, /* R2633 (0xa49) - DSP5RMIX Input 1 Volume */
866 { 0x00000a4a, 0x0000 }, /* R2634 (0xa4a) - DSP5RMIX Input 2 Source */
867 { 0x00000a4b, 0x0080 }, /* R2635 (0xa4b) - DSP5RMIX Input 2 Volume */
868 { 0x00000a4c, 0x0000 }, /* R2636 (0xa4c) - DSP5RMIX Input 3 Source */
869 { 0x00000a4d, 0x0080 }, /* R2637 (0xa4d) - DSP5RMIX Input 3 Volume */
870 { 0x00000a4e, 0x0000 }, /* R2638 (0xa4e) - DSP5RMIX Input 4 Source */
871 { 0x00000a4f, 0x0080 }, /* R2639 (0xa4f) - DSP5RMIX Input 4 Volume */
872 { 0x00000a50, 0x0000 }, /* R2640 (0xa50) - DSP5AUX1MIX Input 1 Source */
873 { 0x00000a58, 0x0000 }, /* R2658 (0xa58) - DSP5AUX2MIX Input 1 Source */
874 { 0x00000a60, 0x0000 }, /* R2656 (0xa60) - DSP5AUX3MIX Input 1 Source */
875 { 0x00000a68, 0x0000 }, /* R2664 (0xa68) - DSP5AUX4MIX Input 1 Source */
876 { 0x00000a70, 0x0000 }, /* R2672 (0xa70) - DSP5AUX5MIX Input 1 Source */
877 { 0x00000a78, 0x0000 }, /* R2680 (0xa78) - DSP5AUX6MIX Input 1 Source */
878 { 0x00000a80, 0x0000 }, /* R2688 (0xa80) - ASRC1_1LMIX Input 1 Source */
879 { 0x00000a88, 0x0000 }, /* R2696 (0xa88) - ASRC1_1RMIX Input 1 Source */
880 { 0x00000a90, 0x0000 }, /* R2704 (0xa90) - ASRC1_2LMIX Input 1 Source */
881 { 0x00000a98, 0x0000 }, /* R2712 (0xa98) - ASRC1_2RMIX Input 1 Source */
882 { 0x00000aa0, 0x0000 }, /* R2720 (0xaa0) - ASRC2_1LMIX Input 1 Source */
883 { 0x00000aa8, 0x0000 }, /* R2728 (0xaa8) - ASRC2_1RMIX Input 1 Source */
884 { 0x00000ab0, 0x0000 }, /* R2736 (0xab0) - ASRC2_2LMIX Input 1 Source */
885 { 0x00000ab8, 0x0000 }, /* R2744 (0xab8) - ASRC2_2RMIX Input 1 Source */
886 { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source*/
887 { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source*/
888 { 0x00000b10, 0x0000 }, /* R2832 (0xb10) - ISRC1DEC3MIX Input 1 Source*/
889 { 0x00000b18, 0x0000 }, /* R2840 (0xb18) - ISRC1DEC4MIX Input 1 Source*/
890 { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source*/
891 { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source*/
892 { 0x00000b30, 0x0000 }, /* R2864 (0xb30) - ISRC1INT3MIX Input 1 Source*/
893 { 0x00000b38, 0x0000 }, /* R2872 (0xb38) - ISRC1INT4MIX Input 1 Source*/
894 { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source*/
895 { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source*/
896 { 0x00000b50, 0x0000 }, /* R2896 (0xb50) - ISRC2DEC3MIX Input 1 Source*/
897 { 0x00000b58, 0x0000 }, /* R2904 (0xb58) - ISRC2DEC4MIX Input 1 Source*/
898 { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source*/
899 { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source*/
900 { 0x00000b70, 0x0000 }, /* R2928 (0xb70) - ISRC2INT3MIX Input 1 Source*/
901 { 0x00000b78, 0x0000 }, /* R2936 (0xb78) - ISRC2INT4MIX Input 1 Source*/
902 { 0x00000b80, 0x0000 }, /* R2944 (0xb80) - ISRC3DEC1MIX Input 1 Source*/
903 { 0x00000b88, 0x0000 }, /* R2952 (0xb88) - ISRC3DEC2MIX Input 1 Source*/
904 { 0x00000ba0, 0x0000 }, /* R2976 (0xb80) - ISRC3INT1MIX Input 1 Source*/
905 { 0x00000ba8, 0x0000 }, /* R2984 (0xb88) - ISRC3INT2MIX Input 1 Source*/
906 { 0x00000bc0, 0x0000 }, /* R3008 (0xbc0) - ISRC4DEC1MIX Input 1 Source */
907 { 0x00000bc8, 0x0000 }, /* R3016 (0xbc8) - ISRC4DEC2MIX Input 1 Source */
908 { 0x00000be0, 0x0000 }, /* R3040 (0xbe0) - ISRC4INT1MIX Input 1 Source */
909 { 0x00000be8, 0x0000 }, /* R3048 (0xbe8) - ISRC4INT2MIX Input 1 Source */
910 { 0x00000c00, 0x0000 }, /* R3072 (0xc00) - DSP6LMIX Input 1 Source */
911 { 0x00000c01, 0x0080 }, /* R3073 (0xc01) - DSP6LMIX Input 1 Volume */
912 { 0x00000c02, 0x0000 }, /* R3074 (0xc02) - DSP6LMIX Input 2 Source */
913 { 0x00000c03, 0x0080 }, /* R3075 (0xc03) - DSP6LMIX Input 2 Volume */
914 { 0x00000c04, 0x0000 }, /* R3076 (0xc04) - DSP6LMIX Input 3 Source */
915 { 0x00000c05, 0x0080 }, /* R3077 (0xc05) - DSP6LMIX Input 3 Volume */
916 { 0x00000c06, 0x0000 }, /* R3078 (0xc06) - DSP6LMIX Input 4 Source */
917 { 0x00000c07, 0x0080 }, /* R3079 (0xc07) - DSP6LMIX Input 4 Volume */
918 { 0x00000c08, 0x0000 }, /* R3080 (0xc08) - DSP6RMIX Input 1 Source */
919 { 0x00000c09, 0x0080 }, /* R3081 (0xc09) - DSP6RMIX Input 1 Volume */
920 { 0x00000c0a, 0x0000 }, /* R3082 (0xc0a) - DSP6RMIX Input 2 Source */
921 { 0x00000c0b, 0x0080 }, /* R3083 (0xc0b) - DSP6RMIX Input 2 Volume */
922 { 0x00000c0c, 0x0000 }, /* R3084 (0xc0c) - DSP6RMIX Input 3 Source */
923 { 0x00000c0d, 0x0080 }, /* R3085 (0xc0d) - DSP6RMIX Input 3 Volume */
924 { 0x00000c0e, 0x0000 }, /* R3086 (0xc0e) - DSP6RMIX Input 4 Source */
925 { 0x00000c0f, 0x0080 }, /* R3087 (0xc0f) - DSP6RMIX Input 4 Volume */
926 { 0x00000c10, 0x0000 }, /* R3088 (0xc10) - DSP6AUX1MIX Input 1 Source */
927 { 0x00000c18, 0x0000 }, /* R3088 (0xc18) - DSP6AUX2MIX Input 1 Source */
928 { 0x00000c20, 0x0000 }, /* R3088 (0xc20) - DSP6AUX3MIX Input 1 Source */
929 { 0x00000c28, 0x0000 }, /* R3088 (0xc28) - DSP6AUX4MIX Input 1 Source */
930 { 0x00000c30, 0x0000 }, /* R3088 (0xc30) - DSP6AUX5MIX Input 1 Source */
931 { 0x00000c38, 0x0000 }, /* R3088 (0xc38) - DSP6AUX6MIX Input 1 Source */
932 { 0x00000c40, 0x0000 }, /* R3136 (0xc40) - DSP7LMIX Input 1 Source */
933 { 0x00000c41, 0x0080 }, /* R3137 (0xc41) - DSP7LMIX Input 1 Volume */
934 { 0x00000c42, 0x0000 }, /* R3138 (0xc42) - DSP7LMIX Input 2 Source */
935 { 0x00000c43, 0x0080 }, /* R3139 (0xc43) - DSP7LMIX Input 2 Volume */
936 { 0x00000c44, 0x0000 }, /* R3140 (0xc44) - DSP7LMIX Input 3 Source */
937 { 0x00000c45, 0x0080 }, /* R3141 (0xc45) - DSP7lMIX Input 3 Volume */
938 { 0x00000c46, 0x0000 }, /* R3142 (0xc46) - DSP7lMIX Input 4 Source */
939 { 0x00000c47, 0x0080 }, /* R3143 (0xc47) - DSP7LMIX Input 4 Volume */
940 { 0x00000c48, 0x0000 }, /* R3144 (0xc48) - DSP7RMIX Input 1 Source */
941 { 0x00000c49, 0x0080 }, /* R3145 (0xc49) - DSP7RMIX Input 1 Volume */
942 { 0x00000c4a, 0x0000 }, /* R3146 (0xc4a) - DSP7RMIX Input 2 Source */
943 { 0x00000c4b, 0x0080 }, /* R3147 (0xc4b) - DSP7RMIX Input 2 Volume */
944 { 0x00000c4c, 0x0000 }, /* R3148 (0xc4c) - DSP7RMIX Input 3 Source */
945 { 0x00000c4d, 0x0080 }, /* R3159 (0xc4d) - DSP7RMIX Input 3 Volume */
946 { 0x00000c4e, 0x0000 }, /* R3150 (0xc4e) - DSP7RMIX Input 4 Source */
947 { 0x00000c4f, 0x0080 }, /* R3151 (0xc4f) - DSP7RMIX Input 4 Volume */
948 { 0x00000c50, 0x0000 }, /* R3152 (0xc50) - DSP7AUX1MIX Input 1 Source */
949 { 0x00000c58, 0x0000 }, /* R3160 (0xc58) - DSP7AUX2MIX Input 1 Source */
950 { 0x00000c60, 0x0000 }, /* R3168 (0xc60) - DSP7AUX3MIX Input 1 Source */
951 { 0x00000c68, 0x0000 }, /* R3176 (0xc68) - DSP7AUX4MIX Input 1 Source */
952 { 0x00000c70, 0x0000 }, /* R3184 (0xc70) - DSP7AUX5MIX Input 1 Source */
953 { 0x00000c78, 0x0000 }, /* R3192 (0xc78) - DSP7AUX6MIX Input 1 Source */
954 { 0x00000dc0, 0x0000 }, /* R3520 (0xdc0) - DFC1MIX Input 1 Source */
955 { 0x00000dc8, 0x0000 }, /* R3528 (0xdc8) - DFC2MIX Input 1 Source */
956 { 0x00000dd0, 0x0000 }, /* R3536 (0xdd0) - DFC3MIX Input 1 Source */
957 { 0x00000dd8, 0x0000 }, /* R3544 (0xdd8) - DFC4MIX Input 1 Source */
958 { 0x00000de0, 0x0000 }, /* R3552 (0xde0) - DFC5MIX Input 1 Source */
959 { 0x00000de8, 0x0000 }, /* R3560 (0xde8) - DFC6MIX Input 1 Source */
960 { 0x00000df0, 0x0000 }, /* R3568 (0xdf0) - DFC7MIX Input 1 Source */
961 { 0x00000df8, 0x0000 }, /* R3576 (0xdf8) - DFC8MIX Input 1 Source */
962 { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX_Ctrl1 */
963 { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1_1 */
964 { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1_2 */
965 { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1_3 */
966 { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1_4 */
967 { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1_5 */
968 { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1_6 */
969 { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1_7 */
970 { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1_8 */
971 { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1_9 */
972 { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1_10 */
973 { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1_11 */
974 { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1_12 */
975 { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1_13 */
976 { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1_14 */
977 { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1_15 */
978 { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1_16 */
979 { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1_17 */
980 { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1_18 */
981 { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1_19 */
982 { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1_20 */
983 { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1_21 */
984 { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2_1 */
985 { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2_2 */
986 { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2_3 */
987 { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2_4 */
988 { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2_5 */
989 { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2_6 */
990 { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2_7 */
991 { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2_8 */
992 { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2_9 */
993 { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2_10 */
994 { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2_11 */
995 { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2_12 */
996 { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2_13 */
997 { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2_14 */
998 { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2_15 */
999 { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2_16 */
1000 { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2_17 */
1001 { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2_18 */
1002 { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2_19 */
1003 { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2_20 */
1004 { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2_21 */
1005 { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3_1 */
1006 { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3_2 */
1007 { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3_3 */
1008 { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3_4 */
1009 { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3_5 */
1010 { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3_6 */
1011 { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3_7 */
1012 { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3_8 */
1013 { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3_9 */
1014 { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3_10 */
1015 { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3_11 */
1016 { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3_12 */
1017 { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3_13 */
1018 { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3_14 */
1019 { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3_15 */
1020 { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3_16 */
1021 { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3_17 */
1022 { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3_18 */
1023 { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3_19 */
1024 { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3_20 */
1025 { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3_21 */
1026 { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4_1 */
1027 { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4_2 */
1028 { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4_3 */
1029 { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4_4 */
1030 { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4_5 */
1031 { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4_6 */
1032 { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4_7 */
1033 { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4_8 */
1034 { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4_9 */
1035 { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4_10 */
1036 { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4_11 */
1037 { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4_12 */
1038 { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4_13 */
1039 { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4_14 */
1040 { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4_15 */
1041 { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4_16 */
1042 { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4_17 */
1043 { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4_18 */
1044 { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4_19 */
1045 { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4_20 */
1046 { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4_21 */
1047 { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 ctrl1 */
1048 { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 ctrl2 */
1049 { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */
1050 { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */
1051 { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */
1052 { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 ctrl1 */
1053 { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 ctrl2 */
1054 { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 ctrl3 */
1055 { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */
1056 { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 ctrl5 */
1057 { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */
1058 { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */
1059 { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */
1060 { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2_2 */
1061 { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3_1 */
1062 { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3_2 */
1063 { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4_1 */
1064 { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4_2 */
1065 { 0x00000ed0, 0x0000 }, /* R3792 (0xed0) - ASRC2_ENABLE */
1066 { 0x00000ed2, 0x0000 }, /* R3794 (0xed2) - ASRC2_RATE1 */
1067 { 0x00000ed3, 0x4000 }, /* R3795 (0xed3) - ASRC2_RATE2 */
1068 { 0x00000ee0, 0x0000 }, /* R3808 (0xee0) - ASRC1_ENABLE */
1069 { 0x00000ee2, 0x0000 }, /* R3810 (0xee2) - ASRC1_RATE1 */
1070 { 0x00000ee3, 0x4000 }, /* R3811 (0xee3) - ASRC1_RATE2 */
1071 { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC 1 CTRL 1 */
1072 { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC 1 CTRL 2 */
1073 { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC 1 CTRL 3 */
1074 { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */
1075 { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */
1076 { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */
1077 { 0x00000ef6, 0x0000 }, /* R3830 (0xef6) - ISRC 3 CTRL 1 */
1078 { 0x00000ef7, 0x0001 }, /* R3831 (0xef7) - ISRC 3 CTRL 2 */
1079 { 0x00000ef8, 0x0000 }, /* R3832 (0xef8) - ISRC 3 CTRL 3 */
1080 { 0x00000ef9, 0x0000 }, /* R3833 (0xef9) - ISRC 4 CTRL 1 */
1081 { 0x00000efa, 0x0001 }, /* R3834 (0xefa) - ISRC 4 CTRL 2 */
1082 { 0x00000efb, 0x0000 }, /* R3835 (0xefb) - ISRC 4 CTRL 3 */
1083 { 0x00000f01, 0x0000 }, /* R3841 (0xf01) - ANC_SRC */
1084 { 0x00000f02, 0x0000 }, /* R3842 (0xf02) - DSP Status */
1085 { 0x00000f08, 0x001c }, /* R3848 (0xf08) - ANC Coefficient */
1086 { 0x00000f09, 0x0000 }, /* R3849 (0xf09) - ANC Coefficient */
1087 { 0x00000f0a, 0x0000 }, /* R3850 (0xf0a) - ANC Coefficient */
1088 { 0x00000f0b, 0x0000 }, /* R3851 (0xf0b) - ANC Coefficient */
1089 { 0x00000f0c, 0x0000 }, /* R3852 (0xf0c) - ANC Coefficient */
1090 { 0x00000f0d, 0x0000 }, /* R3853 (0xf0d) - ANC Coefficient */
1091 { 0x00000f0e, 0x0000 }, /* R3854 (0xf0e) - ANC Coefficient */
1092 { 0x00000f0f, 0x0000 }, /* R3855 (0xf0f) - ANC Coefficient */
1093 { 0x00000f10, 0x0000 }, /* R3856 (0xf10) - ANC Coefficient */
1094 { 0x00000f11, 0x0000 }, /* R3857 (0xf11) - ANC Coefficient */
1095 { 0x00000f12, 0x0000 }, /* R3858 (0xf12) - ANC Coefficient */
1096 { 0x00000f15, 0x0000 }, /* R3861 (0xf15) - FCL Filter Control */
1097 { 0x00000f17, 0x0004 }, /* R3863 (0xf17) - FCL ADC Reformatter Control */
1098 { 0x00000f18, 0x0004 }, /* R3864 (0xf18) - ANC Coefficient */
1099 { 0x00000f19, 0x0002 }, /* R3865 (0xf19) - ANC Coefficient */
1100 { 0x00000f1a, 0x0000 }, /* R3866 (0xf1a) - ANC Coefficient */
1101 { 0x00000f1b, 0x0010 }, /* R3867 (0xf1b) - ANC Coefficient */
1102 { 0x00000f1c, 0x0000 }, /* R3868 (0xf1c) - ANC Coefficient */
1103 { 0x00000f1d, 0x0000 }, /* R3869 (0xf1d) - ANC Coefficient */
1104 { 0x00000f1e, 0x0000 }, /* R3870 (0xf1e) - ANC Coefficient */
1105 { 0x00000f1f, 0x0000 }, /* R3871 (0xf1f) - ANC Coefficient */
1106 { 0x00000f20, 0x0000 }, /* R3872 (0xf20) - ANC Coefficient */
1107 { 0x00000f21, 0x0000 }, /* R3873 (0xf21) - ANC Coefficient */
1108 { 0x00000f22, 0x0000 }, /* R3874 (0xf22) - ANC Coefficient */
1109 { 0x00000f23, 0x0000 }, /* R3875 (0xf23) - ANC Coefficient */
1110 { 0x00000f24, 0x0000 }, /* R3876 (0xf24) - ANC Coefficient */
1111 { 0x00000f25, 0x0000 }, /* R3877 (0xf25) - ANC Coefficient */
1112 { 0x00000f26, 0x0000 }, /* R3878 (0xf26) - ANC Coefficient */
1113 { 0x00000f27, 0x0000 }, /* R3879 (0xf27) - ANC Coefficient */
1114 { 0x00000f28, 0x0000 }, /* R3880 (0xf28) - ANC Coefficient */
1115 { 0x00000f29, 0x0000 }, /* R3881 (0xf29) - ANC Coefficient */
1116 { 0x00000f2a, 0x0000 }, /* R3882 (0xf2a) - ANC Coefficient */
1117 { 0x00000f2b, 0x0000 }, /* R3883 (0xf2b) - ANC Coefficient */
1118 { 0x00000f2c, 0x0000 }, /* R3884 (0xf2c) - ANC Coefficient */
1119 { 0x00000f2d, 0x0000 }, /* R3885 (0xf2d) - ANC Coefficient */
1120 { 0x00000f2e, 0x0000 }, /* R3886 (0xf2e) - ANC Coefficient */
1121 { 0x00000f2f, 0x0000 }, /* R3887 (0xf2f) - ANC Coefficient */
1122 { 0x00000f30, 0x0000 }, /* R3888 (0xf30) - ANC Coefficient */
1123 { 0x00000f31, 0x0000 }, /* R3889 (0xf31) - ANC Coefficient */
1124 { 0x00000f32, 0x0000 }, /* R3890 (0xf32) - ANC Coefficient */
1125 { 0x00000f33, 0x0000 }, /* R3891 (0xf33) - ANC Coefficient */
1126 { 0x00000f34, 0x0000 }, /* R3892 (0xf34) - ANC Coefficient */
1127 { 0x00000f35, 0x0000 }, /* R3893 (0xf35) - ANC Coefficient */
1128 { 0x00000f36, 0x0000 }, /* R3894 (0xf36) - ANC Coefficient */
1129 { 0x00000f37, 0x0000 }, /* R3895 (0xf37) - ANC Coefficient */
1130 { 0x00000f38, 0x0000 }, /* R3896 (0xf38) - ANC Coefficient */
1131 { 0x00000f39, 0x0000 }, /* R3897 (0xf39) - ANC Coefficient */
1132 { 0x00000f3a, 0x0000 }, /* R3898 (0xf3a) - ANC Coefficient */
1133 { 0x00000f3b, 0x0000 }, /* R3899 (0xf3b) - ANC Coefficient */
1134 { 0x00000f3c, 0x0000 }, /* R3900 (0xf3c) - ANC Coefficient */
1135 { 0x00000f3d, 0x0000 }, /* R3901 (0xf3d) - ANC Coefficient */
1136 { 0x00000f3e, 0x0000 }, /* R3902 (0xf3e) - ANC Coefficient */
1137 { 0x00000f3f, 0x0000 }, /* R3903 (0xf3f) - ANC Coefficient */
1138 { 0x00000f40, 0x0000 }, /* R3904 (0xf40) - ANC Coefficient */
1139 { 0x00000f41, 0x0000 }, /* R3905 (0xf41) - ANC Coefficient */
1140 { 0x00000f42, 0x0000 }, /* R3906 (0xf42) - ANC Coefficient */
1141 { 0x00000f43, 0x0000 }, /* R3907 (0xf43) - ANC Coefficient */
1142 { 0x00000f44, 0x0000 }, /* R3908 (0xf44) - ANC Coefficient */
1143 { 0x00000f45, 0x0000 }, /* R3909 (0xf45) - ANC Coefficient */
1144 { 0x00000f46, 0x0000 }, /* R3910 (0xf46) - ANC Coefficient */
1145 { 0x00000f47, 0x0000 }, /* R3911 (0xf47) - ANC Coefficient */
1146 { 0x00000f48, 0x0000 }, /* R3912 (0xf48) - ANC Coefficient */
1147 { 0x00000f49, 0x0000 }, /* R3913 (0xf49) - ANC Coefficient */
1148 { 0x00000f4a, 0x0000 }, /* R3914 (0xf4a) - ANC Coefficient */
1149 { 0x00000f4b, 0x0000 }, /* R3915 (0xf4b) - ANC Coefficient */
1150 { 0x00000f4c, 0x0000 }, /* R3916 (0xf4c) - ANC Coefficient */
1151 { 0x00000f4d, 0x0000 }, /* R3917 (0xf4d) - ANC Coefficient */
1152 { 0x00000f4e, 0x0000 }, /* R3918 (0xf4e) - ANC Coefficient */
1153 { 0x00000f4f, 0x0000 }, /* R3919 (0xf4f) - ANC Coefficient */
1154 { 0x00000f50, 0x0000 }, /* R3920 (0xf50) - ANC Coefficient */
1155 { 0x00000f51, 0x0000 }, /* R3921 (0xf51) - ANC Coefficient */
1156 { 0x00000f52, 0x0000 }, /* R3922 (0xf52) - ANC Coefficient */
1157 { 0x00000f53, 0x0000 }, /* R3923 (0xf53) - ANC Coefficient */
1158 { 0x00000f54, 0x0000 }, /* R3924 (0xf54) - ANC Coefficient */
1159 { 0x00000f55, 0x0000 }, /* R3925 (0xf55) - ANC Coefficient */
1160 { 0x00000f56, 0x0000 }, /* R3926 (0xf56) - ANC Coefficient */
1161 { 0x00000f57, 0x0000 }, /* R3927 (0xf57) - ANC Coefficient */
1162 { 0x00000f58, 0x0000 }, /* R3928 (0xf58) - ANC Coefficient */
1163 { 0x00000f59, 0x0000 }, /* R3929 (0xf59) - ANC Coefficient */
1164 { 0x00000f5a, 0x0000 }, /* R3930 (0xf5a) - ANC Coefficient */
1165 { 0x00000f5b, 0x0000 }, /* R3931 (0xf5b) - ANC Coefficient */
1166 { 0x00000f5c, 0x0000 }, /* R3932 (0xf5c) - ANC Coefficient */
1167 { 0x00000f5d, 0x0000 }, /* R3933 (0xf5d) - ANC Coefficient */
1168 { 0x00000f5e, 0x0000 }, /* R3934 (0xf5e) - ANC Coefficient */
1169 { 0x00000f5f, 0x0000 }, /* R3935 (0xf5f) - ANC Coefficient */
1170 { 0x00000f60, 0x0000 }, /* R3936 (0xf60) - ANC Coefficient */
1171 { 0x00000f61, 0x0000 }, /* R3937 (0xf61) - ANC Coefficient */
1172 { 0x00000f62, 0x0000 }, /* R3938 (0xf62) - ANC Coefficient */
1173 { 0x00000f63, 0x0000 }, /* R3939 (0xf63) - ANC Coefficient */
1174 { 0x00000f64, 0x0000 }, /* R3940 (0xf64) - ANC Coefficient */
1175 { 0x00000f65, 0x0000 }, /* R3941 (0xf65) - ANC Coefficient */
1176 { 0x00000f66, 0x0000 }, /* R3942 (0xf66) - ANC Coefficient */
1177 { 0x00000f67, 0x0000 }, /* R3943 (0xf67) - ANC Coefficient */
1178 { 0x00000f68, 0x0000 }, /* R3944 (0xf68) - ANC Coefficient */
1179 { 0x00000f69, 0x0000 }, /* R3945 (0xf69) - ANC Coefficient */
1180 { 0x00000f71, 0x0000 }, /* R3953 (0xf71) - FCR Filter Control */
1181 { 0x00000f73, 0x0004 }, /* R3955 (0xf73) - FCR ADC Reformatter Control */
1182 { 0x00000f74, 0x0004 }, /* R3956 (0xf74) - ANC Coefficient */
1183 { 0x00000f75, 0x0002 }, /* R3957 (0xf75) - ANC Coefficient */
1184 { 0x00000f76, 0x0000 }, /* R3958 (0xf76) - ANC Coefficient */
1185 { 0x00000f77, 0x0010 }, /* R3959 (0xf77) - ANC Coefficient */
1186 { 0x00000f78, 0x0000 }, /* R3960 (0xf78) - ANC Coefficient */
1187 { 0x00000f79, 0x0000 }, /* R3961 (0xf79) - ANC Coefficient */
1188 { 0x00000f7a, 0x0000 }, /* R3962 (0xf7a) - ANC Coefficient */
1189 { 0x00000f7b, 0x0000 }, /* R3963 (0xf7b) - ANC Coefficient */
1190 { 0x00000f7c, 0x0000 }, /* R3964 (0xf7c) - ANC Coefficient */
1191 { 0x00000f7d, 0x0000 }, /* R3965 (0xf7d) - ANC Coefficient */
1192 { 0x00000f7e, 0x0000 }, /* R3966 (0xf7e) - ANC Coefficient */
1193 { 0x00000f7f, 0x0000 }, /* R3967 (0xf7f) - ANC Coefficient */
1194 { 0x00000f80, 0x0000 }, /* R3968 (0xf80) - ANC Coefficient */
1195 { 0x00000f81, 0x0000 }, /* R3969 (0xf81) - ANC Coefficient */
1196 { 0x00000f82, 0x0000 }, /* R3970 (0xf82) - ANC Coefficient */
1197 { 0x00000f83, 0x0000 }, /* R3971 (0xf83) - ANC Coefficient */
1198 { 0x00000f84, 0x0000 }, /* R3972 (0xf84) - ANC Coefficient */
1199 { 0x00000f85, 0x0000 }, /* R3973 (0xf85) - ANC Coefficient */
1200 { 0x00000f86, 0x0000 }, /* R3974 (0xf86) - ANC Coefficient */
1201 { 0x00000f87, 0x0000 }, /* R3975 (0xf87) - ANC Coefficient */
1202 { 0x00000f88, 0x0000 }, /* R3976 (0xf88) - ANC Coefficient */
1203 { 0x00000f89, 0x0000 }, /* R3977 (0xf89) - ANC Coefficient */
1204 { 0x00000f8a, 0x0000 }, /* R3978 (0xf8a) - ANC Coefficient */
1205 { 0x00000f8b, 0x0000 }, /* R3979 (0xf8b) - ANC Coefficient */
1206 { 0x00000f8c, 0x0000 }, /* R3980 (0xf8c) - ANC Coefficient */
1207 { 0x00000f8d, 0x0000 }, /* R3981 (0xf8d) - ANC Coefficient */
1208 { 0x00000f8e, 0x0000 }, /* R3982 (0xf8e) - ANC Coefficient */
1209 { 0x00000f8f, 0x0000 }, /* R3983 (0xf8f) - ANC Coefficient */
1210 { 0x00000f90, 0x0000 }, /* R3984 (0xf90) - ANC Coefficient */
1211 { 0x00000f91, 0x0000 }, /* R3985 (0xf91) - ANC Coefficient */
1212 { 0x00000f92, 0x0000 }, /* R3986 (0xf92) - ANC Coefficient */
1213 { 0x00000f93, 0x0000 }, /* R3987 (0xf93) - ANC Coefficient */
1214 { 0x00000f94, 0x0000 }, /* R3988 (0xf94) - ANC Coefficient */
1215 { 0x00000f95, 0x0000 }, /* R3989 (0xf95) - ANC Coefficient */
1216 { 0x00000f96, 0x0000 }, /* R3990 (0xf96) - ANC Coefficient */
1217 { 0x00000f97, 0x0000 }, /* R3991 (0xf97) - ANC Coefficient */
1218 { 0x00000f98, 0x0000 }, /* R3992 (0xf98) - ANC Coefficient */
1219 { 0x00000f99, 0x0000 }, /* R3993 (0xf99) - ANC Coefficient */
1220 { 0x00000f9a, 0x0000 }, /* R3994 (0xf9a) - ANC Coefficient */
1221 { 0x00000f9b, 0x0000 }, /* R3995 (0xf9b) - ANC Coefficient */
1222 { 0x00000f9c, 0x0000 }, /* R3996 (0xf9c) - ANC Coefficient */
1223 { 0x00000f9d, 0x0000 }, /* R3997 (0xf9d) - ANC Coefficient */
1224 { 0x00000f9e, 0x0000 }, /* R3998 (0xf9e) - ANC Coefficient */
1225 { 0x00000f9f, 0x0000 }, /* R3999 (0xf9f) - ANC Coefficient */
1226 { 0x00000fa0, 0x0000 }, /* R4000 (0xfa0) - ANC Coefficient */
1227 { 0x00000fa1, 0x0000 }, /* R4001 (0xfa1) - ANC Coefficient */
1228 { 0x00000fa2, 0x0000 }, /* R4002 (0xfa2) - ANC Coefficient */
1229 { 0x00000fa3, 0x0000 }, /* R4003 (0xfa3) - ANC Coefficient */
1230 { 0x00000fa4, 0x0000 }, /* R4004 (0xfa4) - ANC Coefficient */
1231 { 0x00000fa5, 0x0000 }, /* R4005 (0xfa5) - ANC Coefficient */
1232 { 0x00000fa6, 0x0000 }, /* R4006 (0xfa6) - ANC Coefficient */
1233 { 0x00000fa7, 0x0000 }, /* R4007 (0xfa7) - ANC Coefficient */
1234 { 0x00000fa8, 0x0000 }, /* R4008 (0xfa8) - ANC Coefficient */
1235 { 0x00000fa9, 0x0000 }, /* R4009 (0xfa9) - ANC Coefficient */
1236 { 0x00000faa, 0x0000 }, /* R4010 (0xfaa) - ANC Coefficient */
1237 { 0x00000fab, 0x0000 }, /* R4011 (0xfab) - ANC Coefficient */
1238 { 0x00000fac, 0x0000 }, /* R4012 (0xfac) - ANC Coefficient */
1239 { 0x00000fad, 0x0000 }, /* R4013 (0xfad) - ANC Coefficient */
1240 { 0x00000fae, 0x0000 }, /* R4014 (0xfae) - ANC Coefficient */
1241 { 0x00000faf, 0x0000 }, /* R4015 (0xfaf) - ANC Coefficient */
1242 { 0x00000fb0, 0x0000 }, /* R4016 (0xfb0) - ANC Coefficient */
1243 { 0x00000fb1, 0x0000 }, /* R4017 (0xfb1) - ANC Coefficient */
1244 { 0x00000fb2, 0x0000 }, /* R4018 (0xfb2) - ANC Coefficient */
1245 { 0x00000fb3, 0x0000 }, /* R4019 (0xfb3) - ANC Coefficient */
1246 { 0x00000fb4, 0x0000 }, /* R4020 (0xfb4) - ANC Coefficient */
1247 { 0x00000fb5, 0x0000 }, /* R4021 (0xfb5) - ANC Coefficient */
1248 { 0x00000fb6, 0x0000 }, /* R4022 (0xfb6) - ANC Coefficient */
1249 { 0x00000fb7, 0x0000 }, /* R4023 (0xfb7) - ANC Coefficient */
1250 { 0x00000fb8, 0x0000 }, /* R4024 (0xfb8) - ANC Coefficient */
1251 { 0x00000fb9, 0x0000 }, /* R4025 (0xfb9) - ANC Coefficient */
1252 { 0x00000fba, 0x0000 }, /* R4026 (0xfba) - ANC Coefficient */
1253 { 0x00000fbb, 0x0000 }, /* R4027 (0xfbb) - ANC Coefficient */
1254 { 0x00000fbc, 0x0000 }, /* R4028 (0xfbc) - ANC Coefficient */
1255 { 0x00000fbd, 0x0000 }, /* R4029 (0xfbd) - ANC Coefficient */
1256 { 0x00000fbe, 0x0000 }, /* R4030 (0xfbe) - ANC Coefficient */
1257 { 0x00000fbf, 0x0000 }, /* R4031 (0xfbf) - ANC Coefficient */
1258 { 0x00000fc0, 0x0000 }, /* R4032 (0xfc0) - ANC Coefficient */
1259 { 0x00000fc1, 0x0000 }, /* R4033 (0xfc1) - ANC Coefficient */
1260 { 0x00000fc2, 0x0000 }, /* R4034 (0xfc2) - ANC Coefficient */
1261 { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */
1262 { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */
1263 { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */
1264 { 0x00001300, 0x050E }, /* R4864 (0x1300) - DAC Comp 1 */
1265 { 0x00001302, 0x0101 }, /* R4866 (0x1302) - DAC Comp 2 */
1266 { 0x00001380, 0x0425 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */
1267 { 0x00001381, 0xF6D8 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */
1268 { 0x00001382, 0x0632 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */
1269 { 0x00001383, 0xFEC8 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */
1270 { 0x00001390, 0x042F }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */
1271 { 0x00001391, 0xF6CA }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */
1272 { 0x00001392, 0x0637 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */
1273 { 0x00001393, 0xFEC8 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */
1274 { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 2L 1 */
1275 { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 2L 2 */
1276 { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 2L 3 */
1277 { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 2L 4 */
1278 { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 2R 1 */
1279 { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 2R 2 */
1280 { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 2R 3 */
1281 { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 2R 4 */
1282 { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 3L 1 */
1283 { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 3L 2 */
1284 { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 3L 3 */
1285 { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 3L 4 */
1286 { 0x000013d0, 0x0000 }, /* R5072 (0x13d0) - FRF Coefficient 3R 1 */
1287 { 0x000013d1, 0x0000 }, /* R5073 (0x13d1) - FRF Coefficient 3R 2 */
1288 { 0x000013d2, 0x0000 }, /* R5074 (0x13d2) - FRF Coefficient 3R 3 */
1289 { 0x000013d3, 0x0000 }, /* R5075 (0x13d3) - FRF Coefficient 3R 4 */
1290 { 0x00001400, 0x0000 }, /* R5120 (0x1400) - FRF Coefficient 5L 1 */
1291 { 0x00001401, 0x0000 }, /* R5121 (0x1401) - FRF Coefficient 5L 2 */
1292 { 0x00001402, 0x0000 }, /* R5122 (0x1402) - FRF Coefficient 5L 3 */
1293 { 0x00001403, 0x0000 }, /* R5123 (0x1403) - FRF Coefficient 5L 4 */
1294 { 0x00001410, 0x0000 }, /* R5136 (0x1410) - FRF Coefficient 5R 1 */
1295 { 0x00001411, 0x0000 }, /* R5137 (0x1411) - FRF Coefficient 5R 2 */
1296 { 0x00001412, 0x0000 }, /* R5138 (0x1412) - FRF Coefficient 5R 3 */
1297 { 0x00001413, 0x0000 }, /* R5139 (0x1413) - FRF Coefficient 5R 4 */
1298 { 0x00001480, 0x0000 }, /* R5248 (0x1480) - DFC1_CTRL */
1299 { 0x00001482, 0x1f00 }, /* R5250 (0x1482) - DFC1_RX */
1300 { 0x00001484, 0x1f00 }, /* R5252 (0x1486) - DFC1_TX */
1301 { 0x00001486, 0x0000 }, /* R5254 (0x1486) - DFC2_CTRL */
1302 { 0x00001488, 0x1f00 }, /* R5256 (0x1488) - DFC2_RX */
1303 { 0x0000148a, 0x1f00 }, /* R5258 (0x148a) - DFC2_TX */
1304 { 0x0000148c, 0x0000 }, /* R5260 (0x148c) - DFC3_CTRL */
1305 { 0x0000148e, 0x1f00 }, /* R5262 (0x148e) - DFC3_RX */
1306 { 0x00001490, 0x1f00 }, /* R5264 (0x1490) - DFC3_TX */
1307 { 0x00001492, 0x0000 }, /* R5266 (0x1492) - DFC4_CTRL */
1308 { 0x00001494, 0x1f00 }, /* R5268 (0x1494) - DFC4_RX */
1309 { 0x00001496, 0x1f00 }, /* R5270 (0x1496) - DFC4_TX */
1310 { 0x00001498, 0x0000 }, /* R5272 (0x1498) - DFC5_CTRL */
1311 { 0x0000149a, 0x1f00 }, /* R5274 (0x149a) - DFC5_RX */
1312 { 0x0000149c, 0x1f00 }, /* R5276 (0x149c) - DFC5_TX */
1313 { 0x0000149e, 0x0000 }, /* R5278 (0x149e) - DFC6_CTRL */
1314 { 0x000014a0, 0x1f00 }, /* R5280 (0x14a0) - DFC6_RX */
1315 { 0x000014a2, 0x1f00 }, /* R5282 (0x14a2) - DFC6_TX */
1316 { 0x000014a4, 0x0000 }, /* R5284 (0x14a4) - DFC7_CTRL */
1317 { 0x000014a6, 0x1f00 }, /* R5286 (0x14a6) - DFC7_RX */
1318 { 0x000014a8, 0x1f00 }, /* R5288 (0x14a8) - DFC7_TX */
1319 { 0x000014aa, 0x0000 }, /* R5290 (0x14aa) - DFC8_CTRL */
1320 { 0x000014ac, 0x1f00 }, /* R5292 (0x14ac) - DFC8_RX */
1321 { 0x000014ae, 0x1f00 }, /* R5294 (0x14ae) - DFC8_TX */
1322 { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */
1323 { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */
1324 { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */
1325 { 0x00001703, 0xf000 }, /* R5891 (0x1702) - GPIO2 Control 2 */
1326 { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */
1327 { 0x00001705, 0xf000 }, /* R5893 (0x1705) - GPIO3 Control 2 */
1328 { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */
1329 { 0x00001707, 0xf000 }, /* R5895 (0x1707) - GPIO4 Control 2 */
1330 { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */
1331 { 0x00001709, 0xf000 }, /* R5897 (0x1709) - GPIO5 Control 2 */
1332 { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */
1333 { 0x0000170b, 0xf000 }, /* R5899 (0x170b) - GPIO6 Control 2 */
1334 { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */
1335 { 0x0000170d, 0xf000 }, /* R5901 (0x170d) - GPIO7 Control 2 */
1336 { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */
1337 { 0x0000170f, 0xf000 }, /* R5903 (0x170f) - GPIO8 Control 2 */
1338 { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */
1339 { 0x00001711, 0xf000 }, /* R5905 (0x1711) - GPIO9 Control 2 */
1340 { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */
1341 { 0x00001713, 0xf000 }, /* R5907 (0x1713) - GPIO10 Control 2 */
1342 { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */
1343 { 0x00001715, 0xf000 }, /* R5909 (0x1715) - GPIO11 Control 2 */
1344 { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */
1345 { 0x00001717, 0xf000 }, /* R5911 (0x1717) - GPIO12 Control 2 */
1346 { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */
1347 { 0x00001719, 0xf000 }, /* R5913 (0x1719) - GPIO13 Control 2 */
1348 { 0x0000171a, 0x2001 }, /* R5914 (0x171a) - GPIO14 Control 1 */
1349 { 0x0000171b, 0xf000 }, /* R5915 (0x171b) - GPIO14 Control 2 */
1350 { 0x0000171c, 0x2001 }, /* R5916 (0x171c) - GPIO15 Control 1 */
1351 { 0x0000171d, 0xf000 }, /* R5917 (0x171d) - GPIO15 Control 2 */
1352 { 0x0000171e, 0x2001 }, /* R5918 (0x171e) - GPIO16 Control 1 */
1353 { 0x0000171f, 0xf000 }, /* R5919 (0x171f) - GPIO16 Control 2 */
1354 { 0x00001720, 0x2001 }, /* R5920 (0x1720) - GPIO17 Control 1 */
1355 { 0x00001721, 0xf000 }, /* R5921 (0x1721) - GPIO17 Control 2 */
1356 { 0x00001722, 0x2001 }, /* R5922 (0x1722) - GPIO18 Control 1 */
1357 { 0x00001723, 0xf000 }, /* R5923 (0x1723) - GPIO18 Control 2 */
1358 { 0x00001724, 0x2001 }, /* R5924 (0x1724) - GPIO19 Control 1 */
1359 { 0x00001725, 0xf000 }, /* R5925 (0x1725) - GPIO19 Control 2 */
1360 { 0x00001726, 0x2001 }, /* R5926 (0x1726) - GPIO20 Control 1 */
1361 { 0x00001727, 0xf000 }, /* R5927 (0x1727) - GPIO20 Control 2 */
1362 { 0x00001728, 0x2001 }, /* R5928 (0x1728) - GPIO21 Control 1 */
1363 { 0x00001729, 0xf000 }, /* R5929 (0x1729) - GPIO21 Control 2 */
1364 { 0x0000172a, 0x2001 }, /* R5930 (0x172a) - GPIO22 Control 1 */
1365 { 0x0000172b, 0xf000 }, /* R5931 (0x172b) - GPIO22 Control 2 */
1366 { 0x0000172c, 0x2001 }, /* R5932 (0x172c) - GPIO23 Control 1 */
1367 { 0x0000172d, 0xf000 }, /* R5933 (0x172d) - GPIO23 Control 2 */
1368 { 0x0000172e, 0x2001 }, /* R5934 (0x172e) - GPIO24 Control 1 */
1369 { 0x0000172f, 0xf000 }, /* R5935 (0x172f) - GPIO24 Control 2 */
1370 { 0x00001730, 0x2001 }, /* R5936 (0x1730) - GPIO25 Control 1 */
1371 { 0x00001731, 0xf000 }, /* R5937 (0x1731) - GPIO25 Control 2 */
1372 { 0x00001732, 0x2001 }, /* R5938 (0x1732) - GPIO26 Control 1 */
1373 { 0x00001733, 0xf000 }, /* R5939 (0x1733) - GPIO26 Control 2 */
1374 { 0x00001734, 0x2001 }, /* R5940 (0x1734) - GPIO27 Control 1 */
1375 { 0x00001735, 0xf000 }, /* R5941 (0x1735) - GPIO27 Control 2 */
1376 { 0x00001736, 0x2001 }, /* R5942 (0x1736) - GPIO28 Control 1 */
1377 { 0x00001737, 0xf000 }, /* R5943 (0x1737) - GPIO28 Control 2 */
1378 { 0x00001738, 0x2001 }, /* R5944 (0x1738) - GPIO29 Control 1 */
1379 { 0x00001739, 0xf000 }, /* R5945 (0x1739) - GPIO29 Control 2 */
1380 { 0x0000173a, 0x2001 }, /* R5946 (0x173a) - GPIO30 Control 1 */
1381 { 0x0000173b, 0xf000 }, /* R5947 (0x173b) - GPIO30 Control 2 */
1382 { 0x0000173c, 0x2001 }, /* R5948 (0x173c) - GPIO31 Control 1 */
1383 { 0x0000173d, 0xf000 }, /* R5949 (0x173d) - GPIO31 Control 2 */
1384 { 0x0000173e, 0x2001 }, /* R5950 (0x173e) - GPIO32 Control 1 */
1385 { 0x0000173f, 0xf000 }, /* R5951 (0x173f) - GPIO32 Control 2 */
1386 { 0x00001740, 0x2001 }, /* R5952 (0x1740) - GPIO33 Control 1 */
1387 { 0x00001741, 0xf000 }, /* R5953 (0x1741) - GPIO33 Control 2 */
1388 { 0x00001742, 0x2001 }, /* R5954 (0x1742) - GPIO34 Control 1 */
1389 { 0x00001743, 0xf000 }, /* R5955 (0x1743) - GPIO34 Control 2 */
1390 { 0x00001744, 0x2001 }, /* R5956 (0x1744) - GPIO35 Control 1 */
1391 { 0x00001745, 0xf000 }, /* R5957 (0x1745) - GPIO35 Control 2 */
1392 { 0x00001746, 0x2001 }, /* R5958 (0x1746) - GPIO36 Control 1 */
1393 { 0x00001747, 0xf000 }, /* R5959 (0x1747) - GPIO36 Control 2 */
1394 { 0x00001748, 0x2001 }, /* R5960 (0x1748) - GPIO37 Control 1 */
1395 { 0x00001749, 0xf000 }, /* R5961 (0x1749) - GPIO37 Control 2 */
1396 { 0x0000174a, 0x2001 }, /* R5962 (0x174a) - GPIO38 Control 1 */
1397 { 0x0000174b, 0xf000 }, /* R5963 (0x174b) - GPIO38 Control 2 */
1398 { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */
1399 { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */
1400 { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */
1401 { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */
1402 { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */
1403 { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */
1404 { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */
1405 { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */
1406 { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */
1407 { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */
1408 { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */
1409 { 0x0000184b, 0xffff }, /* R6219 (0x184b) - IRQ1 Mask 12 */
1410 { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */
1411 { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */
1412 { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */
1413 { 0x0000184f, 0xffff }, /* R6223 (0x184f) - IRQ1 Mask 16 */
1414 { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */
1415 { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */
1416 { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */
1417 { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */
1418 { 0x00001854, 0xffff }, /* R6228 (0x1854) - IRQ1 Mask 21 */
1419 { 0x00001855, 0xffff }, /* R6229 (0x1855) - IRQ1 Mask 22 */
1420 { 0x00001856, 0xffff }, /* R6230 (0x1856) - IRQ1 Mask 23 */
1421 { 0x00001857, 0xffff }, /* R6231 (0x1857) - IRQ1 Mask 24 */
1422 { 0x00001858, 0xffff }, /* R6232 (0x1858) - IRQ1 Mask 25 */
1423 { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */
1424 { 0x0000185a, 0xffff }, /* R6234 (0x185a) - IRQ1 Mask 27 */
1425 { 0x0000185b, 0xffff }, /* R6235 (0x185b) - IRQ1 Mask 28 */
1426 { 0x0000185c, 0xffff }, /* R6236 (0x185c) - IRQ1 Mask 29 */
1427 { 0x0000185d, 0xffff }, /* R6237 (0x185d) - IRQ1 Mask 30 */
1428 { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */
1429 { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */
1430 { 0x00001860, 0xffff }, /* R6240 (0x1860) - IRQ1 Mask 33 */
1431 { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */
1432 { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */
1433};
1434
1435static bool cs47l90_is_adsp_memory(unsigned int reg)
1436{
1437 switch (reg) {
1438 case 0x080000 ... 0x088ffe:
1439 case 0x0a0000 ... 0x0a9ffe:
1440 case 0x0c0000 ... 0x0c3ffe:
1441 case 0x0e0000 ... 0x0e1ffe:
1442 case 0x100000 ... 0x10effe:
1443 case 0x120000 ... 0x12bffe:
1444 case 0x136000 ... 0x137ffe:
1445 case 0x140000 ... 0x14bffe:
1446 case 0x160000 ... 0x161ffe:
1447 case 0x180000 ... 0x18effe:
1448 case 0x1a0000 ... 0x1b1ffe:
1449 case 0x1b6000 ... 0x1b7ffe:
1450 case 0x1c0000 ... 0x1cbffe:
1451 case 0x1e0000 ... 0x1e1ffe:
1452 case 0x200000 ... 0x208ffe:
1453 case 0x220000 ... 0x229ffe:
1454 case 0x240000 ... 0x243ffe:
1455 case 0x260000 ... 0x261ffe:
1456 case 0x280000 ... 0x288ffe:
1457 case 0x2a0000 ... 0x2a9ffe:
1458 case 0x2c0000 ... 0x2c3ffe:
1459 case 0x2e0000 ... 0x2e1ffe:
1460 case 0x300000 ... 0x308ffe:
1461 case 0x320000 ... 0x333ffe:
1462 case 0x340000 ... 0x353ffe:
1463 case 0x360000 ... 0x361ffe:
1464 case 0x380000 ... 0x388ffe:
1465 case 0x3a0000 ... 0x3b3ffe:
1466 case 0x3c0000 ... 0x3d3ffe:
1467 case 0x3e0000 ... 0x3e1ffe:
1468 return true;
1469 default:
1470 return false;
1471 }
1472}
1473
1474static bool cs47l90_16bit_readable_register(struct device *dev,
1475 unsigned int reg)
1476{
1477 switch (reg) {
1478 case MADERA_SOFTWARE_RESET:
1479 case MADERA_HARDWARE_REVISION:
1480 case MADERA_WRITE_SEQUENCER_CTRL_0:
1481 case MADERA_WRITE_SEQUENCER_CTRL_1:
1482 case MADERA_WRITE_SEQUENCER_CTRL_2:
1483 case MADERA_TONE_GENERATOR_1:
1484 case MADERA_TONE_GENERATOR_2:
1485 case MADERA_TONE_GENERATOR_3:
1486 case MADERA_TONE_GENERATOR_4:
1487 case MADERA_TONE_GENERATOR_5:
1488 case MADERA_PWM_DRIVE_1:
1489 case MADERA_PWM_DRIVE_2:
1490 case MADERA_PWM_DRIVE_3:
1491 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1:
1492 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2:
1493 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3:
1494 case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4:
1495 case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1:
1496 case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2:
1497 case MADERA_HAPTICS_CONTROL_1:
1498 case MADERA_HAPTICS_CONTROL_2:
1499 case MADERA_HAPTICS_PHASE_1_INTENSITY:
1500 case MADERA_HAPTICS_PHASE_1_DURATION:
1501 case MADERA_HAPTICS_PHASE_2_INTENSITY:
1502 case MADERA_HAPTICS_PHASE_2_DURATION:
1503 case MADERA_HAPTICS_PHASE_3_INTENSITY:
1504 case MADERA_HAPTICS_PHASE_3_DURATION:
1505 case MADERA_HAPTICS_STATUS:
1506 case MADERA_COMFORT_NOISE_GENERATOR:
1507 case MADERA_CLOCK_32K_1:
1508 case MADERA_SYSTEM_CLOCK_1:
1509 case MADERA_SAMPLE_RATE_1:
1510 case MADERA_SAMPLE_RATE_2:
1511 case MADERA_SAMPLE_RATE_3:
1512 case MADERA_SAMPLE_RATE_1_STATUS:
1513 case MADERA_SAMPLE_RATE_2_STATUS:
1514 case MADERA_SAMPLE_RATE_3_STATUS:
1515 case MADERA_ASYNC_CLOCK_1:
1516 case MADERA_ASYNC_SAMPLE_RATE_1:
1517 case MADERA_ASYNC_SAMPLE_RATE_1_STATUS:
1518 case MADERA_ASYNC_SAMPLE_RATE_2:
1519 case MADERA_ASYNC_SAMPLE_RATE_2_STATUS:
1520 case MADERA_DSP_CLOCK_1:
1521 case MADERA_DSP_CLOCK_2:
1522 case MADERA_OUTPUT_SYSTEM_CLOCK:
1523 case MADERA_OUTPUT_ASYNC_CLOCK:
1524 case MADERA_RATE_ESTIMATOR_1:
1525 case MADERA_RATE_ESTIMATOR_2:
1526 case MADERA_RATE_ESTIMATOR_3:
1527 case MADERA_RATE_ESTIMATOR_4:
1528 case MADERA_RATE_ESTIMATOR_5:
1529 case MADERA_FLL1_CONTROL_1:
1530 case MADERA_FLL1_CONTROL_2:
1531 case MADERA_FLL1_CONTROL_3:
1532 case MADERA_FLL1_CONTROL_4:
1533 case MADERA_FLL1_CONTROL_5:
1534 case MADERA_FLL1_CONTROL_6:
1535 case MADERA_FLL1_CONTROL_7:
1536 case MADERA_FLL1_EFS_2:
1537 case MADERA_FLL1_LOOP_FILTER_TEST_1:
1538 case MADERA_FLL1_SYNCHRONISER_1:
1539 case MADERA_FLL1_SYNCHRONISER_2:
1540 case MADERA_FLL1_SYNCHRONISER_3:
1541 case MADERA_FLL1_SYNCHRONISER_4:
1542 case MADERA_FLL1_SYNCHRONISER_5:
1543 case MADERA_FLL1_SYNCHRONISER_6:
1544 case MADERA_FLL1_SYNCHRONISER_7:
1545 case MADERA_FLL1_SPREAD_SPECTRUM:
1546 case MADERA_FLL1_GPIO_CLOCK:
1547 case MADERA_FLL2_CONTROL_1:
1548 case MADERA_FLL2_CONTROL_2:
1549 case MADERA_FLL2_CONTROL_3:
1550 case MADERA_FLL2_CONTROL_4:
1551 case MADERA_FLL2_CONTROL_5:
1552 case MADERA_FLL2_CONTROL_6:
1553 case MADERA_FLL2_CONTROL_7:
1554 case MADERA_FLL2_EFS_2:
1555 case MADERA_FLL2_LOOP_FILTER_TEST_1:
1556 case MADERA_FLL2_SYNCHRONISER_1:
1557 case MADERA_FLL2_SYNCHRONISER_2:
1558 case MADERA_FLL2_SYNCHRONISER_3:
1559 case MADERA_FLL2_SYNCHRONISER_4:
1560 case MADERA_FLL2_SYNCHRONISER_5:
1561 case MADERA_FLL2_SYNCHRONISER_6:
1562 case MADERA_FLL2_SYNCHRONISER_7:
1563 case MADERA_FLL2_SPREAD_SPECTRUM:
1564 case MADERA_FLL2_GPIO_CLOCK:
1565 case MADERA_FLLAO_CONTROL_1:
1566 case MADERA_FLLAO_CONTROL_2:
1567 case MADERA_FLLAO_CONTROL_3:
1568 case MADERA_FLLAO_CONTROL_4:
1569 case MADERA_FLLAO_CONTROL_5:
1570 case MADERA_FLLAO_CONTROL_6:
1571 case MADERA_FLLAO_CONTROL_7:
1572 case MADERA_FLLAO_CONTROL_8:
1573 case MADERA_FLLAO_CONTROL_9:
1574 case MADERA_FLLAO_CONTROL_10:
1575 case MADERA_FLLAO_CONTROL_11:
1576 case MADERA_MIC_CHARGE_PUMP_1:
1577 case MADERA_LDO2_CONTROL_1:
1578 case MADERA_MIC_BIAS_CTRL_1:
1579 case MADERA_MIC_BIAS_CTRL_2:
1580 case MADERA_MIC_BIAS_CTRL_5:
1581 case MADERA_MIC_BIAS_CTRL_6:
1582 case MADERA_HP_CTRL_1L:
1583 case MADERA_HP_CTRL_1R:
1584 case MADERA_HP_CTRL_2L:
1585 case MADERA_HP_CTRL_2R:
1586 case MADERA_HP_CTRL_3L:
1587 case MADERA_HP_CTRL_3R:
1588 case MADERA_EDRE_HP_STEREO_CONTROL:
1589 case MADERA_ACCESSORY_DETECT_MODE_1:
1590 case MADERA_HEADPHONE_DETECT_0:
1591 case MADERA_HEADPHONE_DETECT_1:
1592 case MADERA_HEADPHONE_DETECT_2:
1593 case MADERA_HEADPHONE_DETECT_3:
1594 case MADERA_HEADPHONE_DETECT_5:
1595 case MADERA_MICD_CLAMP_CONTROL:
1596 case MADERA_MIC_DETECT_1_CONTROL_0:
1597 case MADERA_MIC_DETECT_1_CONTROL_1:
1598 case MADERA_MIC_DETECT_1_CONTROL_2:
1599 case MADERA_MIC_DETECT_1_CONTROL_3:
1600 case MADERA_MIC_DETECT_1_LEVEL_1:
1601 case MADERA_MIC_DETECT_1_LEVEL_2:
1602 case MADERA_MIC_DETECT_1_LEVEL_3:
1603 case MADERA_MIC_DETECT_1_LEVEL_4:
1604 case MADERA_MIC_DETECT_1_CONTROL_4:
1605 case MADERA_MIC_DETECT_2_CONTROL_0:
1606 case MADERA_MIC_DETECT_2_CONTROL_1:
1607 case MADERA_MIC_DETECT_2_CONTROL_2:
1608 case MADERA_MIC_DETECT_2_CONTROL_3:
1609 case MADERA_MIC_DETECT_2_LEVEL_1:
1610 case MADERA_MIC_DETECT_2_LEVEL_2:
1611 case MADERA_MIC_DETECT_2_LEVEL_3:
1612 case MADERA_MIC_DETECT_2_LEVEL_4:
1613 case MADERA_MIC_DETECT_2_CONTROL_4:
1614 case MADERA_GP_SWITCH_1:
1615 case MADERA_JACK_DETECT_ANALOGUE:
1616 case MADERA_INPUT_ENABLES:
1617 case MADERA_INPUT_ENABLES_STATUS:
1618 case MADERA_INPUT_RATE:
1619 case MADERA_INPUT_VOLUME_RAMP:
1620 case MADERA_HPF_CONTROL:
1621 case MADERA_IN1L_CONTROL:
1622 case MADERA_ADC_DIGITAL_VOLUME_1L:
1623 case MADERA_DMIC1L_CONTROL:
1624 case MADERA_IN1L_RATE_CONTROL:
1625 case MADERA_IN1R_CONTROL:
1626 case MADERA_ADC_DIGITAL_VOLUME_1R:
1627 case MADERA_DMIC1R_CONTROL:
1628 case MADERA_IN1R_RATE_CONTROL:
1629 case MADERA_IN2L_CONTROL:
1630 case MADERA_ADC_DIGITAL_VOLUME_2L:
1631 case MADERA_DMIC2L_CONTROL:
1632 case MADERA_IN2L_RATE_CONTROL:
1633 case MADERA_IN2R_CONTROL:
1634 case MADERA_ADC_DIGITAL_VOLUME_2R:
1635 case MADERA_DMIC2R_CONTROL:
1636 case MADERA_IN2R_RATE_CONTROL:
1637 case MADERA_IN3L_CONTROL:
1638 case MADERA_ADC_DIGITAL_VOLUME_3L:
1639 case MADERA_DMIC3L_CONTROL:
1640 case MADERA_IN3L_RATE_CONTROL:
1641 case MADERA_IN3R_CONTROL:
1642 case MADERA_ADC_DIGITAL_VOLUME_3R:
1643 case MADERA_DMIC3R_CONTROL:
1644 case MADERA_IN3R_RATE_CONTROL:
1645 case MADERA_IN4L_CONTROL:
1646 case MADERA_ADC_DIGITAL_VOLUME_4L:
1647 case MADERA_DMIC4L_CONTROL:
1648 case MADERA_IN4L_RATE_CONTROL:
1649 case MADERA_IN4R_CONTROL:
1650 case MADERA_ADC_DIGITAL_VOLUME_4R:
1651 case MADERA_DMIC4R_CONTROL:
1652 case MADERA_IN4R_RATE_CONTROL:
1653 case MADERA_IN5L_CONTROL:
1654 case MADERA_ADC_DIGITAL_VOLUME_5L:
1655 case MADERA_DMIC5L_CONTROL:
1656 case MADERA_IN5L_RATE_CONTROL:
1657 case MADERA_IN5R_CONTROL:
1658 case MADERA_ADC_DIGITAL_VOLUME_5R:
1659 case MADERA_DMIC5R_CONTROL:
1660 case MADERA_IN5R_RATE_CONTROL:
1661 case MADERA_OUTPUT_ENABLES_1:
1662 case MADERA_OUTPUT_STATUS_1:
1663 case MADERA_RAW_OUTPUT_STATUS_1:
1664 case MADERA_OUTPUT_RATE_1:
1665 case MADERA_OUTPUT_VOLUME_RAMP:
1666 case MADERA_OUTPUT_PATH_CONFIG_1L:
1667 case MADERA_DAC_DIGITAL_VOLUME_1L:
1668 case MADERA_OUTPUT_PATH_CONFIG_1:
1669 case MADERA_NOISE_GATE_SELECT_1L:
1670 case MADERA_OUTPUT_PATH_CONFIG_1R:
1671 case MADERA_DAC_DIGITAL_VOLUME_1R:
1672 case MADERA_NOISE_GATE_SELECT_1R:
1673 case MADERA_OUTPUT_PATH_CONFIG_2L:
1674 case MADERA_DAC_DIGITAL_VOLUME_2L:
1675 case MADERA_OUTPUT_PATH_CONFIG_2:
1676 case MADERA_NOISE_GATE_SELECT_2L:
1677 case MADERA_OUTPUT_PATH_CONFIG_2R:
1678 case MADERA_DAC_DIGITAL_VOLUME_2R:
1679 case MADERA_NOISE_GATE_SELECT_2R:
1680 case MADERA_OUTPUT_PATH_CONFIG_3L:
1681 case MADERA_DAC_DIGITAL_VOLUME_3L:
1682 case MADERA_NOISE_GATE_SELECT_3L:
1683 case MADERA_OUTPUT_PATH_CONFIG_3R:
1684 case MADERA_DAC_DIGITAL_VOLUME_3R:
1685 case MADERA_NOISE_GATE_SELECT_3R:
1686 case MADERA_OUTPUT_PATH_CONFIG_5L:
1687 case MADERA_DAC_DIGITAL_VOLUME_5L:
1688 case MADERA_NOISE_GATE_SELECT_5L:
1689 case MADERA_OUTPUT_PATH_CONFIG_5R:
1690 case MADERA_DAC_DIGITAL_VOLUME_5R:
1691 case MADERA_NOISE_GATE_SELECT_5R:
1692 case MADERA_DRE_ENABLE:
1693 case MADERA_EDRE_ENABLE:
1694 case MADERA_DAC_AEC_CONTROL_1:
1695 case MADERA_NOISE_GATE_CONTROL:
1696 case MADERA_PDM_SPK1_CTRL_1:
1697 case MADERA_PDM_SPK1_CTRL_2:
1698 case MADERA_HP1_SHORT_CIRCUIT_CTRL:
1699 case MADERA_HP2_SHORT_CIRCUIT_CTRL:
1700 case MADERA_HP3_SHORT_CIRCUIT_CTRL:
1701 case MADERA_AIF1_BCLK_CTRL:
1702 case MADERA_AIF1_TX_PIN_CTRL:
1703 case MADERA_AIF1_RX_PIN_CTRL:
1704 case MADERA_AIF1_RATE_CTRL:
1705 case MADERA_AIF1_FORMAT:
1706 case MADERA_AIF1_RX_BCLK_RATE:
1707 case MADERA_AIF1_FRAME_CTRL_1:
1708 case MADERA_AIF1_FRAME_CTRL_2:
1709 case MADERA_AIF1_FRAME_CTRL_3:
1710 case MADERA_AIF1_FRAME_CTRL_4:
1711 case MADERA_AIF1_FRAME_CTRL_5:
1712 case MADERA_AIF1_FRAME_CTRL_6:
1713 case MADERA_AIF1_FRAME_CTRL_7:
1714 case MADERA_AIF1_FRAME_CTRL_8:
1715 case MADERA_AIF1_FRAME_CTRL_9:
1716 case MADERA_AIF1_FRAME_CTRL_10:
1717 case MADERA_AIF1_FRAME_CTRL_11:
1718 case MADERA_AIF1_FRAME_CTRL_12:
1719 case MADERA_AIF1_FRAME_CTRL_13:
1720 case MADERA_AIF1_FRAME_CTRL_14:
1721 case MADERA_AIF1_FRAME_CTRL_15:
1722 case MADERA_AIF1_FRAME_CTRL_16:
1723 case MADERA_AIF1_FRAME_CTRL_17:
1724 case MADERA_AIF1_FRAME_CTRL_18:
1725 case MADERA_AIF1_TX_ENABLES:
1726 case MADERA_AIF1_RX_ENABLES:
1727 case MADERA_AIF2_BCLK_CTRL:
1728 case MADERA_AIF2_TX_PIN_CTRL:
1729 case MADERA_AIF2_RX_PIN_CTRL:
1730 case MADERA_AIF2_RATE_CTRL:
1731 case MADERA_AIF2_FORMAT:
1732 case MADERA_AIF2_RX_BCLK_RATE:
1733 case MADERA_AIF2_FRAME_CTRL_1:
1734 case MADERA_AIF2_FRAME_CTRL_2:
1735 case MADERA_AIF2_FRAME_CTRL_3:
1736 case MADERA_AIF2_FRAME_CTRL_4:
1737 case MADERA_AIF2_FRAME_CTRL_5:
1738 case MADERA_AIF2_FRAME_CTRL_6:
1739 case MADERA_AIF2_FRAME_CTRL_7:
1740 case MADERA_AIF2_FRAME_CTRL_8:
1741 case MADERA_AIF2_FRAME_CTRL_9:
1742 case MADERA_AIF2_FRAME_CTRL_10:
1743 case MADERA_AIF2_FRAME_CTRL_11:
1744 case MADERA_AIF2_FRAME_CTRL_12:
1745 case MADERA_AIF2_FRAME_CTRL_13:
1746 case MADERA_AIF2_FRAME_CTRL_14:
1747 case MADERA_AIF2_FRAME_CTRL_15:
1748 case MADERA_AIF2_FRAME_CTRL_16:
1749 case MADERA_AIF2_FRAME_CTRL_17:
1750 case MADERA_AIF2_FRAME_CTRL_18:
1751 case MADERA_AIF2_TX_ENABLES:
1752 case MADERA_AIF2_RX_ENABLES:
1753 case MADERA_AIF3_BCLK_CTRL:
1754 case MADERA_AIF3_TX_PIN_CTRL:
1755 case MADERA_AIF3_RX_PIN_CTRL:
1756 case MADERA_AIF3_RATE_CTRL:
1757 case MADERA_AIF3_FORMAT:
1758 case MADERA_AIF3_RX_BCLK_RATE:
1759 case MADERA_AIF3_FRAME_CTRL_1:
1760 case MADERA_AIF3_FRAME_CTRL_2:
1761 case MADERA_AIF3_FRAME_CTRL_3:
1762 case MADERA_AIF3_FRAME_CTRL_4:
1763 case MADERA_AIF3_FRAME_CTRL_11:
1764 case MADERA_AIF3_FRAME_CTRL_12:
1765 case MADERA_AIF3_TX_ENABLES:
1766 case MADERA_AIF3_RX_ENABLES:
1767 case MADERA_AIF4_BCLK_CTRL:
1768 case MADERA_AIF4_TX_PIN_CTRL:
1769 case MADERA_AIF4_RX_PIN_CTRL:
1770 case MADERA_AIF4_RATE_CTRL:
1771 case MADERA_AIF4_FORMAT:
1772 case MADERA_AIF4_RX_BCLK_RATE:
1773 case MADERA_AIF4_FRAME_CTRL_1:
1774 case MADERA_AIF4_FRAME_CTRL_2:
1775 case MADERA_AIF4_FRAME_CTRL_3:
1776 case MADERA_AIF4_FRAME_CTRL_4:
1777 case MADERA_AIF4_FRAME_CTRL_11:
1778 case MADERA_AIF4_FRAME_CTRL_12:
1779 case MADERA_AIF4_TX_ENABLES:
1780 case MADERA_AIF4_RX_ENABLES:
1781 case MADERA_SPD1_TX_CONTROL:
1782 case MADERA_SPD1_TX_CHANNEL_STATUS_1:
1783 case MADERA_SPD1_TX_CHANNEL_STATUS_2:
1784 case MADERA_SPD1_TX_CHANNEL_STATUS_3:
1785 case MADERA_SLIMBUS_FRAMER_REF_GEAR:
1786 case MADERA_SLIMBUS_RATES_1:
1787 case MADERA_SLIMBUS_RATES_2:
1788 case MADERA_SLIMBUS_RATES_3:
1789 case MADERA_SLIMBUS_RATES_4:
1790 case MADERA_SLIMBUS_RATES_5:
1791 case MADERA_SLIMBUS_RATES_6:
1792 case MADERA_SLIMBUS_RATES_7:
1793 case MADERA_SLIMBUS_RATES_8:
1794 case MADERA_SLIMBUS_RX_CHANNEL_ENABLE:
1795 case MADERA_SLIMBUS_TX_CHANNEL_ENABLE:
1796 case MADERA_SLIMBUS_RX_PORT_STATUS:
1797 case MADERA_SLIMBUS_TX_PORT_STATUS:
1798 case MADERA_PWM1MIX_INPUT_1_SOURCE:
1799 case MADERA_PWM1MIX_INPUT_1_VOLUME:
1800 case MADERA_PWM1MIX_INPUT_2_SOURCE:
1801 case MADERA_PWM1MIX_INPUT_2_VOLUME:
1802 case MADERA_PWM1MIX_INPUT_3_SOURCE:
1803 case MADERA_PWM1MIX_INPUT_3_VOLUME:
1804 case MADERA_PWM1MIX_INPUT_4_SOURCE:
1805 case MADERA_PWM1MIX_INPUT_4_VOLUME:
1806 case MADERA_PWM2MIX_INPUT_1_SOURCE:
1807 case MADERA_PWM2MIX_INPUT_1_VOLUME:
1808 case MADERA_PWM2MIX_INPUT_2_SOURCE:
1809 case MADERA_PWM2MIX_INPUT_2_VOLUME:
1810 case MADERA_PWM2MIX_INPUT_3_SOURCE:
1811 case MADERA_PWM2MIX_INPUT_3_VOLUME:
1812 case MADERA_PWM2MIX_INPUT_4_SOURCE:
1813 case MADERA_PWM2MIX_INPUT_4_VOLUME:
1814 case MADERA_OUT1LMIX_INPUT_1_SOURCE:
1815 case MADERA_OUT1LMIX_INPUT_1_VOLUME:
1816 case MADERA_OUT1LMIX_INPUT_2_SOURCE:
1817 case MADERA_OUT1LMIX_INPUT_2_VOLUME:
1818 case MADERA_OUT1LMIX_INPUT_3_SOURCE:
1819 case MADERA_OUT1LMIX_INPUT_3_VOLUME:
1820 case MADERA_OUT1LMIX_INPUT_4_SOURCE:
1821 case MADERA_OUT1LMIX_INPUT_4_VOLUME:
1822 case MADERA_OUT1RMIX_INPUT_1_SOURCE:
1823 case MADERA_OUT1RMIX_INPUT_1_VOLUME:
1824 case MADERA_OUT1RMIX_INPUT_2_SOURCE:
1825 case MADERA_OUT1RMIX_INPUT_2_VOLUME:
1826 case MADERA_OUT1RMIX_INPUT_3_SOURCE:
1827 case MADERA_OUT1RMIX_INPUT_3_VOLUME:
1828 case MADERA_OUT1RMIX_INPUT_4_SOURCE:
1829 case MADERA_OUT1RMIX_INPUT_4_VOLUME:
1830 case MADERA_OUT2LMIX_INPUT_1_SOURCE:
1831 case MADERA_OUT2LMIX_INPUT_1_VOLUME:
1832 case MADERA_OUT2LMIX_INPUT_2_SOURCE:
1833 case MADERA_OUT2LMIX_INPUT_2_VOLUME:
1834 case MADERA_OUT2LMIX_INPUT_3_SOURCE:
1835 case MADERA_OUT2LMIX_INPUT_3_VOLUME:
1836 case MADERA_OUT2LMIX_INPUT_4_SOURCE:
1837 case MADERA_OUT2LMIX_INPUT_4_VOLUME:
1838 case MADERA_OUT2RMIX_INPUT_1_SOURCE:
1839 case MADERA_OUT2RMIX_INPUT_1_VOLUME:
1840 case MADERA_OUT2RMIX_INPUT_2_SOURCE:
1841 case MADERA_OUT2RMIX_INPUT_2_VOLUME:
1842 case MADERA_OUT2RMIX_INPUT_3_SOURCE:
1843 case MADERA_OUT2RMIX_INPUT_3_VOLUME:
1844 case MADERA_OUT2RMIX_INPUT_4_SOURCE:
1845 case MADERA_OUT2RMIX_INPUT_4_VOLUME:
1846 case MADERA_OUT3LMIX_INPUT_1_SOURCE:
1847 case MADERA_OUT3LMIX_INPUT_1_VOLUME:
1848 case MADERA_OUT3LMIX_INPUT_2_SOURCE:
1849 case MADERA_OUT3LMIX_INPUT_2_VOLUME:
1850 case MADERA_OUT3LMIX_INPUT_3_SOURCE:
1851 case MADERA_OUT3LMIX_INPUT_3_VOLUME:
1852 case MADERA_OUT3LMIX_INPUT_4_SOURCE:
1853 case MADERA_OUT3LMIX_INPUT_4_VOLUME:
1854 case MADERA_OUT3RMIX_INPUT_1_SOURCE:
1855 case MADERA_OUT3RMIX_INPUT_1_VOLUME:
1856 case MADERA_OUT3RMIX_INPUT_2_SOURCE:
1857 case MADERA_OUT3RMIX_INPUT_2_VOLUME:
1858 case MADERA_OUT3RMIX_INPUT_3_SOURCE:
1859 case MADERA_OUT3RMIX_INPUT_3_VOLUME:
1860 case MADERA_OUT3RMIX_INPUT_4_SOURCE:
1861 case MADERA_OUT3RMIX_INPUT_4_VOLUME:
1862 case MADERA_OUT5LMIX_INPUT_1_SOURCE:
1863 case MADERA_OUT5LMIX_INPUT_1_VOLUME:
1864 case MADERA_OUT5LMIX_INPUT_2_SOURCE:
1865 case MADERA_OUT5LMIX_INPUT_2_VOLUME:
1866 case MADERA_OUT5LMIX_INPUT_3_SOURCE:
1867 case MADERA_OUT5LMIX_INPUT_3_VOLUME:
1868 case MADERA_OUT5LMIX_INPUT_4_SOURCE:
1869 case MADERA_OUT5LMIX_INPUT_4_VOLUME:
1870 case MADERA_OUT5RMIX_INPUT_1_SOURCE:
1871 case MADERA_OUT5RMIX_INPUT_1_VOLUME:
1872 case MADERA_OUT5RMIX_INPUT_2_SOURCE:
1873 case MADERA_OUT5RMIX_INPUT_2_VOLUME:
1874 case MADERA_OUT5RMIX_INPUT_3_SOURCE:
1875 case MADERA_OUT5RMIX_INPUT_3_VOLUME:
1876 case MADERA_OUT5RMIX_INPUT_4_SOURCE:
1877 case MADERA_OUT5RMIX_INPUT_4_VOLUME:
1878 case MADERA_AIF1TX1MIX_INPUT_1_SOURCE:
1879 case MADERA_AIF1TX1MIX_INPUT_1_VOLUME:
1880 case MADERA_AIF1TX1MIX_INPUT_2_SOURCE:
1881 case MADERA_AIF1TX1MIX_INPUT_2_VOLUME:
1882 case MADERA_AIF1TX1MIX_INPUT_3_SOURCE:
1883 case MADERA_AIF1TX1MIX_INPUT_3_VOLUME:
1884 case MADERA_AIF1TX1MIX_INPUT_4_SOURCE:
1885 case MADERA_AIF1TX1MIX_INPUT_4_VOLUME:
1886 case MADERA_AIF1TX2MIX_INPUT_1_SOURCE:
1887 case MADERA_AIF1TX2MIX_INPUT_1_VOLUME:
1888 case MADERA_AIF1TX2MIX_INPUT_2_SOURCE:
1889 case MADERA_AIF1TX2MIX_INPUT_2_VOLUME:
1890 case MADERA_AIF1TX2MIX_INPUT_3_SOURCE:
1891 case MADERA_AIF1TX2MIX_INPUT_3_VOLUME:
1892 case MADERA_AIF1TX2MIX_INPUT_4_SOURCE:
1893 case MADERA_AIF1TX2MIX_INPUT_4_VOLUME:
1894 case MADERA_AIF1TX3MIX_INPUT_1_SOURCE:
1895 case MADERA_AIF1TX3MIX_INPUT_1_VOLUME:
1896 case MADERA_AIF1TX3MIX_INPUT_2_SOURCE:
1897 case MADERA_AIF1TX3MIX_INPUT_2_VOLUME:
1898 case MADERA_AIF1TX3MIX_INPUT_3_SOURCE:
1899 case MADERA_AIF1TX3MIX_INPUT_3_VOLUME:
1900 case MADERA_AIF1TX3MIX_INPUT_4_SOURCE:
1901 case MADERA_AIF1TX3MIX_INPUT_4_VOLUME:
1902 case MADERA_AIF1TX4MIX_INPUT_1_SOURCE:
1903 case MADERA_AIF1TX4MIX_INPUT_1_VOLUME:
1904 case MADERA_AIF1TX4MIX_INPUT_2_SOURCE:
1905 case MADERA_AIF1TX4MIX_INPUT_2_VOLUME:
1906 case MADERA_AIF1TX4MIX_INPUT_3_SOURCE:
1907 case MADERA_AIF1TX4MIX_INPUT_3_VOLUME:
1908 case MADERA_AIF1TX4MIX_INPUT_4_SOURCE:
1909 case MADERA_AIF1TX4MIX_INPUT_4_VOLUME:
1910 case MADERA_AIF1TX5MIX_INPUT_1_SOURCE:
1911 case MADERA_AIF1TX5MIX_INPUT_1_VOLUME:
1912 case MADERA_AIF1TX5MIX_INPUT_2_SOURCE:
1913 case MADERA_AIF1TX5MIX_INPUT_2_VOLUME:
1914 case MADERA_AIF1TX5MIX_INPUT_3_SOURCE:
1915 case MADERA_AIF1TX5MIX_INPUT_3_VOLUME:
1916 case MADERA_AIF1TX5MIX_INPUT_4_SOURCE:
1917 case MADERA_AIF1TX5MIX_INPUT_4_VOLUME:
1918 case MADERA_AIF1TX6MIX_INPUT_1_SOURCE:
1919 case MADERA_AIF1TX6MIX_INPUT_1_VOLUME:
1920 case MADERA_AIF1TX6MIX_INPUT_2_SOURCE:
1921 case MADERA_AIF1TX6MIX_INPUT_2_VOLUME:
1922 case MADERA_AIF1TX6MIX_INPUT_3_SOURCE:
1923 case MADERA_AIF1TX6MIX_INPUT_3_VOLUME:
1924 case MADERA_AIF1TX6MIX_INPUT_4_SOURCE:
1925 case MADERA_AIF1TX6MIX_INPUT_4_VOLUME:
1926 case MADERA_AIF1TX7MIX_INPUT_1_SOURCE:
1927 case MADERA_AIF1TX7MIX_INPUT_1_VOLUME:
1928 case MADERA_AIF1TX7MIX_INPUT_2_SOURCE:
1929 case MADERA_AIF1TX7MIX_INPUT_2_VOLUME:
1930 case MADERA_AIF1TX7MIX_INPUT_3_SOURCE:
1931 case MADERA_AIF1TX7MIX_INPUT_3_VOLUME:
1932 case MADERA_AIF1TX7MIX_INPUT_4_SOURCE:
1933 case MADERA_AIF1TX7MIX_INPUT_4_VOLUME:
1934 case MADERA_AIF1TX8MIX_INPUT_1_SOURCE:
1935 case MADERA_AIF1TX8MIX_INPUT_1_VOLUME:
1936 case MADERA_AIF1TX8MIX_INPUT_2_SOURCE:
1937 case MADERA_AIF1TX8MIX_INPUT_2_VOLUME:
1938 case MADERA_AIF1TX8MIX_INPUT_3_SOURCE:
1939 case MADERA_AIF1TX8MIX_INPUT_3_VOLUME:
1940 case MADERA_AIF1TX8MIX_INPUT_4_SOURCE:
1941 case MADERA_AIF1TX8MIX_INPUT_4_VOLUME:
1942 case MADERA_AIF2TX1MIX_INPUT_1_SOURCE:
1943 case MADERA_AIF2TX1MIX_INPUT_1_VOLUME:
1944 case MADERA_AIF2TX1MIX_INPUT_2_SOURCE:
1945 case MADERA_AIF2TX1MIX_INPUT_2_VOLUME:
1946 case MADERA_AIF2TX1MIX_INPUT_3_SOURCE:
1947 case MADERA_AIF2TX1MIX_INPUT_3_VOLUME:
1948 case MADERA_AIF2TX1MIX_INPUT_4_SOURCE:
1949 case MADERA_AIF2TX1MIX_INPUT_4_VOLUME:
1950 case MADERA_AIF2TX2MIX_INPUT_1_SOURCE:
1951 case MADERA_AIF2TX2MIX_INPUT_1_VOLUME:
1952 case MADERA_AIF2TX2MIX_INPUT_2_SOURCE:
1953 case MADERA_AIF2TX2MIX_INPUT_2_VOLUME:
1954 case MADERA_AIF2TX2MIX_INPUT_3_SOURCE:
1955 case MADERA_AIF2TX2MIX_INPUT_3_VOLUME:
1956 case MADERA_AIF2TX2MIX_INPUT_4_SOURCE:
1957 case MADERA_AIF2TX2MIX_INPUT_4_VOLUME:
1958 case MADERA_AIF2TX3MIX_INPUT_1_SOURCE:
1959 case MADERA_AIF2TX3MIX_INPUT_1_VOLUME:
1960 case MADERA_AIF2TX3MIX_INPUT_2_SOURCE:
1961 case MADERA_AIF2TX3MIX_INPUT_2_VOLUME:
1962 case MADERA_AIF2TX3MIX_INPUT_3_SOURCE:
1963 case MADERA_AIF2TX3MIX_INPUT_3_VOLUME:
1964 case MADERA_AIF2TX3MIX_INPUT_4_SOURCE:
1965 case MADERA_AIF2TX3MIX_INPUT_4_VOLUME:
1966 case MADERA_AIF2TX4MIX_INPUT_1_SOURCE:
1967 case MADERA_AIF2TX4MIX_INPUT_1_VOLUME:
1968 case MADERA_AIF2TX4MIX_INPUT_2_SOURCE:
1969 case MADERA_AIF2TX4MIX_INPUT_2_VOLUME:
1970 case MADERA_AIF2TX4MIX_INPUT_3_SOURCE:
1971 case MADERA_AIF2TX4MIX_INPUT_3_VOLUME:
1972 case MADERA_AIF2TX4MIX_INPUT_4_SOURCE:
1973 case MADERA_AIF2TX4MIX_INPUT_4_VOLUME:
1974 case MADERA_AIF2TX5MIX_INPUT_1_SOURCE:
1975 case MADERA_AIF2TX5MIX_INPUT_1_VOLUME:
1976 case MADERA_AIF2TX5MIX_INPUT_2_SOURCE:
1977 case MADERA_AIF2TX5MIX_INPUT_2_VOLUME:
1978 case MADERA_AIF2TX5MIX_INPUT_3_SOURCE:
1979 case MADERA_AIF2TX5MIX_INPUT_3_VOLUME:
1980 case MADERA_AIF2TX5MIX_INPUT_4_SOURCE:
1981 case MADERA_AIF2TX5MIX_INPUT_4_VOLUME:
1982 case MADERA_AIF2TX6MIX_INPUT_1_SOURCE:
1983 case MADERA_AIF2TX6MIX_INPUT_1_VOLUME:
1984 case MADERA_AIF2TX6MIX_INPUT_2_SOURCE:
1985 case MADERA_AIF2TX6MIX_INPUT_2_VOLUME:
1986 case MADERA_AIF2TX6MIX_INPUT_3_SOURCE:
1987 case MADERA_AIF2TX6MIX_INPUT_3_VOLUME:
1988 case MADERA_AIF2TX6MIX_INPUT_4_SOURCE:
1989 case MADERA_AIF2TX6MIX_INPUT_4_VOLUME:
1990 case MADERA_AIF2TX7MIX_INPUT_1_SOURCE:
1991 case MADERA_AIF2TX7MIX_INPUT_1_VOLUME:
1992 case MADERA_AIF2TX7MIX_INPUT_2_SOURCE:
1993 case MADERA_AIF2TX7MIX_INPUT_2_VOLUME:
1994 case MADERA_AIF2TX7MIX_INPUT_3_SOURCE:
1995 case MADERA_AIF2TX7MIX_INPUT_3_VOLUME:
1996 case MADERA_AIF2TX7MIX_INPUT_4_SOURCE:
1997 case MADERA_AIF2TX7MIX_INPUT_4_VOLUME:
1998 case MADERA_AIF2TX8MIX_INPUT_1_SOURCE:
1999 case MADERA_AIF2TX8MIX_INPUT_1_VOLUME:
2000 case MADERA_AIF2TX8MIX_INPUT_2_SOURCE:
2001 case MADERA_AIF2TX8MIX_INPUT_2_VOLUME:
2002 case MADERA_AIF2TX8MIX_INPUT_3_SOURCE:
2003 case MADERA_AIF2TX8MIX_INPUT_3_VOLUME:
2004 case MADERA_AIF2TX8MIX_INPUT_4_SOURCE:
2005 case MADERA_AIF2TX8MIX_INPUT_4_VOLUME:
2006 case MADERA_AIF3TX1MIX_INPUT_1_SOURCE:
2007 case MADERA_AIF3TX1MIX_INPUT_1_VOLUME:
2008 case MADERA_AIF3TX1MIX_INPUT_2_SOURCE:
2009 case MADERA_AIF3TX1MIX_INPUT_2_VOLUME:
2010 case MADERA_AIF3TX1MIX_INPUT_3_SOURCE:
2011 case MADERA_AIF3TX1MIX_INPUT_3_VOLUME:
2012 case MADERA_AIF3TX1MIX_INPUT_4_SOURCE:
2013 case MADERA_AIF3TX1MIX_INPUT_4_VOLUME:
2014 case MADERA_AIF3TX2MIX_INPUT_1_SOURCE:
2015 case MADERA_AIF3TX2MIX_INPUT_1_VOLUME:
2016 case MADERA_AIF3TX2MIX_INPUT_2_SOURCE:
2017 case MADERA_AIF3TX2MIX_INPUT_2_VOLUME:
2018 case MADERA_AIF3TX2MIX_INPUT_3_SOURCE:
2019 case MADERA_AIF3TX2MIX_INPUT_3_VOLUME:
2020 case MADERA_AIF3TX2MIX_INPUT_4_SOURCE:
2021 case MADERA_AIF3TX2MIX_INPUT_4_VOLUME:
2022 case MADERA_AIF4TX1MIX_INPUT_1_SOURCE:
2023 case MADERA_AIF4TX1MIX_INPUT_1_VOLUME:
2024 case MADERA_AIF4TX1MIX_INPUT_2_SOURCE:
2025 case MADERA_AIF4TX1MIX_INPUT_2_VOLUME:
2026 case MADERA_AIF4TX1MIX_INPUT_3_SOURCE:
2027 case MADERA_AIF4TX1MIX_INPUT_3_VOLUME:
2028 case MADERA_AIF4TX1MIX_INPUT_4_SOURCE:
2029 case MADERA_AIF4TX1MIX_INPUT_4_VOLUME:
2030 case MADERA_AIF4TX2MIX_INPUT_1_SOURCE:
2031 case MADERA_AIF4TX2MIX_INPUT_1_VOLUME:
2032 case MADERA_AIF4TX2MIX_INPUT_2_SOURCE:
2033 case MADERA_AIF4TX2MIX_INPUT_2_VOLUME:
2034 case MADERA_AIF4TX2MIX_INPUT_3_SOURCE:
2035 case MADERA_AIF4TX2MIX_INPUT_3_VOLUME:
2036 case MADERA_AIF4TX2MIX_INPUT_4_SOURCE:
2037 case MADERA_AIF4TX2MIX_INPUT_4_VOLUME:
2038 case MADERA_SLIMTX1MIX_INPUT_1_SOURCE:
2039 case MADERA_SLIMTX1MIX_INPUT_1_VOLUME:
2040 case MADERA_SLIMTX1MIX_INPUT_2_SOURCE:
2041 case MADERA_SLIMTX1MIX_INPUT_2_VOLUME:
2042 case MADERA_SLIMTX1MIX_INPUT_3_SOURCE:
2043 case MADERA_SLIMTX1MIX_INPUT_3_VOLUME:
2044 case MADERA_SLIMTX1MIX_INPUT_4_SOURCE:
2045 case MADERA_SLIMTX1MIX_INPUT_4_VOLUME:
2046 case MADERA_SLIMTX2MIX_INPUT_1_SOURCE:
2047 case MADERA_SLIMTX2MIX_INPUT_1_VOLUME:
2048 case MADERA_SLIMTX2MIX_INPUT_2_SOURCE:
2049 case MADERA_SLIMTX2MIX_INPUT_2_VOLUME:
2050 case MADERA_SLIMTX2MIX_INPUT_3_SOURCE:
2051 case MADERA_SLIMTX2MIX_INPUT_3_VOLUME:
2052 case MADERA_SLIMTX2MIX_INPUT_4_SOURCE:
2053 case MADERA_SLIMTX2MIX_INPUT_4_VOLUME:
2054 case MADERA_SLIMTX3MIX_INPUT_1_SOURCE:
2055 case MADERA_SLIMTX3MIX_INPUT_1_VOLUME:
2056 case MADERA_SLIMTX3MIX_INPUT_2_SOURCE:
2057 case MADERA_SLIMTX3MIX_INPUT_2_VOLUME:
2058 case MADERA_SLIMTX3MIX_INPUT_3_SOURCE:
2059 case MADERA_SLIMTX3MIX_INPUT_3_VOLUME:
2060 case MADERA_SLIMTX3MIX_INPUT_4_SOURCE:
2061 case MADERA_SLIMTX3MIX_INPUT_4_VOLUME:
2062 case MADERA_SLIMTX4MIX_INPUT_1_SOURCE:
2063 case MADERA_SLIMTX4MIX_INPUT_1_VOLUME:
2064 case MADERA_SLIMTX4MIX_INPUT_2_SOURCE:
2065 case MADERA_SLIMTX4MIX_INPUT_2_VOLUME:
2066 case MADERA_SLIMTX4MIX_INPUT_3_SOURCE:
2067 case MADERA_SLIMTX4MIX_INPUT_3_VOLUME:
2068 case MADERA_SLIMTX4MIX_INPUT_4_SOURCE:
2069 case MADERA_SLIMTX4MIX_INPUT_4_VOLUME:
2070 case MADERA_SLIMTX5MIX_INPUT_1_SOURCE:
2071 case MADERA_SLIMTX5MIX_INPUT_1_VOLUME:
2072 case MADERA_SLIMTX5MIX_INPUT_2_SOURCE:
2073 case MADERA_SLIMTX5MIX_INPUT_2_VOLUME:
2074 case MADERA_SLIMTX5MIX_INPUT_3_SOURCE:
2075 case MADERA_SLIMTX5MIX_INPUT_3_VOLUME:
2076 case MADERA_SLIMTX5MIX_INPUT_4_SOURCE:
2077 case MADERA_SLIMTX5MIX_INPUT_4_VOLUME:
2078 case MADERA_SLIMTX6MIX_INPUT_1_SOURCE:
2079 case MADERA_SLIMTX6MIX_INPUT_1_VOLUME:
2080 case MADERA_SLIMTX6MIX_INPUT_2_SOURCE:
2081 case MADERA_SLIMTX6MIX_INPUT_2_VOLUME:
2082 case MADERA_SLIMTX6MIX_INPUT_3_SOURCE:
2083 case MADERA_SLIMTX6MIX_INPUT_3_VOLUME:
2084 case MADERA_SLIMTX6MIX_INPUT_4_SOURCE:
2085 case MADERA_SLIMTX6MIX_INPUT_4_VOLUME:
2086 case MADERA_SLIMTX7MIX_INPUT_1_SOURCE:
2087 case MADERA_SLIMTX7MIX_INPUT_1_VOLUME:
2088 case MADERA_SLIMTX7MIX_INPUT_2_SOURCE:
2089 case MADERA_SLIMTX7MIX_INPUT_2_VOLUME:
2090 case MADERA_SLIMTX7MIX_INPUT_3_SOURCE:
2091 case MADERA_SLIMTX7MIX_INPUT_3_VOLUME:
2092 case MADERA_SLIMTX7MIX_INPUT_4_SOURCE:
2093 case MADERA_SLIMTX7MIX_INPUT_4_VOLUME:
2094 case MADERA_SLIMTX8MIX_INPUT_1_SOURCE:
2095 case MADERA_SLIMTX8MIX_INPUT_1_VOLUME:
2096 case MADERA_SLIMTX8MIX_INPUT_2_SOURCE:
2097 case MADERA_SLIMTX8MIX_INPUT_2_VOLUME:
2098 case MADERA_SLIMTX8MIX_INPUT_3_SOURCE:
2099 case MADERA_SLIMTX8MIX_INPUT_3_VOLUME:
2100 case MADERA_SLIMTX8MIX_INPUT_4_SOURCE:
2101 case MADERA_SLIMTX8MIX_INPUT_4_VOLUME:
2102 case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE:
2103 case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME:
2104 case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE:
2105 case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME:
2106 case MADERA_EQ1MIX_INPUT_1_SOURCE:
2107 case MADERA_EQ1MIX_INPUT_1_VOLUME:
2108 case MADERA_EQ1MIX_INPUT_2_SOURCE:
2109 case MADERA_EQ1MIX_INPUT_2_VOLUME:
2110 case MADERA_EQ1MIX_INPUT_3_SOURCE:
2111 case MADERA_EQ1MIX_INPUT_3_VOLUME:
2112 case MADERA_EQ1MIX_INPUT_4_SOURCE:
2113 case MADERA_EQ1MIX_INPUT_4_VOLUME:
2114 case MADERA_EQ2MIX_INPUT_1_SOURCE:
2115 case MADERA_EQ2MIX_INPUT_1_VOLUME:
2116 case MADERA_EQ2MIX_INPUT_2_SOURCE:
2117 case MADERA_EQ2MIX_INPUT_2_VOLUME:
2118 case MADERA_EQ2MIX_INPUT_3_SOURCE:
2119 case MADERA_EQ2MIX_INPUT_3_VOLUME:
2120 case MADERA_EQ2MIX_INPUT_4_SOURCE:
2121 case MADERA_EQ2MIX_INPUT_4_VOLUME:
2122 case MADERA_EQ3MIX_INPUT_1_SOURCE:
2123 case MADERA_EQ3MIX_INPUT_1_VOLUME:
2124 case MADERA_EQ3MIX_INPUT_2_SOURCE:
2125 case MADERA_EQ3MIX_INPUT_2_VOLUME:
2126 case MADERA_EQ3MIX_INPUT_3_SOURCE:
2127 case MADERA_EQ3MIX_INPUT_3_VOLUME:
2128 case MADERA_EQ3MIX_INPUT_4_SOURCE:
2129 case MADERA_EQ3MIX_INPUT_4_VOLUME:
2130 case MADERA_EQ4MIX_INPUT_1_SOURCE:
2131 case MADERA_EQ4MIX_INPUT_1_VOLUME:
2132 case MADERA_EQ4MIX_INPUT_2_SOURCE:
2133 case MADERA_EQ4MIX_INPUT_2_VOLUME:
2134 case MADERA_EQ4MIX_INPUT_3_SOURCE:
2135 case MADERA_EQ4MIX_INPUT_3_VOLUME:
2136 case MADERA_EQ4MIX_INPUT_4_SOURCE:
2137 case MADERA_EQ4MIX_INPUT_4_VOLUME:
2138 case MADERA_DRC1LMIX_INPUT_1_SOURCE:
2139 case MADERA_DRC1LMIX_INPUT_1_VOLUME:
2140 case MADERA_DRC1LMIX_INPUT_2_SOURCE:
2141 case MADERA_DRC1LMIX_INPUT_2_VOLUME:
2142 case MADERA_DRC1LMIX_INPUT_3_SOURCE:
2143 case MADERA_DRC1LMIX_INPUT_3_VOLUME:
2144 case MADERA_DRC1LMIX_INPUT_4_SOURCE:
2145 case MADERA_DRC1LMIX_INPUT_4_VOLUME:
2146 case MADERA_DRC1RMIX_INPUT_1_SOURCE:
2147 case MADERA_DRC1RMIX_INPUT_1_VOLUME:
2148 case MADERA_DRC1RMIX_INPUT_2_SOURCE:
2149 case MADERA_DRC1RMIX_INPUT_2_VOLUME:
2150 case MADERA_DRC1RMIX_INPUT_3_SOURCE:
2151 case MADERA_DRC1RMIX_INPUT_3_VOLUME:
2152 case MADERA_DRC1RMIX_INPUT_4_SOURCE:
2153 case MADERA_DRC1RMIX_INPUT_4_VOLUME:
2154 case MADERA_DRC2LMIX_INPUT_1_SOURCE:
2155 case MADERA_DRC2LMIX_INPUT_1_VOLUME:
2156 case MADERA_DRC2LMIX_INPUT_2_SOURCE:
2157 case MADERA_DRC2LMIX_INPUT_2_VOLUME:
2158 case MADERA_DRC2LMIX_INPUT_3_SOURCE:
2159 case MADERA_DRC2LMIX_INPUT_3_VOLUME:
2160 case MADERA_DRC2LMIX_INPUT_4_SOURCE:
2161 case MADERA_DRC2LMIX_INPUT_4_VOLUME:
2162 case MADERA_DRC2RMIX_INPUT_1_SOURCE:
2163 case MADERA_DRC2RMIX_INPUT_1_VOLUME:
2164 case MADERA_DRC2RMIX_INPUT_2_SOURCE:
2165 case MADERA_DRC2RMIX_INPUT_2_VOLUME:
2166 case MADERA_DRC2RMIX_INPUT_3_SOURCE:
2167 case MADERA_DRC2RMIX_INPUT_3_VOLUME:
2168 case MADERA_DRC2RMIX_INPUT_4_SOURCE:
2169 case MADERA_DRC2RMIX_INPUT_4_VOLUME:
2170 case MADERA_HPLP1MIX_INPUT_1_SOURCE:
2171 case MADERA_HPLP1MIX_INPUT_1_VOLUME:
2172 case MADERA_HPLP1MIX_INPUT_2_SOURCE:
2173 case MADERA_HPLP1MIX_INPUT_2_VOLUME:
2174 case MADERA_HPLP1MIX_INPUT_3_SOURCE:
2175 case MADERA_HPLP1MIX_INPUT_3_VOLUME:
2176 case MADERA_HPLP1MIX_INPUT_4_SOURCE:
2177 case MADERA_HPLP1MIX_INPUT_4_VOLUME:
2178 case MADERA_HPLP2MIX_INPUT_1_SOURCE:
2179 case MADERA_HPLP2MIX_INPUT_1_VOLUME:
2180 case MADERA_HPLP2MIX_INPUT_2_SOURCE:
2181 case MADERA_HPLP2MIX_INPUT_2_VOLUME:
2182 case MADERA_HPLP2MIX_INPUT_3_SOURCE:
2183 case MADERA_HPLP2MIX_INPUT_3_VOLUME:
2184 case MADERA_HPLP2MIX_INPUT_4_SOURCE:
2185 case MADERA_HPLP2MIX_INPUT_4_VOLUME:
2186 case MADERA_HPLP3MIX_INPUT_1_SOURCE:
2187 case MADERA_HPLP3MIX_INPUT_1_VOLUME:
2188 case MADERA_HPLP3MIX_INPUT_2_SOURCE:
2189 case MADERA_HPLP3MIX_INPUT_2_VOLUME:
2190 case MADERA_HPLP3MIX_INPUT_3_SOURCE:
2191 case MADERA_HPLP3MIX_INPUT_3_VOLUME:
2192 case MADERA_HPLP3MIX_INPUT_4_SOURCE:
2193 case MADERA_HPLP3MIX_INPUT_4_VOLUME:
2194 case MADERA_HPLP4MIX_INPUT_1_SOURCE:
2195 case MADERA_HPLP4MIX_INPUT_1_VOLUME:
2196 case MADERA_HPLP4MIX_INPUT_2_SOURCE:
2197 case MADERA_HPLP4MIX_INPUT_2_VOLUME:
2198 case MADERA_HPLP4MIX_INPUT_3_SOURCE:
2199 case MADERA_HPLP4MIX_INPUT_3_VOLUME:
2200 case MADERA_HPLP4MIX_INPUT_4_SOURCE:
2201 case MADERA_HPLP4MIX_INPUT_4_VOLUME:
2202 case MADERA_DSP1LMIX_INPUT_1_SOURCE:
2203 case MADERA_DSP1LMIX_INPUT_1_VOLUME:
2204 case MADERA_DSP1LMIX_INPUT_2_SOURCE:
2205 case MADERA_DSP1LMIX_INPUT_2_VOLUME:
2206 case MADERA_DSP1LMIX_INPUT_3_SOURCE:
2207 case MADERA_DSP1LMIX_INPUT_3_VOLUME:
2208 case MADERA_DSP1LMIX_INPUT_4_SOURCE:
2209 case MADERA_DSP1LMIX_INPUT_4_VOLUME:
2210 case MADERA_DSP1RMIX_INPUT_1_SOURCE:
2211 case MADERA_DSP1RMIX_INPUT_1_VOLUME:
2212 case MADERA_DSP1RMIX_INPUT_2_SOURCE:
2213 case MADERA_DSP1RMIX_INPUT_2_VOLUME:
2214 case MADERA_DSP1RMIX_INPUT_3_SOURCE:
2215 case MADERA_DSP1RMIX_INPUT_3_VOLUME:
2216 case MADERA_DSP1RMIX_INPUT_4_SOURCE:
2217 case MADERA_DSP1RMIX_INPUT_4_VOLUME:
2218 case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE:
2219 case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE:
2220 case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE:
2221 case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE:
2222 case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE:
2223 case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE:
2224 case MADERA_DSP2LMIX_INPUT_1_SOURCE:
2225 case MADERA_DSP2LMIX_INPUT_1_VOLUME:
2226 case MADERA_DSP2LMIX_INPUT_2_SOURCE:
2227 case MADERA_DSP2LMIX_INPUT_2_VOLUME:
2228 case MADERA_DSP2LMIX_INPUT_3_SOURCE:
2229 case MADERA_DSP2LMIX_INPUT_3_VOLUME:
2230 case MADERA_DSP2LMIX_INPUT_4_SOURCE:
2231 case MADERA_DSP2LMIX_INPUT_4_VOLUME:
2232 case MADERA_DSP2RMIX_INPUT_1_SOURCE:
2233 case MADERA_DSP2RMIX_INPUT_1_VOLUME:
2234 case MADERA_DSP2RMIX_INPUT_2_SOURCE:
2235 case MADERA_DSP2RMIX_INPUT_2_VOLUME:
2236 case MADERA_DSP2RMIX_INPUT_3_SOURCE:
2237 case MADERA_DSP2RMIX_INPUT_3_VOLUME:
2238 case MADERA_DSP2RMIX_INPUT_4_SOURCE:
2239 case MADERA_DSP2RMIX_INPUT_4_VOLUME:
2240 case MADERA_DSP2AUX1MIX_INPUT_1_SOURCE:
2241 case MADERA_DSP2AUX2MIX_INPUT_1_SOURCE:
2242 case MADERA_DSP2AUX3MIX_INPUT_1_SOURCE:
2243 case MADERA_DSP2AUX4MIX_INPUT_1_SOURCE:
2244 case MADERA_DSP2AUX5MIX_INPUT_1_SOURCE:
2245 case MADERA_DSP2AUX6MIX_INPUT_1_SOURCE:
2246 case MADERA_DSP3LMIX_INPUT_1_SOURCE:
2247 case MADERA_DSP3LMIX_INPUT_1_VOLUME:
2248 case MADERA_DSP3LMIX_INPUT_2_SOURCE:
2249 case MADERA_DSP3LMIX_INPUT_2_VOLUME:
2250 case MADERA_DSP3LMIX_INPUT_3_SOURCE:
2251 case MADERA_DSP3LMIX_INPUT_3_VOLUME:
2252 case MADERA_DSP3LMIX_INPUT_4_SOURCE:
2253 case MADERA_DSP3LMIX_INPUT_4_VOLUME:
2254 case MADERA_DSP3RMIX_INPUT_1_SOURCE:
2255 case MADERA_DSP3RMIX_INPUT_1_VOLUME:
2256 case MADERA_DSP3RMIX_INPUT_2_SOURCE:
2257 case MADERA_DSP3RMIX_INPUT_2_VOLUME:
2258 case MADERA_DSP3RMIX_INPUT_3_SOURCE:
2259 case MADERA_DSP3RMIX_INPUT_3_VOLUME:
2260 case MADERA_DSP3RMIX_INPUT_4_SOURCE:
2261 case MADERA_DSP3RMIX_INPUT_4_VOLUME:
2262 case MADERA_DSP3AUX1MIX_INPUT_1_SOURCE:
2263 case MADERA_DSP3AUX2MIX_INPUT_1_SOURCE:
2264 case MADERA_DSP3AUX3MIX_INPUT_1_SOURCE:
2265 case MADERA_DSP3AUX4MIX_INPUT_1_SOURCE:
2266 case MADERA_DSP3AUX5MIX_INPUT_1_SOURCE:
2267 case MADERA_DSP3AUX6MIX_INPUT_1_SOURCE:
2268 case MADERA_DSP4LMIX_INPUT_1_SOURCE:
2269 case MADERA_DSP4LMIX_INPUT_1_VOLUME:
2270 case MADERA_DSP4LMIX_INPUT_2_SOURCE:
2271 case MADERA_DSP4LMIX_INPUT_2_VOLUME:
2272 case MADERA_DSP4LMIX_INPUT_3_SOURCE:
2273 case MADERA_DSP4LMIX_INPUT_3_VOLUME:
2274 case MADERA_DSP4LMIX_INPUT_4_SOURCE:
2275 case MADERA_DSP4LMIX_INPUT_4_VOLUME:
2276 case MADERA_DSP4RMIX_INPUT_1_SOURCE:
2277 case MADERA_DSP4RMIX_INPUT_1_VOLUME:
2278 case MADERA_DSP4RMIX_INPUT_2_SOURCE:
2279 case MADERA_DSP4RMIX_INPUT_2_VOLUME:
2280 case MADERA_DSP4RMIX_INPUT_3_SOURCE:
2281 case MADERA_DSP4RMIX_INPUT_3_VOLUME:
2282 case MADERA_DSP4RMIX_INPUT_4_SOURCE:
2283 case MADERA_DSP4RMIX_INPUT_4_VOLUME:
2284 case MADERA_DSP4AUX1MIX_INPUT_1_SOURCE:
2285 case MADERA_DSP4AUX2MIX_INPUT_1_SOURCE:
2286 case MADERA_DSP4AUX3MIX_INPUT_1_SOURCE:
2287 case MADERA_DSP4AUX4MIX_INPUT_1_SOURCE:
2288 case MADERA_DSP4AUX5MIX_INPUT_1_SOURCE:
2289 case MADERA_DSP4AUX6MIX_INPUT_1_SOURCE:
2290 case MADERA_DSP5LMIX_INPUT_1_SOURCE:
2291 case MADERA_DSP5LMIX_INPUT_1_VOLUME:
2292 case MADERA_DSP5LMIX_INPUT_2_SOURCE:
2293 case MADERA_DSP5LMIX_INPUT_2_VOLUME:
2294 case MADERA_DSP5LMIX_INPUT_3_SOURCE:
2295 case MADERA_DSP5LMIX_INPUT_3_VOLUME:
2296 case MADERA_DSP5LMIX_INPUT_4_SOURCE:
2297 case MADERA_DSP5LMIX_INPUT_4_VOLUME:
2298 case MADERA_DSP5RMIX_INPUT_1_SOURCE:
2299 case MADERA_DSP5RMIX_INPUT_1_VOLUME:
2300 case MADERA_DSP5RMIX_INPUT_2_SOURCE:
2301 case MADERA_DSP5RMIX_INPUT_2_VOLUME:
2302 case MADERA_DSP5RMIX_INPUT_3_SOURCE:
2303 case MADERA_DSP5RMIX_INPUT_3_VOLUME:
2304 case MADERA_DSP5RMIX_INPUT_4_SOURCE:
2305 case MADERA_DSP5RMIX_INPUT_4_VOLUME:
2306 case MADERA_DSP5AUX1MIX_INPUT_1_SOURCE:
2307 case MADERA_DSP5AUX2MIX_INPUT_1_SOURCE:
2308 case MADERA_DSP5AUX3MIX_INPUT_1_SOURCE:
2309 case MADERA_DSP5AUX4MIX_INPUT_1_SOURCE:
2310 case MADERA_DSP5AUX5MIX_INPUT_1_SOURCE:
2311 case MADERA_DSP5AUX6MIX_INPUT_1_SOURCE:
2312 case MADERA_ASRC1_1LMIX_INPUT_1_SOURCE:
2313 case MADERA_ASRC1_1RMIX_INPUT_1_SOURCE:
2314 case MADERA_ASRC1_2LMIX_INPUT_1_SOURCE:
2315 case MADERA_ASRC1_2RMIX_INPUT_1_SOURCE:
2316 case MADERA_ASRC2_1LMIX_INPUT_1_SOURCE:
2317 case MADERA_ASRC2_1RMIX_INPUT_1_SOURCE:
2318 case MADERA_ASRC2_2LMIX_INPUT_1_SOURCE:
2319 case MADERA_ASRC2_2RMIX_INPUT_1_SOURCE:
2320 case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE:
2321 case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE:
2322 case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE:
2323 case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE:
2324 case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE:
2325 case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE:
2326 case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE:
2327 case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE:
2328 case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE:
2329 case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE:
2330 case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE:
2331 case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE:
2332 case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE:
2333 case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE:
2334 case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE:
2335 case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE:
2336 case MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE:
2337 case MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE:
2338 case MADERA_ISRC3INT1MIX_INPUT_1_SOURCE:
2339 case MADERA_ISRC3INT2MIX_INPUT_1_SOURCE:
2340 case MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE:
2341 case MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE:
2342 case MADERA_ISRC4INT1MIX_INPUT_1_SOURCE:
2343 case MADERA_ISRC4INT2MIX_INPUT_1_SOURCE:
2344 case MADERA_DSP6LMIX_INPUT_1_SOURCE:
2345 case MADERA_DSP6LMIX_INPUT_1_VOLUME:
2346 case MADERA_DSP6LMIX_INPUT_2_SOURCE:
2347 case MADERA_DSP6LMIX_INPUT_2_VOLUME:
2348 case MADERA_DSP6LMIX_INPUT_3_SOURCE:
2349 case MADERA_DSP6LMIX_INPUT_3_VOLUME:
2350 case MADERA_DSP6LMIX_INPUT_4_SOURCE:
2351 case MADERA_DSP6LMIX_INPUT_4_VOLUME:
2352 case MADERA_DSP6RMIX_INPUT_1_SOURCE:
2353 case MADERA_DSP6RMIX_INPUT_1_VOLUME:
2354 case MADERA_DSP6RMIX_INPUT_2_SOURCE:
2355 case MADERA_DSP6RMIX_INPUT_2_VOLUME:
2356 case MADERA_DSP6RMIX_INPUT_3_SOURCE:
2357 case MADERA_DSP6RMIX_INPUT_3_VOLUME:
2358 case MADERA_DSP6RMIX_INPUT_4_SOURCE:
2359 case MADERA_DSP6RMIX_INPUT_4_VOLUME:
2360 case MADERA_DSP6AUX1MIX_INPUT_1_SOURCE:
2361 case MADERA_DSP6AUX2MIX_INPUT_1_SOURCE:
2362 case MADERA_DSP6AUX3MIX_INPUT_1_SOURCE:
2363 case MADERA_DSP6AUX4MIX_INPUT_1_SOURCE:
2364 case MADERA_DSP6AUX5MIX_INPUT_1_SOURCE:
2365 case MADERA_DSP6AUX6MIX_INPUT_1_SOURCE:
2366 case MADERA_DSP7LMIX_INPUT_1_SOURCE:
2367 case MADERA_DSP7LMIX_INPUT_1_VOLUME:
2368 case MADERA_DSP7LMIX_INPUT_2_SOURCE:
2369 case MADERA_DSP7LMIX_INPUT_2_VOLUME:
2370 case MADERA_DSP7LMIX_INPUT_3_SOURCE:
2371 case MADERA_DSP7LMIX_INPUT_3_VOLUME:
2372 case MADERA_DSP7LMIX_INPUT_4_SOURCE:
2373 case MADERA_DSP7LMIX_INPUT_4_VOLUME:
2374 case MADERA_DSP7RMIX_INPUT_1_SOURCE:
2375 case MADERA_DSP7RMIX_INPUT_1_VOLUME:
2376 case MADERA_DSP7RMIX_INPUT_2_SOURCE:
2377 case MADERA_DSP7RMIX_INPUT_2_VOLUME:
2378 case MADERA_DSP7RMIX_INPUT_3_SOURCE:
2379 case MADERA_DSP7RMIX_INPUT_3_VOLUME:
2380 case MADERA_DSP7RMIX_INPUT_4_SOURCE:
2381 case MADERA_DSP7RMIX_INPUT_4_VOLUME:
2382 case MADERA_DSP7AUX1MIX_INPUT_1_SOURCE:
2383 case MADERA_DSP7AUX2MIX_INPUT_1_SOURCE:
2384 case MADERA_DSP7AUX3MIX_INPUT_1_SOURCE:
2385 case MADERA_DSP7AUX4MIX_INPUT_1_SOURCE:
2386 case MADERA_DSP7AUX5MIX_INPUT_1_SOURCE:
2387 case MADERA_DSP7AUX6MIX_INPUT_1_SOURCE:
2388 case MADERA_DFC1MIX_INPUT_1_SOURCE:
2389 case MADERA_DFC2MIX_INPUT_1_SOURCE:
2390 case MADERA_DFC3MIX_INPUT_1_SOURCE:
2391 case MADERA_DFC4MIX_INPUT_1_SOURCE:
2392 case MADERA_DFC5MIX_INPUT_1_SOURCE:
2393 case MADERA_DFC6MIX_INPUT_1_SOURCE:
2394 case MADERA_DFC7MIX_INPUT_1_SOURCE:
2395 case MADERA_DFC8MIX_INPUT_1_SOURCE:
2396 case MADERA_FX_CTRL1:
2397 case MADERA_FX_CTRL2:
2398 case MADERA_EQ1_1 ... MADERA_EQ1_21:
2399 case MADERA_EQ2_1 ... MADERA_EQ2_21:
2400 case MADERA_EQ3_1 ... MADERA_EQ3_21:
2401 case MADERA_EQ4_1 ... MADERA_EQ4_21:
2402 case MADERA_DRC1_CTRL1:
2403 case MADERA_DRC1_CTRL2:
2404 case MADERA_DRC1_CTRL3:
2405 case MADERA_DRC1_CTRL4:
2406 case MADERA_DRC1_CTRL5:
2407 case MADERA_DRC2_CTRL1:
2408 case MADERA_DRC2_CTRL2:
2409 case MADERA_DRC2_CTRL3:
2410 case MADERA_DRC2_CTRL4:
2411 case MADERA_DRC2_CTRL5:
2412 case MADERA_HPLPF1_1:
2413 case MADERA_HPLPF1_2:
2414 case MADERA_HPLPF2_1:
2415 case MADERA_HPLPF2_2:
2416 case MADERA_HPLPF3_1:
2417 case MADERA_HPLPF3_2:
2418 case MADERA_HPLPF4_1:
2419 case MADERA_HPLPF4_2:
2420 case MADERA_ASRC1_ENABLE:
2421 case MADERA_ASRC1_STATUS:
2422 case MADERA_ASRC1_RATE1:
2423 case MADERA_ASRC1_RATE2:
2424 case MADERA_ASRC2_ENABLE:
2425 case MADERA_ASRC2_STATUS:
2426 case MADERA_ASRC2_RATE1:
2427 case MADERA_ASRC2_RATE2:
2428 case MADERA_ISRC_1_CTRL_1:
2429 case MADERA_ISRC_1_CTRL_2:
2430 case MADERA_ISRC_1_CTRL_3:
2431 case MADERA_ISRC_2_CTRL_1:
2432 case MADERA_ISRC_2_CTRL_2:
2433 case MADERA_ISRC_2_CTRL_3:
2434 case MADERA_ISRC_3_CTRL_1:
2435 case MADERA_ISRC_3_CTRL_2:
2436 case MADERA_ISRC_3_CTRL_3:
2437 case MADERA_ISRC_4_CTRL_1:
2438 case MADERA_ISRC_4_CTRL_2:
2439 case MADERA_ISRC_4_CTRL_3:
2440 case MADERA_CLOCK_CONTROL:
2441 case MADERA_ANC_SRC:
2442 case MADERA_DSP_STATUS:
2443 case MADERA_ANC_COEFF_START ... MADERA_ANC_COEFF_END:
2444 case MADERA_FCL_FILTER_CONTROL:
2445 case MADERA_FCL_ADC_REFORMATTER_CONTROL:
2446 case MADERA_FCL_COEFF_START ... MADERA_FCL_COEFF_END:
2447 case MADERA_FCR_FILTER_CONTROL:
2448 case MADERA_FCR_ADC_REFORMATTER_CONTROL:
2449 case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END:
2450 case MADERA_DAC_COMP_1:
2451 case MADERA_DAC_COMP_2:
2452 case MADERA_FRF_COEFFICIENT_1L_1:
2453 case MADERA_FRF_COEFFICIENT_1L_2:
2454 case MADERA_FRF_COEFFICIENT_1L_3:
2455 case MADERA_FRF_COEFFICIENT_1L_4:
2456 case MADERA_FRF_COEFFICIENT_1R_1:
2457 case MADERA_FRF_COEFFICIENT_1R_2:
2458 case MADERA_FRF_COEFFICIENT_1R_3:
2459 case MADERA_FRF_COEFFICIENT_1R_4:
2460 case MADERA_FRF_COEFFICIENT_2L_1:
2461 case MADERA_FRF_COEFFICIENT_2L_2:
2462 case MADERA_FRF_COEFFICIENT_2L_3:
2463 case MADERA_FRF_COEFFICIENT_2L_4:
2464 case MADERA_FRF_COEFFICIENT_2R_1:
2465 case MADERA_FRF_COEFFICIENT_2R_2:
2466 case MADERA_FRF_COEFFICIENT_2R_3:
2467 case MADERA_FRF_COEFFICIENT_2R_4:
2468 case MADERA_FRF_COEFFICIENT_3L_1:
2469 case MADERA_FRF_COEFFICIENT_3L_2:
2470 case MADERA_FRF_COEFFICIENT_3L_3:
2471 case MADERA_FRF_COEFFICIENT_3L_4:
2472 case MADERA_FRF_COEFFICIENT_3R_1:
2473 case MADERA_FRF_COEFFICIENT_3R_2:
2474 case MADERA_FRF_COEFFICIENT_3R_3:
2475 case MADERA_FRF_COEFFICIENT_3R_4:
2476 case MADERA_FRF_COEFFICIENT_5L_1:
2477 case MADERA_FRF_COEFFICIENT_5L_2:
2478 case MADERA_FRF_COEFFICIENT_5L_3:
2479 case MADERA_FRF_COEFFICIENT_5L_4:
2480 case MADERA_FRF_COEFFICIENT_5R_1:
2481 case MADERA_FRF_COEFFICIENT_5R_2:
2482 case MADERA_FRF_COEFFICIENT_5R_3:
2483 case MADERA_FRF_COEFFICIENT_5R_4:
2484 case MADERA_DFC1_CTRL:
2485 case MADERA_DFC1_RX:
2486 case MADERA_DFC1_TX:
2487 case MADERA_DFC2_CTRL:
2488 case MADERA_DFC2_RX:
2489 case MADERA_DFC2_TX:
2490 case MADERA_DFC3_CTRL:
2491 case MADERA_DFC3_RX:
2492 case MADERA_DFC3_TX:
2493 case MADERA_DFC4_CTRL:
2494 case MADERA_DFC4_RX:
2495 case MADERA_DFC4_TX:
2496 case MADERA_DFC5_CTRL:
2497 case MADERA_DFC5_RX:
2498 case MADERA_DFC5_TX:
2499 case MADERA_DFC6_CTRL:
2500 case MADERA_DFC6_RX:
2501 case MADERA_DFC6_TX:
2502 case MADERA_DFC7_CTRL:
2503 case MADERA_DFC7_RX:
2504 case MADERA_DFC7_TX:
2505 case MADERA_DFC8_CTRL:
2506 case MADERA_DFC8_RX:
2507 case MADERA_DFC8_TX:
2508 case MADERA_DFC_STATUS:
2509 case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO38_CTRL_2:
2510 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33:
2511 case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33:
2512 case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33:
2513 case MADERA_INTERRUPT_DEBOUNCE_7:
2514 case MADERA_IRQ1_CTRL:
2515 return true;
2516 default:
2517 return false;
2518 }
2519}
2520
2521static bool cs47l90_16bit_volatile_register(struct device *dev,
2522 unsigned int reg)
2523{
2524 switch (reg) {
2525 case MADERA_SOFTWARE_RESET:
2526 case MADERA_HARDWARE_REVISION:
2527 case MADERA_WRITE_SEQUENCER_CTRL_0:
2528 case MADERA_WRITE_SEQUENCER_CTRL_1:
2529 case MADERA_WRITE_SEQUENCER_CTRL_2:
2530 case MADERA_HAPTICS_STATUS:
2531 case MADERA_SAMPLE_RATE_1_STATUS:
2532 case MADERA_SAMPLE_RATE_2_STATUS:
2533 case MADERA_SAMPLE_RATE_3_STATUS:
2534 case MADERA_ASYNC_SAMPLE_RATE_1_STATUS:
2535 case MADERA_ASYNC_SAMPLE_RATE_2_STATUS:
2536 case MADERA_HP_CTRL_1L:
2537 case MADERA_HP_CTRL_1R:
2538 case MADERA_HP_CTRL_2L:
2539 case MADERA_HP_CTRL_2R:
2540 case MADERA_HP_CTRL_3L:
2541 case MADERA_HP_CTRL_3R:
2542 case MADERA_MIC_DETECT_1_CONTROL_3:
2543 case MADERA_MIC_DETECT_1_CONTROL_4:
2544 case MADERA_MIC_DETECT_2_CONTROL_3:
2545 case MADERA_MIC_DETECT_2_CONTROL_4:
2546 case MADERA_HEADPHONE_DETECT_2:
2547 case MADERA_HEADPHONE_DETECT_3:
2548 case MADERA_HEADPHONE_DETECT_5:
2549 case MADERA_INPUT_ENABLES_STATUS:
2550 case MADERA_OUTPUT_STATUS_1:
2551 case MADERA_RAW_OUTPUT_STATUS_1:
2552 case MADERA_SPD1_TX_CHANNEL_STATUS_1:
2553 case MADERA_SPD1_TX_CHANNEL_STATUS_2:
2554 case MADERA_SPD1_TX_CHANNEL_STATUS_3:
2555 case MADERA_SLIMBUS_RX_PORT_STATUS:
2556 case MADERA_SLIMBUS_TX_PORT_STATUS:
2557 case MADERA_FX_CTRL2:
2558 case MADERA_ASRC2_STATUS:
2559 case MADERA_ASRC1_STATUS:
2560 case MADERA_CLOCK_CONTROL:
2561 case MADERA_DFC_STATUS:
2562 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33:
2563 case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33:
2564 return true;
2565 default:
2566 return false;
2567 }
2568}
2569
2570static bool cs47l90_32bit_readable_register(struct device *dev,
2571 unsigned int reg)
2572{
2573 switch (reg) {
2574 case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508:
2575 case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2:
2576 case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2577 case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2578 case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2579 case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2580 case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2581 case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2582 case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2583 return true;
2584 default:
2585 return cs47l90_is_adsp_memory(reg);
2586 }
2587}
2588
2589static bool cs47l90_32bit_volatile_register(struct device *dev,
2590 unsigned int reg)
2591{
2592 switch (reg) {
2593 case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508:
2594 case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2:
2595 case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2596 case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2597 case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2598 case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2599 case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2600 case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2601 case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR:
2602 return true;
2603 default:
2604 return cs47l90_is_adsp_memory(reg);
2605 }
2606}
2607
2608const struct regmap_config cs47l90_16bit_spi_regmap = {
2609 .name = "cs47l90_16bit",
2610 .reg_bits = 32,
2611 .pad_bits = 16,
2612 .val_bits = 16,
2613 .reg_format_endian = REGMAP_ENDIAN_BIG,
2614 .val_format_endian = REGMAP_ENDIAN_BIG,
2615
2616 .max_register = MADERA_INTERRUPT_RAW_STATUS_1,
2617 .readable_reg = cs47l90_16bit_readable_register,
2618 .volatile_reg = cs47l90_16bit_volatile_register,
2619
2620 .cache_type = REGCACHE_RBTREE,
2621 .reg_defaults = cs47l90_reg_default,
2622 .num_reg_defaults = ARRAY_SIZE(cs47l90_reg_default),
2623};
2624EXPORT_SYMBOL_GPL(cs47l90_16bit_spi_regmap);
2625
2626const struct regmap_config cs47l90_16bit_i2c_regmap = {
2627 .name = "cs47l90_16bit",
2628 .reg_bits = 32,
2629 .val_bits = 16,
2630 .reg_format_endian = REGMAP_ENDIAN_BIG,
2631 .val_format_endian = REGMAP_ENDIAN_BIG,
2632
2633 .max_register = MADERA_INTERRUPT_RAW_STATUS_1,
2634 .readable_reg = cs47l90_16bit_readable_register,
2635 .volatile_reg = cs47l90_16bit_volatile_register,
2636
2637 .cache_type = REGCACHE_RBTREE,
2638 .reg_defaults = cs47l90_reg_default,
2639 .num_reg_defaults = ARRAY_SIZE(cs47l90_reg_default),
2640};
2641EXPORT_SYMBOL_GPL(cs47l90_16bit_i2c_regmap);
2642
2643const struct regmap_config cs47l90_32bit_spi_regmap = {
2644 .name = "cs47l90_32bit",
2645 .reg_bits = 32,
2646 .reg_stride = 2,
2647 .pad_bits = 16,
2648 .val_bits = 32,
2649 .reg_format_endian = REGMAP_ENDIAN_BIG,
2650 .val_format_endian = REGMAP_ENDIAN_BIG,
2651
2652 .max_register = MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR,
2653 .readable_reg = cs47l90_32bit_readable_register,
2654 .volatile_reg = cs47l90_32bit_volatile_register,
2655
2656 .cache_type = REGCACHE_RBTREE,
2657};
2658EXPORT_SYMBOL_GPL(cs47l90_32bit_spi_regmap);
2659
2660const struct regmap_config cs47l90_32bit_i2c_regmap = {
2661 .name = "cs47l90_32bit",
2662 .reg_bits = 32,
2663 .reg_stride = 2,
2664 .val_bits = 32,
2665 .reg_format_endian = REGMAP_ENDIAN_BIG,
2666 .val_format_endian = REGMAP_ENDIAN_BIG,
2667
2668 .max_register = MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR,
2669 .readable_reg = cs47l90_32bit_readable_register,
2670 .volatile_reg = cs47l90_32bit_volatile_register,
2671
2672 .cache_type = REGCACHE_RBTREE,
2673};
2674EXPORT_SYMBOL_GPL(cs47l90_32bit_i2c_regmap);
diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c
index 6c2870d4e754..6e4ce49b4405 100644
--- a/drivers/mfd/da9063-core.c
+++ b/drivers/mfd/da9063-core.c
@@ -76,7 +76,7 @@ static struct resource da9063_hwmon_resources[] = {
76}; 76};
77 77
78 78
79static const struct mfd_cell da9063_devs[] = { 79static const struct mfd_cell da9063_common_devs[] = {
80 { 80 {
81 .name = DA9063_DRVNAME_REGULATORS, 81 .name = DA9063_DRVNAME_REGULATORS,
82 .num_resources = ARRAY_SIZE(da9063_regulators_resources), 82 .num_resources = ARRAY_SIZE(da9063_regulators_resources),
@@ -101,14 +101,18 @@ static const struct mfd_cell da9063_devs[] = {
101 .of_compatible = "dlg,da9063-onkey", 101 .of_compatible = "dlg,da9063-onkey",
102 }, 102 },
103 { 103 {
104 .name = DA9063_DRVNAME_VIBRATION,
105 },
106};
107
108/* Only present on DA9063 , not on DA9063L */
109static const struct mfd_cell da9063_devs[] = {
110 {
104 .name = DA9063_DRVNAME_RTC, 111 .name = DA9063_DRVNAME_RTC,
105 .num_resources = ARRAY_SIZE(da9063_rtc_resources), 112 .num_resources = ARRAY_SIZE(da9063_rtc_resources),
106 .resources = da9063_rtc_resources, 113 .resources = da9063_rtc_resources,
107 .of_compatible = "dlg,da9063-rtc", 114 .of_compatible = "dlg,da9063-rtc",
108 }, 115 },
109 {
110 .name = DA9063_DRVNAME_VIBRATION,
111 },
112}; 116};
113 117
114static int da9063_clear_fault_log(struct da9063 *da9063) 118static int da9063_clear_fault_log(struct da9063 *da9063)
@@ -192,7 +196,7 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq)
192 dev_err(da9063->dev, "Cannot read chip model id.\n"); 196 dev_err(da9063->dev, "Cannot read chip model id.\n");
193 return -EIO; 197 return -EIO;
194 } 198 }
195 if (model != PMIC_DA9063) { 199 if (model != PMIC_CHIP_ID_DA9063) {
196 dev_err(da9063->dev, "Invalid chip model id: 0x%02x\n", model); 200 dev_err(da9063->dev, "Invalid chip model id: 0x%02x\n", model);
197 return -ENODEV; 201 return -ENODEV;
198 } 202 }
@@ -215,7 +219,6 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq)
215 return -ENODEV; 219 return -ENODEV;
216 } 220 }
217 221
218 da9063->model = model;
219 da9063->variant_code = variant_code; 222 da9063->variant_code = variant_code;
220 223
221 ret = da9063_irq_init(da9063); 224 ret = da9063_irq_init(da9063);
@@ -226,19 +229,26 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq)
226 229
227 da9063->irq_base = regmap_irq_chip_get_base(da9063->regmap_irq); 230 da9063->irq_base = regmap_irq_chip_get_base(da9063->regmap_irq);
228 231
229 ret = mfd_add_devices(da9063->dev, -1, da9063_devs, 232 ret = devm_mfd_add_devices(da9063->dev, PLATFORM_DEVID_NONE,
230 ARRAY_SIZE(da9063_devs), NULL, da9063->irq_base, 233 da9063_common_devs,
231 NULL); 234 ARRAY_SIZE(da9063_common_devs),
232 if (ret) 235 NULL, da9063->irq_base, NULL);
233 dev_err(da9063->dev, "Cannot add MFD cells\n"); 236 if (ret) {
237 dev_err(da9063->dev, "Failed to add child devices\n");
238 return ret;
239 }
234 240
235 return ret; 241 if (da9063->type == PMIC_TYPE_DA9063) {
236} 242 ret = devm_mfd_add_devices(da9063->dev, PLATFORM_DEVID_NONE,
243 da9063_devs, ARRAY_SIZE(da9063_devs),
244 NULL, da9063->irq_base, NULL);
245 if (ret) {
246 dev_err(da9063->dev, "Failed to add child devices\n");
247 return ret;
248 }
249 }
237 250
238void da9063_device_exit(struct da9063 *da9063) 251 return ret;
239{
240 mfd_remove_devices(da9063->dev);
241 da9063_irq_exit(da9063);
242} 252}
243 253
244MODULE_DESCRIPTION("PMIC driver for Dialog DA9063"); 254MODULE_DESCRIPTION("PMIC driver for Dialog DA9063");
diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c
index 981805a2c521..50a24b1921d0 100644
--- a/drivers/mfd/da9063-i2c.c
+++ b/drivers/mfd/da9063-i2c.c
@@ -29,78 +29,33 @@
29#include <linux/regulator/of_regulator.h> 29#include <linux/regulator/of_regulator.h>
30 30
31static const struct regmap_range da9063_ad_readable_ranges[] = { 31static const struct regmap_range da9063_ad_readable_ranges[] = {
32 { 32 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_AD_REG_SECOND_D),
33 .range_min = DA9063_REG_PAGE_CON, 33 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
34 .range_max = DA9063_AD_REG_SECOND_D, 34 regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
35 }, { 35 regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_AD_REG_GP_ID_19),
36 .range_min = DA9063_REG_SEQ, 36 regmap_reg_range(DA9063_REG_CHIP_ID, DA9063_REG_CHIP_VARIANT),
37 .range_max = DA9063_REG_ID_32_31,
38 }, {
39 .range_min = DA9063_REG_SEQ_A,
40 .range_max = DA9063_REG_AUTO3_LOW,
41 }, {
42 .range_min = DA9063_REG_T_OFFSET,
43 .range_max = DA9063_AD_REG_GP_ID_19,
44 }, {
45 .range_min = DA9063_REG_CHIP_ID,
46 .range_max = DA9063_REG_CHIP_VARIANT,
47 },
48}; 37};
49 38
50static const struct regmap_range da9063_ad_writeable_ranges[] = { 39static const struct regmap_range da9063_ad_writeable_ranges[] = {
51 { 40 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON),
52 .range_min = DA9063_REG_PAGE_CON, 41 regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON),
53 .range_max = DA9063_REG_PAGE_CON, 42 regmap_reg_range(DA9063_REG_COUNT_S, DA9063_AD_REG_ALARM_Y),
54 }, { 43 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
55 .range_min = DA9063_REG_FAULT_LOG, 44 regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
56 .range_max = DA9063_REG_VSYS_MON, 45 regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_AD_REG_MON_REG_4),
57 }, { 46 regmap_reg_range(DA9063_AD_REG_GP_ID_0, DA9063_AD_REG_GP_ID_19),
58 .range_min = DA9063_REG_COUNT_S,
59 .range_max = DA9063_AD_REG_ALARM_Y,
60 }, {
61 .range_min = DA9063_REG_SEQ,
62 .range_max = DA9063_REG_ID_32_31,
63 }, {
64 .range_min = DA9063_REG_SEQ_A,
65 .range_max = DA9063_REG_AUTO3_LOW,
66 }, {
67 .range_min = DA9063_REG_CONFIG_I,
68 .range_max = DA9063_AD_REG_MON_REG_4,
69 }, {
70 .range_min = DA9063_AD_REG_GP_ID_0,
71 .range_max = DA9063_AD_REG_GP_ID_19,
72 },
73}; 47};
74 48
75static const struct regmap_range da9063_ad_volatile_ranges[] = { 49static const struct regmap_range da9063_ad_volatile_ranges[] = {
76 { 50 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D),
77 .range_min = DA9063_REG_PAGE_CON, 51 regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B),
78 .range_max = DA9063_REG_EVENT_D, 52 regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F),
79 }, { 53 regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT),
80 .range_min = DA9063_REG_CONTROL_A, 54 regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN),
81 .range_max = DA9063_REG_CONTROL_B, 55 regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_AD_REG_SECOND_D),
82 }, { 56 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ),
83 .range_min = DA9063_REG_CONTROL_E, 57 regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K),
84 .range_max = DA9063_REG_CONTROL_F, 58 regmap_reg_range(DA9063_AD_REG_MON_REG_5, DA9063_AD_REG_MON_REG_6),
85 }, {
86 .range_min = DA9063_REG_BCORE2_CONT,
87 .range_max = DA9063_REG_LDO11_CONT,
88 }, {
89 .range_min = DA9063_REG_DVC_1,
90 .range_max = DA9063_REG_ADC_MAN,
91 }, {
92 .range_min = DA9063_REG_ADC_RES_L,
93 .range_max = DA9063_AD_REG_SECOND_D,
94 }, {
95 .range_min = DA9063_REG_SEQ,
96 .range_max = DA9063_REG_SEQ,
97 }, {
98 .range_min = DA9063_REG_EN_32K,
99 .range_max = DA9063_REG_EN_32K,
100 }, {
101 .range_min = DA9063_AD_REG_MON_REG_5,
102 .range_max = DA9063_AD_REG_MON_REG_6,
103 },
104}; 59};
105 60
106static const struct regmap_access_table da9063_ad_readable_table = { 61static const struct regmap_access_table da9063_ad_readable_table = {
@@ -119,78 +74,33 @@ static const struct regmap_access_table da9063_ad_volatile_table = {
119}; 74};
120 75
121static const struct regmap_range da9063_bb_readable_ranges[] = { 76static const struct regmap_range da9063_bb_readable_ranges[] = {
122 { 77 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_BB_REG_SECOND_D),
123 .range_min = DA9063_REG_PAGE_CON, 78 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
124 .range_max = DA9063_BB_REG_SECOND_D, 79 regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
125 }, { 80 regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_BB_REG_GP_ID_19),
126 .range_min = DA9063_REG_SEQ, 81 regmap_reg_range(DA9063_REG_CHIP_ID, DA9063_REG_CHIP_VARIANT),
127 .range_max = DA9063_REG_ID_32_31,
128 }, {
129 .range_min = DA9063_REG_SEQ_A,
130 .range_max = DA9063_REG_AUTO3_LOW,
131 }, {
132 .range_min = DA9063_REG_T_OFFSET,
133 .range_max = DA9063_BB_REG_GP_ID_19,
134 }, {
135 .range_min = DA9063_REG_CHIP_ID,
136 .range_max = DA9063_REG_CHIP_VARIANT,
137 },
138}; 82};
139 83
140static const struct regmap_range da9063_bb_writeable_ranges[] = { 84static const struct regmap_range da9063_bb_writeable_ranges[] = {
141 { 85 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON),
142 .range_min = DA9063_REG_PAGE_CON, 86 regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON),
143 .range_max = DA9063_REG_PAGE_CON, 87 regmap_reg_range(DA9063_REG_COUNT_S, DA9063_BB_REG_ALARM_Y),
144 }, { 88 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
145 .range_min = DA9063_REG_FAULT_LOG, 89 regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
146 .range_max = DA9063_REG_VSYS_MON, 90 regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_BB_REG_MON_REG_4),
147 }, { 91 regmap_reg_range(DA9063_BB_REG_GP_ID_0, DA9063_BB_REG_GP_ID_19),
148 .range_min = DA9063_REG_COUNT_S,
149 .range_max = DA9063_BB_REG_ALARM_Y,
150 }, {
151 .range_min = DA9063_REG_SEQ,
152 .range_max = DA9063_REG_ID_32_31,
153 }, {
154 .range_min = DA9063_REG_SEQ_A,
155 .range_max = DA9063_REG_AUTO3_LOW,
156 }, {
157 .range_min = DA9063_REG_CONFIG_I,
158 .range_max = DA9063_BB_REG_MON_REG_4,
159 }, {
160 .range_min = DA9063_BB_REG_GP_ID_0,
161 .range_max = DA9063_BB_REG_GP_ID_19,
162 },
163}; 92};
164 93
165static const struct regmap_range da9063_bb_volatile_ranges[] = { 94static const struct regmap_range da9063_bb_volatile_ranges[] = {
166 { 95 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D),
167 .range_min = DA9063_REG_PAGE_CON, 96 regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B),
168 .range_max = DA9063_REG_EVENT_D, 97 regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F),
169 }, { 98 regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT),
170 .range_min = DA9063_REG_CONTROL_A, 99 regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN),
171 .range_max = DA9063_REG_CONTROL_B, 100 regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_BB_REG_SECOND_D),
172 }, { 101 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ),
173 .range_min = DA9063_REG_CONTROL_E, 102 regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K),
174 .range_max = DA9063_REG_CONTROL_F, 103 regmap_reg_range(DA9063_BB_REG_MON_REG_5, DA9063_BB_REG_MON_REG_6),
175 }, {
176 .range_min = DA9063_REG_BCORE2_CONT,
177 .range_max = DA9063_REG_LDO11_CONT,
178 }, {
179 .range_min = DA9063_REG_DVC_1,
180 .range_max = DA9063_REG_ADC_MAN,
181 }, {
182 .range_min = DA9063_REG_ADC_RES_L,
183 .range_max = DA9063_BB_REG_SECOND_D,
184 }, {
185 .range_min = DA9063_REG_SEQ,
186 .range_max = DA9063_REG_SEQ,
187 }, {
188 .range_min = DA9063_REG_EN_32K,
189 .range_max = DA9063_REG_EN_32K,
190 }, {
191 .range_min = DA9063_BB_REG_MON_REG_5,
192 .range_max = DA9063_BB_REG_MON_REG_6,
193 },
194}; 104};
195 105
196static const struct regmap_access_table da9063_bb_readable_table = { 106static const struct regmap_access_table da9063_bb_readable_table = {
@@ -208,6 +118,50 @@ static const struct regmap_access_table da9063_bb_volatile_table = {
208 .n_yes_ranges = ARRAY_SIZE(da9063_bb_volatile_ranges), 118 .n_yes_ranges = ARRAY_SIZE(da9063_bb_volatile_ranges),
209}; 119};
210 120
121static const struct regmap_range da9063l_bb_readable_ranges[] = {
122 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_MON_A10_RES),
123 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
124 regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
125 regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_BB_REG_GP_ID_19),
126 regmap_reg_range(DA9063_REG_CHIP_ID, DA9063_REG_CHIP_VARIANT),
127};
128
129static const struct regmap_range da9063l_bb_writeable_ranges[] = {
130 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON),
131 regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON),
132 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31),
133 regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW),
134 regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_BB_REG_MON_REG_4),
135 regmap_reg_range(DA9063_BB_REG_GP_ID_0, DA9063_BB_REG_GP_ID_19),
136};
137
138static const struct regmap_range da9063l_bb_volatile_ranges[] = {
139 regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D),
140 regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B),
141 regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F),
142 regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT),
143 regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN),
144 regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_REG_MON_A10_RES),
145 regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ),
146 regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K),
147 regmap_reg_range(DA9063_BB_REG_MON_REG_5, DA9063_BB_REG_MON_REG_6),
148};
149
150static const struct regmap_access_table da9063l_bb_readable_table = {
151 .yes_ranges = da9063l_bb_readable_ranges,
152 .n_yes_ranges = ARRAY_SIZE(da9063l_bb_readable_ranges),
153};
154
155static const struct regmap_access_table da9063l_bb_writeable_table = {
156 .yes_ranges = da9063l_bb_writeable_ranges,
157 .n_yes_ranges = ARRAY_SIZE(da9063l_bb_writeable_ranges),
158};
159
160static const struct regmap_access_table da9063l_bb_volatile_table = {
161 .yes_ranges = da9063l_bb_volatile_ranges,
162 .n_yes_ranges = ARRAY_SIZE(da9063l_bb_volatile_ranges),
163};
164
211static const struct regmap_range_cfg da9063_range_cfg[] = { 165static const struct regmap_range_cfg da9063_range_cfg[] = {
212 { 166 {
213 .range_min = DA9063_REG_PAGE_CON, 167 .range_min = DA9063_REG_PAGE_CON,
@@ -232,11 +186,12 @@ static struct regmap_config da9063_regmap_config = {
232 186
233static const struct of_device_id da9063_dt_ids[] = { 187static const struct of_device_id da9063_dt_ids[] = {
234 { .compatible = "dlg,da9063", }, 188 { .compatible = "dlg,da9063", },
189 { .compatible = "dlg,da9063l", },
235 { } 190 { }
236}; 191};
237MODULE_DEVICE_TABLE(of, da9063_dt_ids); 192MODULE_DEVICE_TABLE(of, da9063_dt_ids);
238static int da9063_i2c_probe(struct i2c_client *i2c, 193static int da9063_i2c_probe(struct i2c_client *i2c,
239 const struct i2c_device_id *id) 194 const struct i2c_device_id *id)
240{ 195{
241 struct da9063 *da9063; 196 struct da9063 *da9063;
242 int ret; 197 int ret;
@@ -248,11 +203,16 @@ static int da9063_i2c_probe(struct i2c_client *i2c,
248 i2c_set_clientdata(i2c, da9063); 203 i2c_set_clientdata(i2c, da9063);
249 da9063->dev = &i2c->dev; 204 da9063->dev = &i2c->dev;
250 da9063->chip_irq = i2c->irq; 205 da9063->chip_irq = i2c->irq;
206 da9063->type = id->driver_data;
251 207
252 if (da9063->variant_code == PMIC_DA9063_AD) { 208 if (da9063->variant_code == PMIC_DA9063_AD) {
253 da9063_regmap_config.rd_table = &da9063_ad_readable_table; 209 da9063_regmap_config.rd_table = &da9063_ad_readable_table;
254 da9063_regmap_config.wr_table = &da9063_ad_writeable_table; 210 da9063_regmap_config.wr_table = &da9063_ad_writeable_table;
255 da9063_regmap_config.volatile_table = &da9063_ad_volatile_table; 211 da9063_regmap_config.volatile_table = &da9063_ad_volatile_table;
212 } else if (da9063->type == PMIC_TYPE_DA9063L) {
213 da9063_regmap_config.rd_table = &da9063l_bb_readable_table;
214 da9063_regmap_config.wr_table = &da9063l_bb_writeable_table;
215 da9063_regmap_config.volatile_table = &da9063l_bb_volatile_table;
256 } else { 216 } else {
257 da9063_regmap_config.rd_table = &da9063_bb_readable_table; 217 da9063_regmap_config.rd_table = &da9063_bb_readable_table;
258 da9063_regmap_config.wr_table = &da9063_bb_writeable_table; 218 da9063_regmap_config.wr_table = &da9063_bb_writeable_table;
@@ -270,17 +230,9 @@ static int da9063_i2c_probe(struct i2c_client *i2c,
270 return da9063_device_init(da9063, i2c->irq); 230 return da9063_device_init(da9063, i2c->irq);
271} 231}
272 232
273static int da9063_i2c_remove(struct i2c_client *i2c)
274{
275 struct da9063 *da9063 = i2c_get_clientdata(i2c);
276
277 da9063_device_exit(da9063);
278
279 return 0;
280}
281
282static const struct i2c_device_id da9063_i2c_id[] = { 233static const struct i2c_device_id da9063_i2c_id[] = {
283 {"da9063", PMIC_DA9063}, 234 { "da9063", PMIC_TYPE_DA9063 },
235 { "da9063l", PMIC_TYPE_DA9063L },
284 {}, 236 {},
285}; 237};
286MODULE_DEVICE_TABLE(i2c, da9063_i2c_id); 238MODULE_DEVICE_TABLE(i2c, da9063_i2c_id);
@@ -291,7 +243,6 @@ static struct i2c_driver da9063_i2c_driver = {
291 .of_match_table = of_match_ptr(da9063_dt_ids), 243 .of_match_table = of_match_ptr(da9063_dt_ids),
292 }, 244 },
293 .probe = da9063_i2c_probe, 245 .probe = da9063_i2c_probe,
294 .remove = da9063_i2c_remove,
295 .id_table = da9063_i2c_id, 246 .id_table = da9063_i2c_id,
296}; 247};
297 248
diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c
index 207bbfe55449..ecc0c8ce6c58 100644
--- a/drivers/mfd/da9063-irq.c
+++ b/drivers/mfd/da9063-irq.c
@@ -28,132 +28,145 @@
28 28
29static const struct regmap_irq da9063_irqs[] = { 29static const struct regmap_irq da9063_irqs[] = {
30 /* DA9063 event A register */ 30 /* DA9063 event A register */
31 [DA9063_IRQ_ONKEY] = { 31 REGMAP_IRQ_REG(DA9063_IRQ_ONKEY,
32 .reg_offset = DA9063_REG_EVENT_A_OFFSET, 32 DA9063_REG_EVENT_A_OFFSET, DA9063_M_ONKEY),
33 .mask = DA9063_M_ONKEY, 33 REGMAP_IRQ_REG(DA9063_IRQ_ALARM,
34 }, 34 DA9063_REG_EVENT_A_OFFSET, DA9063_M_ALARM),
35 [DA9063_IRQ_ALARM] = { 35 REGMAP_IRQ_REG(DA9063_IRQ_TICK,
36 .reg_offset = DA9063_REG_EVENT_A_OFFSET, 36 DA9063_REG_EVENT_A_OFFSET, DA9063_M_TICK),
37 .mask = DA9063_M_ALARM, 37 REGMAP_IRQ_REG(DA9063_IRQ_ADC_RDY,
38 }, 38 DA9063_REG_EVENT_A_OFFSET, DA9063_M_ADC_RDY),
39 [DA9063_IRQ_TICK] = { 39 REGMAP_IRQ_REG(DA9063_IRQ_SEQ_RDY,
40 .reg_offset = DA9063_REG_EVENT_A_OFFSET, 40 DA9063_REG_EVENT_A_OFFSET, DA9063_M_SEQ_RDY),
41 .mask = DA9063_M_TICK,
42 },
43 [DA9063_IRQ_ADC_RDY] = {
44 .reg_offset = DA9063_REG_EVENT_A_OFFSET,
45 .mask = DA9063_M_ADC_RDY,
46 },
47 [DA9063_IRQ_SEQ_RDY] = {
48 .reg_offset = DA9063_REG_EVENT_A_OFFSET,
49 .mask = DA9063_M_SEQ_RDY,
50 },
51 /* DA9063 event B register */ 41 /* DA9063 event B register */
52 [DA9063_IRQ_WAKE] = { 42 REGMAP_IRQ_REG(DA9063_IRQ_WAKE,
53 .reg_offset = DA9063_REG_EVENT_B_OFFSET, 43 DA9063_REG_EVENT_B_OFFSET, DA9063_M_WAKE),
54 .mask = DA9063_M_WAKE, 44 REGMAP_IRQ_REG(DA9063_IRQ_TEMP,
55 }, 45 DA9063_REG_EVENT_B_OFFSET, DA9063_M_TEMP),
56 [DA9063_IRQ_TEMP] = { 46 REGMAP_IRQ_REG(DA9063_IRQ_COMP_1V2,
57 .reg_offset = DA9063_REG_EVENT_B_OFFSET, 47 DA9063_REG_EVENT_B_OFFSET, DA9063_M_COMP_1V2),
58 .mask = DA9063_M_TEMP, 48 REGMAP_IRQ_REG(DA9063_IRQ_LDO_LIM,
59 }, 49 DA9063_REG_EVENT_B_OFFSET, DA9063_M_LDO_LIM),
60 [DA9063_IRQ_COMP_1V2] = { 50 REGMAP_IRQ_REG(DA9063_IRQ_REG_UVOV,
61 .reg_offset = DA9063_REG_EVENT_B_OFFSET, 51 DA9063_REG_EVENT_B_OFFSET, DA9063_M_UVOV),
62 .mask = DA9063_M_COMP_1V2, 52 REGMAP_IRQ_REG(DA9063_IRQ_DVC_RDY,
63 }, 53 DA9063_REG_EVENT_B_OFFSET, DA9063_M_DVC_RDY),
64 [DA9063_IRQ_LDO_LIM] = { 54 REGMAP_IRQ_REG(DA9063_IRQ_VDD_MON,
65 .reg_offset = DA9063_REG_EVENT_B_OFFSET, 55 DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_MON),
66 .mask = DA9063_M_LDO_LIM, 56 REGMAP_IRQ_REG(DA9063_IRQ_WARN,
67 }, 57 DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_WARN),
68 [DA9063_IRQ_REG_UVOV] = {
69 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
70 .mask = DA9063_M_UVOV,
71 },
72 [DA9063_IRQ_DVC_RDY] = {
73 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
74 .mask = DA9063_M_DVC_RDY,
75 },
76 [DA9063_IRQ_VDD_MON] = {
77 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
78 .mask = DA9063_M_VDD_MON,
79 },
80 [DA9063_IRQ_WARN] = {
81 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
82 .mask = DA9063_M_VDD_WARN,
83 },
84 /* DA9063 event C register */ 58 /* DA9063 event C register */
85 [DA9063_IRQ_GPI0] = { 59 REGMAP_IRQ_REG(DA9063_IRQ_GPI0,
86 .reg_offset = DA9063_REG_EVENT_C_OFFSET, 60 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI0),
87 .mask = DA9063_M_GPI0, 61 REGMAP_IRQ_REG(DA9063_IRQ_GPI1,
88 }, 62 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI1),
89 [DA9063_IRQ_GPI1] = { 63 REGMAP_IRQ_REG(DA9063_IRQ_GPI2,
90 .reg_offset = DA9063_REG_EVENT_C_OFFSET, 64 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI2),
91 .mask = DA9063_M_GPI1, 65 REGMAP_IRQ_REG(DA9063_IRQ_GPI3,
92 }, 66 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI3),
93 [DA9063_IRQ_GPI2] = { 67 REGMAP_IRQ_REG(DA9063_IRQ_GPI4,
94 .reg_offset = DA9063_REG_EVENT_C_OFFSET, 68 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI4),
95 .mask = DA9063_M_GPI2, 69 REGMAP_IRQ_REG(DA9063_IRQ_GPI5,
96 }, 70 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI5),
97 [DA9063_IRQ_GPI3] = { 71 REGMAP_IRQ_REG(DA9063_IRQ_GPI6,
98 .reg_offset = DA9063_REG_EVENT_C_OFFSET, 72 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI6),
99 .mask = DA9063_M_GPI3, 73 REGMAP_IRQ_REG(DA9063_IRQ_GPI7,
100 }, 74 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI7),
101 [DA9063_IRQ_GPI4] = {
102 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
103 .mask = DA9063_M_GPI4,
104 },
105 [DA9063_IRQ_GPI5] = {
106 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
107 .mask = DA9063_M_GPI5,
108 },
109 [DA9063_IRQ_GPI6] = {
110 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
111 .mask = DA9063_M_GPI6,
112 },
113 [DA9063_IRQ_GPI7] = {
114 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
115 .mask = DA9063_M_GPI7,
116 },
117 /* DA9063 event D register */ 75 /* DA9063 event D register */
118 [DA9063_IRQ_GPI8] = { 76 REGMAP_IRQ_REG(DA9063_IRQ_GPI8,
119 .reg_offset = DA9063_REG_EVENT_D_OFFSET, 77 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI8),
120 .mask = DA9063_M_GPI8, 78 REGMAP_IRQ_REG(DA9063_IRQ_GPI9,
121 }, 79 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI9),
122 [DA9063_IRQ_GPI9] = { 80 REGMAP_IRQ_REG(DA9063_IRQ_GPI10,
123 .reg_offset = DA9063_REG_EVENT_D_OFFSET, 81 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI10),
124 .mask = DA9063_M_GPI9, 82 REGMAP_IRQ_REG(DA9063_IRQ_GPI11,
125 }, 83 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI11),
126 [DA9063_IRQ_GPI10] = { 84 REGMAP_IRQ_REG(DA9063_IRQ_GPI12,
127 .reg_offset = DA9063_REG_EVENT_D_OFFSET, 85 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI12),
128 .mask = DA9063_M_GPI10, 86 REGMAP_IRQ_REG(DA9063_IRQ_GPI13,
129 }, 87 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI13),
130 [DA9063_IRQ_GPI11] = { 88 REGMAP_IRQ_REG(DA9063_IRQ_GPI14,
131 .reg_offset = DA9063_REG_EVENT_D_OFFSET, 89 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI14),
132 .mask = DA9063_M_GPI11, 90 REGMAP_IRQ_REG(DA9063_IRQ_GPI15,
133 }, 91 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI15),
134 [DA9063_IRQ_GPI12] = {
135 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
136 .mask = DA9063_M_GPI12,
137 },
138 [DA9063_IRQ_GPI13] = {
139 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
140 .mask = DA9063_M_GPI13,
141 },
142 [DA9063_IRQ_GPI14] = {
143 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
144 .mask = DA9063_M_GPI14,
145 },
146 [DA9063_IRQ_GPI15] = {
147 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
148 .mask = DA9063_M_GPI15,
149 },
150}; 92};
151 93
152static const struct regmap_irq_chip da9063_irq_chip = { 94static const struct regmap_irq_chip da9063_irq_chip = {
153 .name = "da9063-irq", 95 .name = "da9063-irq",
154 .irqs = da9063_irqs, 96 .irqs = da9063_irqs,
155 .num_irqs = DA9063_NUM_IRQ, 97 .num_irqs = ARRAY_SIZE(da9063_irqs),
98 .num_regs = 4,
99 .status_base = DA9063_REG_EVENT_A,
100 .mask_base = DA9063_REG_IRQ_MASK_A,
101 .ack_base = DA9063_REG_EVENT_A,
102 .init_ack_masked = true,
103};
104
105static const struct regmap_irq da9063l_irqs[] = {
106 /* DA9063 event A register */
107 REGMAP_IRQ_REG(DA9063_IRQ_ONKEY,
108 DA9063_REG_EVENT_A_OFFSET, DA9063_M_ONKEY),
109 REGMAP_IRQ_REG(DA9063_IRQ_ADC_RDY,
110 DA9063_REG_EVENT_A_OFFSET, DA9063_M_ADC_RDY),
111 REGMAP_IRQ_REG(DA9063_IRQ_SEQ_RDY,
112 DA9063_REG_EVENT_A_OFFSET, DA9063_M_SEQ_RDY),
113 /* DA9063 event B register */
114 REGMAP_IRQ_REG(DA9063_IRQ_WAKE,
115 DA9063_REG_EVENT_B_OFFSET, DA9063_M_WAKE),
116 REGMAP_IRQ_REG(DA9063_IRQ_TEMP,
117 DA9063_REG_EVENT_B_OFFSET, DA9063_M_TEMP),
118 REGMAP_IRQ_REG(DA9063_IRQ_COMP_1V2,
119 DA9063_REG_EVENT_B_OFFSET, DA9063_M_COMP_1V2),
120 REGMAP_IRQ_REG(DA9063_IRQ_LDO_LIM,
121 DA9063_REG_EVENT_B_OFFSET, DA9063_M_LDO_LIM),
122 REGMAP_IRQ_REG(DA9063_IRQ_REG_UVOV,
123 DA9063_REG_EVENT_B_OFFSET, DA9063_M_UVOV),
124 REGMAP_IRQ_REG(DA9063_IRQ_DVC_RDY,
125 DA9063_REG_EVENT_B_OFFSET, DA9063_M_DVC_RDY),
126 REGMAP_IRQ_REG(DA9063_IRQ_VDD_MON,
127 DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_MON),
128 REGMAP_IRQ_REG(DA9063_IRQ_WARN,
129 DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_WARN),
130 /* DA9063 event C register */
131 REGMAP_IRQ_REG(DA9063_IRQ_GPI0,
132 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI0),
133 REGMAP_IRQ_REG(DA9063_IRQ_GPI1,
134 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI1),
135 REGMAP_IRQ_REG(DA9063_IRQ_GPI2,
136 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI2),
137 REGMAP_IRQ_REG(DA9063_IRQ_GPI3,
138 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI3),
139 REGMAP_IRQ_REG(DA9063_IRQ_GPI4,
140 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI4),
141 REGMAP_IRQ_REG(DA9063_IRQ_GPI5,
142 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI5),
143 REGMAP_IRQ_REG(DA9063_IRQ_GPI6,
144 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI6),
145 REGMAP_IRQ_REG(DA9063_IRQ_GPI7,
146 DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI7),
147 /* DA9063 event D register */
148 REGMAP_IRQ_REG(DA9063_IRQ_GPI8,
149 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI8),
150 REGMAP_IRQ_REG(DA9063_IRQ_GPI9,
151 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI9),
152 REGMAP_IRQ_REG(DA9063_IRQ_GPI10,
153 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI10),
154 REGMAP_IRQ_REG(DA9063_IRQ_GPI11,
155 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI11),
156 REGMAP_IRQ_REG(DA9063_IRQ_GPI12,
157 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI12),
158 REGMAP_IRQ_REG(DA9063_IRQ_GPI13,
159 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI13),
160 REGMAP_IRQ_REG(DA9063_IRQ_GPI14,
161 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI14),
162 REGMAP_IRQ_REG(DA9063_IRQ_GPI15,
163 DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI15),
164};
156 165
166static const struct regmap_irq_chip da9063l_irq_chip = {
167 .name = "da9063l-irq",
168 .irqs = da9063l_irqs,
169 .num_irqs = ARRAY_SIZE(da9063l_irqs),
157 .num_regs = 4, 170 .num_regs = 4,
158 .status_base = DA9063_REG_EVENT_A, 171 .status_base = DA9063_REG_EVENT_A,
159 .mask_base = DA9063_REG_IRQ_MASK_A, 172 .mask_base = DA9063_REG_IRQ_MASK_A,
@@ -163,6 +176,7 @@ static const struct regmap_irq_chip da9063_irq_chip = {
163 176
164int da9063_irq_init(struct da9063 *da9063) 177int da9063_irq_init(struct da9063 *da9063)
165{ 178{
179 const struct regmap_irq_chip *irq_chip;
166 int ret; 180 int ret;
167 181
168 if (!da9063->chip_irq) { 182 if (!da9063->chip_irq) {
@@ -170,10 +184,15 @@ int da9063_irq_init(struct da9063 *da9063)
170 return -EINVAL; 184 return -EINVAL;
171 } 185 }
172 186
173 ret = regmap_add_irq_chip(da9063->regmap, da9063->chip_irq, 187 if (da9063->type == PMIC_TYPE_DA9063)
188 irq_chip = &da9063_irq_chip;
189 else
190 irq_chip = &da9063l_irq_chip;
191
192 ret = devm_regmap_add_irq_chip(da9063->dev, da9063->regmap,
193 da9063->chip_irq,
174 IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED, 194 IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,
175 da9063->irq_base, &da9063_irq_chip, 195 da9063->irq_base, irq_chip, &da9063->regmap_irq);
176 &da9063->regmap_irq);
177 if (ret) { 196 if (ret) {
178 dev_err(da9063->dev, "Failed to reguest IRQ %d: %d\n", 197 dev_err(da9063->dev, "Failed to reguest IRQ %d: %d\n",
179 da9063->chip_irq, ret); 198 da9063->chip_irq, ret);
@@ -182,8 +201,3 @@ int da9063_irq_init(struct da9063 *da9063)
182 201
183 return 0; 202 return 0;
184} 203}
185
186void da9063_irq_exit(struct da9063 *da9063)
187{
188 regmap_del_irq_chip(da9063->chip_irq, da9063->regmap_irq);
189}
diff --git a/drivers/mfd/dln2.c b/drivers/mfd/dln2.c
index 704e189ca162..90e789943466 100644
--- a/drivers/mfd/dln2.c
+++ b/drivers/mfd/dln2.c
@@ -194,6 +194,7 @@ static bool dln2_transfer_complete(struct dln2_dev *dln2, struct urb *urb,
194 struct device *dev = &dln2->interface->dev; 194 struct device *dev = &dln2->interface->dev;
195 struct dln2_mod_rx_slots *rxs = &dln2->mod_rx_slots[handle]; 195 struct dln2_mod_rx_slots *rxs = &dln2->mod_rx_slots[handle];
196 struct dln2_rx_context *rxc; 196 struct dln2_rx_context *rxc;
197 unsigned long flags;
197 bool valid_slot = false; 198 bool valid_slot = false;
198 199
199 if (rx_slot >= DLN2_MAX_RX_SLOTS) 200 if (rx_slot >= DLN2_MAX_RX_SLOTS)
@@ -201,18 +202,13 @@ static bool dln2_transfer_complete(struct dln2_dev *dln2, struct urb *urb,
201 202
202 rxc = &rxs->slots[rx_slot]; 203 rxc = &rxs->slots[rx_slot];
203 204
204 /* 205 spin_lock_irqsave(&rxs->lock, flags);
205 * No need to disable interrupts as this lock is not taken in interrupt
206 * context elsewhere in this driver. This function (or its callers) are
207 * also not exported to other modules.
208 */
209 spin_lock(&rxs->lock);
210 if (rxc->in_use && !rxc->urb) { 206 if (rxc->in_use && !rxc->urb) {
211 rxc->urb = urb; 207 rxc->urb = urb;
212 complete(&rxc->done); 208 complete(&rxc->done);
213 valid_slot = true; 209 valid_slot = true;
214 } 210 }
215 spin_unlock(&rxs->lock); 211 spin_unlock_irqrestore(&rxs->lock, flags);
216 212
217out: 213out:
218 if (!valid_slot) 214 if (!valid_slot)
diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c
index c37ccbfd52f2..96c07fa1802a 100644
--- a/drivers/mfd/hi655x-pmic.c
+++ b/drivers/mfd/hi655x-pmic.c
@@ -49,7 +49,7 @@ static struct regmap_config hi655x_regmap_config = {
49 .reg_bits = 32, 49 .reg_bits = 32,
50 .reg_stride = HI655X_STRIDE, 50 .reg_stride = HI655X_STRIDE,
51 .val_bits = 8, 51 .val_bits = 8,
52 .max_register = HI655X_BUS_ADDR(0xFFF), 52 .max_register = HI655X_BUS_ADDR(0x400) - HI655X_STRIDE,
53}; 53};
54 54
55static struct resource pwrkey_resources[] = { 55static struct resource pwrkey_resources[] = {
diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
index d9ae983095c5..0e5282fc1467 100644
--- a/drivers/mfd/intel-lpss-pci.c
+++ b/drivers/mfd/intel-lpss-pci.c
@@ -178,6 +178,19 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
178 { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info }, 178 { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info },
179 { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info }, 179 { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info },
180 { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info }, 180 { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info },
181 /* ICL-LP */
182 { PCI_VDEVICE(INTEL, 0x34a8), (kernel_ulong_t)&spt_uart_info },
183 { PCI_VDEVICE(INTEL, 0x34a9), (kernel_ulong_t)&spt_uart_info },
184 { PCI_VDEVICE(INTEL, 0x34aa), (kernel_ulong_t)&spt_info },
185 { PCI_VDEVICE(INTEL, 0x34ab), (kernel_ulong_t)&spt_info },
186 { PCI_VDEVICE(INTEL, 0x34c5), (kernel_ulong_t)&bxt_i2c_info },
187 { PCI_VDEVICE(INTEL, 0x34c6), (kernel_ulong_t)&bxt_i2c_info },
188 { PCI_VDEVICE(INTEL, 0x34c7), (kernel_ulong_t)&spt_uart_info },
189 { PCI_VDEVICE(INTEL, 0x34e8), (kernel_ulong_t)&bxt_i2c_info },
190 { PCI_VDEVICE(INTEL, 0x34e9), (kernel_ulong_t)&bxt_i2c_info },
191 { PCI_VDEVICE(INTEL, 0x34ea), (kernel_ulong_t)&bxt_i2c_info },
192 { PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info },
193 { PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&spt_info },
181 /* APL */ 194 /* APL */
182 { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, 195 { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info },
183 { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, 196 { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info },
diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c
index 390b27cb2c2e..fb5a10b8317d 100644
--- a/drivers/mfd/kempld-core.c
+++ b/drivers/mfd/kempld-core.c
@@ -143,7 +143,7 @@ static struct platform_device *kempld_pdev;
143 143
144static int kempld_create_platform_device(const struct dmi_system_id *id) 144static int kempld_create_platform_device(const struct dmi_system_id *id)
145{ 145{
146 struct kempld_platform_data *pdata = id->driver_data; 146 const struct kempld_platform_data *pdata = id->driver_data;
147 int ret; 147 int ret;
148 148
149 kempld_pdev = platform_device_alloc("kempld", -1); 149 kempld_pdev = platform_device_alloc("kempld", -1);
@@ -259,7 +259,7 @@ EXPORT_SYMBOL_GPL(kempld_write32);
259 */ 259 */
260void kempld_get_mutex(struct kempld_device_data *pld) 260void kempld_get_mutex(struct kempld_device_data *pld)
261{ 261{
262 struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); 262 const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev);
263 263
264 mutex_lock(&pld->lock); 264 mutex_lock(&pld->lock);
265 pdata->get_hardware_mutex(pld); 265 pdata->get_hardware_mutex(pld);
@@ -272,7 +272,7 @@ EXPORT_SYMBOL_GPL(kempld_get_mutex);
272 */ 272 */
273void kempld_release_mutex(struct kempld_device_data *pld) 273void kempld_release_mutex(struct kempld_device_data *pld)
274{ 274{
275 struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); 275 const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev);
276 276
277 pdata->release_hardware_mutex(pld); 277 pdata->release_hardware_mutex(pld);
278 mutex_unlock(&pld->lock); 278 mutex_unlock(&pld->lock);
@@ -290,7 +290,7 @@ EXPORT_SYMBOL_GPL(kempld_release_mutex);
290static int kempld_get_info(struct kempld_device_data *pld) 290static int kempld_get_info(struct kempld_device_data *pld)
291{ 291{
292 int ret; 292 int ret;
293 struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); 293 const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev);
294 char major, minor; 294 char major, minor;
295 295
296 ret = pdata->get_info(pld); 296 ret = pdata->get_info(pld);
@@ -332,7 +332,7 @@ static int kempld_get_info(struct kempld_device_data *pld)
332 */ 332 */
333static int kempld_register_cells(struct kempld_device_data *pld) 333static int kempld_register_cells(struct kempld_device_data *pld)
334{ 334{
335 struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); 335 const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev);
336 336
337 return pdata->register_cells(pld); 337 return pdata->register_cells(pld);
338} 338}
@@ -444,7 +444,8 @@ static int kempld_detect_device(struct kempld_device_data *pld)
444 444
445static int kempld_probe(struct platform_device *pdev) 445static int kempld_probe(struct platform_device *pdev)
446{ 446{
447 struct kempld_platform_data *pdata = dev_get_platdata(&pdev->dev); 447 const struct kempld_platform_data *pdata =
448 dev_get_platdata(&pdev->dev);
448 struct device *dev = &pdev->dev; 449 struct device *dev = &pdev->dev;
449 struct kempld_device_data *pld; 450 struct kempld_device_data *pld;
450 struct resource *ioport; 451 struct resource *ioport;
@@ -476,7 +477,7 @@ static int kempld_probe(struct platform_device *pdev)
476static int kempld_remove(struct platform_device *pdev) 477static int kempld_remove(struct platform_device *pdev)
477{ 478{
478 struct kempld_device_data *pld = platform_get_drvdata(pdev); 479 struct kempld_device_data *pld = platform_get_drvdata(pdev);
479 struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); 480 const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev);
480 481
481 sysfs_remove_group(&pld->dev->kobj, &pld_attr_group); 482 sysfs_remove_group(&pld->dev->kobj, &pld_attr_group);
482 483
diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c
new file mode 100644
index 000000000000..8cfea969b060
--- /dev/null
+++ b/drivers/mfd/madera-core.c
@@ -0,0 +1,609 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Core MFD support for Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2015-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/device.h>
13#include <linux/delay.h>
14#include <linux/err.h>
15#include <linux/gpio.h>
16#include <linux/mfd/core.h>
17#include <linux/module.h>
18#include <linux/notifier.h>
19#include <linux/of.h>
20#include <linux/of_gpio.h>
21#include <linux/platform_device.h>
22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
25#include <linux/regulator/machine.h>
26#include <linux/regulator/of_regulator.h>
27
28#include <linux/mfd/madera/core.h>
29#include <linux/mfd/madera/registers.h>
30
31#include "madera.h"
32
33#define CS47L35_SILICON_ID 0x6360
34#define CS47L85_SILICON_ID 0x6338
35#define CS47L90_SILICON_ID 0x6364
36
37#define MADERA_32KZ_MCLK2 1
38
39static const char * const madera_core_supplies[] = {
40 "AVDD",
41 "DBVDD1",
42};
43
44static const struct mfd_cell madera_ldo1_devs[] = {
45 { .name = "madera-ldo1" },
46};
47
48static const char * const cs47l35_supplies[] = {
49 "MICVDD",
50 "DBVDD2",
51 "CPVDD1",
52 "CPVDD2",
53 "SPKVDD",
54};
55
56static const struct mfd_cell cs47l35_devs[] = {
57 { .name = "madera-pinctrl", },
58 { .name = "madera-irq", },
59 { .name = "madera-micsupp", },
60 { .name = "madera-gpio", },
61 { .name = "madera-extcon", },
62 {
63 .name = "cs47l35-codec",
64 .parent_supplies = cs47l35_supplies,
65 .num_parent_supplies = ARRAY_SIZE(cs47l35_supplies),
66 },
67};
68
69static const char * const cs47l85_supplies[] = {
70 "MICVDD",
71 "DBVDD2",
72 "DBVDD3",
73 "DBVDD4",
74 "CPVDD1",
75 "CPVDD2",
76 "SPKVDDL",
77 "SPKVDDR",
78};
79
80static const struct mfd_cell cs47l85_devs[] = {
81 { .name = "madera-pinctrl", },
82 { .name = "madera-irq", },
83 { .name = "madera-micsupp" },
84 { .name = "madera-gpio", },
85 { .name = "madera-extcon", },
86 {
87 .name = "cs47l85-codec",
88 .parent_supplies = cs47l85_supplies,
89 .num_parent_supplies = ARRAY_SIZE(cs47l85_supplies),
90 },
91};
92
93static const char * const cs47l90_supplies[] = {
94 "MICVDD",
95 "DBVDD2",
96 "DBVDD3",
97 "DBVDD4",
98 "CPVDD1",
99 "CPVDD2",
100};
101
102static const struct mfd_cell cs47l90_devs[] = {
103 { .name = "madera-pinctrl", },
104 { .name = "madera-irq", },
105 { .name = "madera-micsupp", },
106 { .name = "madera-gpio", },
107 { .name = "madera-extcon", },
108 {
109 .name = "cs47l90-codec",
110 .parent_supplies = cs47l90_supplies,
111 .num_parent_supplies = ARRAY_SIZE(cs47l90_supplies),
112 },
113};
114
115/* Used by madera-i2c and madera-spi drivers */
116const char *madera_name_from_type(enum madera_type type)
117{
118 switch (type) {
119 case CS47L35:
120 return "CS47L35";
121 case CS47L85:
122 return "CS47L85";
123 case CS47L90:
124 return "CS47L90";
125 case CS47L91:
126 return "CS47L91";
127 case WM1840:
128 return "WM1840";
129 default:
130 return "Unknown";
131 }
132}
133EXPORT_SYMBOL_GPL(madera_name_from_type);
134
135#define MADERA_BOOT_POLL_MAX_INTERVAL_US 5000
136#define MADERA_BOOT_POLL_TIMEOUT_US 25000
137
138static int madera_wait_for_boot(struct madera *madera)
139{
140 unsigned int val;
141 int ret;
142
143 /*
144 * We can't use an interrupt as we need to runtime resume to do so,
145 * so we poll the status bit. This won't race with the interrupt
146 * handler because it will be blocked on runtime resume.
147 */
148 ret = regmap_read_poll_timeout(madera->regmap,
149 MADERA_IRQ1_RAW_STATUS_1,
150 val,
151 (val & MADERA_BOOT_DONE_STS1),
152 MADERA_BOOT_POLL_MAX_INTERVAL_US,
153 MADERA_BOOT_POLL_TIMEOUT_US);
154
155 if (ret)
156 dev_err(madera->dev, "Polling BOOT_DONE_STS failed: %d\n", ret);
157
158 /*
159 * BOOT_DONE defaults to unmasked on boot so we must ack it.
160 * Do this unconditionally to avoid interrupt storms.
161 */
162 regmap_write(madera->regmap, MADERA_IRQ1_STATUS_1,
163 MADERA_BOOT_DONE_EINT1);
164
165 pm_runtime_mark_last_busy(madera->dev);
166
167 return ret;
168}
169
170static int madera_soft_reset(struct madera *madera)
171{
172 int ret;
173
174 ret = regmap_write(madera->regmap, MADERA_SOFTWARE_RESET, 0);
175 if (ret != 0) {
176 dev_err(madera->dev, "Failed to soft reset device: %d\n", ret);
177 return ret;
178 }
179
180 /* Allow time for internal clocks to startup after reset */
181 usleep_range(1000, 2000);
182
183 return 0;
184}
185
186static void madera_enable_hard_reset(struct madera *madera)
187{
188 if (!madera->pdata.reset)
189 return;
190
191 /*
192 * There are many existing out-of-tree users of these codecs that we
193 * can't break so preserve the expected behaviour of setting the line
194 * low to assert reset.
195 */
196 gpiod_set_raw_value_cansleep(madera->pdata.reset, 0);
197}
198
199static void madera_disable_hard_reset(struct madera *madera)
200{
201 if (!madera->pdata.reset)
202 return;
203
204 gpiod_set_raw_value_cansleep(madera->pdata.reset, 1);
205 usleep_range(1000, 2000);
206}
207
208static int __maybe_unused madera_runtime_resume(struct device *dev)
209{
210 struct madera *madera = dev_get_drvdata(dev);
211 int ret;
212
213 dev_dbg(dev, "Leaving sleep mode\n");
214
215 ret = regulator_enable(madera->dcvdd);
216 if (ret) {
217 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
218 return ret;
219 }
220
221 regcache_cache_only(madera->regmap, false);
222 regcache_cache_only(madera->regmap_32bit, false);
223
224 ret = madera_wait_for_boot(madera);
225 if (ret)
226 goto err;
227
228 ret = regcache_sync(madera->regmap);
229 if (ret) {
230 dev_err(dev, "Failed to restore 16-bit register cache\n");
231 goto err;
232 }
233
234 ret = regcache_sync(madera->regmap_32bit);
235 if (ret) {
236 dev_err(dev, "Failed to restore 32-bit register cache\n");
237 goto err;
238 }
239
240 return 0;
241
242err:
243 regcache_cache_only(madera->regmap_32bit, true);
244 regcache_cache_only(madera->regmap, true);
245 regulator_disable(madera->dcvdd);
246
247 return ret;
248}
249
250static int __maybe_unused madera_runtime_suspend(struct device *dev)
251{
252 struct madera *madera = dev_get_drvdata(dev);
253
254 dev_dbg(madera->dev, "Entering sleep mode\n");
255
256 regcache_cache_only(madera->regmap, true);
257 regcache_mark_dirty(madera->regmap);
258 regcache_cache_only(madera->regmap_32bit, true);
259 regcache_mark_dirty(madera->regmap_32bit);
260
261 regulator_disable(madera->dcvdd);
262
263 return 0;
264}
265
266const struct dev_pm_ops madera_pm_ops = {
267 SET_RUNTIME_PM_OPS(madera_runtime_suspend,
268 madera_runtime_resume,
269 NULL)
270};
271EXPORT_SYMBOL_GPL(madera_pm_ops);
272
273const struct of_device_id madera_of_match[] = {
274 { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 },
275 { .compatible = "cirrus,cs47l85", .data = (void *)CS47L85 },
276 { .compatible = "cirrus,cs47l90", .data = (void *)CS47L90 },
277 { .compatible = "cirrus,cs47l91", .data = (void *)CS47L91 },
278 { .compatible = "cirrus,wm1840", .data = (void *)WM1840 },
279 {}
280};
281EXPORT_SYMBOL_GPL(madera_of_match);
282
283static int madera_get_reset_gpio(struct madera *madera)
284{
285 struct gpio_desc *reset;
286 int ret;
287
288 if (madera->pdata.reset)
289 return 0;
290
291 reset = devm_gpiod_get_optional(madera->dev, "reset", GPIOD_OUT_LOW);
292 if (IS_ERR(reset)) {
293 ret = PTR_ERR(reset);
294 if (ret != -EPROBE_DEFER)
295 dev_err(madera->dev, "Failed to request /RESET: %d\n",
296 ret);
297 return ret;
298 }
299
300 /*
301 * A hard reset is needed for full reset of the chip. We allow running
302 * without hard reset only because it can be useful for early
303 * prototyping and some debugging, but we need to warn it's not ideal.
304 */
305 if (!reset)
306 dev_warn(madera->dev,
307 "Running without reset GPIO is not recommended\n");
308
309 madera->pdata.reset = reset;
310
311 return 0;
312}
313
314static void madera_set_micbias_info(struct madera *madera)
315{
316 /*
317 * num_childbias is an array because future codecs can have different
318 * childbiases for each micbias. Unspecified values default to 0.
319 */
320 switch (madera->type) {
321 case CS47L35:
322 madera->num_micbias = 2;
323 madera->num_childbias[0] = 2;
324 madera->num_childbias[1] = 2;
325 return;
326 case CS47L85:
327 case WM1840:
328 madera->num_micbias = 4;
329 /* no child biases */
330 return;
331 case CS47L90:
332 case CS47L91:
333 madera->num_micbias = 2;
334 madera->num_childbias[0] = 4;
335 madera->num_childbias[1] = 4;
336 return;
337 default:
338 return;
339 }
340}
341
342int madera_dev_init(struct madera *madera)
343{
344 struct device *dev = madera->dev;
345 unsigned int hwid;
346 int (*patch_fn)(struct madera *) = NULL;
347 const struct mfd_cell *mfd_devs;
348 int n_devs = 0;
349 int i, ret;
350
351 dev_set_drvdata(madera->dev, madera);
352 BLOCKING_INIT_NOTIFIER_HEAD(&madera->notifier);
353 madera_set_micbias_info(madera);
354
355 /*
356 * We need writable hw config info that all children can share.
357 * Simplest to take one shared copy of pdata struct.
358 */
359 if (dev_get_platdata(madera->dev)) {
360 memcpy(&madera->pdata, dev_get_platdata(madera->dev),
361 sizeof(madera->pdata));
362 }
363
364 ret = madera_get_reset_gpio(madera);
365 if (ret)
366 return ret;
367
368 regcache_cache_only(madera->regmap, true);
369 regcache_cache_only(madera->regmap_32bit, true);
370
371 for (i = 0; i < ARRAY_SIZE(madera_core_supplies); i++)
372 madera->core_supplies[i].supply = madera_core_supplies[i];
373
374 madera->num_core_supplies = ARRAY_SIZE(madera_core_supplies);
375
376 /*
377 * On some codecs DCVDD could be supplied by the internal LDO1.
378 * For those we must add the LDO1 driver before requesting DCVDD
379 * No devm_ because we need to control shutdown order of children.
380 */
381 switch (madera->type) {
382 case CS47L35:
383 case CS47L90:
384 case CS47L91:
385 break;
386 case CS47L85:
387 case WM1840:
388 ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE,
389 madera_ldo1_devs,
390 ARRAY_SIZE(madera_ldo1_devs),
391 NULL, 0, NULL);
392 if (ret) {
393 dev_err(dev, "Failed to add LDO1 child: %d\n", ret);
394 return ret;
395 }
396 break;
397 default:
398 /* No point continuing if the type is unknown */
399 dev_err(madera->dev, "Unknown device type %d\n", madera->type);
400 return -ENODEV;
401 }
402
403 ret = devm_regulator_bulk_get(dev, madera->num_core_supplies,
404 madera->core_supplies);
405 if (ret) {
406 dev_err(dev, "Failed to request core supplies: %d\n", ret);
407 goto err_devs;
408 }
409
410 /*
411 * Don't use devres here. If the regulator is one of our children it
412 * will already have been removed before devres cleanup on this mfd
413 * driver tries to call put() on it. We need control of shutdown order.
414 */
415 madera->dcvdd = regulator_get(madera->dev, "DCVDD");
416 if (IS_ERR(madera->dcvdd)) {
417 ret = PTR_ERR(madera->dcvdd);
418 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
419 goto err_devs;
420 }
421
422 ret = regulator_bulk_enable(madera->num_core_supplies,
423 madera->core_supplies);
424 if (ret) {
425 dev_err(dev, "Failed to enable core supplies: %d\n", ret);
426 goto err_dcvdd;
427 }
428
429 ret = regulator_enable(madera->dcvdd);
430 if (ret) {
431 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
432 goto err_enable;
433 }
434
435 madera_disable_hard_reset(madera);
436
437 regcache_cache_only(madera->regmap, false);
438 regcache_cache_only(madera->regmap_32bit, false);
439
440 /*
441 * Now we can power up and verify that this is a chip we know about
442 * before we start doing any writes to its registers.
443 */
444 ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &hwid);
445 if (ret) {
446 dev_err(dev, "Failed to read ID register: %d\n", ret);
447 goto err_reset;
448 }
449
450 switch (hwid) {
451 case CS47L35_SILICON_ID:
452 if (IS_ENABLED(CONFIG_MFD_CS47L35)) {
453 switch (madera->type) {
454 case CS47L35:
455 patch_fn = cs47l35_patch;
456 mfd_devs = cs47l35_devs;
457 n_devs = ARRAY_SIZE(cs47l35_devs);
458 break;
459 default:
460 break;
461 }
462 }
463 break;
464 case CS47L85_SILICON_ID:
465 if (IS_ENABLED(CONFIG_MFD_CS47L85)) {
466 switch (madera->type) {
467 case CS47L85:
468 case WM1840:
469 patch_fn = cs47l85_patch;
470 mfd_devs = cs47l85_devs;
471 n_devs = ARRAY_SIZE(cs47l85_devs);
472 break;
473 default:
474 break;
475 }
476 }
477 break;
478 case CS47L90_SILICON_ID:
479 if (IS_ENABLED(CONFIG_MFD_CS47L90)) {
480 switch (madera->type) {
481 case CS47L90:
482 case CS47L91:
483 patch_fn = cs47l90_patch;
484 mfd_devs = cs47l90_devs;
485 n_devs = ARRAY_SIZE(cs47l90_devs);
486 break;
487 default:
488 break;
489 }
490 }
491 break;
492 default:
493 dev_err(madera->dev, "Unknown device ID: %x\n", hwid);
494 ret = -EINVAL;
495 goto err_reset;
496 }
497
498 if (!n_devs) {
499 dev_err(madera->dev, "Device ID 0x%x not a %s\n", hwid,
500 madera->type_name);
501 ret = -ENODEV;
502 goto err_reset;
503 }
504
505 /*
506 * It looks like a device we support. If we don't have a hard reset
507 * we can now attempt a soft reset.
508 */
509 if (!madera->pdata.reset) {
510 ret = madera_soft_reset(madera);
511 if (ret)
512 goto err_reset;
513 }
514
515 ret = madera_wait_for_boot(madera);
516 if (ret) {
517 dev_err(madera->dev, "Device failed initial boot: %d\n", ret);
518 goto err_reset;
519 }
520
521 ret = regmap_read(madera->regmap, MADERA_HARDWARE_REVISION,
522 &madera->rev);
523 if (ret) {
524 dev_err(dev, "Failed to read revision register: %d\n", ret);
525 goto err_reset;
526 }
527 madera->rev &= MADERA_HW_REVISION_MASK;
528
529 dev_info(dev, "%s silicon revision %d\n", madera->type_name,
530 madera->rev);
531
532 /* Apply hardware patch */
533 if (patch_fn) {
534 ret = patch_fn(madera);
535 if (ret) {
536 dev_err(madera->dev, "Failed to apply patch %d\n", ret);
537 goto err_reset;
538 }
539 }
540
541 /* Init 32k clock sourced from MCLK2 */
542 ret = regmap_update_bits(madera->regmap,
543 MADERA_CLOCK_32K_1,
544 MADERA_CLK_32K_ENA_MASK | MADERA_CLK_32K_SRC_MASK,
545 MADERA_CLK_32K_ENA | MADERA_32KZ_MCLK2);
546 if (ret) {
547 dev_err(madera->dev, "Failed to init 32k clock: %d\n", ret);
548 goto err_reset;
549 }
550
551 pm_runtime_set_active(madera->dev);
552 pm_runtime_enable(madera->dev);
553 pm_runtime_set_autosuspend_delay(madera->dev, 100);
554 pm_runtime_use_autosuspend(madera->dev);
555
556 /* No devm_ because we need to control shutdown order of children */
557 ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE,
558 mfd_devs, n_devs,
559 NULL, 0, NULL);
560 if (ret) {
561 dev_err(madera->dev, "Failed to add subdevices: %d\n", ret);
562 goto err_pm_runtime;
563 }
564
565 return 0;
566
567err_pm_runtime:
568 pm_runtime_disable(madera->dev);
569err_reset:
570 madera_enable_hard_reset(madera);
571 regulator_disable(madera->dcvdd);
572err_enable:
573 regulator_bulk_disable(madera->num_core_supplies,
574 madera->core_supplies);
575err_dcvdd:
576 regulator_put(madera->dcvdd);
577err_devs:
578 mfd_remove_devices(dev);
579
580 return ret;
581}
582EXPORT_SYMBOL_GPL(madera_dev_init);
583
584int madera_dev_exit(struct madera *madera)
585{
586 /* Prevent any IRQs being serviced while we clean up */
587 disable_irq(madera->irq);
588
589 /*
590 * DCVDD could be supplied by a child node, we must disable it before
591 * removing the children, and prevent PM runtime from turning it back on
592 */
593 pm_runtime_disable(madera->dev);
594
595 regulator_disable(madera->dcvdd);
596 regulator_put(madera->dcvdd);
597
598 mfd_remove_devices(madera->dev);
599 madera_enable_hard_reset(madera);
600
601 regulator_bulk_disable(madera->num_core_supplies,
602 madera->core_supplies);
603 return 0;
604}
605EXPORT_SYMBOL_GPL(madera_dev_exit);
606
607MODULE_DESCRIPTION("Madera core MFD driver");
608MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
609MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/madera-i2c.c b/drivers/mfd/madera-i2c.c
new file mode 100644
index 000000000000..05ae94be01d8
--- /dev/null
+++ b/drivers/mfd/madera-i2c.c
@@ -0,0 +1,140 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * I2C bus interface to Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2015-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/device.h>
13#include <linux/err.h>
14#include <linux/i2c.h>
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/of_device.h>
18#include <linux/regmap.h>
19
20#include <linux/mfd/madera/core.h>
21
22#include "madera.h"
23
24static int madera_i2c_probe(struct i2c_client *i2c,
25 const struct i2c_device_id *id)
26{
27 struct madera *madera;
28 const struct regmap_config *regmap_16bit_config = NULL;
29 const struct regmap_config *regmap_32bit_config = NULL;
30 const void *of_data;
31 unsigned long type;
32 const char *name;
33 int ret;
34
35 of_data = of_device_get_match_data(&i2c->dev);
36 if (of_data)
37 type = (unsigned long)of_data;
38 else
39 type = id->driver_data;
40
41 switch (type) {
42 case CS47L35:
43 if (IS_ENABLED(CONFIG_MFD_CS47L35)) {
44 regmap_16bit_config = &cs47l35_16bit_i2c_regmap;
45 regmap_32bit_config = &cs47l35_32bit_i2c_regmap;
46 }
47 break;
48 case CS47L85:
49 case WM1840:
50 if (IS_ENABLED(CONFIG_MFD_CS47L85)) {
51 regmap_16bit_config = &cs47l85_16bit_i2c_regmap;
52 regmap_32bit_config = &cs47l85_32bit_i2c_regmap;
53 }
54 break;
55 case CS47L90:
56 case CS47L91:
57 if (IS_ENABLED(CONFIG_MFD_CS47L90)) {
58 regmap_16bit_config = &cs47l90_16bit_i2c_regmap;
59 regmap_32bit_config = &cs47l90_32bit_i2c_regmap;
60 }
61 break;
62 default:
63 dev_err(&i2c->dev,
64 "Unknown Madera I2C device type %ld\n", type);
65 return -EINVAL;
66 }
67
68 name = madera_name_from_type(type);
69
70 if (!regmap_16bit_config) {
71 /* it's polite to say which codec isn't built into the kernel */
72 dev_err(&i2c->dev,
73 "Kernel does not include support for %s\n", name);
74 return -EINVAL;
75 }
76
77 madera = devm_kzalloc(&i2c->dev, sizeof(*madera), GFP_KERNEL);
78 if (!madera)
79 return -ENOMEM;
80
81
82 madera->regmap = devm_regmap_init_i2c(i2c, regmap_16bit_config);
83 if (IS_ERR(madera->regmap)) {
84 ret = PTR_ERR(madera->regmap);
85 dev_err(&i2c->dev,
86 "Failed to allocate 16-bit register map: %d\n", ret);
87 return ret;
88 }
89
90 madera->regmap_32bit = devm_regmap_init_i2c(i2c, regmap_32bit_config);
91 if (IS_ERR(madera->regmap_32bit)) {
92 ret = PTR_ERR(madera->regmap_32bit);
93 dev_err(&i2c->dev,
94 "Failed to allocate 32-bit register map: %d\n", ret);
95 return ret;
96 }
97
98 madera->type = type;
99 madera->type_name = name;
100 madera->dev = &i2c->dev;
101 madera->irq = i2c->irq;
102
103 return madera_dev_init(madera);
104}
105
106static int madera_i2c_remove(struct i2c_client *i2c)
107{
108 struct madera *madera = dev_get_drvdata(&i2c->dev);
109
110 madera_dev_exit(madera);
111
112 return 0;
113}
114
115static const struct i2c_device_id madera_i2c_id[] = {
116 { "cs47l35", CS47L35 },
117 { "cs47l85", CS47L85 },
118 { "cs47l90", CS47L90 },
119 { "cs47l91", CS47L91 },
120 { "wm1840", WM1840 },
121 { }
122};
123MODULE_DEVICE_TABLE(i2c, madera_i2c_id);
124
125static struct i2c_driver madera_i2c_driver = {
126 .driver = {
127 .name = "madera",
128 .pm = &madera_pm_ops,
129 .of_match_table = of_match_ptr(madera_of_match),
130 },
131 .probe = madera_i2c_probe,
132 .remove = madera_i2c_remove,
133 .id_table = madera_i2c_id,
134};
135
136module_i2c_driver(madera_i2c_driver);
137
138MODULE_DESCRIPTION("Madera I2C bus interface");
139MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
140MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/madera-spi.c b/drivers/mfd/madera-spi.c
new file mode 100644
index 000000000000..4c398b278bba
--- /dev/null
+++ b/drivers/mfd/madera-spi.c
@@ -0,0 +1,139 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SPI bus interface to Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2015-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/device.h>
13#include <linux/err.h>
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17#include <linux/regmap.h>
18#include <linux/spi/spi.h>
19
20#include <linux/mfd/madera/core.h>
21
22#include "madera.h"
23
24static int madera_spi_probe(struct spi_device *spi)
25{
26 const struct spi_device_id *id = spi_get_device_id(spi);
27 struct madera *madera;
28 const struct regmap_config *regmap_16bit_config = NULL;
29 const struct regmap_config *regmap_32bit_config = NULL;
30 const void *of_data;
31 unsigned long type;
32 const char *name;
33 int ret;
34
35 of_data = of_device_get_match_data(&spi->dev);
36 if (of_data)
37 type = (unsigned long)of_data;
38 else
39 type = id->driver_data;
40
41 switch (type) {
42 case CS47L35:
43 if (IS_ENABLED(CONFIG_MFD_CS47L35)) {
44 regmap_16bit_config = &cs47l35_16bit_spi_regmap;
45 regmap_32bit_config = &cs47l35_32bit_spi_regmap;
46 }
47 break;
48 case CS47L85:
49 case WM1840:
50 if (IS_ENABLED(CONFIG_MFD_CS47L85)) {
51 regmap_16bit_config = &cs47l85_16bit_spi_regmap;
52 regmap_32bit_config = &cs47l85_32bit_spi_regmap;
53 }
54 break;
55 case CS47L90:
56 case CS47L91:
57 if (IS_ENABLED(CONFIG_MFD_CS47L90)) {
58 regmap_16bit_config = &cs47l90_16bit_spi_regmap;
59 regmap_32bit_config = &cs47l90_32bit_spi_regmap;
60 }
61 break;
62 default:
63 dev_err(&spi->dev,
64 "Unknown Madera SPI device type %ld\n", type);
65 return -EINVAL;
66 }
67
68 name = madera_name_from_type(type);
69
70 if (!regmap_16bit_config) {
71 /* it's polite to say which codec isn't built into the kernel */
72 dev_err(&spi->dev,
73 "Kernel does not include support for %s\n", name);
74 return -EINVAL;
75 }
76
77 madera = devm_kzalloc(&spi->dev, sizeof(*madera), GFP_KERNEL);
78 if (!madera)
79 return -ENOMEM;
80
81 madera->regmap = devm_regmap_init_spi(spi, regmap_16bit_config);
82 if (IS_ERR(madera->regmap)) {
83 ret = PTR_ERR(madera->regmap);
84 dev_err(&spi->dev,
85 "Failed to allocate 16-bit register map: %d\n", ret);
86 return ret;
87 }
88
89 madera->regmap_32bit = devm_regmap_init_spi(spi, regmap_32bit_config);
90 if (IS_ERR(madera->regmap_32bit)) {
91 ret = PTR_ERR(madera->regmap_32bit);
92 dev_err(&spi->dev,
93 "Failed to allocate 32-bit register map: %d\n", ret);
94 return ret;
95 }
96
97 madera->type = type;
98 madera->type_name = name;
99 madera->dev = &spi->dev;
100 madera->irq = spi->irq;
101
102 return madera_dev_init(madera);
103}
104
105static int madera_spi_remove(struct spi_device *spi)
106{
107 struct madera *madera = spi_get_drvdata(spi);
108
109 madera_dev_exit(madera);
110
111 return 0;
112}
113
114static const struct spi_device_id madera_spi_ids[] = {
115 { "cs47l35", CS47L35 },
116 { "cs47l85", CS47L85 },
117 { "cs47l90", CS47L90 },
118 { "cs47l91", CS47L91 },
119 { "wm1840", WM1840 },
120 { }
121};
122MODULE_DEVICE_TABLE(spi, madera_spi_ids);
123
124static struct spi_driver madera_spi_driver = {
125 .driver = {
126 .name = "madera",
127 .pm = &madera_pm_ops,
128 .of_match_table = of_match_ptr(madera_of_match),
129 },
130 .probe = madera_spi_probe,
131 .remove = madera_spi_remove,
132 .id_table = madera_spi_ids,
133};
134
135module_spi_driver(madera_spi_driver);
136
137MODULE_DESCRIPTION("Madera SPI bus interface");
138MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
139MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/madera.h b/drivers/mfd/madera.h
new file mode 100644
index 000000000000..891b84efb9a7
--- /dev/null
+++ b/drivers/mfd/madera.h
@@ -0,0 +1,44 @@
1/*
2 * MFD internals for Cirrus Logic Madera codecs
3 *
4 * Copyright 2015-2018 Cirrus Logic
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef MADERA_MFD_H
12#define MADERA_MFD_H
13
14#include <linux/of.h>
15#include <linux/pm.h>
16
17struct madera;
18
19extern const struct dev_pm_ops madera_pm_ops;
20extern const struct of_device_id madera_of_match[];
21
22int madera_dev_init(struct madera *madera);
23int madera_dev_exit(struct madera *madera);
24
25const char *madera_name_from_type(enum madera_type type);
26
27extern const struct regmap_config cs47l35_16bit_spi_regmap;
28extern const struct regmap_config cs47l35_32bit_spi_regmap;
29extern const struct regmap_config cs47l35_16bit_i2c_regmap;
30extern const struct regmap_config cs47l35_32bit_i2c_regmap;
31int cs47l35_patch(struct madera *madera);
32
33extern const struct regmap_config cs47l85_16bit_spi_regmap;
34extern const struct regmap_config cs47l85_32bit_spi_regmap;
35extern const struct regmap_config cs47l85_16bit_i2c_regmap;
36extern const struct regmap_config cs47l85_32bit_i2c_regmap;
37int cs47l85_patch(struct madera *madera);
38
39extern const struct regmap_config cs47l90_16bit_spi_regmap;
40extern const struct regmap_config cs47l90_32bit_spi_regmap;
41extern const struct regmap_config cs47l90_16bit_i2c_regmap;
42extern const struct regmap_config cs47l90_32bit_i2c_regmap;
43int cs47l90_patch(struct madera *madera);
44#endif
diff --git a/drivers/mfd/rave-sp.c b/drivers/mfd/rave-sp.c
index 36dcd98977d6..2a8369657e38 100644
--- a/drivers/mfd/rave-sp.c
+++ b/drivers/mfd/rave-sp.c
@@ -63,16 +63,6 @@
63#define RAVE_SP_TX_BUFFER_SIZE \ 63#define RAVE_SP_TX_BUFFER_SIZE \
64 (RAVE_SP_STX_ETX_SIZE + 2 * RAVE_SP_RX_BUFFER_SIZE) 64 (RAVE_SP_STX_ETX_SIZE + 2 * RAVE_SP_RX_BUFFER_SIZE)
65 65
66#define RAVE_SP_BOOT_SOURCE_GET 0
67#define RAVE_SP_BOOT_SOURCE_SET 1
68
69#define RAVE_SP_RDU2_BOARD_TYPE_RMB 0
70#define RAVE_SP_RDU2_BOARD_TYPE_DEB 1
71
72#define RAVE_SP_BOOT_SOURCE_SD 0
73#define RAVE_SP_BOOT_SOURCE_EMMC 1
74#define RAVE_SP_BOOT_SOURCE_NOR 2
75
76/** 66/**
77 * enum rave_sp_deframer_state - Possible state for de-framer 67 * enum rave_sp_deframer_state - Possible state for de-framer
78 * 68 *
@@ -127,14 +117,44 @@ struct rave_sp_checksum {
127 void (*subroutine)(const u8 *, size_t, u8 *); 117 void (*subroutine)(const u8 *, size_t, u8 *);
128}; 118};
129 119
120struct rave_sp_version {
121 u8 hardware;
122 __le16 major;
123 u8 minor;
124 u8 letter[2];
125} __packed;
126
127struct rave_sp_status {
128 struct rave_sp_version bootloader_version;
129 struct rave_sp_version firmware_version;
130 u16 rdu_eeprom_flag;
131 u16 dds_eeprom_flag;
132 u8 pic_flag;
133 u8 orientation;
134 u32 etc;
135 s16 temp[2];
136 u8 backlight_current[3];
137 u8 dip_switch;
138 u8 host_interrupt;
139 u16 voltage_28;
140 u8 i2c_device_status;
141 u8 power_status;
142 u8 general_status;
143 u8 deprecated1;
144 u8 power_led_status;
145 u8 deprecated2;
146 u8 periph_power_shutoff;
147} __packed;
148
130/** 149/**
131 * struct rave_sp_variant_cmds - Variant specific command routines 150 * struct rave_sp_variant_cmds - Variant specific command routines
132 * 151 *
133 * @translate: Generic to variant specific command mapping routine 152 * @translate: Generic to variant specific command mapping routine
134 * 153 * @get_status: Variant specific implementation of CMD_GET_STATUS
135 */ 154 */
136struct rave_sp_variant_cmds { 155struct rave_sp_variant_cmds {
137 int (*translate)(enum rave_sp_command); 156 int (*translate)(enum rave_sp_command);
157 int (*get_status)(struct rave_sp *sp, struct rave_sp_status *);
138}; 158};
139 159
140/** 160/**
@@ -180,35 +200,6 @@ struct rave_sp {
180 const char *part_number_bootloader; 200 const char *part_number_bootloader;
181}; 201};
182 202
183struct rave_sp_version {
184 u8 hardware;
185 __le16 major;
186 u8 minor;
187 u8 letter[2];
188} __packed;
189
190struct rave_sp_status {
191 struct rave_sp_version bootloader_version;
192 struct rave_sp_version firmware_version;
193 u16 rdu_eeprom_flag;
194 u16 dds_eeprom_flag;
195 u8 pic_flag;
196 u8 orientation;
197 u32 etc;
198 s16 temp[2];
199 u8 backlight_current[3];
200 u8 dip_switch;
201 u8 host_interrupt;
202 u16 voltage_28;
203 u8 i2c_device_status;
204 u8 power_status;
205 u8 general_status;
206 u8 deprecated1;
207 u8 power_led_status;
208 u8 deprecated2;
209 u8 periph_power_shutoff;
210} __packed;
211
212static bool rave_sp_id_is_event(u8 code) 203static bool rave_sp_id_is_event(u8 code)
213{ 204{
214 return (code & 0xF0) == RAVE_SP_EVNT_BASE; 205 return (code & 0xF0) == RAVE_SP_EVNT_BASE;
@@ -641,10 +632,14 @@ static int rave_sp_default_cmd_translate(enum rave_sp_command command)
641 return 0x14; 632 return 0x14;
642 case RAVE_SP_CMD_SW_WDT: 633 case RAVE_SP_CMD_SW_WDT:
643 return 0x1C; 634 return 0x1C;
635 case RAVE_SP_CMD_PET_WDT:
636 return 0x1D;
644 case RAVE_SP_CMD_RESET: 637 case RAVE_SP_CMD_RESET:
645 return 0x1E; 638 return 0x1E;
646 case RAVE_SP_CMD_RESET_REASON: 639 case RAVE_SP_CMD_RESET_REASON:
647 return 0x1F; 640 return 0x1F;
641 case RAVE_SP_CMD_RMB_EEPROM:
642 return 0x20;
648 default: 643 default:
649 return -EINVAL; 644 return -EINVAL;
650 } 645 }
@@ -666,18 +661,44 @@ static const char *devm_rave_sp_version(struct device *dev,
666 version->letter[1]); 661 version->letter[1]);
667} 662}
668 663
669static int rave_sp_get_status(struct rave_sp *sp) 664static int rave_sp_rdu1_get_status(struct rave_sp *sp,
665 struct rave_sp_status *status)
670{ 666{
671 struct device *dev = &sp->serdev->dev;
672 u8 cmd[] = { 667 u8 cmd[] = {
673 [0] = RAVE_SP_CMD_STATUS, 668 [0] = RAVE_SP_CMD_STATUS,
674 [1] = 0 669 [1] = 0
675 }; 670 };
671
672 return rave_sp_exec(sp, cmd, sizeof(cmd), status, sizeof(*status));
673}
674
675static int rave_sp_emulated_get_status(struct rave_sp *sp,
676 struct rave_sp_status *status)
677{
678 u8 cmd[] = {
679 [0] = RAVE_SP_CMD_GET_FIRMWARE_VERSION,
680 [1] = 0,
681 };
682 int ret;
683
684 ret = rave_sp_exec(sp, cmd, sizeof(cmd), &status->firmware_version,
685 sizeof(status->firmware_version));
686 if (ret)
687 return ret;
688
689 cmd[0] = RAVE_SP_CMD_GET_BOOTLOADER_VERSION;
690 return rave_sp_exec(sp, cmd, sizeof(cmd), &status->bootloader_version,
691 sizeof(status->bootloader_version));
692}
693
694static int rave_sp_get_status(struct rave_sp *sp)
695{
696 struct device *dev = &sp->serdev->dev;
676 struct rave_sp_status status; 697 struct rave_sp_status status;
677 const char *version; 698 const char *version;
678 int ret; 699 int ret;
679 700
680 ret = rave_sp_exec(sp, cmd, sizeof(cmd), &status, sizeof(status)); 701 ret = sp->variant->cmd.get_status(sp, &status);
681 if (ret) 702 if (ret)
682 return ret; 703 return ret;
683 704
@@ -707,9 +728,10 @@ static const struct rave_sp_checksum rave_sp_checksum_ccitt = {
707}; 728};
708 729
709static const struct rave_sp_variant rave_sp_legacy = { 730static const struct rave_sp_variant rave_sp_legacy = {
710 .checksum = &rave_sp_checksum_8b2c, 731 .checksum = &rave_sp_checksum_ccitt,
711 .cmd = { 732 .cmd = {
712 .translate = rave_sp_default_cmd_translate, 733 .translate = rave_sp_default_cmd_translate,
734 .get_status = rave_sp_emulated_get_status,
713 }, 735 },
714}; 736};
715 737
@@ -717,6 +739,7 @@ static const struct rave_sp_variant rave_sp_rdu1 = {
717 .checksum = &rave_sp_checksum_8b2c, 739 .checksum = &rave_sp_checksum_8b2c,
718 .cmd = { 740 .cmd = {
719 .translate = rave_sp_rdu1_cmd_translate, 741 .translate = rave_sp_rdu1_cmd_translate,
742 .get_status = rave_sp_rdu1_get_status,
720 }, 743 },
721}; 744};
722 745
@@ -724,6 +747,7 @@ static const struct rave_sp_variant rave_sp_rdu2 = {
724 .checksum = &rave_sp_checksum_ccitt, 747 .checksum = &rave_sp_checksum_ccitt,
725 .cmd = { 748 .cmd = {
726 .translate = rave_sp_rdu2_cmd_translate, 749 .translate = rave_sp_rdu2_cmd_translate,
750 .get_status = rave_sp_emulated_get_status,
727 }, 751 },
728}; 752};
729 753
@@ -776,6 +800,13 @@ static int rave_sp_probe(struct serdev_device *serdev)
776 return ret; 800 return ret;
777 801
778 serdev_device_set_baudrate(serdev, baud); 802 serdev_device_set_baudrate(serdev, baud);
803 serdev_device_set_flow_control(serdev, false);
804
805 ret = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE);
806 if (ret) {
807 dev_err(dev, "Failed to set parity\n");
808 return ret;
809 }
779 810
780 ret = rave_sp_get_status(sp); 811 ret = rave_sp_get_status(sp);
781 if (ret) { 812 if (ret) {
diff --git a/drivers/mfd/rohm-bd718x7.c b/drivers/mfd/rohm-bd718x7.c
new file mode 100644
index 000000000000..75c8ec659547
--- /dev/null
+++ b/drivers/mfd/rohm-bd718x7.c
@@ -0,0 +1,211 @@
1// SPDX-License-Identifier: GPL-2.0-or-later
2//
3// Copyright (C) 2018 ROHM Semiconductors
4//
5// ROHM BD71837MWV PMIC driver
6//
7// Datasheet available from
8// https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
9
10#include <linux/i2c.h>
11#include <linux/input.h>
12#include <linux/interrupt.h>
13#include <linux/mfd/rohm-bd718x7.h>
14#include <linux/mfd/core.h>
15#include <linux/module.h>
16#include <linux/regmap.h>
17
18/*
19 * gpio_keys.h requires definiton of bool. It is brought in
20 * by above includes. Keep this as last until gpio_keys.h gets fixed.
21 */
22#include <linux/gpio_keys.h>
23
24static const u8 supported_revisions[] = { 0xA2 /* BD71837 */ };
25
26static struct gpio_keys_button button = {
27 .code = KEY_POWER,
28 .gpio = -1,
29 .type = EV_KEY,
30};
31
32static struct gpio_keys_platform_data bd718xx_powerkey_data = {
33 .buttons = &button,
34 .nbuttons = 1,
35 .name = "bd718xx-pwrkey",
36};
37
38static struct mfd_cell bd71837_mfd_cells[] = {
39 {
40 .name = "gpio-keys",
41 .platform_data = &bd718xx_powerkey_data,
42 .pdata_size = sizeof(bd718xx_powerkey_data),
43 },
44 { .name = "bd71837-clk", },
45 { .name = "bd71837-pmic", },
46};
47
48static const struct regmap_irq bd71837_irqs[] = {
49 REGMAP_IRQ_REG(BD71837_INT_SWRST, 0, BD71837_INT_SWRST_MASK),
50 REGMAP_IRQ_REG(BD71837_INT_PWRBTN_S, 0, BD71837_INT_PWRBTN_S_MASK),
51 REGMAP_IRQ_REG(BD71837_INT_PWRBTN_L, 0, BD71837_INT_PWRBTN_L_MASK),
52 REGMAP_IRQ_REG(BD71837_INT_PWRBTN, 0, BD71837_INT_PWRBTN_MASK),
53 REGMAP_IRQ_REG(BD71837_INT_WDOG, 0, BD71837_INT_WDOG_MASK),
54 REGMAP_IRQ_REG(BD71837_INT_ON_REQ, 0, BD71837_INT_ON_REQ_MASK),
55 REGMAP_IRQ_REG(BD71837_INT_STBY_REQ, 0, BD71837_INT_STBY_REQ_MASK),
56};
57
58static struct regmap_irq_chip bd71837_irq_chip = {
59 .name = "bd71837-irq",
60 .irqs = bd71837_irqs,
61 .num_irqs = ARRAY_SIZE(bd71837_irqs),
62 .num_regs = 1,
63 .irq_reg_stride = 1,
64 .status_base = BD71837_REG_IRQ,
65 .mask_base = BD71837_REG_MIRQ,
66 .ack_base = BD71837_REG_IRQ,
67 .init_ack_masked = true,
68 .mask_invert = false,
69};
70
71static const struct regmap_range pmic_status_range = {
72 .range_min = BD71837_REG_IRQ,
73 .range_max = BD71837_REG_POW_STATE,
74};
75
76static const struct regmap_access_table volatile_regs = {
77 .yes_ranges = &pmic_status_range,
78 .n_yes_ranges = 1,
79};
80
81static const struct regmap_config bd71837_regmap_config = {
82 .reg_bits = 8,
83 .val_bits = 8,
84 .volatile_table = &volatile_regs,
85 .max_register = BD71837_MAX_REGISTER - 1,
86 .cache_type = REGCACHE_RBTREE,
87};
88
89static int bd71837_i2c_probe(struct i2c_client *i2c,
90 const struct i2c_device_id *id)
91{
92 struct bd71837 *bd71837;
93 int ret, i;
94 unsigned int val;
95
96 bd71837 = devm_kzalloc(&i2c->dev, sizeof(struct bd71837), GFP_KERNEL);
97
98 if (!bd71837)
99 return -ENOMEM;
100
101 bd71837->chip_irq = i2c->irq;
102
103 if (!bd71837->chip_irq) {
104 dev_err(&i2c->dev, "No IRQ configured\n");
105 return -EINVAL;
106 }
107
108 bd71837->dev = &i2c->dev;
109 dev_set_drvdata(&i2c->dev, bd71837);
110
111 bd71837->regmap = devm_regmap_init_i2c(i2c, &bd71837_regmap_config);
112 if (IS_ERR(bd71837->regmap)) {
113 dev_err(&i2c->dev, "regmap initialization failed\n");
114 return PTR_ERR(bd71837->regmap);
115 }
116
117 ret = regmap_read(bd71837->regmap, BD71837_REG_REV, &val);
118 if (ret) {
119 dev_err(&i2c->dev, "Read BD71837_REG_DEVICE failed\n");
120 return ret;
121 }
122 for (i = 0; i < ARRAY_SIZE(supported_revisions); i++)
123 if (supported_revisions[i] == val)
124 break;
125
126 if (i == ARRAY_SIZE(supported_revisions)) {
127 dev_err(&i2c->dev, "Unsupported chip revision\n");
128 return -ENODEV;
129 }
130
131 ret = devm_regmap_add_irq_chip(&i2c->dev, bd71837->regmap,
132 bd71837->chip_irq, IRQF_ONESHOT, 0,
133 &bd71837_irq_chip, &bd71837->irq_data);
134 if (ret) {
135 dev_err(&i2c->dev, "Failed to add irq_chip\n");
136 return ret;
137 }
138
139 /* Configure short press to 10 milliseconds */
140 ret = regmap_update_bits(bd71837->regmap,
141 BD71837_REG_PWRONCONFIG0,
142 BD718XX_PWRBTN_PRESS_DURATION_MASK,
143 BD718XX_PWRBTN_SHORT_PRESS_10MS);
144 if (ret) {
145 dev_err(&i2c->dev,
146 "Failed to configure button short press timeout\n");
147 return ret;
148 }
149
150 /* Configure long press to 10 seconds */
151 ret = regmap_update_bits(bd71837->regmap,
152 BD71837_REG_PWRONCONFIG1,
153 BD718XX_PWRBTN_PRESS_DURATION_MASK,
154 BD718XX_PWRBTN_LONG_PRESS_10S);
155
156 if (ret) {
157 dev_err(&i2c->dev,
158 "Failed to configure button long press timeout\n");
159 return ret;
160 }
161
162 ret = regmap_irq_get_virq(bd71837->irq_data, BD71837_INT_PWRBTN_S);
163
164 if (ret < 0) {
165 dev_err(&i2c->dev, "Failed to get the IRQ\n");
166 return ret;
167 }
168
169 button.irq = ret;
170
171 ret = devm_mfd_add_devices(bd71837->dev, PLATFORM_DEVID_AUTO,
172 bd71837_mfd_cells,
173 ARRAY_SIZE(bd71837_mfd_cells), NULL, 0,
174 regmap_irq_get_domain(bd71837->irq_data));
175 if (ret)
176 dev_err(&i2c->dev, "Failed to create subdevices\n");
177
178 return ret;
179}
180
181static const struct of_device_id bd71837_of_match[] = {
182 { .compatible = "rohm,bd71837", },
183 { }
184};
185MODULE_DEVICE_TABLE(of, bd71837_of_match);
186
187static struct i2c_driver bd71837_i2c_driver = {
188 .driver = {
189 .name = "rohm-bd718x7",
190 .of_match_table = bd71837_of_match,
191 },
192 .probe = bd71837_i2c_probe,
193};
194
195static int __init bd71837_i2c_init(void)
196{
197 return i2c_add_driver(&bd71837_i2c_driver);
198}
199
200/* Initialise early so consumer devices can complete system boot */
201subsys_initcall(bd71837_i2c_init);
202
203static void __exit bd71837_i2c_exit(void)
204{
205 i2c_del_driver(&bd71837_i2c_driver);
206}
207module_exit(bd71837_i2c_exit);
208
209MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
210MODULE_DESCRIPTION("ROHM BD71837 Power Management IC driver");
211MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index ca6b80d08ffc..9613b4257302 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -146,6 +146,7 @@ static const struct of_device_id sec_dt_match[] = {
146 /* Sentinel */ 146 /* Sentinel */
147 }, 147 },
148}; 148};
149MODULE_DEVICE_TABLE(of, sec_dt_match);
149#endif 150#endif
150 151
151static bool s2mpa01_volatile(struct device *dev, unsigned int reg) 152static bool s2mpa01_volatile(struct device *dev, unsigned int reg)
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
index 2a87b0d2f21f..a530972c5a7e 100644
--- a/drivers/mfd/sm501.c
+++ b/drivers/mfd/sm501.c
@@ -715,6 +715,7 @@ sm501_create_subdev(struct sm501_devdata *sm, char *name,
715 smdev->pdev.name = name; 715 smdev->pdev.name = name;
716 smdev->pdev.id = sm->pdev_id; 716 smdev->pdev.id = sm->pdev_id;
717 smdev->pdev.dev.parent = sm->dev; 717 smdev->pdev.dev.parent = sm->dev;
718 smdev->pdev.dev.coherent_dma_mask = 0xffffffff;
718 719
719 if (res_count) { 720 if (res_count) {
720 smdev->pdev.resource = (struct resource *)(smdev+1); 721 smdev->pdev.resource = (struct resource *)(smdev+1);
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index 47012c0899cd..7a30546880a4 100644
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -209,14 +209,13 @@ static int ti_tscadc_probe(struct platform_device *pdev)
209 * The TSC_ADC_SS controller design assumes the OCP clock is 209 * The TSC_ADC_SS controller design assumes the OCP clock is
210 * at least 6x faster than the ADC clock. 210 * at least 6x faster than the ADC clock.
211 */ 211 */
212 clk = clk_get(&pdev->dev, "adc_tsc_fck"); 212 clk = devm_clk_get(&pdev->dev, "adc_tsc_fck");
213 if (IS_ERR(clk)) { 213 if (IS_ERR(clk)) {
214 dev_err(&pdev->dev, "failed to get TSC fck\n"); 214 dev_err(&pdev->dev, "failed to get TSC fck\n");
215 err = PTR_ERR(clk); 215 err = PTR_ERR(clk);
216 goto err_disable_clk; 216 goto err_disable_clk;
217 } 217 }
218 clock_rate = clk_get_rate(clk); 218 clock_rate = clk_get_rate(clk);
219 clk_put(clk);
220 tscadc->clk_div = clock_rate / ADC_CLK; 219 tscadc->clk_div = clock_rate / ADC_CLK;
221 220
222 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ 221 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c
index 5d5888ee2966..22bd6525e09c 100644
--- a/drivers/mfd/wm8994-core.c
+++ b/drivers/mfd/wm8994-core.c
@@ -302,6 +302,10 @@ static int wm8994_set_pdata_from_of(struct wm8994 *wm8994)
302 if (of_find_property(np, "wlf,ldoena-always-driven", NULL)) 302 if (of_find_property(np, "wlf,ldoena-always-driven", NULL))
303 pdata->lineout2fb = true; 303 pdata->lineout2fb = true;
304 304
305 pdata->spkmode_pu = of_property_read_bool(np, "wlf,spkmode-pu");
306
307 pdata->csnaddr_pd = of_property_read_bool(np, "wlf,csnaddr-pd");
308
305 pdata->ldo[0].enable = of_get_named_gpio(np, "wlf,ldo1ena", 0); 309 pdata->ldo[0].enable = of_get_named_gpio(np, "wlf,ldo1ena", 0);
306 if (pdata->ldo[0].enable < 0) 310 if (pdata->ldo[0].enable < 0)
307 pdata->ldo[0].enable = 0; 311 pdata->ldo[0].enable = 0;
@@ -513,14 +517,15 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
513 break; 517 break;
514 default: 518 default:
515 dev_err(wm8994->dev, "Unknown device type %d\n", wm8994->type); 519 dev_err(wm8994->dev, "Unknown device type %d\n", wm8994->type);
516 return -EINVAL; 520 ret = -EINVAL;
521 goto err_enable;
517 } 522 }
518 523
519 ret = regmap_reinit_cache(wm8994->regmap, regmap_config); 524 ret = regmap_reinit_cache(wm8994->regmap, regmap_config);
520 if (ret != 0) { 525 if (ret != 0) {
521 dev_err(wm8994->dev, "Failed to reinit register cache: %d\n", 526 dev_err(wm8994->dev, "Failed to reinit register cache: %d\n",
522 ret); 527 ret);
523 return ret; 528 goto err_enable;
524 } 529 }
525 530
526 /* Explicitly put the device into reset in case regulators 531 /* Explicitly put the device into reset in case regulators
@@ -531,7 +536,7 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
531 wm8994_reg_read(wm8994, WM8994_SOFTWARE_RESET)); 536 wm8994_reg_read(wm8994, WM8994_SOFTWARE_RESET));
532 if (ret != 0) { 537 if (ret != 0) {
533 dev_err(wm8994->dev, "Failed to reset device: %d\n", ret); 538 dev_err(wm8994->dev, "Failed to reset device: %d\n", ret);
534 return ret; 539 goto err_enable;
535 } 540 }
536 541
537 if (regmap_patch) { 542 if (regmap_patch) {
@@ -540,7 +545,7 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
540 if (ret != 0) { 545 if (ret != 0) {
541 dev_err(wm8994->dev, "Failed to register patch: %d\n", 546 dev_err(wm8994->dev, "Failed to register patch: %d\n",
542 ret); 547 ret);
543 goto err; 548 goto err_enable;
544 } 549 }
545 } 550 }
546 551
@@ -559,6 +564,8 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
559 564
560 if (pdata->spkmode_pu) 565 if (pdata->spkmode_pu)
561 pulls |= WM8994_SPKMODE_PU; 566 pulls |= WM8994_SPKMODE_PU;
567 if (pdata->csnaddr_pd)
568 pulls |= WM8994_CSNADDR_PD;
562 569
563 /* Disable unneeded pulls */ 570 /* Disable unneeded pulls */
564 wm8994_set_bits(wm8994, WM8994_PULL_CONTROL_2, 571 wm8994_set_bits(wm8994, WM8994_PULL_CONTROL_2,
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 8d4b7e999f02..e86752be1f19 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -361,6 +361,7 @@ source "drivers/pinctrl/vt8500/Kconfig"
361source "drivers/pinctrl/mediatek/Kconfig" 361source "drivers/pinctrl/mediatek/Kconfig"
362source "drivers/pinctrl/zte/Kconfig" 362source "drivers/pinctrl/zte/Kconfig"
363source "drivers/pinctrl/meson/Kconfig" 363source "drivers/pinctrl/meson/Kconfig"
364source "drivers/pinctrl/cirrus/Kconfig"
364 365
365config PINCTRL_XWAY 366config PINCTRL_XWAY
366 bool 367 bool
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index de40863e7297..46ef9bd52096 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -64,3 +64,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
64obj-$(CONFIG_ARCH_VT8500) += vt8500/ 64obj-$(CONFIG_ARCH_VT8500) += vt8500/
65obj-y += mediatek/ 65obj-y += mediatek/
66obj-$(CONFIG_PINCTRL_ZX) += zte/ 66obj-$(CONFIG_PINCTRL_ZX) += zte/
67obj-y += cirrus/
diff --git a/drivers/pinctrl/cirrus/Kconfig b/drivers/pinctrl/cirrus/Kconfig
new file mode 100644
index 000000000000..27013e5949bc
--- /dev/null
+++ b/drivers/pinctrl/cirrus/Kconfig
@@ -0,0 +1,14 @@
1# This is all selected by the Madera MFD driver Kconfig options
2config PINCTRL_MADERA
3 tristate
4 select PINMUX
5 select GENERIC_PINCONF
6
7config PINCTRL_CS47L35
8 bool
9
10config PINCTRL_CS47L85
11 bool
12
13config PINCTRL_CS47L90
14 bool
diff --git a/drivers/pinctrl/cirrus/Makefile b/drivers/pinctrl/cirrus/Makefile
new file mode 100644
index 000000000000..6e4938cde9e3
--- /dev/null
+++ b/drivers/pinctrl/cirrus/Makefile
@@ -0,0 +1,13 @@
1# Cirrus Logic pinctrl drivers
2pinctrl-madera-objs := pinctrl-madera-core.o
3ifeq ($(CONFIG_PINCTRL_CS47L35),y)
4pinctrl-madera-objs += pinctrl-cs47l35.o
5endif
6ifeq ($(CONFIG_PINCTRL_CS47L85),y)
7pinctrl-madera-objs += pinctrl-cs47l85.o
8endif
9ifeq ($(CONFIG_PINCTRL_CS47L90),y)
10pinctrl-madera-objs += pinctrl-cs47l90.o
11endif
12
13obj-$(CONFIG_PINCTRL_MADERA) += pinctrl-madera.o
diff --git a/drivers/pinctrl/cirrus/pinctrl-cs47l35.c b/drivers/pinctrl/cirrus/pinctrl-cs47l35.c
new file mode 100644
index 000000000000..06b59160783d
--- /dev/null
+++ b/drivers/pinctrl/cirrus/pinctrl-cs47l35.c
@@ -0,0 +1,45 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Pinctrl for Cirrus Logic CS47L35
4 *
5 * Copyright (C) 2016-2017 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/err.h>
13#include <linux/mfd/madera/core.h>
14
15#include "pinctrl-madera.h"
16
17/*
18 * The alt func groups are the most commonly used functions we place these at
19 * the lower function indexes for convenience, and the less commonly used gpio
20 * functions at higher indexes.
21 *
22 * To stay consistent with the datasheet the function names are the same as
23 * the group names for that function's pins
24 *
25 * Note - all 1 less than in datasheet because these are zero-indexed
26 */
27static const unsigned int cs47l35_aif3_pins[] = { 0, 1, 2, 3 };
28static const unsigned int cs47l35_spk_pins[] = { 4, 5 };
29static const unsigned int cs47l35_aif1_pins[] = { 7, 8, 9, 10 };
30static const unsigned int cs47l35_aif2_pins[] = { 11, 12, 13, 14 };
31static const unsigned int cs47l35_mif1_pins[] = { 6, 15 };
32
33static const struct madera_pin_groups cs47l35_pin_groups[] = {
34 { "aif1", cs47l35_aif1_pins, ARRAY_SIZE(cs47l35_aif1_pins) },
35 { "aif2", cs47l35_aif2_pins, ARRAY_SIZE(cs47l35_aif2_pins) },
36 { "aif3", cs47l35_aif3_pins, ARRAY_SIZE(cs47l35_aif3_pins) },
37 { "mif1", cs47l35_mif1_pins, ARRAY_SIZE(cs47l35_mif1_pins) },
38 { "pdmspk1", cs47l35_spk_pins, ARRAY_SIZE(cs47l35_spk_pins) },
39};
40
41const struct madera_pin_chip cs47l35_pin_chip = {
42 .n_pins = CS47L35_NUM_GPIOS,
43 .pin_groups = cs47l35_pin_groups,
44 .n_pin_groups = ARRAY_SIZE(cs47l35_pin_groups),
45};
diff --git a/drivers/pinctrl/cirrus/pinctrl-cs47l85.c b/drivers/pinctrl/cirrus/pinctrl-cs47l85.c
new file mode 100644
index 000000000000..0a322e2a0fde
--- /dev/null
+++ b/drivers/pinctrl/cirrus/pinctrl-cs47l85.c
@@ -0,0 +1,59 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Pinctrl for Cirrus Logic CS47L85
4 *
5 * Copyright (C) 2016-2017 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/err.h>
13#include <linux/mfd/madera/core.h>
14
15#include "pinctrl-madera.h"
16
17/*
18 * The alt func groups are the most commonly used functions we place these at
19 * the lower function indexes for convenience, and the less commonly used gpio
20 * functions at higher indexes.
21 *
22 * To stay consistent with the datasheet the function names are the same as
23 * the group names for that function's pins
24 *
25 * Note - all 1 less than in datasheet because these are zero-indexed
26 */
27static const unsigned int cs47l85_mif1_pins[] = { 8, 9 };
28static const unsigned int cs47l85_mif2_pins[] = { 10, 11 };
29static const unsigned int cs47l85_mif3_pins[] = { 12, 13 };
30static const unsigned int cs47l85_aif1_pins[] = { 14, 15, 16, 17 };
31static const unsigned int cs47l85_aif2_pins[] = { 18, 19, 20, 21 };
32static const unsigned int cs47l85_aif3_pins[] = { 22, 23, 24, 25 };
33static const unsigned int cs47l85_aif4_pins[] = { 26, 27, 28, 29 };
34static const unsigned int cs47l85_dmic4_pins[] = { 30, 31 };
35static const unsigned int cs47l85_dmic5_pins[] = { 32, 33 };
36static const unsigned int cs47l85_dmic6_pins[] = { 34, 35 };
37static const unsigned int cs47l85_spk1_pins[] = { 36, 38 };
38static const unsigned int cs47l85_spk2_pins[] = { 37, 39 };
39
40static const struct madera_pin_groups cs47l85_pin_groups[] = {
41 { "aif1", cs47l85_aif1_pins, ARRAY_SIZE(cs47l85_aif1_pins) },
42 { "aif2", cs47l85_aif2_pins, ARRAY_SIZE(cs47l85_aif2_pins) },
43 { "aif3", cs47l85_aif3_pins, ARRAY_SIZE(cs47l85_aif3_pins) },
44 { "aif4", cs47l85_aif4_pins, ARRAY_SIZE(cs47l85_aif4_pins) },
45 { "mif1", cs47l85_mif1_pins, ARRAY_SIZE(cs47l85_mif1_pins) },
46 { "mif2", cs47l85_mif2_pins, ARRAY_SIZE(cs47l85_mif2_pins) },
47 { "mif3", cs47l85_mif3_pins, ARRAY_SIZE(cs47l85_mif3_pins) },
48 { "dmic4", cs47l85_dmic4_pins, ARRAY_SIZE(cs47l85_dmic4_pins) },
49 { "dmic5", cs47l85_dmic5_pins, ARRAY_SIZE(cs47l85_dmic5_pins) },
50 { "dmic6", cs47l85_dmic6_pins, ARRAY_SIZE(cs47l85_dmic6_pins) },
51 { "pdmspk1", cs47l85_spk1_pins, ARRAY_SIZE(cs47l85_spk1_pins) },
52 { "pdmspk2", cs47l85_spk2_pins, ARRAY_SIZE(cs47l85_spk2_pins) },
53};
54
55const struct madera_pin_chip cs47l85_pin_chip = {
56 .n_pins = CS47L85_NUM_GPIOS,
57 .pin_groups = cs47l85_pin_groups,
58 .n_pin_groups = ARRAY_SIZE(cs47l85_pin_groups),
59};
diff --git a/drivers/pinctrl/cirrus/pinctrl-cs47l90.c b/drivers/pinctrl/cirrus/pinctrl-cs47l90.c
new file mode 100644
index 000000000000..fc38f579f492
--- /dev/null
+++ b/drivers/pinctrl/cirrus/pinctrl-cs47l90.c
@@ -0,0 +1,57 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Pinctrl for Cirrus Logic CS47L90
4 *
5 * Copyright (C) 2016-2017 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/err.h>
13#include <linux/mfd/madera/core.h>
14
15#include "pinctrl-madera.h"
16
17/*
18 * The alt func groups are the most commonly used functions we place these at
19 * the lower function indexes for convenience, and the less commonly used gpio
20 * functions at higher indexes.
21 *
22 * To stay consistent with the datasheet the function names are the same as
23 * the group names for that function's pins
24 *
25 * Note - all 1 less than in datasheet because these are zero-indexed
26 */
27static const unsigned int cs47l90_mif1_pins[] = { 8, 9 };
28static const unsigned int cs47l90_mif2_pins[] = { 10, 11 };
29static const unsigned int cs47l90_mif3_pins[] = { 12, 13 };
30static const unsigned int cs47l90_aif1_pins[] = { 14, 15, 16, 17 };
31static const unsigned int cs47l90_aif2_pins[] = { 18, 19, 20, 21 };
32static const unsigned int cs47l90_aif3_pins[] = { 22, 23, 24, 25 };
33static const unsigned int cs47l90_aif4_pins[] = { 26, 27, 28, 29 };
34static const unsigned int cs47l90_dmic4_pins[] = { 30, 31 };
35static const unsigned int cs47l90_dmic5_pins[] = { 32, 33 };
36static const unsigned int cs47l90_dmic3_pins[] = { 34, 35 };
37static const unsigned int cs47l90_spk1_pins[] = { 36, 37 };
38
39static const struct madera_pin_groups cs47l90_pin_groups[] = {
40 { "aif1", cs47l90_aif1_pins, ARRAY_SIZE(cs47l90_aif1_pins) },
41 { "aif2", cs47l90_aif2_pins, ARRAY_SIZE(cs47l90_aif2_pins) },
42 { "aif3", cs47l90_aif3_pins, ARRAY_SIZE(cs47l90_aif3_pins) },
43 { "aif4", cs47l90_aif4_pins, ARRAY_SIZE(cs47l90_aif4_pins) },
44 { "mif1", cs47l90_mif1_pins, ARRAY_SIZE(cs47l90_mif1_pins) },
45 { "mif2", cs47l90_mif2_pins, ARRAY_SIZE(cs47l90_mif2_pins) },
46 { "mif3", cs47l90_mif3_pins, ARRAY_SIZE(cs47l90_mif3_pins) },
47 { "dmic3", cs47l90_dmic3_pins, ARRAY_SIZE(cs47l90_dmic3_pins) },
48 { "dmic4", cs47l90_dmic4_pins, ARRAY_SIZE(cs47l90_dmic4_pins) },
49 { "dmic5", cs47l90_dmic5_pins, ARRAY_SIZE(cs47l90_dmic5_pins) },
50 { "pdmspk1", cs47l90_spk1_pins, ARRAY_SIZE(cs47l90_spk1_pins) },
51};
52
53const struct madera_pin_chip cs47l90_pin_chip = {
54 .n_pins = CS47L90_NUM_GPIOS,
55 .pin_groups = cs47l90_pin_groups,
56 .n_pin_groups = ARRAY_SIZE(cs47l90_pin_groups),
57};
diff --git a/drivers/pinctrl/cirrus/pinctrl-madera-core.c b/drivers/pinctrl/cirrus/pinctrl-madera-core.c
new file mode 100644
index 000000000000..ece41fb2848f
--- /dev/null
+++ b/drivers/pinctrl/cirrus/pinctrl-madera-core.c
@@ -0,0 +1,1076 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Pinctrl for Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2016-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/err.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/regmap.h>
16#include <linux/slab.h>
17#include <linux/pinctrl/pinctrl.h>
18#include <linux/pinctrl/pinmux.h>
19#include <linux/pinctrl/pinconf.h>
20#include <linux/pinctrl/pinconf-generic.h>
21
22#include <linux/mfd/madera/core.h>
23#include <linux/mfd/madera/registers.h>
24
25#include "../pinctrl-utils.h"
26
27#include "pinctrl-madera.h"
28
29/*
30 * Use pin GPIO names for consistency
31 * NOTE: IDs are zero-indexed for coding convenience
32 */
33static const struct pinctrl_pin_desc madera_pins[] = {
34 PINCTRL_PIN(0, "gpio1"),
35 PINCTRL_PIN(1, "gpio2"),
36 PINCTRL_PIN(2, "gpio3"),
37 PINCTRL_PIN(3, "gpio4"),
38 PINCTRL_PIN(4, "gpio5"),
39 PINCTRL_PIN(5, "gpio6"),
40 PINCTRL_PIN(6, "gpio7"),
41 PINCTRL_PIN(7, "gpio8"),
42 PINCTRL_PIN(8, "gpio9"),
43 PINCTRL_PIN(9, "gpio10"),
44 PINCTRL_PIN(10, "gpio11"),
45 PINCTRL_PIN(11, "gpio12"),
46 PINCTRL_PIN(12, "gpio13"),
47 PINCTRL_PIN(13, "gpio14"),
48 PINCTRL_PIN(14, "gpio15"),
49 PINCTRL_PIN(15, "gpio16"),
50 PINCTRL_PIN(16, "gpio17"),
51 PINCTRL_PIN(17, "gpio18"),
52 PINCTRL_PIN(18, "gpio19"),
53 PINCTRL_PIN(19, "gpio20"),
54 PINCTRL_PIN(20, "gpio21"),
55 PINCTRL_PIN(21, "gpio22"),
56 PINCTRL_PIN(22, "gpio23"),
57 PINCTRL_PIN(23, "gpio24"),
58 PINCTRL_PIN(24, "gpio25"),
59 PINCTRL_PIN(25, "gpio26"),
60 PINCTRL_PIN(26, "gpio27"),
61 PINCTRL_PIN(27, "gpio28"),
62 PINCTRL_PIN(28, "gpio29"),
63 PINCTRL_PIN(29, "gpio30"),
64 PINCTRL_PIN(30, "gpio31"),
65 PINCTRL_PIN(31, "gpio32"),
66 PINCTRL_PIN(32, "gpio33"),
67 PINCTRL_PIN(33, "gpio34"),
68 PINCTRL_PIN(34, "gpio35"),
69 PINCTRL_PIN(35, "gpio36"),
70 PINCTRL_PIN(36, "gpio37"),
71 PINCTRL_PIN(37, "gpio38"),
72 PINCTRL_PIN(38, "gpio39"),
73 PINCTRL_PIN(39, "gpio40"),
74};
75
76/*
77 * All single-pin functions can be mapped to any GPIO, however pinmux applies
78 * functions to pin groups and only those groups declared as supporting that
79 * function. To make this work we must put each pin in its own dummy group so
80 * that the functions can be described as applying to all pins.
81 * Since these do not correspond to anything in the actual hardware - they are
82 * merely an adaptation to pinctrl's view of the world - we use the same name
83 * as the pin to avoid confusion when comparing with datasheet instructions
84 */
85static const char * const madera_pin_single_group_names[] = {
86 "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
87 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
88 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
89 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
90 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
91 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40",
92};
93
94/* set of pin numbers for single-pin groups, zero-indexed */
95static const unsigned int madera_pin_single_group_pins[] = {
96 0, 1, 2, 3, 4, 5, 6,
97 7, 8, 9, 10, 11, 12, 13,
98 14, 15, 16, 17, 18, 19, 20,
99 21, 22, 23, 24, 25, 26, 27,
100 28, 29, 30, 31, 32, 33, 34,
101 35, 36, 37, 38, 39,
102};
103
104static const char * const madera_aif1_group_names[] = { "aif1" };
105static const char * const madera_aif2_group_names[] = { "aif2" };
106static const char * const madera_aif3_group_names[] = { "aif3" };
107static const char * const madera_aif4_group_names[] = { "aif4" };
108static const char * const madera_mif1_group_names[] = { "mif1" };
109static const char * const madera_mif2_group_names[] = { "mif2" };
110static const char * const madera_mif3_group_names[] = { "mif3" };
111static const char * const madera_dmic3_group_names[] = { "dmic3" };
112static const char * const madera_dmic4_group_names[] = { "dmic4" };
113static const char * const madera_dmic5_group_names[] = { "dmic5" };
114static const char * const madera_dmic6_group_names[] = { "dmic6" };
115static const char * const madera_spk1_group_names[] = { "pdmspk1" };
116static const char * const madera_spk2_group_names[] = { "pdmspk2" };
117
118/*
119 * alt-functions always apply to a single pin group, other functions always
120 * apply to all pins
121 */
122static const struct {
123 const char *name;
124 const char * const *group_names;
125 u32 func;
126} madera_mux_funcs[] = {
127 {
128 .name = "aif1",
129 .group_names = madera_aif1_group_names,
130 .func = 0x000
131 },
132 {
133 .name = "aif2",
134 .group_names = madera_aif2_group_names,
135 .func = 0x000
136 },
137 {
138 .name = "aif3",
139 .group_names = madera_aif3_group_names,
140 .func = 0x000
141 },
142 {
143 .name = "aif4",
144 .group_names = madera_aif4_group_names,
145 .func = 0x000
146 },
147 {
148 .name = "mif1",
149 .group_names = madera_mif1_group_names,
150 .func = 0x000
151 },
152 {
153 .name = "mif2",
154 .group_names = madera_mif2_group_names,
155 .func = 0x000
156 },
157 {
158 .name = "mif3",
159 .group_names = madera_mif3_group_names,
160 .func = 0x000
161 },
162 {
163 .name = "dmic3",
164 .group_names = madera_dmic3_group_names,
165 .func = 0x000
166 },
167 {
168 .name = "dmic4",
169 .group_names = madera_dmic4_group_names,
170 .func = 0x000
171 },
172 {
173 .name = "dmic5",
174 .group_names = madera_dmic5_group_names,
175 .func = 0x000
176 },
177 {
178 .name = "dmic6",
179 .group_names = madera_dmic6_group_names,
180 .func = 0x000
181 },
182 {
183 .name = "pdmspk1",
184 .group_names = madera_spk1_group_names,
185 .func = 0x000
186 },
187 {
188 .name = "pdmspk2",
189 .group_names = madera_spk2_group_names,
190 .func = 0x000
191 },
192 {
193 .name = "io",
194 .group_names = madera_pin_single_group_names,
195 .func = 0x001
196 },
197 {
198 .name = "dsp-gpio",
199 .group_names = madera_pin_single_group_names,
200 .func = 0x002
201 },
202 {
203 .name = "irq1",
204 .group_names = madera_pin_single_group_names,
205 .func = 0x003
206 },
207 {
208 .name = "irq2",
209 .group_names = madera_pin_single_group_names,
210 .func = 0x004
211 },
212 {
213 .name = "fll1-clk",
214 .group_names = madera_pin_single_group_names,
215 .func = 0x010
216 },
217 {
218 .name = "fll2-clk",
219 .group_names = madera_pin_single_group_names,
220 .func = 0x011
221 },
222 {
223 .name = "fll3-clk",
224 .group_names = madera_pin_single_group_names,
225 .func = 0x012
226 },
227 {
228 .name = "fllao-clk",
229 .group_names = madera_pin_single_group_names,
230 .func = 0x013
231 },
232 {
233 .name = "fll1-lock",
234 .group_names = madera_pin_single_group_names,
235 .func = 0x018
236 },
237 {
238 .name = "fll2-lock",
239 .group_names = madera_pin_single_group_names,
240 .func = 0x019
241 },
242 {
243 .name = "fll3-lock",
244 .group_names = madera_pin_single_group_names,
245 .func = 0x01a
246 },
247 {
248 .name = "fllao-lock",
249 .group_names = madera_pin_single_group_names,
250 .func = 0x01b
251 },
252 {
253 .name = "opclk",
254 .group_names = madera_pin_single_group_names,
255 .func = 0x040
256 },
257 {
258 .name = "opclk-async",
259 .group_names = madera_pin_single_group_names,
260 .func = 0x041
261 },
262 {
263 .name = "pwm1",
264 .group_names = madera_pin_single_group_names,
265 .func = 0x048
266 },
267 {
268 .name = "pwm2",
269 .group_names = madera_pin_single_group_names,
270 .func = 0x049
271 },
272 {
273 .name = "spdif",
274 .group_names = madera_pin_single_group_names,
275 .func = 0x04c
276 },
277 {
278 .name = "asrc1-in1-lock",
279 .group_names = madera_pin_single_group_names,
280 .func = 0x088
281 },
282 {
283 .name = "asrc1-in2-lock",
284 .group_names = madera_pin_single_group_names,
285 .func = 0x089
286 },
287 {
288 .name = "asrc2-in1-lock",
289 .group_names = madera_pin_single_group_names,
290 .func = 0x08a
291 },
292 {
293 .name = "asrc2-in2-lock",
294 .group_names = madera_pin_single_group_names,
295 .func = 0x08b
296 },
297 {
298 .name = "spkl-short-circuit",
299 .group_names = madera_pin_single_group_names,
300 .func = 0x0b6
301 },
302 {
303 .name = "spkr-short-circuit",
304 .group_names = madera_pin_single_group_names,
305 .func = 0x0b7
306 },
307 {
308 .name = "spk-shutdown",
309 .group_names = madera_pin_single_group_names,
310 .func = 0x0e0
311 },
312 {
313 .name = "spk-overheat-shutdown",
314 .group_names = madera_pin_single_group_names,
315 .func = 0x0e1
316 },
317 {
318 .name = "spk-overheat-warn",
319 .group_names = madera_pin_single_group_names,
320 .func = 0x0e2
321 },
322 {
323 .name = "timer1-sts",
324 .group_names = madera_pin_single_group_names,
325 .func = 0x140
326 },
327 {
328 .name = "timer2-sts",
329 .group_names = madera_pin_single_group_names,
330 .func = 0x141
331 },
332 {
333 .name = "timer3-sts",
334 .group_names = madera_pin_single_group_names,
335 .func = 0x142
336 },
337 {
338 .name = "timer4-sts",
339 .group_names = madera_pin_single_group_names,
340 .func = 0x143
341 },
342 {
343 .name = "timer5-sts",
344 .group_names = madera_pin_single_group_names,
345 .func = 0x144
346 },
347 {
348 .name = "timer6-sts",
349 .group_names = madera_pin_single_group_names,
350 .func = 0x145
351 },
352 {
353 .name = "timer7-sts",
354 .group_names = madera_pin_single_group_names,
355 .func = 0x146
356 },
357 {
358 .name = "timer8-sts",
359 .group_names = madera_pin_single_group_names,
360 .func = 0x147
361 },
362 {
363 .name = "log1-fifo-ne",
364 .group_names = madera_pin_single_group_names,
365 .func = 0x150
366 },
367 {
368 .name = "log2-fifo-ne",
369 .group_names = madera_pin_single_group_names,
370 .func = 0x151
371 },
372 {
373 .name = "log3-fifo-ne",
374 .group_names = madera_pin_single_group_names,
375 .func = 0x152
376 },
377 {
378 .name = "log4-fifo-ne",
379 .group_names = madera_pin_single_group_names,
380 .func = 0x153
381 },
382 {
383 .name = "log5-fifo-ne",
384 .group_names = madera_pin_single_group_names,
385 .func = 0x154
386 },
387 {
388 .name = "log6-fifo-ne",
389 .group_names = madera_pin_single_group_names,
390 .func = 0x155
391 },
392 {
393 .name = "log7-fifo-ne",
394 .group_names = madera_pin_single_group_names,
395 .func = 0x156
396 },
397 {
398 .name = "log8-fifo-ne",
399 .group_names = madera_pin_single_group_names,
400 .func = 0x157
401 },
402};
403
404static u16 madera_pin_make_drv_str(struct madera_pin_private *priv,
405 unsigned int milliamps)
406{
407 switch (milliamps) {
408 case 4:
409 return 0;
410 case 8:
411 return 2 << MADERA_GP1_DRV_STR_SHIFT;
412 default:
413 break;
414 }
415
416 dev_warn(priv->dev, "%u mA not a valid drive strength", milliamps);
417
418 return 0;
419}
420
421static unsigned int madera_pin_unmake_drv_str(struct madera_pin_private *priv,
422 u16 regval)
423{
424 regval = (regval & MADERA_GP1_DRV_STR_MASK) >> MADERA_GP1_DRV_STR_SHIFT;
425
426 switch (regval) {
427 case 0:
428 return 4;
429 case 2:
430 return 8;
431 default:
432 return 0;
433 }
434}
435
436static int madera_get_groups_count(struct pinctrl_dev *pctldev)
437{
438 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
439
440 /* Number of alt function groups plus number of single-pin groups */
441 return priv->chip->n_pin_groups + priv->chip->n_pins;
442}
443
444static const char *madera_get_group_name(struct pinctrl_dev *pctldev,
445 unsigned int selector)
446{
447 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
448
449 if (selector < priv->chip->n_pin_groups)
450 return priv->chip->pin_groups[selector].name;
451
452 selector -= priv->chip->n_pin_groups;
453 return madera_pin_single_group_names[selector];
454}
455
456static int madera_get_group_pins(struct pinctrl_dev *pctldev,
457 unsigned int selector,
458 const unsigned int **pins,
459 unsigned int *num_pins)
460{
461 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
462
463 if (selector < priv->chip->n_pin_groups) {
464 *pins = priv->chip->pin_groups[selector].pins;
465 *num_pins = priv->chip->pin_groups[selector].n_pins;
466 } else {
467 /* return the dummy group for a single pin */
468 selector -= priv->chip->n_pin_groups;
469 *pins = &madera_pin_single_group_pins[selector];
470 *num_pins = 1;
471 }
472 return 0;
473}
474
475static void madera_pin_dbg_show_fn(struct madera_pin_private *priv,
476 struct seq_file *s,
477 unsigned int pin, unsigned int fn)
478{
479 const struct madera_pin_chip *chip = priv->chip;
480 int i, g_pin;
481
482 if (fn != 0) {
483 for (i = 0; i < ARRAY_SIZE(madera_mux_funcs); ++i) {
484 if (madera_mux_funcs[i].func == fn) {
485 seq_printf(s, " FN=%s",
486 madera_mux_funcs[i].name);
487 return;
488 }
489 }
490 return; /* ignore unknown function values */
491 }
492
493 /* alt function */
494 for (i = 0; i < chip->n_pin_groups; ++i) {
495 for (g_pin = 0; g_pin < chip->pin_groups[i].n_pins; ++g_pin) {
496 if (chip->pin_groups[i].pins[g_pin] == pin) {
497 seq_printf(s, " FN=%s",
498 chip->pin_groups[i].name);
499 return;
500 }
501 }
502 }
503}
504
505static void __maybe_unused madera_pin_dbg_show(struct pinctrl_dev *pctldev,
506 struct seq_file *s,
507 unsigned int pin)
508{
509 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
510 unsigned int conf[2];
511 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin);
512 unsigned int fn;
513 int ret;
514
515 ret = regmap_read(priv->madera->regmap, reg, &conf[0]);
516 if (ret)
517 return;
518
519 ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]);
520 if (ret)
521 return;
522
523 seq_printf(s, "%04x:%04x", conf[0], conf[1]);
524
525 fn = (conf[0] & MADERA_GP1_FN_MASK) >> MADERA_GP1_FN_SHIFT;
526 madera_pin_dbg_show_fn(priv, s, pin, fn);
527
528 /* State of direction bit is only relevant if function==1 */
529 if (fn == 1) {
530 if (conf[1] & MADERA_GP1_DIR_MASK)
531 seq_puts(s, " IN");
532 else
533 seq_puts(s, " OUT");
534 }
535
536 if (conf[1] & MADERA_GP1_PU_MASK)
537 seq_puts(s, " PU");
538
539 if (conf[1] & MADERA_GP1_PD_MASK)
540 seq_puts(s, " PD");
541
542 if (conf[0] & MADERA_GP1_DB_MASK)
543 seq_puts(s, " DB");
544
545 if (conf[0] & MADERA_GP1_OP_CFG_MASK)
546 seq_puts(s, " OD");
547 else
548 seq_puts(s, " CMOS");
549
550 seq_printf(s, " DRV=%umA", madera_pin_unmake_drv_str(priv, conf[1]));
551
552 if (conf[0] & MADERA_GP1_IP_CFG_MASK)
553 seq_puts(s, "SCHMITT");
554}
555
556
557static const struct pinctrl_ops madera_pin_group_ops = {
558 .get_groups_count = madera_get_groups_count,
559 .get_group_name = madera_get_group_name,
560 .get_group_pins = madera_get_group_pins,
561#if IS_ENABLED(CONFIG_OF)
562 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
563 .dt_free_map = pinctrl_utils_free_map,
564#endif
565#if IS_ENABLED(CONFIG_DEBUG_FS)
566 .pin_dbg_show = madera_pin_dbg_show,
567#endif
568};
569
570static int madera_mux_get_funcs_count(struct pinctrl_dev *pctldev)
571{
572 return ARRAY_SIZE(madera_mux_funcs);
573}
574
575static const char *madera_mux_get_func_name(struct pinctrl_dev *pctldev,
576 unsigned int selector)
577{
578 return madera_mux_funcs[selector].name;
579}
580
581static int madera_mux_get_groups(struct pinctrl_dev *pctldev,
582 unsigned int selector,
583 const char * const **groups,
584 unsigned int * const num_groups)
585{
586 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
587
588 *groups = madera_mux_funcs[selector].group_names;
589
590 if (madera_mux_funcs[selector].func == 0) {
591 /* alt func always maps to a single group */
592 *num_groups = 1;
593 } else {
594 /* other funcs map to all available gpio pins */
595 *num_groups = priv->chip->n_pins;
596 }
597
598 return 0;
599}
600
601static int madera_mux_set_mux(struct pinctrl_dev *pctldev,
602 unsigned int selector,
603 unsigned int group)
604{
605 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
606 struct madera *madera = priv->madera;
607 const struct madera_pin_groups *pin_group = priv->chip->pin_groups;
608 unsigned int n_chip_groups = priv->chip->n_pin_groups;
609 const char *func_name = madera_mux_funcs[selector].name;
610 unsigned int reg;
611 int i, ret;
612
613 dev_dbg(priv->dev, "%s selecting %u (%s) for group %u (%s)\n",
614 __func__, selector, func_name, group,
615 madera_get_group_name(pctldev, group));
616
617 if (madera_mux_funcs[selector].func == 0) {
618 /* alt func pin assignments are codec-specific */
619 for (i = 0; i < n_chip_groups; ++i) {
620 if (strcmp(func_name, pin_group->name) == 0)
621 break;
622
623 ++pin_group;
624 }
625
626 if (i == n_chip_groups)
627 return -EINVAL;
628
629 for (i = 0; i < pin_group->n_pins; ++i) {
630 reg = MADERA_GPIO1_CTRL_1 + (2 * pin_group->pins[i]);
631
632 dev_dbg(priv->dev, "%s setting 0x%x func bits to 0\n",
633 __func__, reg);
634
635 ret = regmap_update_bits(madera->regmap, reg,
636 MADERA_GP1_FN_MASK, 0);
637 if (ret)
638 break;
639
640 }
641 } else {
642 /*
643 * for other funcs the group will be the gpio number and will
644 * be offset by the number of chip-specific functions at the
645 * start of the group list
646 */
647 group -= n_chip_groups;
648 reg = MADERA_GPIO1_CTRL_1 + (2 * group);
649
650 dev_dbg(priv->dev, "%s setting 0x%x func bits to 0x%x\n",
651 __func__, reg, madera_mux_funcs[selector].func);
652
653 ret = regmap_update_bits(madera->regmap,
654 reg,
655 MADERA_GP1_FN_MASK,
656 madera_mux_funcs[selector].func);
657 }
658
659 if (ret)
660 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret);
661
662 return ret;
663}
664
665static int madera_gpio_set_direction(struct pinctrl_dev *pctldev,
666 struct pinctrl_gpio_range *range,
667 unsigned int offset,
668 bool input)
669{
670 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
671 struct madera *madera = priv->madera;
672 unsigned int reg = MADERA_GPIO1_CTRL_2 + (2 * offset);
673 unsigned int val;
674 int ret;
675
676 if (input)
677 val = MADERA_GP1_DIR;
678 else
679 val = 0;
680
681 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_DIR_MASK, val);
682 if (ret)
683 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret);
684
685 return ret;
686}
687
688static int madera_gpio_request_enable(struct pinctrl_dev *pctldev,
689 struct pinctrl_gpio_range *range,
690 unsigned int offset)
691{
692 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
693 struct madera *madera = priv->madera;
694 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset);
695 int ret;
696
697 /* put the pin into GPIO mode */
698 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1);
699 if (ret)
700 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret);
701
702 return ret;
703}
704
705static void madera_gpio_disable_free(struct pinctrl_dev *pctldev,
706 struct pinctrl_gpio_range *range,
707 unsigned int offset)
708{
709 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
710 struct madera *madera = priv->madera;
711 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset);
712 int ret;
713
714 /* disable GPIO by setting to GPIO IN */
715 madera_gpio_set_direction(pctldev, range, offset, true);
716
717 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1);
718 if (ret)
719 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret);
720}
721
722static const struct pinmux_ops madera_pin_mux_ops = {
723 .get_functions_count = madera_mux_get_funcs_count,
724 .get_function_name = madera_mux_get_func_name,
725 .get_function_groups = madera_mux_get_groups,
726 .set_mux = madera_mux_set_mux,
727 .gpio_request_enable = madera_gpio_request_enable,
728 .gpio_disable_free = madera_gpio_disable_free,
729 .gpio_set_direction = madera_gpio_set_direction,
730 .strict = true, /* GPIO and other functions are exclusive */
731};
732
733static int madera_pin_conf_get(struct pinctrl_dev *pctldev, unsigned int pin,
734 unsigned long *config)
735{
736 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
737 unsigned int param = pinconf_to_config_param(*config);
738 unsigned int result = 0;
739 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin);
740 unsigned int conf[2];
741 int ret;
742
743 ret = regmap_read(priv->madera->regmap, reg, &conf[0]);
744 if (!ret)
745 ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]);
746
747 if (ret) {
748 dev_err(priv->dev, "Failed to read GP%d conf (%d)\n",
749 pin + 1, ret);
750 return ret;
751 }
752
753 switch (param) {
754 case PIN_CONFIG_BIAS_BUS_HOLD:
755 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
756 if (conf[1] == (MADERA_GP1_PU | MADERA_GP1_PD))
757 result = 1;
758 break;
759 case PIN_CONFIG_BIAS_DISABLE:
760 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
761 if (!conf[1])
762 result = 1;
763 break;
764 case PIN_CONFIG_BIAS_PULL_DOWN:
765 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
766 if (conf[1] == MADERA_GP1_PD_MASK)
767 result = 1;
768 break;
769 case PIN_CONFIG_BIAS_PULL_UP:
770 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
771 if (conf[1] == MADERA_GP1_PU_MASK)
772 result = 1;
773 break;
774 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
775 if (conf[0] & MADERA_GP1_OP_CFG_MASK)
776 result = 1;
777 break;
778 case PIN_CONFIG_DRIVE_PUSH_PULL:
779 if (!(conf[0] & MADERA_GP1_OP_CFG_MASK))
780 result = 1;
781 break;
782 case PIN_CONFIG_DRIVE_STRENGTH:
783 result = madera_pin_unmake_drv_str(priv, conf[1]);
784 break;
785 case PIN_CONFIG_INPUT_DEBOUNCE:
786 if (conf[0] & MADERA_GP1_DB_MASK)
787 result = 1;
788 break;
789 case PIN_CONFIG_INPUT_ENABLE:
790 if (conf[0] & MADERA_GP1_DIR_MASK)
791 result = 1;
792 break;
793 case PIN_CONFIG_INPUT_SCHMITT:
794 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
795 if (conf[0] & MADERA_GP1_IP_CFG_MASK)
796 result = 1;
797 break;
798 case PIN_CONFIG_OUTPUT:
799 if ((conf[1] & MADERA_GP1_DIR_MASK) &&
800 (conf[0] & MADERA_GP1_LVL_MASK))
801 result = 1;
802 break;
803 default:
804 break;
805 }
806
807 *config = pinconf_to_config_packed(param, result);
808
809 return 0;
810}
811
812static int madera_pin_conf_set(struct pinctrl_dev *pctldev, unsigned int pin,
813 unsigned long *configs, unsigned int num_configs)
814{
815 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
816 u16 conf[2] = {0, 0};
817 u16 mask[2] = {0, 0};
818 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin);
819 unsigned int val;
820 int ret;
821
822 while (num_configs) {
823 dev_dbg(priv->dev, "%s config 0x%lx\n", __func__, *configs);
824
825 switch (pinconf_to_config_param(*configs)) {
826 case PIN_CONFIG_BIAS_BUS_HOLD:
827 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
828 conf[1] |= MADERA_GP1_PU | MADERA_GP1_PD;
829 break;
830 case PIN_CONFIG_BIAS_DISABLE:
831 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
832 conf[1] &= ~(MADERA_GP1_PU | MADERA_GP1_PD);
833 break;
834 case PIN_CONFIG_BIAS_PULL_DOWN:
835 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
836 conf[1] |= MADERA_GP1_PD;
837 conf[1] &= ~MADERA_GP1_PU;
838 break;
839 case PIN_CONFIG_BIAS_PULL_UP:
840 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
841 conf[1] |= MADERA_GP1_PU;
842 conf[1] &= ~MADERA_GP1_PD;
843 break;
844 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
845 mask[0] |= MADERA_GP1_OP_CFG_MASK;
846 conf[0] |= MADERA_GP1_OP_CFG;
847 break;
848 case PIN_CONFIG_DRIVE_PUSH_PULL:
849 mask[0] |= MADERA_GP1_OP_CFG_MASK;
850 conf[0] &= ~MADERA_GP1_OP_CFG;
851 break;
852 case PIN_CONFIG_DRIVE_STRENGTH:
853 val = pinconf_to_config_argument(*configs);
854 mask[1] |= MADERA_GP1_DRV_STR_MASK;
855 conf[1] &= ~MADERA_GP1_DRV_STR_MASK;
856 conf[1] |= madera_pin_make_drv_str(priv, val);
857 break;
858 case PIN_CONFIG_INPUT_DEBOUNCE:
859 mask[0] |= MADERA_GP1_DB_MASK;
860
861 /*
862 * we can't configure debounce time per-pin so value
863 * is just a flag
864 */
865 val = pinconf_to_config_argument(*configs);
866 if (val)
867 conf[0] |= MADERA_GP1_DB;
868 else
869 conf[0] &= ~MADERA_GP1_DB;
870 break;
871 case PIN_CONFIG_INPUT_ENABLE:
872 val = pinconf_to_config_argument(*configs);
873 mask[1] |= MADERA_GP1_DIR_MASK;
874 if (val)
875 conf[1] |= MADERA_GP1_DIR;
876 else
877 conf[1] &= ~MADERA_GP1_DIR;
878 break;
879 case PIN_CONFIG_INPUT_SCHMITT:
880 val = pinconf_to_config_argument(*configs);
881 mask[0] |= MADERA_GP1_IP_CFG;
882 if (val)
883 conf[0] |= MADERA_GP1_IP_CFG;
884 else
885 conf[0] &= ~MADERA_GP1_IP_CFG;
886
887 mask[1] |= MADERA_GP1_DIR_MASK;
888 conf[1] |= MADERA_GP1_DIR;
889 break;
890 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
891 mask[0] |= MADERA_GP1_IP_CFG;
892 conf[0] |= MADERA_GP1_IP_CFG;
893 mask[1] |= MADERA_GP1_DIR_MASK;
894 conf[1] |= MADERA_GP1_DIR;
895 break;
896 case PIN_CONFIG_OUTPUT:
897 val = pinconf_to_config_argument(*configs);
898 mask[0] |= MADERA_GP1_LVL_MASK;
899 if (val)
900 conf[0] |= MADERA_GP1_LVL;
901 else
902 conf[0] &= ~MADERA_GP1_LVL;
903
904 mask[1] |= MADERA_GP1_DIR_MASK;
905 conf[1] &= ~MADERA_GP1_DIR;
906 break;
907 default:
908 break;
909 }
910
911 ++configs;
912 --num_configs;
913 }
914
915 dev_dbg(priv->dev,
916 "%s gpio%d 0x%x:0x%x 0x%x:0x%x\n",
917 __func__, pin + 1, reg, conf[0], reg + 1, conf[1]);
918
919 ret = regmap_update_bits(priv->madera->regmap, reg, mask[0], conf[0]);
920 if (ret)
921 goto err;
922
923 ++reg;
924 ret = regmap_update_bits(priv->madera->regmap, reg, mask[1], conf[1]);
925 if (ret)
926 goto err;
927
928 return 0;
929
930err:
931 dev_err(priv->dev,
932 "Failed to write GPIO%d conf (%d) reg 0x%x\n",
933 pin + 1, ret, reg);
934
935 return ret;
936}
937
938static int madera_pin_conf_group_set(struct pinctrl_dev *pctldev,
939 unsigned int selector,
940 unsigned long *configs,
941 unsigned int num_configs)
942{
943 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
944 const struct madera_pin_groups *pin_group;
945 unsigned int n_groups = priv->chip->n_pin_groups;
946 int i, ret;
947
948 dev_dbg(priv->dev, "%s setting group %s\n", __func__,
949 madera_get_group_name(pctldev, selector));
950
951 if (selector >= n_groups) {
952 /* group is a single pin, convert to pin number and set */
953 return madera_pin_conf_set(pctldev,
954 selector - n_groups,
955 configs,
956 num_configs);
957 } else {
958 pin_group = &priv->chip->pin_groups[selector];
959
960 for (i = 0; i < pin_group->n_pins; ++i) {
961 ret = madera_pin_conf_set(pctldev,
962 pin_group->pins[i],
963 configs,
964 num_configs);
965 if (ret)
966 return ret;
967 }
968 }
969
970 return 0;
971}
972
973static const struct pinconf_ops madera_pin_conf_ops = {
974 .pin_config_get = madera_pin_conf_get,
975 .pin_config_set = madera_pin_conf_set,
976 .pin_config_group_set = madera_pin_conf_group_set,
977
978};
979
980static struct pinctrl_desc madera_pin_desc = {
981 .name = "madera-pinctrl",
982 .pins = madera_pins,
983 .pctlops = &madera_pin_group_ops,
984 .pmxops = &madera_pin_mux_ops,
985 .confops = &madera_pin_conf_ops,
986 .owner = THIS_MODULE,
987};
988
989static int madera_pin_probe(struct platform_device *pdev)
990{
991 struct madera *madera = dev_get_drvdata(pdev->dev.parent);
992 const struct madera_pdata *pdata = dev_get_platdata(madera->dev);
993 struct madera_pin_private *priv;
994 int ret;
995
996 BUILD_BUG_ON(ARRAY_SIZE(madera_pin_single_group_names) !=
997 ARRAY_SIZE(madera_pin_single_group_pins));
998
999 dev_dbg(&pdev->dev, "%s\n", __func__);
1000
1001 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1002 if (!priv)
1003 return -ENOMEM;
1004
1005 priv->dev = &pdev->dev;
1006 priv->madera = madera;
1007 pdev->dev.of_node = madera->dev->of_node;
1008
1009 switch (madera->type) {
1010 case CS47L35:
1011 if (IS_ENABLED(CONFIG_PINCTRL_CS47L35))
1012 priv->chip = &cs47l35_pin_chip;
1013 break;
1014 case CS47L85:
1015 case WM1840:
1016 if (IS_ENABLED(CONFIG_PINCTRL_CS47L85))
1017 priv->chip = &cs47l85_pin_chip;
1018 break;
1019 case CS47L90:
1020 case CS47L91:
1021 if (IS_ENABLED(CONFIG_PINCTRL_CS47L90))
1022 priv->chip = &cs47l90_pin_chip;
1023 break;
1024 default:
1025 break;
1026 }
1027
1028 if (!priv->chip)
1029 return -ENODEV;
1030
1031 madera_pin_desc.npins = priv->chip->n_pins;
1032
1033 ret = devm_pinctrl_register_and_init(&pdev->dev,
1034 &madera_pin_desc,
1035 priv,
1036 &priv->pctl);
1037 if (ret) {
1038 dev_err(priv->dev, "Failed pinctrl register (%d)\n", ret);
1039 return ret;
1040 }
1041
1042 /* if the configuration is provided through pdata, apply it */
1043 if (pdata) {
1044 ret = pinctrl_register_mappings(pdata->gpio_configs,
1045 pdata->n_gpio_configs);
1046 if (ret) {
1047 dev_err(priv->dev,
1048 "Failed to register pdata mappings (%d)\n",
1049 ret);
1050 return ret;
1051 }
1052 }
1053
1054 ret = pinctrl_enable(priv->pctl);
1055 if (ret) {
1056 dev_err(priv->dev, "Failed to enable pinctrl (%d)\n", ret);
1057 return ret;
1058 }
1059
1060 dev_dbg(priv->dev, "pinctrl probed ok\n");
1061
1062 return 0;
1063}
1064
1065static struct platform_driver madera_pin_driver = {
1066 .probe = madera_pin_probe,
1067 .driver = {
1068 .name = "madera-pinctrl",
1069 },
1070};
1071
1072module_platform_driver(madera_pin_driver);
1073
1074MODULE_DESCRIPTION("Madera pinctrl driver");
1075MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1076MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/cirrus/pinctrl-madera.h b/drivers/pinctrl/cirrus/pinctrl-madera.h
new file mode 100644
index 000000000000..8000f4f832a1
--- /dev/null
+++ b/drivers/pinctrl/cirrus/pinctrl-madera.h
@@ -0,0 +1,41 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Pinctrl for Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2016-2017 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#ifndef PINCTRL_MADERA_H
13#define PINCTRL_MADERA_H
14
15struct madera_pin_groups {
16 const char *name;
17 const unsigned int *pins;
18 unsigned int n_pins;
19};
20
21struct madera_pin_chip {
22 unsigned int n_pins;
23
24 const struct madera_pin_groups *pin_groups;
25 unsigned int n_pin_groups;
26};
27
28struct madera_pin_private {
29 struct madera *madera;
30
31 const struct madera_pin_chip *chip; /* chip-specific groups */
32
33 struct device *dev;
34 struct pinctrl_dev *pctl;
35};
36
37extern const struct madera_pin_chip cs47l35_pin_chip;
38extern const struct madera_pin_chip cs47l85_pin_chip;
39extern const struct madera_pin_chip cs47l90_pin_chip;
40
41#endif
diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig
index cb0df9eb3e0f..16b1615958aa 100644
--- a/drivers/platform/chrome/Kconfig
+++ b/drivers/platform/chrome/Kconfig
@@ -52,6 +52,26 @@ config CHROMEOS_TBMC
52config CROS_EC_CTL 52config CROS_EC_CTL
53 tristate 53 tristate
54 54
55config CROS_EC_I2C
56 tristate "ChromeOS Embedded Controller (I2C)"
57 depends on MFD_CROS_EC && I2C
58
59 help
60 If you say Y here, you get support for talking to the ChromeOS
61 EC through an I2C bus. This uses a simple byte-level protocol with
62 a checksum. Failing accesses will be retried three times to
63 improve reliability.
64
65config CROS_EC_SPI
66 tristate "ChromeOS Embedded Controller (SPI)"
67 depends on MFD_CROS_EC && SPI
68
69 ---help---
70 If you say Y here, you get support for talking to the ChromeOS EC
71 through a SPI bus, using a byte-level protocol. Since the EC's
72 response time cannot be guaranteed, we support ignoring
73 'pre-amble' bytes before the response actually starts.
74
55config CROS_EC_LPC 75config CROS_EC_LPC
56 tristate "ChromeOS Embedded Controller (LPC)" 76 tristate "ChromeOS Embedded Controller (LPC)"
57 depends on MFD_CROS_EC && ACPI && (X86 || COMPILE_TEST) 77 depends on MFD_CROS_EC && ACPI && (X86 || COMPILE_TEST)
diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile
index e44c37a63fa9..cd591bf872bb 100644
--- a/drivers/platform/chrome/Makefile
+++ b/drivers/platform/chrome/Makefile
@@ -6,6 +6,8 @@ obj-$(CONFIG_CHROMEOS_TBMC) += chromeos_tbmc.o
6cros_ec_ctl-objs := cros_ec_sysfs.o cros_ec_lightbar.o \ 6cros_ec_ctl-objs := cros_ec_sysfs.o cros_ec_lightbar.o \
7 cros_ec_vbc.o cros_ec_debugfs.o 7 cros_ec_vbc.o cros_ec_debugfs.o
8obj-$(CONFIG_CROS_EC_CTL) += cros_ec_ctl.o 8obj-$(CONFIG_CROS_EC_CTL) += cros_ec_ctl.o
9obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
10obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
9cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_reg.o 11cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_reg.o
10cros_ec_lpcs-$(CONFIG_CROS_EC_LPC_MEC) += cros_ec_lpc_mec.o 12cros_ec_lpcs-$(CONFIG_CROS_EC_LPC_MEC) += cros_ec_lpc_mec.o
11obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpcs.o 13obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpcs.o
diff --git a/drivers/mfd/cros_ec_i2c.c b/drivers/platform/chrome/cros_ec_i2c.c
index ef9b4763356f..ef9b4763356f 100644
--- a/drivers/mfd/cros_ec_i2c.c
+++ b/drivers/platform/chrome/cros_ec_i2c.c
diff --git a/drivers/platform/chrome/cros_ec_proto.c b/drivers/platform/chrome/cros_ec_proto.c
index 8350ca2311c7..398393ab5df8 100644
--- a/drivers/platform/chrome/cros_ec_proto.c
+++ b/drivers/platform/chrome/cros_ec_proto.c
@@ -506,10 +506,31 @@ int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev,
506} 506}
507EXPORT_SYMBOL(cros_ec_cmd_xfer_status); 507EXPORT_SYMBOL(cros_ec_cmd_xfer_status);
508 508
509static int get_next_event_xfer(struct cros_ec_device *ec_dev,
510 struct cros_ec_command *msg,
511 int version, uint32_t size)
512{
513 int ret;
514
515 msg->version = version;
516 msg->command = EC_CMD_GET_NEXT_EVENT;
517 msg->insize = size;
518 msg->outsize = 0;
519
520 ret = cros_ec_cmd_xfer(ec_dev, msg);
521 if (ret > 0) {
522 ec_dev->event_size = ret - 1;
523 memcpy(&ec_dev->event_data, msg->data, ec_dev->event_size);
524 }
525
526 return ret;
527}
528
509static int get_next_event(struct cros_ec_device *ec_dev) 529static int get_next_event(struct cros_ec_device *ec_dev)
510{ 530{
511 u8 buffer[sizeof(struct cros_ec_command) + sizeof(ec_dev->event_data)]; 531 u8 buffer[sizeof(struct cros_ec_command) + sizeof(ec_dev->event_data)];
512 struct cros_ec_command *msg = (struct cros_ec_command *)&buffer; 532 struct cros_ec_command *msg = (struct cros_ec_command *)&buffer;
533 static int cmd_version = 1;
513 int ret; 534 int ret;
514 535
515 if (ec_dev->suspended) { 536 if (ec_dev->suspended) {
@@ -517,18 +538,19 @@ static int get_next_event(struct cros_ec_device *ec_dev)
517 return -EHOSTDOWN; 538 return -EHOSTDOWN;
518 } 539 }
519 540
520 msg->version = 0; 541 if (cmd_version == 1) {
521 msg->command = EC_CMD_GET_NEXT_EVENT; 542 ret = get_next_event_xfer(ec_dev, msg, cmd_version,
522 msg->insize = sizeof(ec_dev->event_data); 543 sizeof(struct ec_response_get_next_event_v1));
523 msg->outsize = 0; 544 if (ret < 0 || msg->result != EC_RES_INVALID_VERSION)
545 return ret;
524 546
525 ret = cros_ec_cmd_xfer(ec_dev, msg); 547 /* Fallback to version 0 for future send attempts */
526 if (ret > 0) { 548 cmd_version = 0;
527 ec_dev->event_size = ret - 1;
528 memcpy(&ec_dev->event_data, msg->data,
529 sizeof(ec_dev->event_data));
530 } 549 }
531 550
551 ret = get_next_event_xfer(ec_dev, msg, cmd_version,
552 sizeof(struct ec_response_get_next_event));
553
532 return ret; 554 return ret;
533} 555}
534 556
diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/platform/chrome/cros_ec_spi.c
index 2060d1483043..2060d1483043 100644
--- a/drivers/mfd/cros_ec_spi.c
+++ b/drivers/platform/chrome/cros_ec_spi.c
diff --git a/drivers/regulator/da9063-regulator.c b/drivers/regulator/da9063-regulator.c
index 2df26f36c687..8cbcd2a3eb20 100644
--- a/drivers/regulator/da9063-regulator.c
+++ b/drivers/regulator/da9063-regulator.c
@@ -98,7 +98,7 @@ struct da9063_regulator_info {
98struct da9063_dev_model { 98struct da9063_dev_model {
99 const struct da9063_regulator_info *regulator_info; 99 const struct da9063_regulator_info *regulator_info;
100 unsigned n_regulators; 100 unsigned n_regulators;
101 unsigned dev_model; 101 enum da9063_type type;
102}; 102};
103 103
104/* Single regulator settings */ 104/* Single regulator settings */
@@ -530,6 +530,32 @@ static const struct da9063_regulator_info da9063_regulator_info[] = {
530 DA9063_BMEM_ILIM_MASK), 530 DA9063_BMEM_ILIM_MASK),
531 }, 531 },
532 { 532 {
533 DA9063_LDO(DA9063, LDO3, 900, 20, 3440),
534 .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO3_SEL),
535 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO3_LIM),
536 },
537 {
538 DA9063_LDO(DA9063, LDO7, 900, 50, 3600),
539 .suspend = BFIELD(DA9063_REG_LDO7_CONT, DA9063_VLDO7_SEL),
540 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO7_LIM),
541 },
542 {
543 DA9063_LDO(DA9063, LDO8, 900, 50, 3600),
544 .suspend = BFIELD(DA9063_REG_LDO8_CONT, DA9063_VLDO8_SEL),
545 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO8_LIM),
546 },
547 {
548 DA9063_LDO(DA9063, LDO9, 950, 50, 3600),
549 .suspend = BFIELD(DA9063_REG_LDO9_CONT, DA9063_VLDO9_SEL),
550 },
551 {
552 DA9063_LDO(DA9063, LDO11, 900, 50, 3600),
553 .suspend = BFIELD(DA9063_REG_LDO11_CONT, DA9063_VLDO11_SEL),
554 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO11_LIM),
555 },
556
557 /* The following LDOs are present only on DA9063, not on DA9063L */
558 {
533 DA9063_LDO(DA9063, LDO1, 600, 20, 1860), 559 DA9063_LDO(DA9063, LDO1, 600, 20, 1860),
534 .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO1_SEL), 560 .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO1_SEL),
535 }, 561 },
@@ -538,11 +564,6 @@ static const struct da9063_regulator_info da9063_regulator_info[] = {
538 .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO2_SEL), 564 .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO2_SEL),
539 }, 565 },
540 { 566 {
541 DA9063_LDO(DA9063, LDO3, 900, 20, 3440),
542 .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO3_SEL),
543 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO3_LIM),
544 },
545 {
546 DA9063_LDO(DA9063, LDO4, 900, 20, 3440), 567 DA9063_LDO(DA9063, LDO4, 900, 20, 3440),
547 .suspend = BFIELD(DA9063_REG_DVC_2, DA9063_VLDO4_SEL), 568 .suspend = BFIELD(DA9063_REG_DVC_2, DA9063_VLDO4_SEL),
548 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO4_LIM), 569 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO4_LIM),
@@ -555,29 +576,11 @@ static const struct da9063_regulator_info da9063_regulator_info[] = {
555 DA9063_LDO(DA9063, LDO6, 900, 50, 3600), 576 DA9063_LDO(DA9063, LDO6, 900, 50, 3600),
556 .suspend = BFIELD(DA9063_REG_LDO6_CONT, DA9063_VLDO6_SEL), 577 .suspend = BFIELD(DA9063_REG_LDO6_CONT, DA9063_VLDO6_SEL),
557 }, 578 },
558 { 579
559 DA9063_LDO(DA9063, LDO7, 900, 50, 3600),
560 .suspend = BFIELD(DA9063_REG_LDO7_CONT, DA9063_VLDO7_SEL),
561 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO7_LIM),
562 },
563 {
564 DA9063_LDO(DA9063, LDO8, 900, 50, 3600),
565 .suspend = BFIELD(DA9063_REG_LDO8_CONT, DA9063_VLDO8_SEL),
566 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO8_LIM),
567 },
568 {
569 DA9063_LDO(DA9063, LDO9, 950, 50, 3600),
570 .suspend = BFIELD(DA9063_REG_LDO9_CONT, DA9063_VLDO9_SEL),
571 },
572 { 580 {
573 DA9063_LDO(DA9063, LDO10, 900, 50, 3600), 581 DA9063_LDO(DA9063, LDO10, 900, 50, 3600),
574 .suspend = BFIELD(DA9063_REG_LDO10_CONT, DA9063_VLDO10_SEL), 582 .suspend = BFIELD(DA9063_REG_LDO10_CONT, DA9063_VLDO10_SEL),
575 }, 583 },
576 {
577 DA9063_LDO(DA9063, LDO11, 900, 50, 3600),
578 .suspend = BFIELD(DA9063_REG_LDO11_CONT, DA9063_VLDO11_SEL),
579 .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO11_LIM),
580 },
581}; 584};
582 585
583/* Link chip model with regulators info table */ 586/* Link chip model with regulators info table */
@@ -585,7 +588,12 @@ static struct da9063_dev_model regulators_models[] = {
585 { 588 {
586 .regulator_info = da9063_regulator_info, 589 .regulator_info = da9063_regulator_info,
587 .n_regulators = ARRAY_SIZE(da9063_regulator_info), 590 .n_regulators = ARRAY_SIZE(da9063_regulator_info),
588 .dev_model = PMIC_DA9063, 591 .type = PMIC_TYPE_DA9063,
592 },
593 {
594 .regulator_info = da9063_regulator_info,
595 .n_regulators = ARRAY_SIZE(da9063_regulator_info) - 6,
596 .type = PMIC_TYPE_DA9063L,
589 }, 597 },
590 { } 598 { }
591}; 599};
@@ -641,28 +649,34 @@ static struct of_regulator_match da9063_matches[] = {
641 [DA9063_ID_BPERI] = { .name = "bperi", }, 649 [DA9063_ID_BPERI] = { .name = "bperi", },
642 [DA9063_ID_BCORES_MERGED] = { .name = "bcores-merged" }, 650 [DA9063_ID_BCORES_MERGED] = { .name = "bcores-merged" },
643 [DA9063_ID_BMEM_BIO_MERGED] = { .name = "bmem-bio-merged", }, 651 [DA9063_ID_BMEM_BIO_MERGED] = { .name = "bmem-bio-merged", },
652 [DA9063_ID_LDO3] = { .name = "ldo3", },
653 [DA9063_ID_LDO7] = { .name = "ldo7", },
654 [DA9063_ID_LDO8] = { .name = "ldo8", },
655 [DA9063_ID_LDO9] = { .name = "ldo9", },
656 [DA9063_ID_LDO11] = { .name = "ldo11", },
657 /* The following LDOs are present only on DA9063, not on DA9063L */
644 [DA9063_ID_LDO1] = { .name = "ldo1", }, 658 [DA9063_ID_LDO1] = { .name = "ldo1", },
645 [DA9063_ID_LDO2] = { .name = "ldo2", }, 659 [DA9063_ID_LDO2] = { .name = "ldo2", },
646 [DA9063_ID_LDO3] = { .name = "ldo3", },
647 [DA9063_ID_LDO4] = { .name = "ldo4", }, 660 [DA9063_ID_LDO4] = { .name = "ldo4", },
648 [DA9063_ID_LDO5] = { .name = "ldo5", }, 661 [DA9063_ID_LDO5] = { .name = "ldo5", },
649 [DA9063_ID_LDO6] = { .name = "ldo6", }, 662 [DA9063_ID_LDO6] = { .name = "ldo6", },
650 [DA9063_ID_LDO7] = { .name = "ldo7", },
651 [DA9063_ID_LDO8] = { .name = "ldo8", },
652 [DA9063_ID_LDO9] = { .name = "ldo9", },
653 [DA9063_ID_LDO10] = { .name = "ldo10", }, 663 [DA9063_ID_LDO10] = { .name = "ldo10", },
654 [DA9063_ID_LDO11] = { .name = "ldo11", },
655}; 664};
656 665
657static struct da9063_regulators_pdata *da9063_parse_regulators_dt( 666static struct da9063_regulators_pdata *da9063_parse_regulators_dt(
658 struct platform_device *pdev, 667 struct platform_device *pdev,
659 struct of_regulator_match **da9063_reg_matches) 668 struct of_regulator_match **da9063_reg_matches)
660{ 669{
670 struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent);
661 struct da9063_regulators_pdata *pdata; 671 struct da9063_regulators_pdata *pdata;
662 struct da9063_regulator_data *rdata; 672 struct da9063_regulator_data *rdata;
663 struct device_node *node; 673 struct device_node *node;
674 int da9063_matches_len = ARRAY_SIZE(da9063_matches);
664 int i, n, num; 675 int i, n, num;
665 676
677 if (da9063->type == PMIC_TYPE_DA9063L)
678 da9063_matches_len -= 6;
679
666 node = of_get_child_by_name(pdev->dev.parent->of_node, "regulators"); 680 node = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
667 if (!node) { 681 if (!node) {
668 dev_err(&pdev->dev, "Regulators device node not found\n"); 682 dev_err(&pdev->dev, "Regulators device node not found\n");
@@ -670,7 +684,7 @@ static struct da9063_regulators_pdata *da9063_parse_regulators_dt(
670 } 684 }
671 685
672 num = of_regulator_match(&pdev->dev, node, da9063_matches, 686 num = of_regulator_match(&pdev->dev, node, da9063_matches,
673 ARRAY_SIZE(da9063_matches)); 687 da9063_matches_len);
674 of_node_put(node); 688 of_node_put(node);
675 if (num < 0) { 689 if (num < 0) {
676 dev_err(&pdev->dev, "Failed to match regulators\n"); 690 dev_err(&pdev->dev, "Failed to match regulators\n");
@@ -689,7 +703,7 @@ static struct da9063_regulators_pdata *da9063_parse_regulators_dt(
689 pdata->n_regulators = num; 703 pdata->n_regulators = num;
690 704
691 n = 0; 705 n = 0;
692 for (i = 0; i < ARRAY_SIZE(da9063_matches); i++) { 706 for (i = 0; i < da9063_matches_len; i++) {
693 if (!da9063_matches[i].init_data) 707 if (!da9063_matches[i].init_data)
694 continue; 708 continue;
695 709
@@ -741,12 +755,12 @@ static int da9063_regulator_probe(struct platform_device *pdev)
741 755
742 /* Find regulators set for particular device model */ 756 /* Find regulators set for particular device model */
743 for (model = regulators_models; model->regulator_info; model++) { 757 for (model = regulators_models; model->regulator_info; model++) {
744 if (model->dev_model == da9063->model) 758 if (model->type == da9063->type)
745 break; 759 break;
746 } 760 }
747 if (!model->regulator_info) { 761 if (!model->regulator_info) {
748 dev_err(&pdev->dev, "Chip model not recognised (%u)\n", 762 dev_err(&pdev->dev, "Chip model not recognised (%u)\n",
749 da9063->model); 763 da9063->type);
750 return -ENODEV; 764 return -ENODEV;
751 } 765 }
752 766
diff --git a/include/linux/mfd/as3722.h b/include/linux/mfd/as3722.h
index 51e6f9414575..b404a5af9bba 100644
--- a/include/linux/mfd/as3722.h
+++ b/include/linux/mfd/as3722.h
@@ -296,6 +296,8 @@
296#define AS3722_ADC1_CONV_NOTREADY BIT(7) 296#define AS3722_ADC1_CONV_NOTREADY BIT(7)
297#define AS3722_ADC1_SOURCE_SELECT_MASK 0x1F 297#define AS3722_ADC1_SOURCE_SELECT_MASK 0x1F
298 298
299#define AS3722_CTRL_SEQU1_AC_OK_PWR_ON BIT(0)
300
299/* GPIO modes */ 301/* GPIO modes */
300#define AS3722_GPIO_MODE_MASK 0x07 302#define AS3722_GPIO_MODE_MASK 0x07
301#define AS3722_GPIO_MODE_INPUT 0x00 303#define AS3722_GPIO_MODE_INPUT 0x00
@@ -391,6 +393,7 @@ struct as3722 {
391 unsigned long irq_flags; 393 unsigned long irq_flags;
392 bool en_intern_int_pullup; 394 bool en_intern_int_pullup;
393 bool en_intern_i2c_pullup; 395 bool en_intern_i2c_pullup;
396 bool en_ac_ok_pwr_on;
394 struct regmap_irq_chip_data *irq_data; 397 struct regmap_irq_chip_data *irq_data;
395}; 398};
396 399
diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h
index 32421dfeb996..20949dde35cd 100644
--- a/include/linux/mfd/cros_ec.h
+++ b/include/linux/mfd/cros_ec.h
@@ -147,7 +147,7 @@ struct cros_ec_device {
147 bool mkbp_event_supported; 147 bool mkbp_event_supported;
148 struct blocking_notifier_head event_notifier; 148 struct blocking_notifier_head event_notifier;
149 149
150 struct ec_response_get_next_event event_data; 150 struct ec_response_get_next_event_v1 event_data;
151 int event_size; 151 int event_size;
152 u32 host_event_wake_mask; 152 u32 host_event_wake_mask;
153}; 153};
diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h
index f2edd9969b40..6e1ab9bead28 100644
--- a/include/linux/mfd/cros_ec_commands.h
+++ b/include/linux/mfd/cros_ec_commands.h
@@ -804,6 +804,8 @@ enum ec_feature_code {
804 EC_FEATURE_MOTION_SENSE_FIFO = 24, 804 EC_FEATURE_MOTION_SENSE_FIFO = 24,
805 /* EC has RTC feature that can be controlled by host commands */ 805 /* EC has RTC feature that can be controlled by host commands */
806 EC_FEATURE_RTC = 27, 806 EC_FEATURE_RTC = 27,
807 /* EC supports CEC commands */
808 EC_FEATURE_CEC = 35,
807}; 809};
808 810
809#define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32)) 811#define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32))
@@ -2078,6 +2080,12 @@ enum ec_mkbp_event {
2078 /* EC sent a sysrq command */ 2080 /* EC sent a sysrq command */
2079 EC_MKBP_EVENT_SYSRQ = 6, 2081 EC_MKBP_EVENT_SYSRQ = 6,
2080 2082
2083 /* Notify the AP that something happened on CEC */
2084 EC_MKBP_EVENT_CEC_EVENT = 8,
2085
2086 /* Send an incoming CEC message to the AP */
2087 EC_MKBP_EVENT_CEC_MESSAGE = 9,
2088
2081 /* Number of MKBP events */ 2089 /* Number of MKBP events */
2082 EC_MKBP_EVENT_COUNT, 2090 EC_MKBP_EVENT_COUNT,
2083}; 2091};
@@ -2093,12 +2101,28 @@ union ec_response_get_next_data {
2093 uint32_t sysrq; 2101 uint32_t sysrq;
2094} __packed; 2102} __packed;
2095 2103
2104union ec_response_get_next_data_v1 {
2105 uint8_t key_matrix[16];
2106 uint32_t host_event;
2107 uint32_t buttons;
2108 uint32_t switches;
2109 uint32_t sysrq;
2110 uint32_t cec_events;
2111 uint8_t cec_message[16];
2112} __packed;
2113
2096struct ec_response_get_next_event { 2114struct ec_response_get_next_event {
2097 uint8_t event_type; 2115 uint8_t event_type;
2098 /* Followed by event data if any */ 2116 /* Followed by event data if any */
2099 union ec_response_get_next_data data; 2117 union ec_response_get_next_data data;
2100} __packed; 2118} __packed;
2101 2119
2120struct ec_response_get_next_event_v1 {
2121 uint8_t event_type;
2122 /* Followed by event data if any */
2123 union ec_response_get_next_data_v1 data;
2124} __packed;
2125
2102/* Bit indices for buttons and switches.*/ 2126/* Bit indices for buttons and switches.*/
2103/* Buttons */ 2127/* Buttons */
2104#define EC_MKBP_POWER_BUTTON 0 2128#define EC_MKBP_POWER_BUTTON 0
@@ -2593,14 +2617,18 @@ struct ec_params_current_limit {
2593} __packed; 2617} __packed;
2594 2618
2595/* 2619/*
2596 * Set maximum external power current. 2620 * Set maximum external voltage / current.
2597 */ 2621 */
2598#define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2 2622#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
2599 2623
2600struct ec_params_ext_power_current_limit { 2624/* Command v0 is used only on Spring and is obsolete + unsupported */
2601 uint32_t limit; /* in mA */ 2625struct ec_params_external_power_limit_v1 {
2626 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
2627 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
2602} __packed; 2628} __packed;
2603 2629
2630#define EC_POWER_LIMIT_NONE 0xffff
2631
2604/* Inform the EC when entering a sleep state */ 2632/* Inform the EC when entering a sleep state */
2605#define EC_CMD_HOST_SLEEP_EVENT 0xa9 2633#define EC_CMD_HOST_SLEEP_EVENT 0xa9
2606 2634
@@ -2831,6 +2859,79 @@ struct ec_params_reboot_ec {
2831 2859
2832/*****************************************************************************/ 2860/*****************************************************************************/
2833/* 2861/*
2862 * HDMI CEC commands
2863 *
2864 * These commands are for sending and receiving message via HDMI CEC
2865 */
2866#define EC_MAX_CEC_MSG_LEN 16
2867
2868/* CEC message from the AP to be written on the CEC bus */
2869#define EC_CMD_CEC_WRITE_MSG 0x00B8
2870
2871/**
2872 * struct ec_params_cec_write - Message to write to the CEC bus
2873 * @msg: message content to write to the CEC bus
2874 */
2875struct ec_params_cec_write {
2876 uint8_t msg[EC_MAX_CEC_MSG_LEN];
2877} __packed;
2878
2879/* Set various CEC parameters */
2880#define EC_CMD_CEC_SET 0x00BA
2881
2882/**
2883 * struct ec_params_cec_set - CEC parameters set
2884 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
2885 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC
2886 * or 1 to enable CEC functionality, in case cmd is CEC_CMD_LOGICAL_ADDRESS,
2887 * this field encodes the requested logical address between 0 and 15
2888 * or 0xff to unregister
2889 */
2890struct ec_params_cec_set {
2891 uint8_t cmd; /* enum cec_command */
2892 uint8_t val;
2893} __packed;
2894
2895/* Read various CEC parameters */
2896#define EC_CMD_CEC_GET 0x00BB
2897
2898/**
2899 * struct ec_params_cec_get - CEC parameters get
2900 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
2901 */
2902struct ec_params_cec_get {
2903 uint8_t cmd; /* enum cec_command */
2904} __packed;
2905
2906/**
2907 * struct ec_response_cec_get - CEC parameters get response
2908 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is
2909 * disabled or 1 if CEC functionality is enabled,
2910 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the
2911 * configured logical address between 0 and 15 or 0xff if unregistered
2912 */
2913struct ec_response_cec_get {
2914 uint8_t val;
2915} __packed;
2916
2917/* CEC parameters command */
2918enum ec_cec_command {
2919 /* CEC reading, writing and events enable */
2920 CEC_CMD_ENABLE,
2921 /* CEC logical address */
2922 CEC_CMD_LOGICAL_ADDRESS,
2923};
2924
2925/* Events from CEC to AP */
2926enum mkbp_cec_event {
2927 /* Outgoing message was acknowledged by a follower */
2928 EC_MKBP_CEC_SEND_OK = BIT(0),
2929 /* Outgoing message was not acknowledged */
2930 EC_MKBP_CEC_SEND_FAILED = BIT(1),
2931};
2932
2933/*****************************************************************************/
2934/*
2834 * Special commands 2935 * Special commands
2835 * 2936 *
2836 * These do not follow the normal rules for commands. See each command for 2937 * These do not follow the normal rules for commands. See each command for
@@ -2974,6 +3075,12 @@ enum usb_chg_type {
2974 USB_CHG_TYPE_VBUS, 3075 USB_CHG_TYPE_VBUS,
2975 USB_CHG_TYPE_UNKNOWN, 3076 USB_CHG_TYPE_UNKNOWN,
2976}; 3077};
3078enum usb_power_roles {
3079 USB_PD_PORT_POWER_DISCONNECTED,
3080 USB_PD_PORT_POWER_SOURCE,
3081 USB_PD_PORT_POWER_SINK,
3082 USB_PD_PORT_POWER_SINK_NOT_CHARGING,
3083};
2977 3084
2978struct usb_chg_measures { 3085struct usb_chg_measures {
2979 uint16_t voltage_max; 3086 uint16_t voltage_max;
@@ -2991,6 +3098,120 @@ struct ec_response_usb_pd_power_info {
2991 uint32_t max_power; 3098 uint32_t max_power;
2992} __packed; 3099} __packed;
2993 3100
3101struct ec_params_usb_pd_info_request {
3102 uint8_t port;
3103} __packed;
3104
3105/* Read USB-PD Device discovery info */
3106#define EC_CMD_USB_PD_DISCOVERY 0x0113
3107struct ec_params_usb_pd_discovery_entry {
3108 uint16_t vid; /* USB-IF VID */
3109 uint16_t pid; /* USB-IF PID */
3110 uint8_t ptype; /* product type (hub,periph,cable,ama) */
3111} __packed;
3112
3113/* Override default charge behavior */
3114#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
3115
3116/* Negative port parameters have special meaning */
3117enum usb_pd_override_ports {
3118 OVERRIDE_DONT_CHARGE = -2,
3119 OVERRIDE_OFF = -1,
3120 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */
3121};
3122
3123struct ec_params_charge_port_override {
3124 int16_t override_port; /* Override port# */
3125} __packed;
3126
3127/* Read (and delete) one entry of PD event log */
3128#define EC_CMD_PD_GET_LOG_ENTRY 0x0115
3129
3130struct ec_response_pd_log {
3131 uint32_t timestamp; /* relative timestamp in milliseconds */
3132 uint8_t type; /* event type : see PD_EVENT_xx below */
3133 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */
3134 uint16_t data; /* type-defined data payload */
3135 uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */
3136} __packed;
3137
3138/* The timestamp is the microsecond counter shifted to get about a ms. */
3139#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
3140
3141#define PD_LOG_SIZE_MASK 0x1f
3142#define PD_LOG_PORT_MASK 0xe0
3143#define PD_LOG_PORT_SHIFT 5
3144#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
3145 ((size) & PD_LOG_SIZE_MASK))
3146#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
3147#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
3148
3149/* PD event log : entry types */
3150/* PD MCU events */
3151#define PD_EVENT_MCU_BASE 0x00
3152#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
3153#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)
3154/* Reserved for custom board event */
3155#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)
3156/* PD generic accessory events */
3157#define PD_EVENT_ACC_BASE 0x20
3158#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
3159#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)
3160/* PD power supply events */
3161#define PD_EVENT_PS_BASE 0x40
3162#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
3163/* PD video dongles events */
3164#define PD_EVENT_VIDEO_BASE 0x60
3165#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
3166#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)
3167/* Returned in the "type" field, when there is no entry available */
3168#define PD_EVENT_NO_ENTRY 0xff
3169
3170/*
3171 * PD_EVENT_MCU_CHARGE event definition :
3172 * the payload is "struct usb_chg_measures"
3173 * the data field contains the port state flags as defined below :
3174 */
3175/* Port partner is a dual role device */
3176#define CHARGE_FLAGS_DUAL_ROLE BIT(15)
3177/* Port is the pending override port */
3178#define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14)
3179/* Port is the override port */
3180#define CHARGE_FLAGS_OVERRIDE BIT(13)
3181/* Charger type */
3182#define CHARGE_FLAGS_TYPE_SHIFT 3
3183#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
3184/* Power delivery role */
3185#define CHARGE_FLAGS_ROLE_MASK (7 << 0)
3186
3187/*
3188 * PD_EVENT_PS_FAULT data field flags definition :
3189 */
3190#define PS_FAULT_OCP 1
3191#define PS_FAULT_FAST_OCP 2
3192#define PS_FAULT_OVP 3
3193#define PS_FAULT_DISCH 4
3194
3195/*
3196 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
3197 */
3198struct mcdp_version {
3199 uint8_t major;
3200 uint8_t minor;
3201 uint16_t build;
3202} __packed;
3203
3204struct mcdp_info {
3205 uint8_t family[2];
3206 uint8_t chipid[2];
3207 struct mcdp_version irom;
3208 struct mcdp_version fw;
3209} __packed;
3210
3211/* struct mcdp_info field decoding */
3212#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
3213#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
3214
2994/* Get info about USB-C SS muxes */ 3215/* Get info about USB-C SS muxes */
2995#define EC_CMD_USB_PD_MUX_INFO 0x11a 3216#define EC_CMD_USB_PD_MUX_INFO 0x11a
2996 3217
diff --git a/include/linux/mfd/da9063/core.h b/include/linux/mfd/da9063/core.h
index f3ae65db4c86..71b09154e2db 100644
--- a/include/linux/mfd/da9063/core.h
+++ b/include/linux/mfd/da9063/core.h
@@ -29,8 +29,11 @@
29#define DA9063_DRVNAME_RTC "da9063-rtc" 29#define DA9063_DRVNAME_RTC "da9063-rtc"
30#define DA9063_DRVNAME_VIBRATION "da9063-vibration" 30#define DA9063_DRVNAME_VIBRATION "da9063-vibration"
31 31
32enum da9063_models { 32#define PMIC_CHIP_ID_DA9063 0x61
33 PMIC_DA9063 = 0x61, 33
34enum da9063_type {
35 PMIC_TYPE_DA9063 = 0,
36 PMIC_TYPE_DA9063L,
34}; 37};
35 38
36enum da9063_variant_codes { 39enum da9063_variant_codes {
@@ -72,13 +75,10 @@ enum da9063_irqs {
72 DA9063_IRQ_GPI15, 75 DA9063_IRQ_GPI15,
73}; 76};
74 77
75#define DA9063_IRQ_BASE_OFFSET 0
76#define DA9063_NUM_IRQ (DA9063_IRQ_GPI15 + 1 - DA9063_IRQ_BASE_OFFSET)
77
78struct da9063 { 78struct da9063 {
79 /* Device */ 79 /* Device */
80 struct device *dev; 80 struct device *dev;
81 unsigned short model; 81 enum da9063_type type;
82 unsigned char variant_code; 82 unsigned char variant_code;
83 unsigned int flags; 83 unsigned int flags;
84 84
@@ -94,7 +94,4 @@ struct da9063 {
94int da9063_device_init(struct da9063 *da9063, unsigned int irq); 94int da9063_device_init(struct da9063 *da9063, unsigned int irq);
95int da9063_irq_init(struct da9063 *da9063); 95int da9063_irq_init(struct da9063 *da9063);
96 96
97void da9063_device_exit(struct da9063 *da9063);
98void da9063_irq_exit(struct da9063 *da9063);
99
100#endif /* __MFD_DA9063_CORE_H__ */ 97#endif /* __MFD_DA9063_CORE_H__ */
diff --git a/include/linux/mfd/madera/core.h b/include/linux/mfd/madera/core.h
new file mode 100644
index 000000000000..c332681848ef
--- /dev/null
+++ b/include/linux/mfd/madera/core.h
@@ -0,0 +1,187 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * MFD internals for Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2015-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#ifndef MADERA_CORE_H
13#define MADERA_CORE_H
14
15#include <linux/gpio/consumer.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/madera/pdata.h>
18#include <linux/notifier.h>
19#include <linux/regmap.h>
20#include <linux/regulator/consumer.h>
21
22enum madera_type {
23 /* 0 is reserved for indicating failure to identify */
24 CS47L35 = 1,
25 CS47L85 = 2,
26 CS47L90 = 3,
27 CS47L91 = 4,
28 WM1840 = 7,
29};
30
31#define MADERA_MAX_CORE_SUPPLIES 2
32#define MADERA_MAX_GPIOS 40
33
34#define CS47L35_NUM_GPIOS 16
35#define CS47L85_NUM_GPIOS 40
36#define CS47L90_NUM_GPIOS 38
37
38#define MADERA_MAX_MICBIAS 4
39
40/* Notifier events */
41#define MADERA_NOTIFY_VOICE_TRIGGER 0x1
42#define MADERA_NOTIFY_HPDET 0x2
43#define MADERA_NOTIFY_MICDET 0x4
44
45/* GPIO Function Definitions */
46#define MADERA_GP_FN_ALTERNATE 0x00
47#define MADERA_GP_FN_GPIO 0x01
48#define MADERA_GP_FN_DSP_GPIO 0x02
49#define MADERA_GP_FN_IRQ1 0x03
50#define MADERA_GP_FN_IRQ2 0x04
51#define MADERA_GP_FN_FLL1_CLOCK 0x10
52#define MADERA_GP_FN_FLL2_CLOCK 0x11
53#define MADERA_GP_FN_FLL3_CLOCK 0x12
54#define MADERA_GP_FN_FLLAO_CLOCK 0x13
55#define MADERA_GP_FN_FLL1_LOCK 0x18
56#define MADERA_GP_FN_FLL2_LOCK 0x19
57#define MADERA_GP_FN_FLL3_LOCK 0x1A
58#define MADERA_GP_FN_FLLAO_LOCK 0x1B
59#define MADERA_GP_FN_OPCLK_OUT 0x40
60#define MADERA_GP_FN_OPCLK_ASYNC_OUT 0x41
61#define MADERA_GP_FN_PWM1 0x48
62#define MADERA_GP_FN_PWM2 0x49
63#define MADERA_GP_FN_SPDIF_OUT 0x4C
64#define MADERA_GP_FN_HEADPHONE_DET 0x50
65#define MADERA_GP_FN_MIC_DET 0x58
66#define MADERA_GP_FN_DRC1_SIGNAL_DETECT 0x80
67#define MADERA_GP_FN_DRC2_SIGNAL_DETECT 0x81
68#define MADERA_GP_FN_ASRC1_IN1_LOCK 0x88
69#define MADERA_GP_FN_ASRC1_IN2_LOCK 0x89
70#define MADERA_GP_FN_ASRC2_IN1_LOCK 0x8A
71#define MADERA_GP_FN_ASRC2_IN2_LOCK 0x8B
72#define MADERA_GP_FN_DSP_IRQ1 0xA0
73#define MADERA_GP_FN_DSP_IRQ2 0xA1
74#define MADERA_GP_FN_DSP_IRQ3 0xA2
75#define MADERA_GP_FN_DSP_IRQ4 0xA3
76#define MADERA_GP_FN_DSP_IRQ5 0xA4
77#define MADERA_GP_FN_DSP_IRQ6 0xA5
78#define MADERA_GP_FN_DSP_IRQ7 0xA6
79#define MADERA_GP_FN_DSP_IRQ8 0xA7
80#define MADERA_GP_FN_DSP_IRQ9 0xA8
81#define MADERA_GP_FN_DSP_IRQ10 0xA9
82#define MADERA_GP_FN_DSP_IRQ11 0xAA
83#define MADERA_GP_FN_DSP_IRQ12 0xAB
84#define MADERA_GP_FN_DSP_IRQ13 0xAC
85#define MADERA_GP_FN_DSP_IRQ14 0xAD
86#define MADERA_GP_FN_DSP_IRQ15 0xAE
87#define MADERA_GP_FN_DSP_IRQ16 0xAF
88#define MADERA_GP_FN_HPOUT1L_SC 0xB0
89#define MADERA_GP_FN_HPOUT1R_SC 0xB1
90#define MADERA_GP_FN_HPOUT2L_SC 0xB2
91#define MADERA_GP_FN_HPOUT2R_SC 0xB3
92#define MADERA_GP_FN_HPOUT3L_SC 0xB4
93#define MADERA_GP_FN_HPOUT4R_SC 0xB5
94#define MADERA_GP_FN_SPKOUTL_SC 0xB6
95#define MADERA_GP_FN_SPKOUTR_SC 0xB7
96#define MADERA_GP_FN_HPOUT1L_ENA 0xC0
97#define MADERA_GP_FN_HPOUT1R_ENA 0xC1
98#define MADERA_GP_FN_HPOUT2L_ENA 0xC2
99#define MADERA_GP_FN_HPOUT2R_ENA 0xC3
100#define MADERA_GP_FN_HPOUT3L_ENA 0xC4
101#define MADERA_GP_FN_HPOUT4R_ENA 0xC5
102#define MADERA_GP_FN_SPKOUTL_ENA 0xC6
103#define MADERA_GP_FN_SPKOUTR_ENA 0xC7
104#define MADERA_GP_FN_HPOUT1L_DIS 0xD0
105#define MADERA_GP_FN_HPOUT1R_DIS 0xD1
106#define MADERA_GP_FN_HPOUT2L_DIS 0xD2
107#define MADERA_GP_FN_HPOUT2R_DIS 0xD3
108#define MADERA_GP_FN_HPOUT3L_DIS 0xD4
109#define MADERA_GP_FN_HPOUT4R_DIS 0xD5
110#define MADERA_GP_FN_SPKOUTL_DIS 0xD6
111#define MADERA_GP_FN_SPKOUTR_DIS 0xD7
112#define MADERA_GP_FN_SPK_SHUTDOWN 0xE0
113#define MADERA_GP_FN_SPK_OVH_SHUTDOWN 0xE1
114#define MADERA_GP_FN_SPK_OVH_WARN 0xE2
115#define MADERA_GP_FN_TIMER1_STATUS 0x140
116#define MADERA_GP_FN_TIMER2_STATUS 0x141
117#define MADERA_GP_FN_TIMER3_STATUS 0x142
118#define MADERA_GP_FN_TIMER4_STATUS 0x143
119#define MADERA_GP_FN_TIMER5_STATUS 0x144
120#define MADERA_GP_FN_TIMER6_STATUS 0x145
121#define MADERA_GP_FN_TIMER7_STATUS 0x146
122#define MADERA_GP_FN_TIMER8_STATUS 0x147
123#define MADERA_GP_FN_EVENTLOG1_FIFO_STS 0x150
124#define MADERA_GP_FN_EVENTLOG2_FIFO_STS 0x151
125#define MADERA_GP_FN_EVENTLOG3_FIFO_STS 0x152
126#define MADERA_GP_FN_EVENTLOG4_FIFO_STS 0x153
127#define MADERA_GP_FN_EVENTLOG5_FIFO_STS 0x154
128#define MADERA_GP_FN_EVENTLOG6_FIFO_STS 0x155
129#define MADERA_GP_FN_EVENTLOG7_FIFO_STS 0x156
130#define MADERA_GP_FN_EVENTLOG8_FIFO_STS 0x157
131
132struct snd_soc_dapm_context;
133
134/*
135 * struct madera - internal data shared by the set of Madera drivers
136 *
137 * This should not be used by anything except child drivers of the Madera MFD
138 *
139 * @regmap: pointer to the regmap instance for 16-bit registers
140 * @regmap_32bit: pointer to the regmap instance for 32-bit registers
141 * @dev: pointer to the MFD device
142 * @type: type of codec
143 * @rev: silicon revision
144 * @type_name: display name of this codec
145 * @num_core_supplies: number of core supply regulators
146 * @core_supplies: list of core supplies that are always required
147 * @dcvdd: pointer to DCVDD regulator
148 * @internal_dcvdd: true if DCVDD is supplied from the internal LDO1
149 * @pdata: our pdata
150 * @irq_dev: the irqchip child driver device
151 * @irq: host irq number from SPI or I2C configuration
152 * @out_clamp: indicates output clamp state for each analogue output
153 * @out_shorted: indicates short circuit state for each analogue output
154 * @hp_ena: bitflags of enable state for the headphone outputs
155 * @num_micbias: number of MICBIAS outputs
156 * @num_childbias: number of child biases for each MICBIAS
157 * @dapm: pointer to codec driver DAPM context
158 * @notifier: notifier for signalling events to ASoC machine driver
159 */
160struct madera {
161 struct regmap *regmap;
162 struct regmap *regmap_32bit;
163
164 struct device *dev;
165
166 enum madera_type type;
167 unsigned int rev;
168 const char *type_name;
169
170 int num_core_supplies;
171 struct regulator_bulk_data core_supplies[MADERA_MAX_CORE_SUPPLIES];
172 struct regulator *dcvdd;
173 bool internal_dcvdd;
174
175 struct madera_pdata pdata;
176
177 struct device *irq_dev;
178 int irq;
179
180 unsigned int num_micbias;
181 unsigned int num_childbias[MADERA_MAX_MICBIAS];
182
183 struct snd_soc_dapm_context *dapm;
184
185 struct blocking_notifier_head notifier;
186};
187#endif
diff --git a/include/linux/mfd/madera/pdata.h b/include/linux/mfd/madera/pdata.h
new file mode 100644
index 000000000000..0b311f39c8f4
--- /dev/null
+++ b/include/linux/mfd/madera/pdata.h
@@ -0,0 +1,59 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Platform data for Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2015-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#ifndef MADERA_PDATA_H
13#define MADERA_PDATA_H
14
15#include <linux/kernel.h>
16#include <linux/regulator/arizona-ldo1.h>
17#include <linux/regulator/arizona-micsupp.h>
18#include <linux/regulator/machine.h>
19
20#define MADERA_MAX_MICBIAS 4
21#define MADERA_MAX_CHILD_MICBIAS 4
22
23#define MADERA_MAX_GPSW 2
24
25struct gpio_desc;
26struct pinctrl_map;
27struct madera_irqchip_pdata;
28struct madera_codec_pdata;
29
30/**
31 * struct madera_pdata - Configuration data for Madera devices
32 *
33 * @reset: GPIO controlling /RESET (NULL = none)
34 * @ldo1: Substruct of pdata for the LDO1 regulator
35 * @micvdd: Substruct of pdata for the MICVDD regulator
36 * @irq_flags: Mode for primary IRQ (defaults to active low)
37 * @gpio_base: Base GPIO number
38 * @gpio_configs: Array of GPIO configurations (See Documentation/pinctrl.txt)
39 * @n_gpio_configs: Number of entries in gpio_configs
40 * @gpsw: General purpose switch mode setting. Depends on the external
41 * hardware connected to the switch. (See the SW1_MODE field
42 * in the datasheet for the available values for your codec)
43 */
44struct madera_pdata {
45 struct gpio_desc *reset;
46
47 struct arizona_ldo1_pdata ldo1;
48 struct arizona_micsupp_pdata micvdd;
49
50 unsigned int irq_flags;
51 int gpio_base;
52
53 const struct pinctrl_map *gpio_configs;
54 int n_gpio_configs;
55
56 u32 gpsw[MADERA_MAX_GPSW];
57};
58
59#endif
diff --git a/include/linux/mfd/madera/registers.h b/include/linux/mfd/madera/registers.h
new file mode 100644
index 000000000000..977e06101711
--- /dev/null
+++ b/include/linux/mfd/madera/registers.h
@@ -0,0 +1,3968 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Madera register definitions
4 *
5 * Copyright (C) 2015-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#ifndef MADERA_REGISTERS_H
13#define MADERA_REGISTERS_H
14
15/*
16 * Register Addresses.
17 */
18#define MADERA_SOFTWARE_RESET 0x00
19#define MADERA_HARDWARE_REVISION 0x01
20#define MADERA_CTRL_IF_CFG_1 0x08
21#define MADERA_CTRL_IF_CFG_2 0x09
22#define MADERA_CTRL_IF_CFG_3 0x0A
23#define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
24#define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
25#define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
26#define MADERA_TONE_GENERATOR_1 0x20
27#define MADERA_TONE_GENERATOR_2 0x21
28#define MADERA_TONE_GENERATOR_3 0x22
29#define MADERA_TONE_GENERATOR_4 0x23
30#define MADERA_TONE_GENERATOR_5 0x24
31#define MADERA_PWM_DRIVE_1 0x30
32#define MADERA_PWM_DRIVE_2 0x31
33#define MADERA_PWM_DRIVE_3 0x32
34#define MADERA_SEQUENCE_CONTROL 0x41
35#define MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1 0x61
36#define MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62
37#define MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63
38#define MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4 0x64
39#define MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x66
40#define MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x67
41#define MADERA_HAPTICS_CONTROL_1 0x90
42#define MADERA_HAPTICS_CONTROL_2 0x91
43#define MADERA_HAPTICS_PHASE_1_INTENSITY 0x92
44#define MADERA_HAPTICS_PHASE_1_DURATION 0x93
45#define MADERA_HAPTICS_PHASE_2_INTENSITY 0x94
46#define MADERA_HAPTICS_PHASE_2_DURATION 0x95
47#define MADERA_HAPTICS_PHASE_3_INTENSITY 0x96
48#define MADERA_HAPTICS_PHASE_3_DURATION 0x97
49#define MADERA_HAPTICS_STATUS 0x98
50#define MADERA_COMFORT_NOISE_GENERATOR 0xA0
51#define MADERA_CLOCK_32K_1 0x100
52#define MADERA_SYSTEM_CLOCK_1 0x101
53#define MADERA_SAMPLE_RATE_1 0x102
54#define MADERA_SAMPLE_RATE_2 0x103
55#define MADERA_SAMPLE_RATE_3 0x104
56#define MADERA_SAMPLE_RATE_1_STATUS 0x10A
57#define MADERA_SAMPLE_RATE_2_STATUS 0x10B
58#define MADERA_SAMPLE_RATE_3_STATUS 0x10C
59#define MADERA_ASYNC_CLOCK_1 0x112
60#define MADERA_ASYNC_SAMPLE_RATE_1 0x113
61#define MADERA_ASYNC_SAMPLE_RATE_2 0x114
62#define MADERA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B
63#define MADERA_ASYNC_SAMPLE_RATE_2_STATUS 0x11C
64#define MADERA_DSP_CLOCK_1 0x120
65#define MADERA_DSP_CLOCK_2 0x122
66#define MADERA_OUTPUT_SYSTEM_CLOCK 0x149
67#define MADERA_OUTPUT_ASYNC_CLOCK 0x14A
68#define MADERA_RATE_ESTIMATOR_1 0x152
69#define MADERA_RATE_ESTIMATOR_2 0x153
70#define MADERA_RATE_ESTIMATOR_3 0x154
71#define MADERA_RATE_ESTIMATOR_4 0x155
72#define MADERA_RATE_ESTIMATOR_5 0x156
73#define MADERA_FLL1_CONTROL_1 0x171
74#define MADERA_FLL1_CONTROL_2 0x172
75#define MADERA_FLL1_CONTROL_3 0x173
76#define MADERA_FLL1_CONTROL_4 0x174
77#define MADERA_FLL1_CONTROL_5 0x175
78#define MADERA_FLL1_CONTROL_6 0x176
79#define MADERA_FLL1_LOOP_FILTER_TEST_1 0x177
80#define MADERA_FLL1_NCO_TEST_0 0x178
81#define MADERA_FLL1_CONTROL_7 0x179
82#define MADERA_FLL1_EFS_2 0x17A
83#define CS47L35_FLL1_SYNCHRONISER_1 0x17F
84#define CS47L35_FLL1_SYNCHRONISER_2 0x180
85#define CS47L35_FLL1_SYNCHRONISER_3 0x181
86#define CS47L35_FLL1_SYNCHRONISER_4 0x182
87#define CS47L35_FLL1_SYNCHRONISER_5 0x183
88#define CS47L35_FLL1_SYNCHRONISER_6 0x184
89#define CS47L35_FLL1_SYNCHRONISER_7 0x185
90#define CS47L35_FLL1_SPREAD_SPECTRUM 0x187
91#define CS47L35_FLL1_GPIO_CLOCK 0x188
92#define MADERA_FLL1_SYNCHRONISER_1 0x181
93#define MADERA_FLL1_SYNCHRONISER_2 0x182
94#define MADERA_FLL1_SYNCHRONISER_3 0x183
95#define MADERA_FLL1_SYNCHRONISER_4 0x184
96#define MADERA_FLL1_SYNCHRONISER_5 0x185
97#define MADERA_FLL1_SYNCHRONISER_6 0x186
98#define MADERA_FLL1_SYNCHRONISER_7 0x187
99#define MADERA_FLL1_SPREAD_SPECTRUM 0x189
100#define MADERA_FLL1_GPIO_CLOCK 0x18A
101#define MADERA_FLL2_CONTROL_1 0x191
102#define MADERA_FLL2_CONTROL_2 0x192
103#define MADERA_FLL2_CONTROL_3 0x193
104#define MADERA_FLL2_CONTROL_4 0x194
105#define MADERA_FLL2_CONTROL_5 0x195
106#define MADERA_FLL2_CONTROL_6 0x196
107#define MADERA_FLL2_LOOP_FILTER_TEST_1 0x197
108#define MADERA_FLL2_NCO_TEST_0 0x198
109#define MADERA_FLL2_CONTROL_7 0x199
110#define MADERA_FLL2_EFS_2 0x19A
111#define MADERA_FLL2_SYNCHRONISER_1 0x1A1
112#define MADERA_FLL2_SYNCHRONISER_2 0x1A2
113#define MADERA_FLL2_SYNCHRONISER_3 0x1A3
114#define MADERA_FLL2_SYNCHRONISER_4 0x1A4
115#define MADERA_FLL2_SYNCHRONISER_5 0x1A5
116#define MADERA_FLL2_SYNCHRONISER_6 0x1A6
117#define MADERA_FLL2_SYNCHRONISER_7 0x1A7
118#define MADERA_FLL2_SPREAD_SPECTRUM 0x1A9
119#define MADERA_FLL2_GPIO_CLOCK 0x1AA
120#define MADERA_FLL3_CONTROL_1 0x1B1
121#define MADERA_FLL3_CONTROL_2 0x1B2
122#define MADERA_FLL3_CONTROL_3 0x1B3
123#define MADERA_FLL3_CONTROL_4 0x1B4
124#define MADERA_FLL3_CONTROL_5 0x1B5
125#define MADERA_FLL3_CONTROL_6 0x1B6
126#define MADERA_FLL3_LOOP_FILTER_TEST_1 0x1B7
127#define MADERA_FLL3_NCO_TEST_0 0x1B8
128#define MADERA_FLL3_CONTROL_7 0x1B9
129#define MADERA_FLL3_SYNCHRONISER_1 0x1C1
130#define MADERA_FLL3_SYNCHRONISER_2 0x1C2
131#define MADERA_FLL3_SYNCHRONISER_3 0x1C3
132#define MADERA_FLL3_SYNCHRONISER_4 0x1C4
133#define MADERA_FLL3_SYNCHRONISER_5 0x1C5
134#define MADERA_FLL3_SYNCHRONISER_6 0x1C6
135#define MADERA_FLL3_SYNCHRONISER_7 0x1C7
136#define MADERA_FLL3_SPREAD_SPECTRUM 0x1C9
137#define MADERA_FLL3_GPIO_CLOCK 0x1CA
138#define MADERA_FLLAO_CONTROL_1 0x1D1
139#define MADERA_FLLAO_CONTROL_2 0x1D2
140#define MADERA_FLLAO_CONTROL_3 0x1D3
141#define MADERA_FLLAO_CONTROL_4 0x1D4
142#define MADERA_FLLAO_CONTROL_5 0x1D5
143#define MADERA_FLLAO_CONTROL_6 0x1D6
144#define MADERA_FLLAO_CONTROL_7 0x1D8
145#define MADERA_FLLAO_CONTROL_8 0x1DA
146#define MADERA_FLLAO_CONTROL_9 0x1DB
147#define MADERA_FLLAO_CONTROL_10 0x1DC
148#define MADERA_FLLAO_CONTROL_11 0x1DD
149#define MADERA_MIC_CHARGE_PUMP_1 0x200
150#define MADERA_HP_CHARGE_PUMP_8 0x20B
151#define MADERA_LDO1_CONTROL_1 0x210
152#define MADERA_LDO2_CONTROL_1 0x213
153#define MADERA_MIC_BIAS_CTRL_1 0x218
154#define MADERA_MIC_BIAS_CTRL_2 0x219
155#define MADERA_MIC_BIAS_CTRL_3 0x21A
156#define MADERA_MIC_BIAS_CTRL_4 0x21B
157#define MADERA_MIC_BIAS_CTRL_5 0x21C
158#define MADERA_MIC_BIAS_CTRL_6 0x21E
159#define MADERA_HP_CTRL_1L 0x225
160#define MADERA_HP_CTRL_1R 0x226
161#define MADERA_HP_CTRL_2L 0x227
162#define MADERA_HP_CTRL_2R 0x228
163#define MADERA_HP_CTRL_3L 0x229
164#define MADERA_HP_CTRL_3R 0x22A
165#define MADERA_DCS_HP1L_CONTROL 0x232
166#define MADERA_DCS_HP1R_CONTROL 0x238
167#define MADERA_EDRE_HP_STEREO_CONTROL 0x27E
168#define MADERA_ACCESSORY_DETECT_MODE_1 0x293
169#define MADERA_HEADPHONE_DETECT_0 0x299
170#define MADERA_HEADPHONE_DETECT_1 0x29B
171#define MADERA_HEADPHONE_DETECT_2 0x29C
172#define MADERA_HEADPHONE_DETECT_3 0x29D
173#define MADERA_HEADPHONE_DETECT_4 0x29E
174#define MADERA_HEADPHONE_DETECT_5 0x29F
175#define MADERA_MIC_DETECT_1_CONTROL_0 0x2A2
176#define MADERA_MIC_DETECT_1_CONTROL_1 0x2A3
177#define MADERA_MIC_DETECT_1_CONTROL_2 0x2A4
178#define MADERA_MIC_DETECT_1_CONTROL_3 0x2A5
179#define MADERA_MIC_DETECT_1_LEVEL_1 0x2A6
180#define MADERA_MIC_DETECT_1_LEVEL_2 0x2A7
181#define MADERA_MIC_DETECT_1_LEVEL_3 0x2A8
182#define MADERA_MIC_DETECT_1_LEVEL_4 0x2A9
183#define MADERA_MIC_DETECT_1_CONTROL_4 0x2AB
184#define MADERA_MIC_DETECT_2_CONTROL_0 0x2B2
185#define MADERA_MIC_DETECT_2_CONTROL_1 0x2B3
186#define MADERA_MIC_DETECT_2_CONTROL_2 0x2B4
187#define MADERA_MIC_DETECT_2_CONTROL_3 0x2B5
188#define MADERA_MIC_DETECT_2_LEVEL_1 0x2B6
189#define MADERA_MIC_DETECT_2_LEVEL_2 0x2B7
190#define MADERA_MIC_DETECT_2_LEVEL_3 0x2B8
191#define MADERA_MIC_DETECT_2_LEVEL_4 0x2B9
192#define MADERA_MIC_DETECT_2_CONTROL_4 0x2BB
193#define MADERA_MICD_CLAMP_CONTROL 0x2C6
194#define MADERA_GP_SWITCH_1 0x2C8
195#define MADERA_JACK_DETECT_ANALOGUE 0x2D3
196#define MADERA_INPUT_ENABLES 0x300
197#define MADERA_INPUT_ENABLES_STATUS 0x301
198#define MADERA_INPUT_RATE 0x308
199#define MADERA_INPUT_VOLUME_RAMP 0x309
200#define MADERA_HPF_CONTROL 0x30C
201#define MADERA_IN1L_CONTROL 0x310
202#define MADERA_ADC_DIGITAL_VOLUME_1L 0x311
203#define MADERA_DMIC1L_CONTROL 0x312
204#define MADERA_IN1L_RATE_CONTROL 0x313
205#define MADERA_IN1R_CONTROL 0x314
206#define MADERA_ADC_DIGITAL_VOLUME_1R 0x315
207#define MADERA_DMIC1R_CONTROL 0x316
208#define MADERA_IN1R_RATE_CONTROL 0x317
209#define MADERA_IN2L_CONTROL 0x318
210#define MADERA_ADC_DIGITAL_VOLUME_2L 0x319
211#define MADERA_DMIC2L_CONTROL 0x31A
212#define MADERA_IN2L_RATE_CONTROL 0x31B
213#define MADERA_IN2R_CONTROL 0x31C
214#define MADERA_ADC_DIGITAL_VOLUME_2R 0x31D
215#define MADERA_DMIC2R_CONTROL 0x31E
216#define MADERA_IN2R_RATE_CONTROL 0x31F
217#define MADERA_IN3L_CONTROL 0x320
218#define MADERA_ADC_DIGITAL_VOLUME_3L 0x321
219#define MADERA_DMIC3L_CONTROL 0x322
220#define MADERA_IN3L_RATE_CONTROL 0x323
221#define MADERA_IN3R_CONTROL 0x324
222#define MADERA_ADC_DIGITAL_VOLUME_3R 0x325
223#define MADERA_DMIC3R_CONTROL 0x326
224#define MADERA_IN3R_RATE_CONTROL 0x327
225#define MADERA_IN4L_CONTROL 0x328
226#define MADERA_ADC_DIGITAL_VOLUME_4L 0x329
227#define MADERA_DMIC4L_CONTROL 0x32A
228#define MADERA_IN4L_RATE_CONTROL 0x32B
229#define MADERA_IN4R_CONTROL 0x32C
230#define MADERA_ADC_DIGITAL_VOLUME_4R 0x32D
231#define MADERA_DMIC4R_CONTROL 0x32E
232#define MADERA_IN4R_RATE_CONTROL 0x32F
233#define MADERA_IN5L_CONTROL 0x330
234#define MADERA_ADC_DIGITAL_VOLUME_5L 0x331
235#define MADERA_DMIC5L_CONTROL 0x332
236#define MADERA_IN5L_RATE_CONTROL 0x333
237#define MADERA_IN5R_CONTROL 0x334
238#define MADERA_ADC_DIGITAL_VOLUME_5R 0x335
239#define MADERA_DMIC5R_CONTROL 0x336
240#define MADERA_IN5R_RATE_CONTROL 0x337
241#define MADERA_IN6L_CONTROL 0x338
242#define MADERA_ADC_DIGITAL_VOLUME_6L 0x339
243#define MADERA_DMIC6L_CONTROL 0x33A
244#define MADERA_IN6R_CONTROL 0x33C
245#define MADERA_ADC_DIGITAL_VOLUME_6R 0x33D
246#define MADERA_DMIC6R_CONTROL 0x33E
247#define MADERA_OUTPUT_ENABLES_1 0x400
248#define MADERA_OUTPUT_STATUS_1 0x401
249#define MADERA_RAW_OUTPUT_STATUS_1 0x406
250#define MADERA_OUTPUT_RATE_1 0x408
251#define MADERA_OUTPUT_VOLUME_RAMP 0x409
252#define MADERA_OUTPUT_PATH_CONFIG_1L 0x410
253#define MADERA_DAC_DIGITAL_VOLUME_1L 0x411
254#define MADERA_OUTPUT_PATH_CONFIG_1 0x412
255#define MADERA_NOISE_GATE_SELECT_1L 0x413
256#define MADERA_OUTPUT_PATH_CONFIG_1R 0x414
257#define MADERA_DAC_DIGITAL_VOLUME_1R 0x415
258#define MADERA_NOISE_GATE_SELECT_1R 0x417
259#define MADERA_OUTPUT_PATH_CONFIG_2L 0x418
260#define MADERA_DAC_DIGITAL_VOLUME_2L 0x419
261#define MADERA_OUTPUT_PATH_CONFIG_2 0x41A
262#define MADERA_NOISE_GATE_SELECT_2L 0x41B
263#define MADERA_OUTPUT_PATH_CONFIG_2R 0x41C
264#define MADERA_DAC_DIGITAL_VOLUME_2R 0x41D
265#define MADERA_NOISE_GATE_SELECT_2R 0x41F
266#define MADERA_OUTPUT_PATH_CONFIG_3L 0x420
267#define MADERA_DAC_DIGITAL_VOLUME_3L 0x421
268#define MADERA_NOISE_GATE_SELECT_3L 0x423
269#define MADERA_OUTPUT_PATH_CONFIG_3R 0x424
270#define MADERA_DAC_DIGITAL_VOLUME_3R 0x425
271#define MADERA_NOISE_GATE_SELECT_3R 0x427
272#define MADERA_OUTPUT_PATH_CONFIG_4L 0x428
273#define MADERA_DAC_DIGITAL_VOLUME_4L 0x429
274#define MADERA_NOISE_GATE_SELECT_4L 0x42B
275#define MADERA_OUTPUT_PATH_CONFIG_4R 0x42C
276#define MADERA_DAC_DIGITAL_VOLUME_4R 0x42D
277#define MADERA_NOISE_GATE_SELECT_4R 0x42F
278#define MADERA_OUTPUT_PATH_CONFIG_5L 0x430
279#define MADERA_DAC_DIGITAL_VOLUME_5L 0x431
280#define MADERA_NOISE_GATE_SELECT_5L 0x433
281#define MADERA_OUTPUT_PATH_CONFIG_5R 0x434
282#define MADERA_DAC_DIGITAL_VOLUME_5R 0x435
283#define MADERA_NOISE_GATE_SELECT_5R 0x437
284#define MADERA_OUTPUT_PATH_CONFIG_6L 0x438
285#define MADERA_DAC_DIGITAL_VOLUME_6L 0x439
286#define MADERA_NOISE_GATE_SELECT_6L 0x43B
287#define MADERA_OUTPUT_PATH_CONFIG_6R 0x43C
288#define MADERA_DAC_DIGITAL_VOLUME_6R 0x43D
289#define MADERA_NOISE_GATE_SELECT_6R 0x43F
290#define MADERA_DRE_ENABLE 0x440
291#define MADERA_EDRE_ENABLE 0x448
292#define MADERA_EDRE_MANUAL 0x44A
293#define MADERA_DAC_AEC_CONTROL_1 0x450
294#define MADERA_DAC_AEC_CONTROL_2 0x451
295#define MADERA_NOISE_GATE_CONTROL 0x458
296#define MADERA_PDM_SPK1_CTRL_1 0x490
297#define MADERA_PDM_SPK1_CTRL_2 0x491
298#define MADERA_PDM_SPK2_CTRL_1 0x492
299#define MADERA_PDM_SPK2_CTRL_2 0x493
300#define MADERA_HP1_SHORT_CIRCUIT_CTRL 0x4A0
301#define MADERA_HP2_SHORT_CIRCUIT_CTRL 0x4A1
302#define MADERA_HP3_SHORT_CIRCUIT_CTRL 0x4A2
303#define MADERA_HP_TEST_CTRL_1 0x4A4
304#define MADERA_HP_TEST_CTRL_5 0x4A8
305#define MADERA_HP_TEST_CTRL_6 0x4A9
306#define MADERA_AIF1_BCLK_CTRL 0x500
307#define MADERA_AIF1_TX_PIN_CTRL 0x501
308#define MADERA_AIF1_RX_PIN_CTRL 0x502
309#define MADERA_AIF1_RATE_CTRL 0x503
310#define MADERA_AIF1_FORMAT 0x504
311#define MADERA_AIF1_RX_BCLK_RATE 0x506
312#define MADERA_AIF1_FRAME_CTRL_1 0x507
313#define MADERA_AIF1_FRAME_CTRL_2 0x508
314#define MADERA_AIF1_FRAME_CTRL_3 0x509
315#define MADERA_AIF1_FRAME_CTRL_4 0x50A
316#define MADERA_AIF1_FRAME_CTRL_5 0x50B
317#define MADERA_AIF1_FRAME_CTRL_6 0x50C
318#define MADERA_AIF1_FRAME_CTRL_7 0x50D
319#define MADERA_AIF1_FRAME_CTRL_8 0x50E
320#define MADERA_AIF1_FRAME_CTRL_9 0x50F
321#define MADERA_AIF1_FRAME_CTRL_10 0x510
322#define MADERA_AIF1_FRAME_CTRL_11 0x511
323#define MADERA_AIF1_FRAME_CTRL_12 0x512
324#define MADERA_AIF1_FRAME_CTRL_13 0x513
325#define MADERA_AIF1_FRAME_CTRL_14 0x514
326#define MADERA_AIF1_FRAME_CTRL_15 0x515
327#define MADERA_AIF1_FRAME_CTRL_16 0x516
328#define MADERA_AIF1_FRAME_CTRL_17 0x517
329#define MADERA_AIF1_FRAME_CTRL_18 0x518
330#define MADERA_AIF1_TX_ENABLES 0x519
331#define MADERA_AIF1_RX_ENABLES 0x51A
332#define MADERA_AIF1_FORCE_WRITE 0x51B
333#define MADERA_AIF2_BCLK_CTRL 0x540
334#define MADERA_AIF2_TX_PIN_CTRL 0x541
335#define MADERA_AIF2_RX_PIN_CTRL 0x542
336#define MADERA_AIF2_RATE_CTRL 0x543
337#define MADERA_AIF2_FORMAT 0x544
338#define MADERA_AIF2_RX_BCLK_RATE 0x546
339#define MADERA_AIF2_FRAME_CTRL_1 0x547
340#define MADERA_AIF2_FRAME_CTRL_2 0x548
341#define MADERA_AIF2_FRAME_CTRL_3 0x549
342#define MADERA_AIF2_FRAME_CTRL_4 0x54A
343#define MADERA_AIF2_FRAME_CTRL_5 0x54B
344#define MADERA_AIF2_FRAME_CTRL_6 0x54C
345#define MADERA_AIF2_FRAME_CTRL_7 0x54D
346#define MADERA_AIF2_FRAME_CTRL_8 0x54E
347#define MADERA_AIF2_FRAME_CTRL_9 0x54F
348#define MADERA_AIF2_FRAME_CTRL_10 0x550
349#define MADERA_AIF2_FRAME_CTRL_11 0x551
350#define MADERA_AIF2_FRAME_CTRL_12 0x552
351#define MADERA_AIF2_FRAME_CTRL_13 0x553
352#define MADERA_AIF2_FRAME_CTRL_14 0x554
353#define MADERA_AIF2_FRAME_CTRL_15 0x555
354#define MADERA_AIF2_FRAME_CTRL_16 0x556
355#define MADERA_AIF2_FRAME_CTRL_17 0x557
356#define MADERA_AIF2_FRAME_CTRL_18 0x558
357#define MADERA_AIF2_TX_ENABLES 0x559
358#define MADERA_AIF2_RX_ENABLES 0x55A
359#define MADERA_AIF2_FORCE_WRITE 0x55B
360#define MADERA_AIF3_BCLK_CTRL 0x580
361#define MADERA_AIF3_TX_PIN_CTRL 0x581
362#define MADERA_AIF3_RX_PIN_CTRL 0x582
363#define MADERA_AIF3_RATE_CTRL 0x583
364#define MADERA_AIF3_FORMAT 0x584
365#define MADERA_AIF3_RX_BCLK_RATE 0x586
366#define MADERA_AIF3_FRAME_CTRL_1 0x587
367#define MADERA_AIF3_FRAME_CTRL_2 0x588
368#define MADERA_AIF3_FRAME_CTRL_3 0x589
369#define MADERA_AIF3_FRAME_CTRL_4 0x58A
370#define MADERA_AIF3_FRAME_CTRL_11 0x591
371#define MADERA_AIF3_FRAME_CTRL_12 0x592
372#define MADERA_AIF3_TX_ENABLES 0x599
373#define MADERA_AIF3_RX_ENABLES 0x59A
374#define MADERA_AIF3_FORCE_WRITE 0x59B
375#define MADERA_AIF4_BCLK_CTRL 0x5A0
376#define MADERA_AIF4_TX_PIN_CTRL 0x5A1
377#define MADERA_AIF4_RX_PIN_CTRL 0x5A2
378#define MADERA_AIF4_RATE_CTRL 0x5A3
379#define MADERA_AIF4_FORMAT 0x5A4
380#define MADERA_AIF4_RX_BCLK_RATE 0x5A6
381#define MADERA_AIF4_FRAME_CTRL_1 0x5A7
382#define MADERA_AIF4_FRAME_CTRL_2 0x5A8
383#define MADERA_AIF4_FRAME_CTRL_3 0x5A9
384#define MADERA_AIF4_FRAME_CTRL_4 0x5AA
385#define MADERA_AIF4_FRAME_CTRL_11 0x5B1
386#define MADERA_AIF4_FRAME_CTRL_12 0x5B2
387#define MADERA_AIF4_TX_ENABLES 0x5B9
388#define MADERA_AIF4_RX_ENABLES 0x5BA
389#define MADERA_AIF4_FORCE_WRITE 0x5BB
390#define MADERA_SPD1_TX_CONTROL 0x5C2
391#define MADERA_SPD1_TX_CHANNEL_STATUS_1 0x5C3
392#define MADERA_SPD1_TX_CHANNEL_STATUS_2 0x5C4
393#define MADERA_SPD1_TX_CHANNEL_STATUS_3 0x5C5
394#define MADERA_SLIMBUS_FRAMER_REF_GEAR 0x5E3
395#define MADERA_SLIMBUS_RATES_1 0x5E5
396#define MADERA_SLIMBUS_RATES_2 0x5E6
397#define MADERA_SLIMBUS_RATES_3 0x5E7
398#define MADERA_SLIMBUS_RATES_4 0x5E8
399#define MADERA_SLIMBUS_RATES_5 0x5E9
400#define MADERA_SLIMBUS_RATES_6 0x5EA
401#define MADERA_SLIMBUS_RATES_7 0x5EB
402#define MADERA_SLIMBUS_RATES_8 0x5EC
403#define MADERA_SLIMBUS_RX_CHANNEL_ENABLE 0x5F5
404#define MADERA_SLIMBUS_TX_CHANNEL_ENABLE 0x5F6
405#define MADERA_SLIMBUS_RX_PORT_STATUS 0x5F7
406#define MADERA_SLIMBUS_TX_PORT_STATUS 0x5F8
407#define MADERA_PWM1MIX_INPUT_1_SOURCE 0x640
408#define MADERA_PWM1MIX_INPUT_1_VOLUME 0x641
409#define MADERA_PWM1MIX_INPUT_2_SOURCE 0x642
410#define MADERA_PWM1MIX_INPUT_2_VOLUME 0x643
411#define MADERA_PWM1MIX_INPUT_3_SOURCE 0x644
412#define MADERA_PWM1MIX_INPUT_3_VOLUME 0x645
413#define MADERA_PWM1MIX_INPUT_4_SOURCE 0x646
414#define MADERA_PWM1MIX_INPUT_4_VOLUME 0x647
415#define MADERA_PWM2MIX_INPUT_1_SOURCE 0x648
416#define MADERA_PWM2MIX_INPUT_1_VOLUME 0x649
417#define MADERA_PWM2MIX_INPUT_2_SOURCE 0x64A
418#define MADERA_PWM2MIX_INPUT_2_VOLUME 0x64B
419#define MADERA_PWM2MIX_INPUT_3_SOURCE 0x64C
420#define MADERA_PWM2MIX_INPUT_3_VOLUME 0x64D
421#define MADERA_PWM2MIX_INPUT_4_SOURCE 0x64E
422#define MADERA_PWM2MIX_INPUT_4_VOLUME 0x64F
423#define MADERA_OUT1LMIX_INPUT_1_SOURCE 0x680
424#define MADERA_OUT1LMIX_INPUT_1_VOLUME 0x681
425#define MADERA_OUT1LMIX_INPUT_2_SOURCE 0x682
426#define MADERA_OUT1LMIX_INPUT_2_VOLUME 0x683
427#define MADERA_OUT1LMIX_INPUT_3_SOURCE 0x684
428#define MADERA_OUT1LMIX_INPUT_3_VOLUME 0x685
429#define MADERA_OUT1LMIX_INPUT_4_SOURCE 0x686
430#define MADERA_OUT1LMIX_INPUT_4_VOLUME 0x687
431#define MADERA_OUT1RMIX_INPUT_1_SOURCE 0x688
432#define MADERA_OUT1RMIX_INPUT_1_VOLUME 0x689
433#define MADERA_OUT1RMIX_INPUT_2_SOURCE 0x68A
434#define MADERA_OUT1RMIX_INPUT_2_VOLUME 0x68B
435#define MADERA_OUT1RMIX_INPUT_3_SOURCE 0x68C
436#define MADERA_OUT1RMIX_INPUT_3_VOLUME 0x68D
437#define MADERA_OUT1RMIX_INPUT_4_SOURCE 0x68E
438#define MADERA_OUT1RMIX_INPUT_4_VOLUME 0x68F
439#define MADERA_OUT2LMIX_INPUT_1_SOURCE 0x690
440#define MADERA_OUT2LMIX_INPUT_1_VOLUME 0x691
441#define MADERA_OUT2LMIX_INPUT_2_SOURCE 0x692
442#define MADERA_OUT2LMIX_INPUT_2_VOLUME 0x693
443#define MADERA_OUT2LMIX_INPUT_3_SOURCE 0x694
444#define MADERA_OUT2LMIX_INPUT_3_VOLUME 0x695
445#define MADERA_OUT2LMIX_INPUT_4_SOURCE 0x696
446#define MADERA_OUT2LMIX_INPUT_4_VOLUME 0x697
447#define MADERA_OUT2RMIX_INPUT_1_SOURCE 0x698
448#define MADERA_OUT2RMIX_INPUT_1_VOLUME 0x699
449#define MADERA_OUT2RMIX_INPUT_2_SOURCE 0x69A
450#define MADERA_OUT2RMIX_INPUT_2_VOLUME 0x69B
451#define MADERA_OUT2RMIX_INPUT_3_SOURCE 0x69C
452#define MADERA_OUT2RMIX_INPUT_3_VOLUME 0x69D
453#define MADERA_OUT2RMIX_INPUT_4_SOURCE 0x69E
454#define MADERA_OUT2RMIX_INPUT_4_VOLUME 0x69F
455#define MADERA_OUT3LMIX_INPUT_1_SOURCE 0x6A0
456#define MADERA_OUT3LMIX_INPUT_1_VOLUME 0x6A1
457#define MADERA_OUT3LMIX_INPUT_2_SOURCE 0x6A2
458#define MADERA_OUT3LMIX_INPUT_2_VOLUME 0x6A3
459#define MADERA_OUT3LMIX_INPUT_3_SOURCE 0x6A4
460#define MADERA_OUT3LMIX_INPUT_3_VOLUME 0x6A5
461#define MADERA_OUT3LMIX_INPUT_4_SOURCE 0x6A6
462#define MADERA_OUT3LMIX_INPUT_4_VOLUME 0x6A7
463#define MADERA_OUT3RMIX_INPUT_1_SOURCE 0x6A8
464#define MADERA_OUT3RMIX_INPUT_1_VOLUME 0x6A9
465#define MADERA_OUT3RMIX_INPUT_2_SOURCE 0x6AA
466#define MADERA_OUT3RMIX_INPUT_2_VOLUME 0x6AB
467#define MADERA_OUT3RMIX_INPUT_3_SOURCE 0x6AC
468#define MADERA_OUT3RMIX_INPUT_3_VOLUME 0x6AD
469#define MADERA_OUT3RMIX_INPUT_4_SOURCE 0x6AE
470#define MADERA_OUT3RMIX_INPUT_4_VOLUME 0x6AF
471#define MADERA_OUT4LMIX_INPUT_1_SOURCE 0x6B0
472#define MADERA_OUT4LMIX_INPUT_1_VOLUME 0x6B1
473#define MADERA_OUT4LMIX_INPUT_2_SOURCE 0x6B2
474#define MADERA_OUT4LMIX_INPUT_2_VOLUME 0x6B3
475#define MADERA_OUT4LMIX_INPUT_3_SOURCE 0x6B4
476#define MADERA_OUT4LMIX_INPUT_3_VOLUME 0x6B5
477#define MADERA_OUT4LMIX_INPUT_4_SOURCE 0x6B6
478#define MADERA_OUT4LMIX_INPUT_4_VOLUME 0x6B7
479#define MADERA_OUT4RMIX_INPUT_1_SOURCE 0x6B8
480#define MADERA_OUT4RMIX_INPUT_1_VOLUME 0x6B9
481#define MADERA_OUT4RMIX_INPUT_2_SOURCE 0x6BA
482#define MADERA_OUT4RMIX_INPUT_2_VOLUME 0x6BB
483#define MADERA_OUT4RMIX_INPUT_3_SOURCE 0x6BC
484#define MADERA_OUT4RMIX_INPUT_3_VOLUME 0x6BD
485#define MADERA_OUT4RMIX_INPUT_4_SOURCE 0x6BE
486#define MADERA_OUT4RMIX_INPUT_4_VOLUME 0x6BF
487#define MADERA_OUT5LMIX_INPUT_1_SOURCE 0x6C0
488#define MADERA_OUT5LMIX_INPUT_1_VOLUME 0x6C1
489#define MADERA_OUT5LMIX_INPUT_2_SOURCE 0x6C2
490#define MADERA_OUT5LMIX_INPUT_2_VOLUME 0x6C3
491#define MADERA_OUT5LMIX_INPUT_3_SOURCE 0x6C4
492#define MADERA_OUT5LMIX_INPUT_3_VOLUME 0x6C5
493#define MADERA_OUT5LMIX_INPUT_4_SOURCE 0x6C6
494#define MADERA_OUT5LMIX_INPUT_4_VOLUME 0x6C7
495#define MADERA_OUT5RMIX_INPUT_1_SOURCE 0x6C8
496#define MADERA_OUT5RMIX_INPUT_1_VOLUME 0x6C9
497#define MADERA_OUT5RMIX_INPUT_2_SOURCE 0x6CA
498#define MADERA_OUT5RMIX_INPUT_2_VOLUME 0x6CB
499#define MADERA_OUT5RMIX_INPUT_3_SOURCE 0x6CC
500#define MADERA_OUT5RMIX_INPUT_3_VOLUME 0x6CD
501#define MADERA_OUT5RMIX_INPUT_4_SOURCE 0x6CE
502#define MADERA_OUT5RMIX_INPUT_4_VOLUME 0x6CF
503#define MADERA_OUT6LMIX_INPUT_1_SOURCE 0x6D0
504#define MADERA_OUT6LMIX_INPUT_1_VOLUME 0x6D1
505#define MADERA_OUT6LMIX_INPUT_2_SOURCE 0x6D2
506#define MADERA_OUT6LMIX_INPUT_2_VOLUME 0x6D3
507#define MADERA_OUT6LMIX_INPUT_3_SOURCE 0x6D4
508#define MADERA_OUT6LMIX_INPUT_3_VOLUME 0x6D5
509#define MADERA_OUT6LMIX_INPUT_4_SOURCE 0x6D6
510#define MADERA_OUT6LMIX_INPUT_4_VOLUME 0x6D7
511#define MADERA_OUT6RMIX_INPUT_1_SOURCE 0x6D8
512#define MADERA_OUT6RMIX_INPUT_1_VOLUME 0x6D9
513#define MADERA_OUT6RMIX_INPUT_2_SOURCE 0x6DA
514#define MADERA_OUT6RMIX_INPUT_2_VOLUME 0x6DB
515#define MADERA_OUT6RMIX_INPUT_3_SOURCE 0x6DC
516#define MADERA_OUT6RMIX_INPUT_3_VOLUME 0x6DD
517#define MADERA_OUT6RMIX_INPUT_4_SOURCE 0x6DE
518#define MADERA_OUT6RMIX_INPUT_4_VOLUME 0x6DF
519#define MADERA_AIF1TX1MIX_INPUT_1_SOURCE 0x700
520#define MADERA_AIF1TX1MIX_INPUT_1_VOLUME 0x701
521#define MADERA_AIF1TX1MIX_INPUT_2_SOURCE 0x702
522#define MADERA_AIF1TX1MIX_INPUT_2_VOLUME 0x703
523#define MADERA_AIF1TX1MIX_INPUT_3_SOURCE 0x704
524#define MADERA_AIF1TX1MIX_INPUT_3_VOLUME 0x705
525#define MADERA_AIF1TX1MIX_INPUT_4_SOURCE 0x706
526#define MADERA_AIF1TX1MIX_INPUT_4_VOLUME 0x707
527#define MADERA_AIF1TX2MIX_INPUT_1_SOURCE 0x708
528#define MADERA_AIF1TX2MIX_INPUT_1_VOLUME 0x709
529#define MADERA_AIF1TX2MIX_INPUT_2_SOURCE 0x70A
530#define MADERA_AIF1TX2MIX_INPUT_2_VOLUME 0x70B
531#define MADERA_AIF1TX2MIX_INPUT_3_SOURCE 0x70C
532#define MADERA_AIF1TX2MIX_INPUT_3_VOLUME 0x70D
533#define MADERA_AIF1TX2MIX_INPUT_4_SOURCE 0x70E
534#define MADERA_AIF1TX2MIX_INPUT_4_VOLUME 0x70F
535#define MADERA_AIF1TX3MIX_INPUT_1_SOURCE 0x710
536#define MADERA_AIF1TX3MIX_INPUT_1_VOLUME 0x711
537#define MADERA_AIF1TX3MIX_INPUT_2_SOURCE 0x712
538#define MADERA_AIF1TX3MIX_INPUT_2_VOLUME 0x713
539#define MADERA_AIF1TX3MIX_INPUT_3_SOURCE 0x714
540#define MADERA_AIF1TX3MIX_INPUT_3_VOLUME 0x715
541#define MADERA_AIF1TX3MIX_INPUT_4_SOURCE 0x716
542#define MADERA_AIF1TX3MIX_INPUT_4_VOLUME 0x717
543#define MADERA_AIF1TX4MIX_INPUT_1_SOURCE 0x718
544#define MADERA_AIF1TX4MIX_INPUT_1_VOLUME 0x719
545#define MADERA_AIF1TX4MIX_INPUT_2_SOURCE 0x71A
546#define MADERA_AIF1TX4MIX_INPUT_2_VOLUME 0x71B
547#define MADERA_AIF1TX4MIX_INPUT_3_SOURCE 0x71C
548#define MADERA_AIF1TX4MIX_INPUT_3_VOLUME 0x71D
549#define MADERA_AIF1TX4MIX_INPUT_4_SOURCE 0x71E
550#define MADERA_AIF1TX4MIX_INPUT_4_VOLUME 0x71F
551#define MADERA_AIF1TX5MIX_INPUT_1_SOURCE 0x720
552#define MADERA_AIF1TX5MIX_INPUT_1_VOLUME 0x721
553#define MADERA_AIF1TX5MIX_INPUT_2_SOURCE 0x722
554#define MADERA_AIF1TX5MIX_INPUT_2_VOLUME 0x723
555#define MADERA_AIF1TX5MIX_INPUT_3_SOURCE 0x724
556#define MADERA_AIF1TX5MIX_INPUT_3_VOLUME 0x725
557#define MADERA_AIF1TX5MIX_INPUT_4_SOURCE 0x726
558#define MADERA_AIF1TX5MIX_INPUT_4_VOLUME 0x727
559#define MADERA_AIF1TX6MIX_INPUT_1_SOURCE 0x728
560#define MADERA_AIF1TX6MIX_INPUT_1_VOLUME 0x729
561#define MADERA_AIF1TX6MIX_INPUT_2_SOURCE 0x72A
562#define MADERA_AIF1TX6MIX_INPUT_2_VOLUME 0x72B
563#define MADERA_AIF1TX6MIX_INPUT_3_SOURCE 0x72C
564#define MADERA_AIF1TX6MIX_INPUT_3_VOLUME 0x72D
565#define MADERA_AIF1TX6MIX_INPUT_4_SOURCE 0x72E
566#define MADERA_AIF1TX6MIX_INPUT_4_VOLUME 0x72F
567#define MADERA_AIF1TX7MIX_INPUT_1_SOURCE 0x730
568#define MADERA_AIF1TX7MIX_INPUT_1_VOLUME 0x731
569#define MADERA_AIF1TX7MIX_INPUT_2_SOURCE 0x732
570#define MADERA_AIF1TX7MIX_INPUT_2_VOLUME 0x733
571#define MADERA_AIF1TX7MIX_INPUT_3_SOURCE 0x734
572#define MADERA_AIF1TX7MIX_INPUT_3_VOLUME 0x735
573#define MADERA_AIF1TX7MIX_INPUT_4_SOURCE 0x736
574#define MADERA_AIF1TX7MIX_INPUT_4_VOLUME 0x737
575#define MADERA_AIF1TX8MIX_INPUT_1_SOURCE 0x738
576#define MADERA_AIF1TX8MIX_INPUT_1_VOLUME 0x739
577#define MADERA_AIF1TX8MIX_INPUT_2_SOURCE 0x73A
578#define MADERA_AIF1TX8MIX_INPUT_2_VOLUME 0x73B
579#define MADERA_AIF1TX8MIX_INPUT_3_SOURCE 0x73C
580#define MADERA_AIF1TX8MIX_INPUT_3_VOLUME 0x73D
581#define MADERA_AIF1TX8MIX_INPUT_4_SOURCE 0x73E
582#define MADERA_AIF1TX8MIX_INPUT_4_VOLUME 0x73F
583#define MADERA_AIF2TX1MIX_INPUT_1_SOURCE 0x740
584#define MADERA_AIF2TX1MIX_INPUT_1_VOLUME 0x741
585#define MADERA_AIF2TX1MIX_INPUT_2_SOURCE 0x742
586#define MADERA_AIF2TX1MIX_INPUT_2_VOLUME 0x743
587#define MADERA_AIF2TX1MIX_INPUT_3_SOURCE 0x744
588#define MADERA_AIF2TX1MIX_INPUT_3_VOLUME 0x745
589#define MADERA_AIF2TX1MIX_INPUT_4_SOURCE 0x746
590#define MADERA_AIF2TX1MIX_INPUT_4_VOLUME 0x747
591#define MADERA_AIF2TX2MIX_INPUT_1_SOURCE 0x748
592#define MADERA_AIF2TX2MIX_INPUT_1_VOLUME 0x749
593#define MADERA_AIF2TX2MIX_INPUT_2_SOURCE 0x74A
594#define MADERA_AIF2TX2MIX_INPUT_2_VOLUME 0x74B
595#define MADERA_AIF2TX2MIX_INPUT_3_SOURCE 0x74C
596#define MADERA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D
597#define MADERA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E
598#define MADERA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F
599#define MADERA_AIF2TX3MIX_INPUT_1_SOURCE 0x750
600#define MADERA_AIF2TX3MIX_INPUT_1_VOLUME 0x751
601#define MADERA_AIF2TX3MIX_INPUT_2_SOURCE 0x752
602#define MADERA_AIF2TX3MIX_INPUT_2_VOLUME 0x753
603#define MADERA_AIF2TX3MIX_INPUT_3_SOURCE 0x754
604#define MADERA_AIF2TX3MIX_INPUT_3_VOLUME 0x755
605#define MADERA_AIF2TX3MIX_INPUT_4_SOURCE 0x756
606#define MADERA_AIF2TX3MIX_INPUT_4_VOLUME 0x757
607#define MADERA_AIF2TX4MIX_INPUT_1_SOURCE 0x758
608#define MADERA_AIF2TX4MIX_INPUT_1_VOLUME 0x759
609#define MADERA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A
610#define MADERA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B
611#define MADERA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C
612#define MADERA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D
613#define MADERA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E
614#define MADERA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F
615#define MADERA_AIF2TX5MIX_INPUT_1_SOURCE 0x760
616#define MADERA_AIF2TX5MIX_INPUT_1_VOLUME 0x761
617#define MADERA_AIF2TX5MIX_INPUT_2_SOURCE 0x762
618#define MADERA_AIF2TX5MIX_INPUT_2_VOLUME 0x763
619#define MADERA_AIF2TX5MIX_INPUT_3_SOURCE 0x764
620#define MADERA_AIF2TX5MIX_INPUT_3_VOLUME 0x765
621#define MADERA_AIF2TX5MIX_INPUT_4_SOURCE 0x766
622#define MADERA_AIF2TX5MIX_INPUT_4_VOLUME 0x767
623#define MADERA_AIF2TX6MIX_INPUT_1_SOURCE 0x768
624#define MADERA_AIF2TX6MIX_INPUT_1_VOLUME 0x769
625#define MADERA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A
626#define MADERA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B
627#define MADERA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C
628#define MADERA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D
629#define MADERA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E
630#define MADERA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F
631#define MADERA_AIF2TX7MIX_INPUT_1_SOURCE 0x770
632#define MADERA_AIF2TX7MIX_INPUT_1_VOLUME 0x771
633#define MADERA_AIF2TX7MIX_INPUT_2_SOURCE 0x772
634#define MADERA_AIF2TX7MIX_INPUT_2_VOLUME 0x773
635#define MADERA_AIF2TX7MIX_INPUT_3_SOURCE 0x774
636#define MADERA_AIF2TX7MIX_INPUT_3_VOLUME 0x775
637#define MADERA_AIF2TX7MIX_INPUT_4_SOURCE 0x776
638#define MADERA_AIF2TX7MIX_INPUT_4_VOLUME 0x777
639#define MADERA_AIF2TX8MIX_INPUT_1_SOURCE 0x778
640#define MADERA_AIF2TX8MIX_INPUT_1_VOLUME 0x779
641#define MADERA_AIF2TX8MIX_INPUT_2_SOURCE 0x77A
642#define MADERA_AIF2TX8MIX_INPUT_2_VOLUME 0x77B
643#define MADERA_AIF2TX8MIX_INPUT_3_SOURCE 0x77C
644#define MADERA_AIF2TX8MIX_INPUT_3_VOLUME 0x77D
645#define MADERA_AIF2TX8MIX_INPUT_4_SOURCE 0x77E
646#define MADERA_AIF2TX8MIX_INPUT_4_VOLUME 0x77F
647#define MADERA_AIF3TX1MIX_INPUT_1_SOURCE 0x780
648#define MADERA_AIF3TX1MIX_INPUT_1_VOLUME 0x781
649#define MADERA_AIF3TX1MIX_INPUT_2_SOURCE 0x782
650#define MADERA_AIF3TX1MIX_INPUT_2_VOLUME 0x783
651#define MADERA_AIF3TX1MIX_INPUT_3_SOURCE 0x784
652#define MADERA_AIF3TX1MIX_INPUT_3_VOLUME 0x785
653#define MADERA_AIF3TX1MIX_INPUT_4_SOURCE 0x786
654#define MADERA_AIF3TX1MIX_INPUT_4_VOLUME 0x787
655#define MADERA_AIF3TX2MIX_INPUT_1_SOURCE 0x788
656#define MADERA_AIF3TX2MIX_INPUT_1_VOLUME 0x789
657#define MADERA_AIF3TX2MIX_INPUT_2_SOURCE 0x78A
658#define MADERA_AIF3TX2MIX_INPUT_2_VOLUME 0x78B
659#define MADERA_AIF3TX2MIX_INPUT_3_SOURCE 0x78C
660#define MADERA_AIF3TX2MIX_INPUT_3_VOLUME 0x78D
661#define MADERA_AIF3TX2MIX_INPUT_4_SOURCE 0x78E
662#define MADERA_AIF3TX2MIX_INPUT_4_VOLUME 0x78F
663#define MADERA_AIF4TX1MIX_INPUT_1_SOURCE 0x7A0
664#define MADERA_AIF4TX1MIX_INPUT_1_VOLUME 0x7A1
665#define MADERA_AIF4TX1MIX_INPUT_2_SOURCE 0x7A2
666#define MADERA_AIF4TX1MIX_INPUT_2_VOLUME 0x7A3
667#define MADERA_AIF4TX1MIX_INPUT_3_SOURCE 0x7A4
668#define MADERA_AIF4TX1MIX_INPUT_3_VOLUME 0x7A5
669#define MADERA_AIF4TX1MIX_INPUT_4_SOURCE 0x7A6
670#define MADERA_AIF4TX1MIX_INPUT_4_VOLUME 0x7A7
671#define MADERA_AIF4TX2MIX_INPUT_1_SOURCE 0x7A8
672#define MADERA_AIF4TX2MIX_INPUT_1_VOLUME 0x7A9
673#define MADERA_AIF4TX2MIX_INPUT_2_SOURCE 0x7AA
674#define MADERA_AIF4TX2MIX_INPUT_2_VOLUME 0x7AB
675#define MADERA_AIF4TX2MIX_INPUT_3_SOURCE 0x7AC
676#define MADERA_AIF4TX2MIX_INPUT_3_VOLUME 0x7AD
677#define MADERA_AIF4TX2MIX_INPUT_4_SOURCE 0x7AE
678#define MADERA_AIF4TX2MIX_INPUT_4_VOLUME 0x7AF
679#define MADERA_SLIMTX1MIX_INPUT_1_SOURCE 0x7C0
680#define MADERA_SLIMTX1MIX_INPUT_1_VOLUME 0x7C1
681#define MADERA_SLIMTX1MIX_INPUT_2_SOURCE 0x7C2
682#define MADERA_SLIMTX1MIX_INPUT_2_VOLUME 0x7C3
683#define MADERA_SLIMTX1MIX_INPUT_3_SOURCE 0x7C4
684#define MADERA_SLIMTX1MIX_INPUT_3_VOLUME 0x7C5
685#define MADERA_SLIMTX1MIX_INPUT_4_SOURCE 0x7C6
686#define MADERA_SLIMTX1MIX_INPUT_4_VOLUME 0x7C7
687#define MADERA_SLIMTX2MIX_INPUT_1_SOURCE 0x7C8
688#define MADERA_SLIMTX2MIX_INPUT_1_VOLUME 0x7C9
689#define MADERA_SLIMTX2MIX_INPUT_2_SOURCE 0x7CA
690#define MADERA_SLIMTX2MIX_INPUT_2_VOLUME 0x7CB
691#define MADERA_SLIMTX2MIX_INPUT_3_SOURCE 0x7CC
692#define MADERA_SLIMTX2MIX_INPUT_3_VOLUME 0x7CD
693#define MADERA_SLIMTX2MIX_INPUT_4_SOURCE 0x7CE
694#define MADERA_SLIMTX2MIX_INPUT_4_VOLUME 0x7CF
695#define MADERA_SLIMTX3MIX_INPUT_1_SOURCE 0x7D0
696#define MADERA_SLIMTX3MIX_INPUT_1_VOLUME 0x7D1
697#define MADERA_SLIMTX3MIX_INPUT_2_SOURCE 0x7D2
698#define MADERA_SLIMTX3MIX_INPUT_2_VOLUME 0x7D3
699#define MADERA_SLIMTX3MIX_INPUT_3_SOURCE 0x7D4
700#define MADERA_SLIMTX3MIX_INPUT_3_VOLUME 0x7D5
701#define MADERA_SLIMTX3MIX_INPUT_4_SOURCE 0x7D6
702#define MADERA_SLIMTX3MIX_INPUT_4_VOLUME 0x7D7
703#define MADERA_SLIMTX4MIX_INPUT_1_SOURCE 0x7D8
704#define MADERA_SLIMTX4MIX_INPUT_1_VOLUME 0x7D9
705#define MADERA_SLIMTX4MIX_INPUT_2_SOURCE 0x7DA
706#define MADERA_SLIMTX4MIX_INPUT_2_VOLUME 0x7DB
707#define MADERA_SLIMTX4MIX_INPUT_3_SOURCE 0x7DC
708#define MADERA_SLIMTX4MIX_INPUT_3_VOLUME 0x7DD
709#define MADERA_SLIMTX4MIX_INPUT_4_SOURCE 0x7DE
710#define MADERA_SLIMTX4MIX_INPUT_4_VOLUME 0x7DF
711#define MADERA_SLIMTX5MIX_INPUT_1_SOURCE 0x7E0
712#define MADERA_SLIMTX5MIX_INPUT_1_VOLUME 0x7E1
713#define MADERA_SLIMTX5MIX_INPUT_2_SOURCE 0x7E2
714#define MADERA_SLIMTX5MIX_INPUT_2_VOLUME 0x7E3
715#define MADERA_SLIMTX5MIX_INPUT_3_SOURCE 0x7E4
716#define MADERA_SLIMTX5MIX_INPUT_3_VOLUME 0x7E5
717#define MADERA_SLIMTX5MIX_INPUT_4_SOURCE 0x7E6
718#define MADERA_SLIMTX5MIX_INPUT_4_VOLUME 0x7E7
719#define MADERA_SLIMTX6MIX_INPUT_1_SOURCE 0x7E8
720#define MADERA_SLIMTX6MIX_INPUT_1_VOLUME 0x7E9
721#define MADERA_SLIMTX6MIX_INPUT_2_SOURCE 0x7EA
722#define MADERA_SLIMTX6MIX_INPUT_2_VOLUME 0x7EB
723#define MADERA_SLIMTX6MIX_INPUT_3_SOURCE 0x7EC
724#define MADERA_SLIMTX6MIX_INPUT_3_VOLUME 0x7ED
725#define MADERA_SLIMTX6MIX_INPUT_4_SOURCE 0x7EE
726#define MADERA_SLIMTX6MIX_INPUT_4_VOLUME 0x7EF
727#define MADERA_SLIMTX7MIX_INPUT_1_SOURCE 0x7F0
728#define MADERA_SLIMTX7MIX_INPUT_1_VOLUME 0x7F1
729#define MADERA_SLIMTX7MIX_INPUT_2_SOURCE 0x7F2
730#define MADERA_SLIMTX7MIX_INPUT_2_VOLUME 0x7F3
731#define MADERA_SLIMTX7MIX_INPUT_3_SOURCE 0x7F4
732#define MADERA_SLIMTX7MIX_INPUT_3_VOLUME 0x7F5
733#define MADERA_SLIMTX7MIX_INPUT_4_SOURCE 0x7F6
734#define MADERA_SLIMTX7MIX_INPUT_4_VOLUME 0x7F7
735#define MADERA_SLIMTX8MIX_INPUT_1_SOURCE 0x7F8
736#define MADERA_SLIMTX8MIX_INPUT_1_VOLUME 0x7F9
737#define MADERA_SLIMTX8MIX_INPUT_2_SOURCE 0x7FA
738#define MADERA_SLIMTX8MIX_INPUT_2_VOLUME 0x7FB
739#define MADERA_SLIMTX8MIX_INPUT_3_SOURCE 0x7FC
740#define MADERA_SLIMTX8MIX_INPUT_3_VOLUME 0x7FD
741#define MADERA_SLIMTX8MIX_INPUT_4_SOURCE 0x7FE
742#define MADERA_SLIMTX8MIX_INPUT_4_VOLUME 0x7FF
743#define MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE 0x800
744#define MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME 0x801
745#define MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE 0x808
746#define MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME 0x809
747#define MADERA_EQ1MIX_INPUT_1_SOURCE 0x880
748#define MADERA_EQ1MIX_INPUT_1_VOLUME 0x881
749#define MADERA_EQ1MIX_INPUT_2_SOURCE 0x882
750#define MADERA_EQ1MIX_INPUT_2_VOLUME 0x883
751#define MADERA_EQ1MIX_INPUT_3_SOURCE 0x884
752#define MADERA_EQ1MIX_INPUT_3_VOLUME 0x885
753#define MADERA_EQ1MIX_INPUT_4_SOURCE 0x886
754#define MADERA_EQ1MIX_INPUT_4_VOLUME 0x887
755#define MADERA_EQ2MIX_INPUT_1_SOURCE 0x888
756#define MADERA_EQ2MIX_INPUT_1_VOLUME 0x889
757#define MADERA_EQ2MIX_INPUT_2_SOURCE 0x88A
758#define MADERA_EQ2MIX_INPUT_2_VOLUME 0x88B
759#define MADERA_EQ2MIX_INPUT_3_SOURCE 0x88C
760#define MADERA_EQ2MIX_INPUT_3_VOLUME 0x88D
761#define MADERA_EQ2MIX_INPUT_4_SOURCE 0x88E
762#define MADERA_EQ2MIX_INPUT_4_VOLUME 0x88F
763#define MADERA_EQ3MIX_INPUT_1_SOURCE 0x890
764#define MADERA_EQ3MIX_INPUT_1_VOLUME 0x891
765#define MADERA_EQ3MIX_INPUT_2_SOURCE 0x892
766#define MADERA_EQ3MIX_INPUT_2_VOLUME 0x893
767#define MADERA_EQ3MIX_INPUT_3_SOURCE 0x894
768#define MADERA_EQ3MIX_INPUT_3_VOLUME 0x895
769#define MADERA_EQ3MIX_INPUT_4_SOURCE 0x896
770#define MADERA_EQ3MIX_INPUT_4_VOLUME 0x897
771#define MADERA_EQ4MIX_INPUT_1_SOURCE 0x898
772#define MADERA_EQ4MIX_INPUT_1_VOLUME 0x899
773#define MADERA_EQ4MIX_INPUT_2_SOURCE 0x89A
774#define MADERA_EQ4MIX_INPUT_2_VOLUME 0x89B
775#define MADERA_EQ4MIX_INPUT_3_SOURCE 0x89C
776#define MADERA_EQ4MIX_INPUT_3_VOLUME 0x89D
777#define MADERA_EQ4MIX_INPUT_4_SOURCE 0x89E
778#define MADERA_EQ4MIX_INPUT_4_VOLUME 0x89F
779#define MADERA_DRC1LMIX_INPUT_1_SOURCE 0x8C0
780#define MADERA_DRC1LMIX_INPUT_1_VOLUME 0x8C1
781#define MADERA_DRC1LMIX_INPUT_2_SOURCE 0x8C2
782#define MADERA_DRC1LMIX_INPUT_2_VOLUME 0x8C3
783#define MADERA_DRC1LMIX_INPUT_3_SOURCE 0x8C4
784#define MADERA_DRC1LMIX_INPUT_3_VOLUME 0x8C5
785#define MADERA_DRC1LMIX_INPUT_4_SOURCE 0x8C6
786#define MADERA_DRC1LMIX_INPUT_4_VOLUME 0x8C7
787#define MADERA_DRC1RMIX_INPUT_1_SOURCE 0x8C8
788#define MADERA_DRC1RMIX_INPUT_1_VOLUME 0x8C9
789#define MADERA_DRC1RMIX_INPUT_2_SOURCE 0x8CA
790#define MADERA_DRC1RMIX_INPUT_2_VOLUME 0x8CB
791#define MADERA_DRC1RMIX_INPUT_3_SOURCE 0x8CC
792#define MADERA_DRC1RMIX_INPUT_3_VOLUME 0x8CD
793#define MADERA_DRC1RMIX_INPUT_4_SOURCE 0x8CE
794#define MADERA_DRC1RMIX_INPUT_4_VOLUME 0x8CF
795#define MADERA_DRC2LMIX_INPUT_1_SOURCE 0x8D0
796#define MADERA_DRC2LMIX_INPUT_1_VOLUME 0x8D1
797#define MADERA_DRC2LMIX_INPUT_2_SOURCE 0x8D2
798#define MADERA_DRC2LMIX_INPUT_2_VOLUME 0x8D3
799#define MADERA_DRC2LMIX_INPUT_3_SOURCE 0x8D4
800#define MADERA_DRC2LMIX_INPUT_3_VOLUME 0x8D5
801#define MADERA_DRC2LMIX_INPUT_4_SOURCE 0x8D6
802#define MADERA_DRC2LMIX_INPUT_4_VOLUME 0x8D7
803#define MADERA_DRC2RMIX_INPUT_1_SOURCE 0x8D8
804#define MADERA_DRC2RMIX_INPUT_1_VOLUME 0x8D9
805#define MADERA_DRC2RMIX_INPUT_2_SOURCE 0x8DA
806#define MADERA_DRC2RMIX_INPUT_2_VOLUME 0x8DB
807#define MADERA_DRC2RMIX_INPUT_3_SOURCE 0x8DC
808#define MADERA_DRC2RMIX_INPUT_3_VOLUME 0x8DD
809#define MADERA_DRC2RMIX_INPUT_4_SOURCE 0x8DE
810#define MADERA_DRC2RMIX_INPUT_4_VOLUME 0x8DF
811#define MADERA_HPLP1MIX_INPUT_1_SOURCE 0x900
812#define MADERA_HPLP1MIX_INPUT_1_VOLUME 0x901
813#define MADERA_HPLP1MIX_INPUT_2_SOURCE 0x902
814#define MADERA_HPLP1MIX_INPUT_2_VOLUME 0x903
815#define MADERA_HPLP1MIX_INPUT_3_SOURCE 0x904
816#define MADERA_HPLP1MIX_INPUT_3_VOLUME 0x905
817#define MADERA_HPLP1MIX_INPUT_4_SOURCE 0x906
818#define MADERA_HPLP1MIX_INPUT_4_VOLUME 0x907
819#define MADERA_HPLP2MIX_INPUT_1_SOURCE 0x908
820#define MADERA_HPLP2MIX_INPUT_1_VOLUME 0x909
821#define MADERA_HPLP2MIX_INPUT_2_SOURCE 0x90A
822#define MADERA_HPLP2MIX_INPUT_2_VOLUME 0x90B
823#define MADERA_HPLP2MIX_INPUT_3_SOURCE 0x90C
824#define MADERA_HPLP2MIX_INPUT_3_VOLUME 0x90D
825#define MADERA_HPLP2MIX_INPUT_4_SOURCE 0x90E
826#define MADERA_HPLP2MIX_INPUT_4_VOLUME 0x90F
827#define MADERA_HPLP3MIX_INPUT_1_SOURCE 0x910
828#define MADERA_HPLP3MIX_INPUT_1_VOLUME 0x911
829#define MADERA_HPLP3MIX_INPUT_2_SOURCE 0x912
830#define MADERA_HPLP3MIX_INPUT_2_VOLUME 0x913
831#define MADERA_HPLP3MIX_INPUT_3_SOURCE 0x914
832#define MADERA_HPLP3MIX_INPUT_3_VOLUME 0x915
833#define MADERA_HPLP3MIX_INPUT_4_SOURCE 0x916
834#define MADERA_HPLP3MIX_INPUT_4_VOLUME 0x917
835#define MADERA_HPLP4MIX_INPUT_1_SOURCE 0x918
836#define MADERA_HPLP4MIX_INPUT_1_VOLUME 0x919
837#define MADERA_HPLP4MIX_INPUT_2_SOURCE 0x91A
838#define MADERA_HPLP4MIX_INPUT_2_VOLUME 0x91B
839#define MADERA_HPLP4MIX_INPUT_3_SOURCE 0x91C
840#define MADERA_HPLP4MIX_INPUT_3_VOLUME 0x91D
841#define MADERA_HPLP4MIX_INPUT_4_SOURCE 0x91E
842#define MADERA_HPLP4MIX_INPUT_4_VOLUME 0x91F
843#define MADERA_DSP1LMIX_INPUT_1_SOURCE 0x940
844#define MADERA_DSP1LMIX_INPUT_1_VOLUME 0x941
845#define MADERA_DSP1LMIX_INPUT_2_SOURCE 0x942
846#define MADERA_DSP1LMIX_INPUT_2_VOLUME 0x943
847#define MADERA_DSP1LMIX_INPUT_3_SOURCE 0x944
848#define MADERA_DSP1LMIX_INPUT_3_VOLUME 0x945
849#define MADERA_DSP1LMIX_INPUT_4_SOURCE 0x946
850#define MADERA_DSP1LMIX_INPUT_4_VOLUME 0x947
851#define MADERA_DSP1RMIX_INPUT_1_SOURCE 0x948
852#define MADERA_DSP1RMIX_INPUT_1_VOLUME 0x949
853#define MADERA_DSP1RMIX_INPUT_2_SOURCE 0x94A
854#define MADERA_DSP1RMIX_INPUT_2_VOLUME 0x94B
855#define MADERA_DSP1RMIX_INPUT_3_SOURCE 0x94C
856#define MADERA_DSP1RMIX_INPUT_3_VOLUME 0x94D
857#define MADERA_DSP1RMIX_INPUT_4_SOURCE 0x94E
858#define MADERA_DSP1RMIX_INPUT_4_VOLUME 0x94F
859#define MADERA_DSP1AUX1MIX_INPUT_1_SOURCE 0x950
860#define MADERA_DSP1AUX2MIX_INPUT_1_SOURCE 0x958
861#define MADERA_DSP1AUX3MIX_INPUT_1_SOURCE 0x960
862#define MADERA_DSP1AUX4MIX_INPUT_1_SOURCE 0x968
863#define MADERA_DSP1AUX5MIX_INPUT_1_SOURCE 0x970
864#define MADERA_DSP1AUX6MIX_INPUT_1_SOURCE 0x978
865#define MADERA_DSP2LMIX_INPUT_1_SOURCE 0x980
866#define MADERA_DSP2LMIX_INPUT_1_VOLUME 0x981
867#define MADERA_DSP2LMIX_INPUT_2_SOURCE 0x982
868#define MADERA_DSP2LMIX_INPUT_2_VOLUME 0x983
869#define MADERA_DSP2LMIX_INPUT_3_SOURCE 0x984
870#define MADERA_DSP2LMIX_INPUT_3_VOLUME 0x985
871#define MADERA_DSP2LMIX_INPUT_4_SOURCE 0x986
872#define MADERA_DSP2LMIX_INPUT_4_VOLUME 0x987
873#define MADERA_DSP2RMIX_INPUT_1_SOURCE 0x988
874#define MADERA_DSP2RMIX_INPUT_1_VOLUME 0x989
875#define MADERA_DSP2RMIX_INPUT_2_SOURCE 0x98A
876#define MADERA_DSP2RMIX_INPUT_2_VOLUME 0x98B
877#define MADERA_DSP2RMIX_INPUT_3_SOURCE 0x98C
878#define MADERA_DSP2RMIX_INPUT_3_VOLUME 0x98D
879#define MADERA_DSP2RMIX_INPUT_4_SOURCE 0x98E
880#define MADERA_DSP2RMIX_INPUT_4_VOLUME 0x98F
881#define MADERA_DSP2AUX1MIX_INPUT_1_SOURCE 0x990
882#define MADERA_DSP2AUX2MIX_INPUT_1_SOURCE 0x998
883#define MADERA_DSP2AUX3MIX_INPUT_1_SOURCE 0x9A0
884#define MADERA_DSP2AUX4MIX_INPUT_1_SOURCE 0x9A8
885#define MADERA_DSP2AUX5MIX_INPUT_1_SOURCE 0x9B0
886#define MADERA_DSP2AUX6MIX_INPUT_1_SOURCE 0x9B8
887#define MADERA_DSP3LMIX_INPUT_1_SOURCE 0x9C0
888#define MADERA_DSP3LMIX_INPUT_1_VOLUME 0x9C1
889#define MADERA_DSP3LMIX_INPUT_2_SOURCE 0x9C2
890#define MADERA_DSP3LMIX_INPUT_2_VOLUME 0x9C3
891#define MADERA_DSP3LMIX_INPUT_3_SOURCE 0x9C4
892#define MADERA_DSP3LMIX_INPUT_3_VOLUME 0x9C5
893#define MADERA_DSP3LMIX_INPUT_4_SOURCE 0x9C6
894#define MADERA_DSP3LMIX_INPUT_4_VOLUME 0x9C7
895#define MADERA_DSP3RMIX_INPUT_1_SOURCE 0x9C8
896#define MADERA_DSP3RMIX_INPUT_1_VOLUME 0x9C9
897#define MADERA_DSP3RMIX_INPUT_2_SOURCE 0x9CA
898#define MADERA_DSP3RMIX_INPUT_2_VOLUME 0x9CB
899#define MADERA_DSP3RMIX_INPUT_3_SOURCE 0x9CC
900#define MADERA_DSP3RMIX_INPUT_3_VOLUME 0x9CD
901#define MADERA_DSP3RMIX_INPUT_4_SOURCE 0x9CE
902#define MADERA_DSP3RMIX_INPUT_4_VOLUME 0x9CF
903#define MADERA_DSP3AUX1MIX_INPUT_1_SOURCE 0x9D0
904#define MADERA_DSP3AUX2MIX_INPUT_1_SOURCE 0x9D8
905#define MADERA_DSP3AUX3MIX_INPUT_1_SOURCE 0x9E0
906#define MADERA_DSP3AUX4MIX_INPUT_1_SOURCE 0x9E8
907#define MADERA_DSP3AUX5MIX_INPUT_1_SOURCE 0x9F0
908#define MADERA_DSP3AUX6MIX_INPUT_1_SOURCE 0x9F8
909#define MADERA_DSP4LMIX_INPUT_1_SOURCE 0xA00
910#define MADERA_DSP4LMIX_INPUT_1_VOLUME 0xA01
911#define MADERA_DSP4LMIX_INPUT_2_SOURCE 0xA02
912#define MADERA_DSP4LMIX_INPUT_2_VOLUME 0xA03
913#define MADERA_DSP4LMIX_INPUT_3_SOURCE 0xA04
914#define MADERA_DSP4LMIX_INPUT_3_VOLUME 0xA05
915#define MADERA_DSP4LMIX_INPUT_4_SOURCE 0xA06
916#define MADERA_DSP4LMIX_INPUT_4_VOLUME 0xA07
917#define MADERA_DSP4RMIX_INPUT_1_SOURCE 0xA08
918#define MADERA_DSP4RMIX_INPUT_1_VOLUME 0xA09
919#define MADERA_DSP4RMIX_INPUT_2_SOURCE 0xA0A
920#define MADERA_DSP4RMIX_INPUT_2_VOLUME 0xA0B
921#define MADERA_DSP4RMIX_INPUT_3_SOURCE 0xA0C
922#define MADERA_DSP4RMIX_INPUT_3_VOLUME 0xA0D
923#define MADERA_DSP4RMIX_INPUT_4_SOURCE 0xA0E
924#define MADERA_DSP4RMIX_INPUT_4_VOLUME 0xA0F
925#define MADERA_DSP4AUX1MIX_INPUT_1_SOURCE 0xA10
926#define MADERA_DSP4AUX2MIX_INPUT_1_SOURCE 0xA18
927#define MADERA_DSP4AUX3MIX_INPUT_1_SOURCE 0xA20
928#define MADERA_DSP4AUX4MIX_INPUT_1_SOURCE 0xA28
929#define MADERA_DSP4AUX5MIX_INPUT_1_SOURCE 0xA30
930#define MADERA_DSP4AUX6MIX_INPUT_1_SOURCE 0xA38
931#define MADERA_DSP5LMIX_INPUT_1_SOURCE 0xA40
932#define MADERA_DSP5LMIX_INPUT_1_VOLUME 0xA41
933#define MADERA_DSP5LMIX_INPUT_2_SOURCE 0xA42
934#define MADERA_DSP5LMIX_INPUT_2_VOLUME 0xA43
935#define MADERA_DSP5LMIX_INPUT_3_SOURCE 0xA44
936#define MADERA_DSP5LMIX_INPUT_3_VOLUME 0xA45
937#define MADERA_DSP5LMIX_INPUT_4_SOURCE 0xA46
938#define MADERA_DSP5LMIX_INPUT_4_VOLUME 0xA47
939#define MADERA_DSP5RMIX_INPUT_1_SOURCE 0xA48
940#define MADERA_DSP5RMIX_INPUT_1_VOLUME 0xA49
941#define MADERA_DSP5RMIX_INPUT_2_SOURCE 0xA4A
942#define MADERA_DSP5RMIX_INPUT_2_VOLUME 0xA4B
943#define MADERA_DSP5RMIX_INPUT_3_SOURCE 0xA4C
944#define MADERA_DSP5RMIX_INPUT_3_VOLUME 0xA4D
945#define MADERA_DSP5RMIX_INPUT_4_SOURCE 0xA4E
946#define MADERA_DSP5RMIX_INPUT_4_VOLUME 0xA4F
947#define MADERA_DSP5AUX1MIX_INPUT_1_SOURCE 0xA50
948#define MADERA_DSP5AUX2MIX_INPUT_1_SOURCE 0xA58
949#define MADERA_DSP5AUX3MIX_INPUT_1_SOURCE 0xA60
950#define MADERA_DSP5AUX4MIX_INPUT_1_SOURCE 0xA68
951#define MADERA_DSP5AUX5MIX_INPUT_1_SOURCE 0xA70
952#define MADERA_DSP5AUX6MIX_INPUT_1_SOURCE 0xA78
953#define MADERA_ASRC1_1LMIX_INPUT_1_SOURCE 0xA80
954#define MADERA_ASRC1_1RMIX_INPUT_1_SOURCE 0xA88
955#define MADERA_ASRC1_2LMIX_INPUT_1_SOURCE 0xA90
956#define MADERA_ASRC1_2RMIX_INPUT_1_SOURCE 0xA98
957#define MADERA_ASRC2_1LMIX_INPUT_1_SOURCE 0xAA0
958#define MADERA_ASRC2_1RMIX_INPUT_1_SOURCE 0xAA8
959#define MADERA_ASRC2_2LMIX_INPUT_1_SOURCE 0xAB0
960#define MADERA_ASRC2_2RMIX_INPUT_1_SOURCE 0xAB8
961#define MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00
962#define MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08
963#define MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10
964#define MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE 0xB18
965#define MADERA_ISRC1INT1MIX_INPUT_1_SOURCE 0xB20
966#define MADERA_ISRC1INT2MIX_INPUT_1_SOURCE 0xB28
967#define MADERA_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30
968#define MADERA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38
969#define MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40
970#define MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48
971#define MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE 0xB50
972#define MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE 0xB58
973#define MADERA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60
974#define MADERA_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68
975#define MADERA_ISRC2INT3MIX_INPUT_1_SOURCE 0xB70
976#define MADERA_ISRC2INT4MIX_INPUT_1_SOURCE 0xB78
977#define MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE 0xB80
978#define MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE 0xB88
979#define MADERA_ISRC3DEC3MIX_INPUT_1_SOURCE 0xB90
980#define MADERA_ISRC3DEC4MIX_INPUT_1_SOURCE 0xB98
981#define MADERA_ISRC3INT1MIX_INPUT_1_SOURCE 0xBA0
982#define MADERA_ISRC3INT2MIX_INPUT_1_SOURCE 0xBA8
983#define MADERA_ISRC3INT3MIX_INPUT_1_SOURCE 0xBB0
984#define MADERA_ISRC3INT4MIX_INPUT_1_SOURCE 0xBB8
985#define MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE 0xBC0
986#define MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE 0xBC8
987#define MADERA_ISRC4INT1MIX_INPUT_1_SOURCE 0xBE0
988#define MADERA_ISRC4INT2MIX_INPUT_1_SOURCE 0xBE8
989#define MADERA_DSP6LMIX_INPUT_1_SOURCE 0xC00
990#define MADERA_DSP6LMIX_INPUT_1_VOLUME 0xC01
991#define MADERA_DSP6LMIX_INPUT_2_SOURCE 0xC02
992#define MADERA_DSP6LMIX_INPUT_2_VOLUME 0xC03
993#define MADERA_DSP6LMIX_INPUT_3_SOURCE 0xC04
994#define MADERA_DSP6LMIX_INPUT_3_VOLUME 0xC05
995#define MADERA_DSP6LMIX_INPUT_4_SOURCE 0xC06
996#define MADERA_DSP6LMIX_INPUT_4_VOLUME 0xC07
997#define MADERA_DSP6RMIX_INPUT_1_SOURCE 0xC08
998#define MADERA_DSP6RMIX_INPUT_1_VOLUME 0xC09
999#define MADERA_DSP6RMIX_INPUT_2_SOURCE 0xC0A
1000#define MADERA_DSP6RMIX_INPUT_2_VOLUME 0xC0B
1001#define MADERA_DSP6RMIX_INPUT_3_SOURCE 0xC0C
1002#define MADERA_DSP6RMIX_INPUT_3_VOLUME 0xC0D
1003#define MADERA_DSP6RMIX_INPUT_4_SOURCE 0xC0E
1004#define MADERA_DSP6RMIX_INPUT_4_VOLUME 0xC0F
1005#define MADERA_DSP6AUX1MIX_INPUT_1_SOURCE 0xC10
1006#define MADERA_DSP6AUX2MIX_INPUT_1_SOURCE 0xC18
1007#define MADERA_DSP6AUX3MIX_INPUT_1_SOURCE 0xC20
1008#define MADERA_DSP6AUX4MIX_INPUT_1_SOURCE 0xC28
1009#define MADERA_DSP6AUX5MIX_INPUT_1_SOURCE 0xC30
1010#define MADERA_DSP6AUX6MIX_INPUT_1_SOURCE 0xC38
1011#define MADERA_DSP7LMIX_INPUT_1_SOURCE 0xC40
1012#define MADERA_DSP7LMIX_INPUT_1_VOLUME 0xC41
1013#define MADERA_DSP7LMIX_INPUT_2_SOURCE 0xC42
1014#define MADERA_DSP7LMIX_INPUT_2_VOLUME 0xC43
1015#define MADERA_DSP7LMIX_INPUT_3_SOURCE 0xC44
1016#define MADERA_DSP7LMIX_INPUT_3_VOLUME 0xC45
1017#define MADERA_DSP7LMIX_INPUT_4_SOURCE 0xC46
1018#define MADERA_DSP7LMIX_INPUT_4_VOLUME 0xC47
1019#define MADERA_DSP7RMIX_INPUT_1_SOURCE 0xC48
1020#define MADERA_DSP7RMIX_INPUT_1_VOLUME 0xC49
1021#define MADERA_DSP7RMIX_INPUT_2_SOURCE 0xC4A
1022#define MADERA_DSP7RMIX_INPUT_2_VOLUME 0xC4B
1023#define MADERA_DSP7RMIX_INPUT_3_SOURCE 0xC4C
1024#define MADERA_DSP7RMIX_INPUT_3_VOLUME 0xC4D
1025#define MADERA_DSP7RMIX_INPUT_4_SOURCE 0xC4E
1026#define MADERA_DSP7RMIX_INPUT_4_VOLUME 0xC4F
1027#define MADERA_DSP7AUX1MIX_INPUT_1_SOURCE 0xC50
1028#define MADERA_DSP7AUX2MIX_INPUT_1_SOURCE 0xC58
1029#define MADERA_DSP7AUX3MIX_INPUT_1_SOURCE 0xC60
1030#define MADERA_DSP7AUX4MIX_INPUT_1_SOURCE 0xC68
1031#define MADERA_DSP7AUX5MIX_INPUT_1_SOURCE 0xC70
1032#define MADERA_DSP7AUX6MIX_INPUT_1_SOURCE 0xC78
1033#define MADERA_DFC1MIX_INPUT_1_SOURCE 0xDC0
1034#define MADERA_DFC2MIX_INPUT_1_SOURCE 0xDC8
1035#define MADERA_DFC3MIX_INPUT_1_SOURCE 0xDD0
1036#define MADERA_DFC4MIX_INPUT_1_SOURCE 0xDD8
1037#define MADERA_DFC5MIX_INPUT_1_SOURCE 0xDE0
1038#define MADERA_DFC6MIX_INPUT_1_SOURCE 0xDE8
1039#define MADERA_DFC7MIX_INPUT_1_SOURCE 0xDF0
1040#define MADERA_DFC8MIX_INPUT_1_SOURCE 0xDF8
1041#define MADERA_FX_CTRL1 0xE00
1042#define MADERA_FX_CTRL2 0xE01
1043#define MADERA_EQ1_1 0xE10
1044#define MADERA_EQ1_2 0xE11
1045#define MADERA_EQ1_21 0xE24
1046#define MADERA_EQ2_1 0xE26
1047#define MADERA_EQ2_2 0xE27
1048#define MADERA_EQ2_21 0xE3A
1049#define MADERA_EQ3_1 0xE3C
1050#define MADERA_EQ3_2 0xE3D
1051#define MADERA_EQ3_21 0xE50
1052#define MADERA_EQ4_1 0xE52
1053#define MADERA_EQ4_2 0xE53
1054#define MADERA_EQ4_21 0xE66
1055#define MADERA_DRC1_CTRL1 0xE80
1056#define MADERA_DRC1_CTRL2 0xE81
1057#define MADERA_DRC1_CTRL3 0xE82
1058#define MADERA_DRC1_CTRL4 0xE83
1059#define MADERA_DRC1_CTRL5 0xE84
1060#define MADERA_DRC2_CTRL1 0xE88
1061#define MADERA_DRC2_CTRL2 0xE89
1062#define MADERA_DRC2_CTRL3 0xE8A
1063#define MADERA_DRC2_CTRL4 0xE8B
1064#define MADERA_DRC2_CTRL5 0xE8C
1065#define MADERA_HPLPF1_1 0xEC0
1066#define MADERA_HPLPF1_2 0xEC1
1067#define MADERA_HPLPF2_1 0xEC4
1068#define MADERA_HPLPF2_2 0xEC5
1069#define MADERA_HPLPF3_1 0xEC8
1070#define MADERA_HPLPF3_2 0xEC9
1071#define MADERA_HPLPF4_1 0xECC
1072#define MADERA_HPLPF4_2 0xECD
1073#define MADERA_ASRC2_ENABLE 0xED0
1074#define MADERA_ASRC2_STATUS 0xED1
1075#define MADERA_ASRC2_RATE1 0xED2
1076#define MADERA_ASRC2_RATE2 0xED3
1077#define MADERA_ASRC1_ENABLE 0xEE0
1078#define MADERA_ASRC1_STATUS 0xEE1
1079#define MADERA_ASRC1_RATE1 0xEE2
1080#define MADERA_ASRC1_RATE2 0xEE3
1081#define MADERA_ISRC_1_CTRL_1 0xEF0
1082#define MADERA_ISRC_1_CTRL_2 0xEF1
1083#define MADERA_ISRC_1_CTRL_3 0xEF2
1084#define MADERA_ISRC_2_CTRL_1 0xEF3
1085#define MADERA_ISRC_2_CTRL_2 0xEF4
1086#define MADERA_ISRC_2_CTRL_3 0xEF5
1087#define MADERA_ISRC_3_CTRL_1 0xEF6
1088#define MADERA_ISRC_3_CTRL_2 0xEF7
1089#define MADERA_ISRC_3_CTRL_3 0xEF8
1090#define MADERA_ISRC_4_CTRL_1 0xEF9
1091#define MADERA_ISRC_4_CTRL_2 0xEFA
1092#define MADERA_ISRC_4_CTRL_3 0xEFB
1093#define MADERA_CLOCK_CONTROL 0xF00
1094#define MADERA_ANC_SRC 0xF01
1095#define MADERA_DSP_STATUS 0xF02
1096#define MADERA_ANC_COEFF_START 0xF08
1097#define MADERA_ANC_COEFF_END 0xF12
1098#define MADERA_FCL_FILTER_CONTROL 0xF15
1099#define MADERA_FCL_ADC_REFORMATTER_CONTROL 0xF17
1100#define MADERA_FCL_COEFF_START 0xF18
1101#define MADERA_FCL_COEFF_END 0xF69
1102#define MADERA_FCR_FILTER_CONTROL 0xF71
1103#define MADERA_FCR_ADC_REFORMATTER_CONTROL 0xF73
1104#define MADERA_FCR_COEFF_START 0xF74
1105#define MADERA_FCR_COEFF_END 0xFC5
1106#define MADERA_DAC_COMP_1 0x1300
1107#define MADERA_DAC_COMP_2 0x1302
1108#define MADERA_FRF_COEFFICIENT_1L_1 0x1380
1109#define MADERA_FRF_COEFFICIENT_1L_2 0x1381
1110#define MADERA_FRF_COEFFICIENT_1L_3 0x1382
1111#define MADERA_FRF_COEFFICIENT_1L_4 0x1383
1112#define MADERA_FRF_COEFFICIENT_1R_1 0x1390
1113#define MADERA_FRF_COEFFICIENT_1R_2 0x1391
1114#define MADERA_FRF_COEFFICIENT_1R_3 0x1392
1115#define MADERA_FRF_COEFFICIENT_1R_4 0x1393
1116#define MADERA_FRF_COEFFICIENT_2L_1 0x13A0
1117#define MADERA_FRF_COEFFICIENT_2L_2 0x13A1
1118#define MADERA_FRF_COEFFICIENT_2L_3 0x13A2
1119#define MADERA_FRF_COEFFICIENT_2L_4 0x13A3
1120#define MADERA_FRF_COEFFICIENT_2R_1 0x13B0
1121#define MADERA_FRF_COEFFICIENT_2R_2 0x13B1
1122#define MADERA_FRF_COEFFICIENT_2R_3 0x13B2
1123#define MADERA_FRF_COEFFICIENT_2R_4 0x13B3
1124#define MADERA_FRF_COEFFICIENT_3L_1 0x13C0
1125#define MADERA_FRF_COEFFICIENT_3L_2 0x13C1
1126#define MADERA_FRF_COEFFICIENT_3L_3 0x13C2
1127#define MADERA_FRF_COEFFICIENT_3L_4 0x13C3
1128#define MADERA_FRF_COEFFICIENT_3R_1 0x13D0
1129#define MADERA_FRF_COEFFICIENT_3R_2 0x13D1
1130#define MADERA_FRF_COEFFICIENT_3R_3 0x13D2
1131#define MADERA_FRF_COEFFICIENT_3R_4 0x13D3
1132#define MADERA_FRF_COEFFICIENT_4L_1 0x13E0
1133#define MADERA_FRF_COEFFICIENT_4L_2 0x13E1
1134#define MADERA_FRF_COEFFICIENT_4L_3 0x13E2
1135#define MADERA_FRF_COEFFICIENT_4L_4 0x13E3
1136#define MADERA_FRF_COEFFICIENT_4R_1 0x13F0
1137#define MADERA_FRF_COEFFICIENT_4R_2 0x13F1
1138#define MADERA_FRF_COEFFICIENT_4R_3 0x13F2
1139#define MADERA_FRF_COEFFICIENT_4R_4 0x13F3
1140#define CS47L35_FRF_COEFFICIENT_4L_1 0x13A0
1141#define CS47L35_FRF_COEFFICIENT_4L_2 0x13A1
1142#define CS47L35_FRF_COEFFICIENT_4L_3 0x13A2
1143#define CS47L35_FRF_COEFFICIENT_4L_4 0x13A3
1144#define CS47L35_FRF_COEFFICIENT_5L_1 0x13B0
1145#define CS47L35_FRF_COEFFICIENT_5L_2 0x13B1
1146#define CS47L35_FRF_COEFFICIENT_5L_3 0x13B2
1147#define CS47L35_FRF_COEFFICIENT_5L_4 0x13B3
1148#define CS47L35_FRF_COEFFICIENT_5R_1 0x13C0
1149#define CS47L35_FRF_COEFFICIENT_5R_2 0x13C1
1150#define CS47L35_FRF_COEFFICIENT_5R_3 0x13C2
1151#define CS47L35_FRF_COEFFICIENT_5R_4 0x13C3
1152#define MADERA_FRF_COEFFICIENT_5L_1 0x1400
1153#define MADERA_FRF_COEFFICIENT_5L_2 0x1401
1154#define MADERA_FRF_COEFFICIENT_5L_3 0x1402
1155#define MADERA_FRF_COEFFICIENT_5L_4 0x1403
1156#define MADERA_FRF_COEFFICIENT_5R_1 0x1410
1157#define MADERA_FRF_COEFFICIENT_5R_2 0x1411
1158#define MADERA_FRF_COEFFICIENT_5R_3 0x1412
1159#define MADERA_FRF_COEFFICIENT_5R_4 0x1413
1160#define MADERA_FRF_COEFFICIENT_6L_1 0x1420
1161#define MADERA_FRF_COEFFICIENT_6L_2 0x1421
1162#define MADERA_FRF_COEFFICIENT_6L_3 0x1422
1163#define MADERA_FRF_COEFFICIENT_6L_4 0x1423
1164#define MADERA_FRF_COEFFICIENT_6R_1 0x1430
1165#define MADERA_FRF_COEFFICIENT_6R_2 0x1431
1166#define MADERA_FRF_COEFFICIENT_6R_3 0x1432
1167#define MADERA_FRF_COEFFICIENT_6R_4 0x1433
1168#define MADERA_DFC1_CTRL 0x1480
1169#define MADERA_DFC1_RX 0x1482
1170#define MADERA_DFC1_TX 0x1484
1171#define MADERA_DFC2_CTRL 0x1486
1172#define MADERA_DFC2_RX 0x1488
1173#define MADERA_DFC2_TX 0x148A
1174#define MADERA_DFC3_CTRL 0x148C
1175#define MADERA_DFC3_RX 0x148E
1176#define MADERA_DFC3_TX 0x1490
1177#define MADERA_DFC4_CTRL 0x1492
1178#define MADERA_DFC4_RX 0x1494
1179#define MADERA_DFC4_TX 0x1496
1180#define MADERA_DFC5_CTRL 0x1498
1181#define MADERA_DFC5_RX 0x149A
1182#define MADERA_DFC5_TX 0x149C
1183#define MADERA_DFC6_CTRL 0x149E
1184#define MADERA_DFC6_RX 0x14A0
1185#define MADERA_DFC6_TX 0x14A2
1186#define MADERA_DFC7_CTRL 0x14A4
1187#define MADERA_DFC7_RX 0x14A6
1188#define MADERA_DFC7_TX 0x14A8
1189#define MADERA_DFC8_CTRL 0x14AA
1190#define MADERA_DFC8_RX 0x14AC
1191#define MADERA_DFC8_TX 0x14AE
1192#define MADERA_DFC_STATUS 0x14B6
1193#define MADERA_ADSP2_IRQ0 0x1600
1194#define MADERA_ADSP2_IRQ1 0x1601
1195#define MADERA_ADSP2_IRQ2 0x1602
1196#define MADERA_ADSP2_IRQ3 0x1603
1197#define MADERA_ADSP2_IRQ4 0x1604
1198#define MADERA_ADSP2_IRQ5 0x1605
1199#define MADERA_ADSP2_IRQ6 0x1606
1200#define MADERA_ADSP2_IRQ7 0x1607
1201#define MADERA_GPIO1_CTRL_1 0x1700
1202#define MADERA_GPIO1_CTRL_2 0x1701
1203#define MADERA_GPIO2_CTRL_1 0x1702
1204#define MADERA_GPIO2_CTRL_2 0x1703
1205#define MADERA_GPIO16_CTRL_1 0x171E
1206#define MADERA_GPIO16_CTRL_2 0x171F
1207#define MADERA_GPIO38_CTRL_1 0x174A
1208#define MADERA_GPIO38_CTRL_2 0x174B
1209#define MADERA_GPIO40_CTRL_1 0x174E
1210#define MADERA_GPIO40_CTRL_2 0x174F
1211#define MADERA_IRQ1_STATUS_1 0x1800
1212#define MADERA_IRQ1_STATUS_2 0x1801
1213#define MADERA_IRQ1_STATUS_6 0x1805
1214#define MADERA_IRQ1_STATUS_7 0x1806
1215#define MADERA_IRQ1_STATUS_9 0x1808
1216#define MADERA_IRQ1_STATUS_11 0x180A
1217#define MADERA_IRQ1_STATUS_12 0x180B
1218#define MADERA_IRQ1_STATUS_15 0x180E
1219#define MADERA_IRQ1_STATUS_33 0x1820
1220#define MADERA_IRQ1_MASK_1 0x1840
1221#define MADERA_IRQ1_MASK_2 0x1841
1222#define MADERA_IRQ1_MASK_6 0x1845
1223#define MADERA_IRQ1_MASK_33 0x1860
1224#define MADERA_IRQ1_RAW_STATUS_1 0x1880
1225#define MADERA_IRQ1_RAW_STATUS_2 0x1881
1226#define MADERA_IRQ1_RAW_STATUS_7 0x1886
1227#define MADERA_IRQ1_RAW_STATUS_15 0x188E
1228#define MADERA_IRQ1_RAW_STATUS_33 0x18A0
1229#define MADERA_INTERRUPT_DEBOUNCE_7 0x1A06
1230#define MADERA_INTERRUPT_DEBOUNCE_15 0x1A0E
1231#define MADERA_IRQ1_CTRL 0x1A80
1232#define MADERA_IRQ2_CTRL 0x1A82
1233#define MADERA_INTERRUPT_RAW_STATUS_1 0x1AA0
1234#define MADERA_WSEQ_SEQUENCE_1 0x3000
1235#define MADERA_WSEQ_SEQUENCE_252 0x31F6
1236#define CS47L35_OTP_HPDET_CAL_1 0x31F8
1237#define CS47L35_OTP_HPDET_CAL_2 0x31FA
1238#define MADERA_WSEQ_SEQUENCE_508 0x33F6
1239#define CS47L85_OTP_HPDET_CAL_1 0x33F8
1240#define CS47L85_OTP_HPDET_CAL_2 0x33FA
1241#define MADERA_OTP_HPDET_CAL_1 0x20004
1242#define MADERA_OTP_HPDET_CAL_2 0x20006
1243#define MADERA_DSP1_CONFIG_1 0x0FFE00
1244#define MADERA_DSP1_CONFIG_2 0x0FFE02
1245#define MADERA_DSP1_SCRATCH_1 0x0FFE40
1246#define MADERA_DSP1_SCRATCH_2 0x0FFE42
1247#define MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0xFFE7C
1248#define MADERA_DSP2_CONFIG_1 0x17FE00
1249#define MADERA_DSP2_CONFIG_2 0x17FE02
1250#define MADERA_DSP2_SCRATCH_1 0x17FE40
1251#define MADERA_DSP2_SCRATCH_2 0x17FE42
1252#define MADERA_DSP2_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x17FE7C
1253#define MADERA_DSP3_CONFIG_1 0x1FFE00
1254#define MADERA_DSP3_CONFIG_2 0x1FFE02
1255#define MADERA_DSP3_SCRATCH_1 0x1FFE40
1256#define MADERA_DSP3_SCRATCH_2 0x1FFE42
1257#define MADERA_DSP3_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x1FFE7C
1258#define MADERA_DSP4_CONFIG_1 0x27FE00
1259#define MADERA_DSP4_CONFIG_2 0x27FE02
1260#define MADERA_DSP4_SCRATCH_1 0x27FE40
1261#define MADERA_DSP4_SCRATCH_2 0x27FE42
1262#define MADERA_DSP4_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x27FE7C
1263#define MADERA_DSP5_CONFIG_1 0x2FFE00
1264#define MADERA_DSP5_CONFIG_2 0x2FFE02
1265#define MADERA_DSP5_SCRATCH_1 0x2FFE40
1266#define MADERA_DSP5_SCRATCH_2 0x2FFE42
1267#define MADERA_DSP5_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x2FFE7C
1268#define MADERA_DSP6_CONFIG_1 0x37FE00
1269#define MADERA_DSP6_CONFIG_2 0x37FE02
1270#define MADERA_DSP6_SCRATCH_1 0x37FE40
1271#define MADERA_DSP6_SCRATCH_2 0x37FE42
1272#define MADERA_DSP6_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x37FE7C
1273#define MADERA_DSP7_CONFIG_1 0x3FFE00
1274#define MADERA_DSP7_CONFIG_2 0x3FFE02
1275#define MADERA_DSP7_SCRATCH_1 0x3FFE40
1276#define MADERA_DSP7_SCRATCH_2 0x3FFE42
1277#define MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x3FFE7C
1278
1279/* (0x0000) Software_Reset */
1280#define MADERA_SW_RST_DEV_ID1_MASK 0xFFFF
1281#define MADERA_SW_RST_DEV_ID1_SHIFT 0
1282#define MADERA_SW_RST_DEV_ID1_WIDTH 16
1283
1284/* (0x0001) Hardware_Revision */
1285#define MADERA_HW_REVISION_MASK 0x00FF
1286#define MADERA_HW_REVISION_SHIFT 0
1287#define MADERA_HW_REVISION_WIDTH 8
1288
1289/* (0x0020) Tone_Generator_1 */
1290#define MADERA_TONE2_ENA 0x0002
1291#define MADERA_TONE2_ENA_MASK 0x0002
1292#define MADERA_TONE2_ENA_SHIFT 1
1293#define MADERA_TONE2_ENA_WIDTH 1
1294#define MADERA_TONE1_ENA 0x0001
1295#define MADERA_TONE1_ENA_MASK 0x0001
1296#define MADERA_TONE1_ENA_SHIFT 0
1297#define MADERA_TONE1_ENA_WIDTH 1
1298
1299/* (0x0021) Tone_Generator_2 */
1300#define MADERA_TONE1_LVL_0_MASK 0xFFFF
1301#define MADERA_TONE1_LVL_0_SHIFT 0
1302#define MADERA_TONE1_LVL_0_WIDTH 16
1303
1304/* (0x0022) Tone_Generator_3 */
1305#define MADERA_TONE1_LVL_MASK 0x00FF
1306#define MADERA_TONE1_LVL_SHIFT 0
1307#define MADERA_TONE1_LVL_WIDTH 8
1308
1309/* (0x0023) Tone_Generator_4 */
1310#define MADERA_TONE2_LVL_0_MASK 0xFFFF
1311#define MADERA_TONE2_LVL_0_SHIFT 0
1312#define MADERA_TONE2_LVL_0_WIDTH 16
1313
1314/* (0x0024) Tone_Generator_5 */
1315#define MADERA_TONE2_LVL_MASK 0x00FF
1316#define MADERA_TONE2_LVL_SHIFT 0
1317#define MADERA_TONE2_LVL_WIDTH 8
1318
1319/* (0x0030) PWM_Drive_1 */
1320#define MADERA_PWM2_ENA 0x0002
1321#define MADERA_PWM2_ENA_MASK 0x0002
1322#define MADERA_PWM2_ENA_SHIFT 1
1323#define MADERA_PWM2_ENA_WIDTH 1
1324#define MADERA_PWM1_ENA 0x0001
1325#define MADERA_PWM1_ENA_MASK 0x0001
1326#define MADERA_PWM1_ENA_SHIFT 0
1327#define MADERA_PWM1_ENA_WIDTH 1
1328
1329/* (0x00A0) Comfort_Noise_Generator */
1330#define MADERA_NOISE_GEN_ENA 0x0020
1331#define MADERA_NOISE_GEN_ENA_MASK 0x0020
1332#define MADERA_NOISE_GEN_ENA_SHIFT 5
1333#define MADERA_NOISE_GEN_ENA_WIDTH 1
1334#define MADERA_NOISE_GEN_GAIN_MASK 0x001F
1335#define MADERA_NOISE_GEN_GAIN_SHIFT 0
1336#define MADERA_NOISE_GEN_GAIN_WIDTH 5
1337
1338/* (0x0100) Clock_32k_1 */
1339#define MADERA_CLK_32K_ENA 0x0040
1340#define MADERA_CLK_32K_ENA_MASK 0x0040
1341#define MADERA_CLK_32K_ENA_SHIFT 6
1342#define MADERA_CLK_32K_ENA_WIDTH 1
1343#define MADERA_CLK_32K_SRC_MASK 0x0003
1344#define MADERA_CLK_32K_SRC_SHIFT 0
1345#define MADERA_CLK_32K_SRC_WIDTH 2
1346
1347/* (0x0101) System_Clock_1 */
1348#define MADERA_SYSCLK_FRAC 0x8000
1349#define MADERA_SYSCLK_FRAC_MASK 0x8000
1350#define MADERA_SYSCLK_FRAC_SHIFT 15
1351#define MADERA_SYSCLK_FRAC_WIDTH 1
1352#define MADERA_SYSCLK_FREQ_MASK 0x0700
1353#define MADERA_SYSCLK_FREQ_SHIFT 8
1354#define MADERA_SYSCLK_FREQ_WIDTH 3
1355#define MADERA_SYSCLK_ENA 0x0040
1356#define MADERA_SYSCLK_ENA_MASK 0x0040
1357#define MADERA_SYSCLK_ENA_SHIFT 6
1358#define MADERA_SYSCLK_ENA_WIDTH 1
1359#define MADERA_SYSCLK_SRC_MASK 0x000F
1360#define MADERA_SYSCLK_SRC_SHIFT 0
1361#define MADERA_SYSCLK_SRC_WIDTH 4
1362
1363/* (0x0102) Sample_rate_1 */
1364#define MADERA_SAMPLE_RATE_1_MASK 0x001F
1365#define MADERA_SAMPLE_RATE_1_SHIFT 0
1366#define MADERA_SAMPLE_RATE_1_WIDTH 5
1367
1368/* (0x0103) Sample_rate_2 */
1369#define MADERA_SAMPLE_RATE_2_MASK 0x001F
1370#define MADERA_SAMPLE_RATE_2_SHIFT 0
1371#define MADERA_SAMPLE_RATE_2_WIDTH 5
1372
1373/* (0x0104) Sample_rate_3 */
1374#define MADERA_SAMPLE_RATE_3_MASK 0x001F
1375#define MADERA_SAMPLE_RATE_3_SHIFT 0
1376#define MADERA_SAMPLE_RATE_3_WIDTH 5
1377
1378/* (0x0112) Async_clock_1 */
1379#define MADERA_ASYNC_CLK_FREQ_MASK 0x0700
1380#define MADERA_ASYNC_CLK_FREQ_SHIFT 8
1381#define MADERA_ASYNC_CLK_FREQ_WIDTH 3
1382#define MADERA_ASYNC_CLK_ENA 0x0040
1383#define MADERA_ASYNC_CLK_ENA_MASK 0x0040
1384#define MADERA_ASYNC_CLK_ENA_SHIFT 6
1385#define MADERA_ASYNC_CLK_ENA_WIDTH 1
1386#define MADERA_ASYNC_CLK_SRC_MASK 0x000F
1387#define MADERA_ASYNC_CLK_SRC_SHIFT 0
1388#define MADERA_ASYNC_CLK_SRC_WIDTH 4
1389
1390/* (0x0113) Async_sample_rate_1 */
1391#define MADERA_ASYNC_SAMPLE_RATE_1_MASK 0x001F
1392#define MADERA_ASYNC_SAMPLE_RATE_1_SHIFT 0
1393#define MADERA_ASYNC_SAMPLE_RATE_1_WIDTH 5
1394
1395/* (0x0114) Async_sample_rate_2 */
1396#define MADERA_ASYNC_SAMPLE_RATE_2_MASK 0x001F
1397#define MADERA_ASYNC_SAMPLE_RATE_2_SHIFT 0
1398#define MADERA_ASYNC_SAMPLE_RATE_2_WIDTH 5
1399
1400/* (0x0120) DSP_Clock_1 */
1401#define MADERA_DSP_CLK_FREQ_LEGACY 0x0700
1402#define MADERA_DSP_CLK_FREQ_LEGACY_MASK 0x0700
1403#define MADERA_DSP_CLK_FREQ_LEGACY_SHIFT 8
1404#define MADERA_DSP_CLK_FREQ_LEGACY_WIDTH 3
1405#define MADERA_DSP_CLK_ENA 0x0040
1406#define MADERA_DSP_CLK_ENA_MASK 0x0040
1407#define MADERA_DSP_CLK_ENA_SHIFT 6
1408#define MADERA_DSP_CLK_ENA_WIDTH 1
1409#define MADERA_DSP_CLK_SRC 0x000F
1410#define MADERA_DSP_CLK_SRC_MASK 0x000F
1411#define MADERA_DSP_CLK_SRC_SHIFT 0
1412#define MADERA_DSP_CLK_SRC_WIDTH 4
1413
1414/* (0x0122) DSP_Clock_2 */
1415#define MADERA_DSP_CLK_FREQ_MASK 0x03FF
1416#define MADERA_DSP_CLK_FREQ_SHIFT 0
1417#define MADERA_DSP_CLK_FREQ_WIDTH 10
1418
1419/* (0x0149) Output_system_clock */
1420#define MADERA_OPCLK_ENA 0x8000
1421#define MADERA_OPCLK_ENA_MASK 0x8000
1422#define MADERA_OPCLK_ENA_SHIFT 15
1423#define MADERA_OPCLK_ENA_WIDTH 1
1424#define MADERA_OPCLK_DIV_MASK 0x00F8
1425#define MADERA_OPCLK_DIV_SHIFT 3
1426#define MADERA_OPCLK_DIV_WIDTH 5
1427#define MADERA_OPCLK_SEL_MASK 0x0007
1428#define MADERA_OPCLK_SEL_SHIFT 0
1429#define MADERA_OPCLK_SEL_WIDTH 3
1430
1431/* (0x014A) Output_async_clock */
1432#define MADERA_OPCLK_ASYNC_ENA 0x8000
1433#define MADERA_OPCLK_ASYNC_ENA_MASK 0x8000
1434#define MADERA_OPCLK_ASYNC_ENA_SHIFT 15
1435#define MADERA_OPCLK_ASYNC_ENA_WIDTH 1
1436#define MADERA_OPCLK_ASYNC_DIV_MASK 0x00F8
1437#define MADERA_OPCLK_ASYNC_DIV_SHIFT 3
1438#define MADERA_OPCLK_ASYNC_DIV_WIDTH 5
1439#define MADERA_OPCLK_ASYNC_SEL_MASK 0x0007
1440#define MADERA_OPCLK_ASYNC_SEL_SHIFT 0
1441#define MADERA_OPCLK_ASYNC_SEL_WIDTH 3
1442
1443/* (0x0171) FLL1_Control_1 */
1444#define MADERA_FLL1_FREERUN 0x0002
1445#define MADERA_FLL1_FREERUN_MASK 0x0002
1446#define MADERA_FLL1_FREERUN_SHIFT 1
1447#define MADERA_FLL1_FREERUN_WIDTH 1
1448#define MADERA_FLL1_ENA 0x0001
1449#define MADERA_FLL1_ENA_MASK 0x0001
1450#define MADERA_FLL1_ENA_SHIFT 0
1451#define MADERA_FLL1_ENA_WIDTH 1
1452
1453/* (0x0172) FLL1_Control_2 */
1454#define MADERA_FLL1_CTRL_UPD 0x8000
1455#define MADERA_FLL1_CTRL_UPD_MASK 0x8000
1456#define MADERA_FLL1_CTRL_UPD_SHIFT 15
1457#define MADERA_FLL1_CTRL_UPD_WIDTH 1
1458#define MADERA_FLL1_N_MASK 0x03FF
1459#define MADERA_FLL1_N_SHIFT 0
1460#define MADERA_FLL1_N_WIDTH 10
1461
1462/* (0x0173) FLL1_Control_3 */
1463#define MADERA_FLL1_THETA_MASK 0xFFFF
1464#define MADERA_FLL1_THETA_SHIFT 0
1465#define MADERA_FLL1_THETA_WIDTH 16
1466
1467/* (0x0174) FLL1_Control_4 */
1468#define MADERA_FLL1_LAMBDA_MASK 0xFFFF
1469#define MADERA_FLL1_LAMBDA_SHIFT 0
1470#define MADERA_FLL1_LAMBDA_WIDTH 16
1471
1472/* (0x0175) FLL1_Control_5 */
1473#define MADERA_FLL1_FRATIO_MASK 0x0F00
1474#define MADERA_FLL1_FRATIO_SHIFT 8
1475#define MADERA_FLL1_FRATIO_WIDTH 4
1476
1477/* (0x0176) FLL1_Control_6 */
1478#define MADERA_FLL1_REFCLK_DIV_MASK 0x00C0
1479#define MADERA_FLL1_REFCLK_DIV_SHIFT 6
1480#define MADERA_FLL1_REFCLK_DIV_WIDTH 2
1481#define MADERA_FLL1_REFCLK_SRC_MASK 0x000F
1482#define MADERA_FLL1_REFCLK_SRC_SHIFT 0
1483#define MADERA_FLL1_REFCLK_SRC_WIDTH 4
1484
1485/* (0x0177) FLL1_Loop_Filter_Test_1 */
1486#define MADERA_FLL1_FRC_INTEG_UPD 0x8000
1487#define MADERA_FLL1_FRC_INTEG_UPD_MASK 0x8000
1488#define MADERA_FLL1_FRC_INTEG_UPD_SHIFT 15
1489#define MADERA_FLL1_FRC_INTEG_UPD_WIDTH 1
1490#define MADERA_FLL1_FRC_INTEG_VAL_MASK 0x0FFF
1491#define MADERA_FLL1_FRC_INTEG_VAL_SHIFT 0
1492#define MADERA_FLL1_FRC_INTEG_VAL_WIDTH 12
1493
1494/* (0x0179) FLL1_Control_7 */
1495#define MADERA_FLL1_GAIN_MASK 0x003c
1496#define MADERA_FLL1_GAIN_SHIFT 2
1497#define MADERA_FLL1_GAIN_WIDTH 4
1498
1499/* (0x017A) FLL1_EFS_2 */
1500#define MADERA_FLL1_PHASE_GAIN_MASK 0xF000
1501#define MADERA_FLL1_PHASE_GAIN_SHIFT 12
1502#define MADERA_FLL1_PHASE_GAIN_WIDTH 4
1503#define MADERA_FLL1_PHASE_ENA_MASK 0x0800
1504#define MADERA_FLL1_PHASE_ENA_SHIFT 11
1505#define MADERA_FLL1_PHASE_ENA_WIDTH 1
1506
1507/* (0x0181) FLL1_Synchroniser_1 */
1508#define MADERA_FLL1_SYNC_ENA 0x0001
1509#define MADERA_FLL1_SYNC_ENA_MASK 0x0001
1510#define MADERA_FLL1_SYNC_ENA_SHIFT 0
1511#define MADERA_FLL1_SYNC_ENA_WIDTH 1
1512
1513/* (0x0182) FLL1_Synchroniser_2 */
1514#define MADERA_FLL1_SYNC_N_MASK 0x03FF
1515#define MADERA_FLL1_SYNC_N_SHIFT 0
1516#define MADERA_FLL1_SYNC_N_WIDTH 10
1517
1518/* (0x0183) FLL1_Synchroniser_3 */
1519#define MADERA_FLL1_SYNC_THETA_MASK 0xFFFF
1520#define MADERA_FLL1_SYNC_THETA_SHIFT 0
1521#define MADERA_FLL1_SYNC_THETA_WIDTH 16
1522
1523/* (0x0184) FLL1_Synchroniser_4 */
1524#define MADERA_FLL1_SYNC_LAMBDA_MASK 0xFFFF
1525#define MADERA_FLL1_SYNC_LAMBDA_SHIFT 0
1526#define MADERA_FLL1_SYNC_LAMBDA_WIDTH 16
1527
1528/* (0x0185) FLL1_Synchroniser_5 */
1529#define MADERA_FLL1_SYNC_FRATIO_MASK 0x0700
1530#define MADERA_FLL1_SYNC_FRATIO_SHIFT 8
1531#define MADERA_FLL1_SYNC_FRATIO_WIDTH 3
1532
1533/* (0x0186) FLL1_Synchroniser_6 */
1534#define MADERA_FLL1_SYNCCLK_DIV_MASK 0x00C0
1535#define MADERA_FLL1_SYNCCLK_DIV_SHIFT 6
1536#define MADERA_FLL1_SYNCCLK_DIV_WIDTH 2
1537#define MADERA_FLL1_SYNCCLK_SRC_MASK 0x000F
1538#define MADERA_FLL1_SYNCCLK_SRC_SHIFT 0
1539#define MADERA_FLL1_SYNCCLK_SRC_WIDTH 4
1540
1541/* (0x0187) FLL1_Synchroniser_7 */
1542#define MADERA_FLL1_SYNC_GAIN_MASK 0x003c
1543#define MADERA_FLL1_SYNC_GAIN_SHIFT 2
1544#define MADERA_FLL1_SYNC_GAIN_WIDTH 4
1545#define MADERA_FLL1_SYNC_DFSAT 0x0001
1546#define MADERA_FLL1_SYNC_DFSAT_MASK 0x0001
1547#define MADERA_FLL1_SYNC_DFSAT_SHIFT 0
1548#define MADERA_FLL1_SYNC_DFSAT_WIDTH 1
1549
1550/* (0x01D1) FLL_AO_Control_1 */
1551#define MADERA_FLL_AO_HOLD 0x0004
1552#define MADERA_FLL_AO_HOLD_MASK 0x0004
1553#define MADERA_FLL_AO_HOLD_SHIFT 2
1554#define MADERA_FLL_AO_HOLD_WIDTH 1
1555#define MADERA_FLL_AO_FREERUN 0x0002
1556#define MADERA_FLL_AO_FREERUN_MASK 0x0002
1557#define MADERA_FLL_AO_FREERUN_SHIFT 1
1558#define MADERA_FLL_AO_FREERUN_WIDTH 1
1559#define MADERA_FLL_AO_ENA 0x0001
1560#define MADERA_FLL_AO_ENA_MASK 0x0001
1561#define MADERA_FLL_AO_ENA_SHIFT 0
1562#define MADERA_FLL_AO_ENA_WIDTH 1
1563
1564/* (0x01D2) FLL_AO_Control_2 */
1565#define MADERA_FLL_AO_CTRL_UPD 0x8000
1566#define MADERA_FLL_AO_CTRL_UPD_MASK 0x8000
1567#define MADERA_FLL_AO_CTRL_UPD_SHIFT 15
1568#define MADERA_FLL_AO_CTRL_UPD_WIDTH 1
1569
1570/* (0x01D6) FLL_AO_Control_6 */
1571#define MADERA_FLL_AO_REFCLK_SRC_MASK 0x000F
1572#define MADERA_FLL_AO_REFCLK_SRC_SHIFT 0
1573#define MADERA_FLL_AO_REFCLK_SRC_WIDTH 4
1574
1575/* (0x0200) Mic_Charge_Pump_1 */
1576#define MADERA_CPMIC_BYPASS 0x0002
1577#define MADERA_CPMIC_BYPASS_MASK 0x0002
1578#define MADERA_CPMIC_BYPASS_SHIFT 1
1579#define MADERA_CPMIC_BYPASS_WIDTH 1
1580#define MADERA_CPMIC_ENA 0x0001
1581#define MADERA_CPMIC_ENA_MASK 0x0001
1582#define MADERA_CPMIC_ENA_SHIFT 0
1583#define MADERA_CPMIC_ENA_WIDTH 1
1584
1585/* (0x0210) LDO1_Control_1 */
1586#define MADERA_LDO1_VSEL_MASK 0x07E0
1587#define MADERA_LDO1_VSEL_SHIFT 5
1588#define MADERA_LDO1_VSEL_WIDTH 6
1589#define MADERA_LDO1_FAST 0x0010
1590#define MADERA_LDO1_FAST_MASK 0x0010
1591#define MADERA_LDO1_FAST_SHIFT 4
1592#define MADERA_LDO1_FAST_WIDTH 1
1593#define MADERA_LDO1_DISCH 0x0004
1594#define MADERA_LDO1_DISCH_MASK 0x0004
1595#define MADERA_LDO1_DISCH_SHIFT 2
1596#define MADERA_LDO1_DISCH_WIDTH 1
1597#define MADERA_LDO1_BYPASS 0x0002
1598#define MADERA_LDO1_BYPASS_MASK 0x0002
1599#define MADERA_LDO1_BYPASS_SHIFT 1
1600#define MADERA_LDO1_BYPASS_WIDTH 1
1601#define MADERA_LDO1_ENA 0x0001
1602#define MADERA_LDO1_ENA_MASK 0x0001
1603#define MADERA_LDO1_ENA_SHIFT 0
1604#define MADERA_LDO1_ENA_WIDTH 1
1605
1606/* (0x0213) LDO2_Control_1 */
1607#define MADERA_LDO2_VSEL_MASK 0x07E0
1608#define MADERA_LDO2_VSEL_SHIFT 5
1609#define MADERA_LDO2_VSEL_WIDTH 6
1610#define MADERA_LDO2_FAST 0x0010
1611#define MADERA_LDO2_FAST_MASK 0x0010
1612#define MADERA_LDO2_FAST_SHIFT 4
1613#define MADERA_LDO2_FAST_WIDTH 1
1614#define MADERA_LDO2_DISCH 0x0004
1615#define MADERA_LDO2_DISCH_MASK 0x0004
1616#define MADERA_LDO2_DISCH_SHIFT 2
1617#define MADERA_LDO2_DISCH_WIDTH 1
1618#define MADERA_LDO2_BYPASS 0x0002
1619#define MADERA_LDO2_BYPASS_MASK 0x0002
1620#define MADERA_LDO2_BYPASS_SHIFT 1
1621#define MADERA_LDO2_BYPASS_WIDTH 1
1622#define MADERA_LDO2_ENA 0x0001
1623#define MADERA_LDO2_ENA_MASK 0x0001
1624#define MADERA_LDO2_ENA_SHIFT 0
1625#define MADERA_LDO2_ENA_WIDTH 1
1626
1627/* (0x0218) Mic_Bias_Ctrl_1 */
1628#define MADERA_MICB1_ENA 0x0001
1629#define MADERA_MICB1_ENA_MASK 0x0001
1630#define MADERA_MICB1_ENA_SHIFT 0
1631#define MADERA_MICB1_ENA_WIDTH 1
1632
1633/* (0x021C) Mic_Bias_Ctrl_5 */
1634#define MADERA_MICB1D_ENA 0x1000
1635#define MADERA_MICB1D_ENA_MASK 0x1000
1636#define MADERA_MICB1D_ENA_SHIFT 12
1637#define MADERA_MICB1D_ENA_WIDTH 1
1638#define MADERA_MICB1C_ENA 0x0100
1639#define MADERA_MICB1C_ENA_MASK 0x0100
1640#define MADERA_MICB1C_ENA_SHIFT 8
1641#define MADERA_MICB1C_ENA_WIDTH 1
1642#define MADERA_MICB1B_ENA 0x0010
1643#define MADERA_MICB1B_ENA_MASK 0x0010
1644#define MADERA_MICB1B_ENA_SHIFT 4
1645#define MADERA_MICB1B_ENA_WIDTH 1
1646#define MADERA_MICB1A_ENA 0x0001
1647#define MADERA_MICB1A_ENA_MASK 0x0001
1648#define MADERA_MICB1A_ENA_SHIFT 0
1649#define MADERA_MICB1A_ENA_WIDTH 1
1650
1651/* (0x021E) Mic_Bias_Ctrl_6 */
1652#define MADERA_MICB2D_ENA 0x1000
1653#define MADERA_MICB2D_ENA_MASK 0x1000
1654#define MADERA_MICB2D_ENA_SHIFT 12
1655#define MADERA_MICB2D_ENA_WIDTH 1
1656#define MADERA_MICB2C_ENA 0x0100
1657#define MADERA_MICB2C_ENA_MASK 0x0100
1658#define MADERA_MICB2C_ENA_SHIFT 8
1659#define MADERA_MICB2C_ENA_WIDTH 1
1660#define MADERA_MICB2B_ENA 0x0010
1661#define MADERA_MICB2B_ENA_MASK 0x0010
1662#define MADERA_MICB2B_ENA_SHIFT 4
1663#define MADERA_MICB2B_ENA_WIDTH 1
1664#define MADERA_MICB2A_ENA 0x0001
1665#define MADERA_MICB2A_ENA_MASK 0x0001
1666#define MADERA_MICB2A_ENA_SHIFT 0
1667#define MADERA_MICB2A_ENA_WIDTH 1
1668
1669/* (0x0225) - HP Ctrl 1L */
1670#define MADERA_RMV_SHRT_HP1L 0x4000
1671#define MADERA_RMV_SHRT_HP1L_MASK 0x4000
1672#define MADERA_RMV_SHRT_HP1L_SHIFT 14
1673#define MADERA_RMV_SHRT_HP1L_WIDTH 1
1674#define MADERA_HP1L_FLWR 0x0004
1675#define MADERA_HP1L_FLWR_MASK 0x0004
1676#define MADERA_HP1L_FLWR_SHIFT 2
1677#define MADERA_HP1L_FLWR_WIDTH 1
1678#define MADERA_HP1L_SHRTI 0x0002
1679#define MADERA_HP1L_SHRTI_MASK 0x0002
1680#define MADERA_HP1L_SHRTI_SHIFT 1
1681#define MADERA_HP1L_SHRTI_WIDTH 1
1682#define MADERA_HP1L_SHRTO 0x0001
1683#define MADERA_HP1L_SHRTO_MASK 0x0001
1684#define MADERA_HP1L_SHRTO_SHIFT 0
1685#define MADERA_HP1L_SHRTO_WIDTH 1
1686
1687/* (0x0226) - HP Ctrl 1R */
1688#define MADERA_RMV_SHRT_HP1R 0x4000
1689#define MADERA_RMV_SHRT_HP1R_MASK 0x4000
1690#define MADERA_RMV_SHRT_HP1R_SHIFT 14
1691#define MADERA_RMV_SHRT_HP1R_WIDTH 1
1692#define MADERA_HP1R_FLWR 0x0004
1693#define MADERA_HP1R_FLWR_MASK 0x0004
1694#define MADERA_HP1R_FLWR_SHIFT 2
1695#define MADERA_HP1R_FLWR_WIDTH 1
1696#define MADERA_HP1R_SHRTI 0x0002
1697#define MADERA_HP1R_SHRTI_MASK 0x0002
1698#define MADERA_HP1R_SHRTI_SHIFT 1
1699#define MADERA_HP1R_SHRTI_WIDTH 1
1700#define MADERA_HP1R_SHRTO 0x0001
1701#define MADERA_HP1R_SHRTO_MASK 0x0001
1702#define MADERA_HP1R_SHRTO_SHIFT 0
1703#define MADERA_HP1R_SHRTO_WIDTH 1
1704
1705/* (0x0293) Accessory_Detect_Mode_1 */
1706#define MADERA_ACCDET_SRC 0x2000
1707#define MADERA_ACCDET_SRC_MASK 0x2000
1708#define MADERA_ACCDET_SRC_SHIFT 13
1709#define MADERA_ACCDET_SRC_WIDTH 1
1710#define MADERA_ACCDET_POLARITY_INV_ENA 0x0080
1711#define MADERA_ACCDET_POLARITY_INV_ENA_MASK 0x0080
1712#define MADERA_ACCDET_POLARITY_INV_ENA_SHIFT 7
1713#define MADERA_ACCDET_POLARITY_INV_ENA_WIDTH 1
1714#define MADERA_ACCDET_MODE_MASK 0x0007
1715#define MADERA_ACCDET_MODE_SHIFT 0
1716#define MADERA_ACCDET_MODE_WIDTH 3
1717
1718/* (0x0299) Headphone_Detect_0 */
1719#define MADERA_HPD_GND_SEL 0x0007
1720#define MADERA_HPD_GND_SEL_MASK 0x0007
1721#define MADERA_HPD_GND_SEL_SHIFT 0
1722#define MADERA_HPD_GND_SEL_WIDTH 3
1723#define MADERA_HPD_SENSE_SEL 0x00F0
1724#define MADERA_HPD_SENSE_SEL_MASK 0x00F0
1725#define MADERA_HPD_SENSE_SEL_SHIFT 4
1726#define MADERA_HPD_SENSE_SEL_WIDTH 4
1727#define MADERA_HPD_FRC_SEL 0x0F00
1728#define MADERA_HPD_FRC_SEL_MASK 0x0F00
1729#define MADERA_HPD_FRC_SEL_SHIFT 8
1730#define MADERA_HPD_FRC_SEL_WIDTH 4
1731#define MADERA_HPD_OUT_SEL 0x7000
1732#define MADERA_HPD_OUT_SEL_MASK 0x7000
1733#define MADERA_HPD_OUT_SEL_SHIFT 12
1734#define MADERA_HPD_OUT_SEL_WIDTH 3
1735#define MADERA_HPD_OVD_ENA_SEL 0x8000
1736#define MADERA_HPD_OVD_ENA_SEL_MASK 0x8000
1737#define MADERA_HPD_OVD_ENA_SEL_SHIFT 15
1738#define MADERA_HPD_OVD_ENA_SEL_WIDTH 1
1739
1740/* (0x029B) Headphone_Detect_1 */
1741#define MADERA_HP_IMPEDANCE_RANGE_MASK 0x0600
1742#define MADERA_HP_IMPEDANCE_RANGE_SHIFT 9
1743#define MADERA_HP_IMPEDANCE_RANGE_WIDTH 2
1744#define MADERA_HP_STEP_SIZE 0x0100
1745#define MADERA_HP_STEP_SIZE_MASK 0x0100
1746#define MADERA_HP_STEP_SIZE_SHIFT 8
1747#define MADERA_HP_STEP_SIZE_WIDTH 1
1748#define MADERA_HP_CLK_DIV_MASK 0x0018
1749#define MADERA_HP_CLK_DIV_SHIFT 3
1750#define MADERA_HP_CLK_DIV_WIDTH 2
1751#define MADERA_HP_RATE_MASK 0x0006
1752#define MADERA_HP_RATE_SHIFT 1
1753#define MADERA_HP_RATE_WIDTH 2
1754#define MADERA_HP_POLL 0x0001
1755#define MADERA_HP_POLL_MASK 0x0001
1756#define MADERA_HP_POLL_SHIFT 0
1757#define MADERA_HP_POLL_WIDTH 1
1758
1759/* (0x029C) Headphone_Detect_2 */
1760#define MADERA_HP_DONE_MASK 0x8000
1761#define MADERA_HP_DONE_SHIFT 15
1762#define MADERA_HP_DONE_WIDTH 1
1763#define MADERA_HP_LVL_MASK 0x7FFF
1764#define MADERA_HP_LVL_SHIFT 0
1765#define MADERA_HP_LVL_WIDTH 15
1766
1767/* (0x029D) Headphone_Detect_3 */
1768#define MADERA_HP_DACVAL_MASK 0x03FF
1769#define MADERA_HP_DACVAL_SHIFT 0
1770#define MADERA_HP_DACVAL_WIDTH 10
1771
1772/* (0x029F) - Headphone Detect 5 */
1773#define MADERA_HP_DACVAL_DOWN_MASK 0x03FF
1774#define MADERA_HP_DACVAL_DOWN_SHIFT 0
1775#define MADERA_HP_DACVAL_DOWN_WIDTH 10
1776
1777/* (0x02A2) Mic_Detect_1_Control_0 */
1778#define MADERA_MICD1_GND_MASK 0x0007
1779#define MADERA_MICD1_GND_SHIFT 0
1780#define MADERA_MICD1_GND_WIDTH 3
1781#define MADERA_MICD1_SENSE_MASK 0x00F0
1782#define MADERA_MICD1_SENSE_SHIFT 4
1783#define MADERA_MICD1_SENSE_WIDTH 4
1784#define MADERA_MICD1_ADC_MODE_MASK 0x8000
1785#define MADERA_MICD1_ADC_MODE_SHIFT 15
1786#define MADERA_MICD1_ADC_MODE_WIDTH 1
1787
1788/* (0x02A3) Mic_Detect_1_Control_1 */
1789#define MADERA_MICD_BIAS_STARTTIME_MASK 0xF000
1790#define MADERA_MICD_BIAS_STARTTIME_SHIFT 12
1791#define MADERA_MICD_BIAS_STARTTIME_WIDTH 4
1792#define MADERA_MICD_RATE_MASK 0x0F00
1793#define MADERA_MICD_RATE_SHIFT 8
1794#define MADERA_MICD_RATE_WIDTH 4
1795#define MADERA_MICD_BIAS_SRC_MASK 0x00F0
1796#define MADERA_MICD_BIAS_SRC_SHIFT 4
1797#define MADERA_MICD_BIAS_SRC_WIDTH 4
1798#define MADERA_MICD_DBTIME 0x0002
1799#define MADERA_MICD_DBTIME_MASK 0x0002
1800#define MADERA_MICD_DBTIME_SHIFT 1
1801#define MADERA_MICD_DBTIME_WIDTH 1
1802#define MADERA_MICD_ENA 0x0001
1803#define MADERA_MICD_ENA_MASK 0x0001
1804#define MADERA_MICD_ENA_SHIFT 0
1805#define MADERA_MICD_ENA_WIDTH 1
1806
1807/* (0x02A4) Mic_Detect_1_Control_2 */
1808#define MADERA_MICD_LVL_SEL_MASK 0x00FF
1809#define MADERA_MICD_LVL_SEL_SHIFT 0
1810#define MADERA_MICD_LVL_SEL_WIDTH 8
1811
1812/* (0x02A5) Mic_Detect_1_Control_3 */
1813#define MADERA_MICD_LVL_0 0x0004
1814#define MADERA_MICD_LVL_1 0x0008
1815#define MADERA_MICD_LVL_2 0x0010
1816#define MADERA_MICD_LVL_3 0x0020
1817#define MADERA_MICD_LVL_4 0x0040
1818#define MADERA_MICD_LVL_5 0x0080
1819#define MADERA_MICD_LVL_6 0x0100
1820#define MADERA_MICD_LVL_7 0x0200
1821#define MADERA_MICD_LVL_8 0x0400
1822#define MADERA_MICD_LVL_MASK 0x07FC
1823#define MADERA_MICD_LVL_SHIFT 2
1824#define MADERA_MICD_LVL_WIDTH 9
1825#define MADERA_MICD_VALID 0x0002
1826#define MADERA_MICD_VALID_MASK 0x0002
1827#define MADERA_MICD_VALID_SHIFT 1
1828#define MADERA_MICD_VALID_WIDTH 1
1829#define MADERA_MICD_STS 0x0001
1830#define MADERA_MICD_STS_MASK 0x0001
1831#define MADERA_MICD_STS_SHIFT 0
1832#define MADERA_MICD_STS_WIDTH 1
1833
1834/* (0x02AB) Mic_Detect_1_Control_4 */
1835#define MADERA_MICDET_ADCVAL_DIFF_MASK 0xFF00
1836#define MADERA_MICDET_ADCVAL_DIFF_SHIFT 8
1837#define MADERA_MICDET_ADCVAL_DIFF_WIDTH 8
1838#define MADERA_MICDET_ADCVAL_MASK 0x007F
1839#define MADERA_MICDET_ADCVAL_SHIFT 0
1840#define MADERA_MICDET_ADCVAL_WIDTH 7
1841
1842/* (0x02C6) Micd_Clamp_control */
1843#define MADERA_MICD_CLAMP_OVD 0x0010
1844#define MADERA_MICD_CLAMP_OVD_MASK 0x0010
1845#define MADERA_MICD_CLAMP_OVD_SHIFT 4
1846#define MADERA_MICD_CLAMP_OVD_WIDTH 1
1847#define MADERA_MICD_CLAMP_MODE_MASK 0x000F
1848#define MADERA_MICD_CLAMP_MODE_SHIFT 0
1849#define MADERA_MICD_CLAMP_MODE_WIDTH 4
1850
1851/* (0x02C8) GP_Switch_1 */
1852#define MADERA_SW2_MODE_MASK 0x000C
1853#define MADERA_SW2_MODE_SHIFT 2
1854#define MADERA_SW2_MODE_WIDTH 2
1855#define MADERA_SW1_MODE_MASK 0x0003
1856#define MADERA_SW1_MODE_SHIFT 0
1857#define MADERA_SW1_MODE_WIDTH 2
1858
1859/* (0x02D3) Jack_detect_analogue */
1860#define MADERA_JD2_ENA 0x0002
1861#define MADERA_JD2_ENA_MASK 0x0002
1862#define MADERA_JD2_ENA_SHIFT 1
1863#define MADERA_JD2_ENA_WIDTH 1
1864#define MADERA_JD1_ENA 0x0001
1865#define MADERA_JD1_ENA_MASK 0x0001
1866#define MADERA_JD1_ENA_SHIFT 0
1867#define MADERA_JD1_ENA_WIDTH 1
1868
1869/* (0x0300) Input_Enables */
1870#define MADERA_IN6L_ENA 0x0800
1871#define MADERA_IN6L_ENA_MASK 0x0800
1872#define MADERA_IN6L_ENA_SHIFT 11
1873#define MADERA_IN6L_ENA_WIDTH 1
1874#define MADERA_IN6R_ENA 0x0400
1875#define MADERA_IN6R_ENA_MASK 0x0400
1876#define MADERA_IN6R_ENA_SHIFT 10
1877#define MADERA_IN6R_ENA_WIDTH 1
1878#define MADERA_IN5L_ENA 0x0200
1879#define MADERA_IN5L_ENA_MASK 0x0200
1880#define MADERA_IN5L_ENA_SHIFT 9
1881#define MADERA_IN5L_ENA_WIDTH 1
1882#define MADERA_IN5R_ENA 0x0100
1883#define MADERA_IN5R_ENA_MASK 0x0100
1884#define MADERA_IN5R_ENA_SHIFT 8
1885#define MADERA_IN5R_ENA_WIDTH 1
1886#define MADERA_IN4L_ENA 0x0080
1887#define MADERA_IN4L_ENA_MASK 0x0080
1888#define MADERA_IN4L_ENA_SHIFT 7
1889#define MADERA_IN4L_ENA_WIDTH 1
1890#define MADERA_IN4R_ENA 0x0040
1891#define MADERA_IN4R_ENA_MASK 0x0040
1892#define MADERA_IN4R_ENA_SHIFT 6
1893#define MADERA_IN4R_ENA_WIDTH 1
1894#define MADERA_IN3L_ENA 0x0020
1895#define MADERA_IN3L_ENA_MASK 0x0020
1896#define MADERA_IN3L_ENA_SHIFT 5
1897#define MADERA_IN3L_ENA_WIDTH 1
1898#define MADERA_IN3R_ENA 0x0010
1899#define MADERA_IN3R_ENA_MASK 0x0010
1900#define MADERA_IN3R_ENA_SHIFT 4
1901#define MADERA_IN3R_ENA_WIDTH 1
1902#define MADERA_IN2L_ENA 0x0008
1903#define MADERA_IN2L_ENA_MASK 0x0008
1904#define MADERA_IN2L_ENA_SHIFT 3
1905#define MADERA_IN2L_ENA_WIDTH 1
1906#define MADERA_IN2R_ENA 0x0004
1907#define MADERA_IN2R_ENA_MASK 0x0004
1908#define MADERA_IN2R_ENA_SHIFT 2
1909#define MADERA_IN2R_ENA_WIDTH 1
1910#define MADERA_IN1L_ENA 0x0002
1911#define MADERA_IN1L_ENA_MASK 0x0002
1912#define MADERA_IN1L_ENA_SHIFT 1
1913#define MADERA_IN1L_ENA_WIDTH 1
1914#define MADERA_IN1R_ENA 0x0001
1915#define MADERA_IN1R_ENA_MASK 0x0001
1916#define MADERA_IN1R_ENA_SHIFT 0
1917#define MADERA_IN1R_ENA_WIDTH 1
1918
1919/* (0x0308) Input_Rate */
1920#define MADERA_IN_RATE_MASK 0xF800
1921#define MADERA_IN_RATE_SHIFT 11
1922#define MADERA_IN_RATE_WIDTH 5
1923#define MADERA_IN_MODE_MASK 0x0400
1924#define MADERA_IN_MODE_SHIFT 10
1925#define MADERA_IN_MODE_WIDTH 1
1926
1927/* (0x0309) Input_Volume_Ramp */
1928#define MADERA_IN_VD_RAMP_MASK 0x0070
1929#define MADERA_IN_VD_RAMP_SHIFT 4
1930#define MADERA_IN_VD_RAMP_WIDTH 3
1931#define MADERA_IN_VI_RAMP_MASK 0x0007
1932#define MADERA_IN_VI_RAMP_SHIFT 0
1933#define MADERA_IN_VI_RAMP_WIDTH 3
1934
1935/* (0x030C) HPF_Control */
1936#define MADERA_IN_HPF_CUT_MASK 0x0007
1937#define MADERA_IN_HPF_CUT_SHIFT 0
1938#define MADERA_IN_HPF_CUT_WIDTH 3
1939
1940/* (0x0310) IN1L_Control */
1941#define MADERA_IN1L_HPF_MASK 0x8000
1942#define MADERA_IN1L_HPF_SHIFT 15
1943#define MADERA_IN1L_HPF_WIDTH 1
1944#define MADERA_IN1_DMIC_SUP_MASK 0x1800
1945#define MADERA_IN1_DMIC_SUP_SHIFT 11
1946#define MADERA_IN1_DMIC_SUP_WIDTH 2
1947#define MADERA_IN1_MODE_MASK 0x0400
1948#define MADERA_IN1_MODE_SHIFT 10
1949#define MADERA_IN1_MODE_WIDTH 1
1950#define MADERA_IN1L_PGA_VOL_MASK 0x00FE
1951#define MADERA_IN1L_PGA_VOL_SHIFT 1
1952#define MADERA_IN1L_PGA_VOL_WIDTH 7
1953
1954/* (0x0311) ADC_Digital_Volume_1L */
1955#define MADERA_IN1L_SRC_MASK 0x4000
1956#define MADERA_IN1L_SRC_SHIFT 14
1957#define MADERA_IN1L_SRC_WIDTH 1
1958#define MADERA_IN1L_SRC_SE_MASK 0x2000
1959#define MADERA_IN1L_SRC_SE_SHIFT 13
1960#define MADERA_IN1L_SRC_SE_WIDTH 1
1961#define MADERA_IN1L_LP_MODE 0x0800
1962#define MADERA_IN1L_LP_MODE_MASK 0x0800
1963#define MADERA_IN1L_LP_MODE_SHIFT 11
1964#define MADERA_IN1L_LP_MODE_WIDTH 1
1965#define MADERA_IN_VU 0x0200
1966#define MADERA_IN_VU_MASK 0x0200
1967#define MADERA_IN_VU_SHIFT 9
1968#define MADERA_IN_VU_WIDTH 1
1969#define MADERA_IN1L_MUTE 0x0100
1970#define MADERA_IN1L_MUTE_MASK 0x0100
1971#define MADERA_IN1L_MUTE_SHIFT 8
1972#define MADERA_IN1L_MUTE_WIDTH 1
1973#define MADERA_IN1L_DIG_VOL_MASK 0x00FF
1974#define MADERA_IN1L_DIG_VOL_SHIFT 0
1975#define MADERA_IN1L_DIG_VOL_WIDTH 8
1976
1977/* (0x0312) DMIC1L_Control */
1978#define MADERA_IN1_OSR_MASK 0x0700
1979#define MADERA_IN1_OSR_SHIFT 8
1980#define MADERA_IN1_OSR_WIDTH 3
1981
1982/* (0x0313) IN1L_Rate_Control */
1983#define MADERA_IN1L_RATE_MASK 0xF800
1984#define MADERA_IN1L_RATE_SHIFT 11
1985#define MADERA_IN1L_RATE_WIDTH 5
1986
1987/* (0x0314) IN1R_Control */
1988#define MADERA_IN1R_HPF_MASK 0x8000
1989#define MADERA_IN1R_HPF_SHIFT 15
1990#define MADERA_IN1R_HPF_WIDTH 1
1991#define MADERA_IN1R_PGA_VOL_MASK 0x00FE
1992#define MADERA_IN1R_PGA_VOL_SHIFT 1
1993#define MADERA_IN1R_PGA_VOL_WIDTH 7
1994#define MADERA_IN1_DMICCLK_SRC_MASK 0x1800
1995#define MADERA_IN1_DMICCLK_SRC_SHIFT 11
1996#define MADERA_IN1_DMICCLK_SRC_WIDTH 2
1997
1998/* (0x0315) ADC_Digital_Volume_1R */
1999#define MADERA_IN1R_SRC_MASK 0x4000
2000#define MADERA_IN1R_SRC_SHIFT 14
2001#define MADERA_IN1R_SRC_WIDTH 1
2002#define MADERA_IN1R_SRC_SE_MASK 0x2000
2003#define MADERA_IN1R_SRC_SE_SHIFT 13
2004#define MADERA_IN1R_SRC_SE_WIDTH 1
2005#define MADERA_IN1R_LP_MODE 0x0800
2006#define MADERA_IN1R_LP_MODE_MASK 0x0800
2007#define MADERA_IN1R_LP_MODE_SHIFT 11
2008#define MADERA_IN1R_LP_MODE_WIDTH 1
2009#define MADERA_IN1R_MUTE 0x0100
2010#define MADERA_IN1R_MUTE_MASK 0x0100
2011#define MADERA_IN1R_MUTE_SHIFT 8
2012#define MADERA_IN1R_MUTE_WIDTH 1
2013#define MADERA_IN1R_DIG_VOL_MASK 0x00FF
2014#define MADERA_IN1R_DIG_VOL_SHIFT 0
2015#define MADERA_IN1R_DIG_VOL_WIDTH 8
2016
2017/* (0x0317) IN1R_Rate_Control */
2018#define MADERA_IN1R_RATE_MASK 0xF800
2019#define MADERA_IN1R_RATE_SHIFT 11
2020#define MADERA_IN1R_RATE_WIDTH 5
2021
2022/* (0x0318) IN2L_Control */
2023#define MADERA_IN2L_HPF_MASK 0x8000
2024#define MADERA_IN2L_HPF_SHIFT 15
2025#define MADERA_IN2L_HPF_WIDTH 1
2026#define MADERA_IN2_DMIC_SUP_MASK 0x1800
2027#define MADERA_IN2_DMIC_SUP_SHIFT 11
2028#define MADERA_IN2_DMIC_SUP_WIDTH 2
2029#define MADERA_IN2_MODE_MASK 0x0400
2030#define MADERA_IN2_MODE_SHIFT 10
2031#define MADERA_IN2_MODE_WIDTH 1
2032#define MADERA_IN2L_PGA_VOL_MASK 0x00FE
2033#define MADERA_IN2L_PGA_VOL_SHIFT 1
2034#define MADERA_IN2L_PGA_VOL_WIDTH 7
2035
2036/* (0x0319) ADC_Digital_Volume_2L */
2037#define MADERA_IN2L_SRC_MASK 0x4000
2038#define MADERA_IN2L_SRC_SHIFT 14
2039#define MADERA_IN2L_SRC_WIDTH 1
2040#define MADERA_IN2L_SRC_SE_MASK 0x2000
2041#define MADERA_IN2L_SRC_SE_SHIFT 13
2042#define MADERA_IN2L_SRC_SE_WIDTH 1
2043#define MADERA_IN2L_LP_MODE 0x0800
2044#define MADERA_IN2L_LP_MODE_MASK 0x0800
2045#define MADERA_IN2L_LP_MODE_SHIFT 11
2046#define MADERA_IN2L_LP_MODE_WIDTH 1
2047#define MADERA_IN2L_MUTE 0x0100
2048#define MADERA_IN2L_MUTE_MASK 0x0100
2049#define MADERA_IN2L_MUTE_SHIFT 8
2050#define MADERA_IN2L_MUTE_WIDTH 1
2051#define MADERA_IN2L_DIG_VOL_MASK 0x00FF
2052#define MADERA_IN2L_DIG_VOL_SHIFT 0
2053#define MADERA_IN2L_DIG_VOL_WIDTH 8
2054
2055/* (0x031A) DMIC2L_Control */
2056#define MADERA_IN2_OSR_MASK 0x0700
2057#define MADERA_IN2_OSR_SHIFT 8
2058#define MADERA_IN2_OSR_WIDTH 3
2059
2060/* (0x031C) IN2R_Control */
2061#define MADERA_IN2R_HPF_MASK 0x8000
2062#define MADERA_IN2R_HPF_SHIFT 15
2063#define MADERA_IN2R_HPF_WIDTH 1
2064#define MADERA_IN2R_PGA_VOL_MASK 0x00FE
2065#define MADERA_IN2R_PGA_VOL_SHIFT 1
2066#define MADERA_IN2R_PGA_VOL_WIDTH 7
2067#define MADERA_IN2_DMICCLK_SRC_MASK 0x1800
2068#define MADERA_IN2_DMICCLK_SRC_SHIFT 11
2069#define MADERA_IN2_DMICCLK_SRC_WIDTH 2
2070
2071/* (0x031D) ADC_Digital_Volume_2R */
2072#define MADERA_IN2R_SRC_MASK 0x4000
2073#define MADERA_IN2R_SRC_SHIFT 14
2074#define MADERA_IN2R_SRC_WIDTH 1
2075#define MADERA_IN2R_SRC_SE_MASK 0x2000
2076#define MADERA_IN2R_SRC_SE_SHIFT 13
2077#define MADERA_IN2R_SRC_SE_WIDTH 1
2078#define MADERA_IN2R_LP_MODE 0x0800
2079#define MADERA_IN2R_LP_MODE_MASK 0x0800
2080#define MADERA_IN2R_LP_MODE_SHIFT 11
2081#define MADERA_IN2R_LP_MODE_WIDTH 1
2082#define MADERA_IN2R_MUTE 0x0100
2083#define MADERA_IN2R_MUTE_MASK 0x0100
2084#define MADERA_IN2R_MUTE_SHIFT 8
2085#define MADERA_IN2R_MUTE_WIDTH 1
2086#define MADERA_IN2R_DIG_VOL_MASK 0x00FF
2087#define MADERA_IN2R_DIG_VOL_SHIFT 0
2088#define MADERA_IN2R_DIG_VOL_WIDTH 8
2089
2090/* (0x0320) IN3L_Control */
2091#define MADERA_IN3L_HPF_MASK 0x8000
2092#define MADERA_IN3L_HPF_SHIFT 15
2093#define MADERA_IN3L_HPF_WIDTH 1
2094#define MADERA_IN3_DMIC_SUP_MASK 0x1800
2095#define MADERA_IN3_DMIC_SUP_SHIFT 11
2096#define MADERA_IN3_DMIC_SUP_WIDTH 2
2097#define MADERA_IN3_MODE_MASK 0x0400
2098#define MADERA_IN3_MODE_SHIFT 10
2099#define MADERA_IN3_MODE_WIDTH 1
2100#define MADERA_IN3L_PGA_VOL_MASK 0x00FE
2101#define MADERA_IN3L_PGA_VOL_SHIFT 1
2102#define MADERA_IN3L_PGA_VOL_WIDTH 7
2103
2104/* (0x0321) ADC_Digital_Volume_3L */
2105#define MADERA_IN3L_MUTE 0x0100
2106#define MADERA_IN3L_MUTE_MASK 0x0100
2107#define MADERA_IN3L_MUTE_SHIFT 8
2108#define MADERA_IN3L_MUTE_WIDTH 1
2109#define MADERA_IN3L_DIG_VOL_MASK 0x00FF
2110#define MADERA_IN3L_DIG_VOL_SHIFT 0
2111#define MADERA_IN3L_DIG_VOL_WIDTH 8
2112
2113/* (0x0322) DMIC3L_Control */
2114#define MADERA_IN3_OSR_MASK 0x0700
2115#define MADERA_IN3_OSR_SHIFT 8
2116#define MADERA_IN3_OSR_WIDTH 3
2117
2118/* (0x0324) IN3R_Control */
2119#define MADERA_IN3R_HPF_MASK 0x8000
2120#define MADERA_IN3R_HPF_SHIFT 15
2121#define MADERA_IN3R_HPF_WIDTH 1
2122#define MADERA_IN3R_PGA_VOL_MASK 0x00FE
2123#define MADERA_IN3R_PGA_VOL_SHIFT 1
2124#define MADERA_IN3R_PGA_VOL_WIDTH 7
2125#define MADERA_IN3_DMICCLK_SRC_MASK 0x1800
2126#define MADERA_IN3_DMICCLK_SRC_SHIFT 11
2127#define MADERA_IN3_DMICCLK_SRC_WIDTH 2
2128
2129/* (0x0325) ADC_Digital_Volume_3R */
2130#define MADERA_IN3R_MUTE 0x0100
2131#define MADERA_IN3R_MUTE_MASK 0x0100
2132#define MADERA_IN3R_MUTE_SHIFT 8
2133#define MADERA_IN3R_MUTE_WIDTH 1
2134#define MADERA_IN3R_DIG_VOL_MASK 0x00FF
2135#define MADERA_IN3R_DIG_VOL_SHIFT 0
2136#define MADERA_IN3R_DIG_VOL_WIDTH 8
2137
2138/* (0x0328) IN4L_Control */
2139#define MADERA_IN4L_HPF_MASK 0x8000
2140#define MADERA_IN4L_HPF_SHIFT 15
2141#define MADERA_IN4L_HPF_WIDTH 1
2142#define MADERA_IN4_DMIC_SUP_MASK 0x1800
2143#define MADERA_IN4_DMIC_SUP_SHIFT 11
2144#define MADERA_IN4_DMIC_SUP_WIDTH 2
2145
2146/* (0x0329) ADC_Digital_Volume_4L */
2147#define MADERA_IN4L_MUTE 0x0100
2148#define MADERA_IN4L_MUTE_MASK 0x0100
2149#define MADERA_IN4L_MUTE_SHIFT 8
2150#define MADERA_IN4L_MUTE_WIDTH 1
2151#define MADERA_IN4L_DIG_VOL_MASK 0x00FF
2152#define MADERA_IN4L_DIG_VOL_SHIFT 0
2153#define MADERA_IN4L_DIG_VOL_WIDTH 8
2154
2155/* (0x032A) DMIC4L_Control */
2156#define MADERA_IN4_OSR_MASK 0x0700
2157#define MADERA_IN4_OSR_SHIFT 8
2158#define MADERA_IN4_OSR_WIDTH 3
2159
2160/* (0x032C) IN4R_Control */
2161#define MADERA_IN4R_HPF_MASK 0x8000
2162#define MADERA_IN4R_HPF_SHIFT 15
2163#define MADERA_IN4R_HPF_WIDTH 1
2164#define MADERA_IN4_DMICCLK_SRC_MASK 0x1800
2165#define MADERA_IN4_DMICCLK_SRC_SHIFT 11
2166#define MADERA_IN4_DMICCLK_SRC_WIDTH 2
2167
2168/* (0x032D) ADC_Digital_Volume_4R */
2169#define MADERA_IN4R_MUTE 0x0100
2170#define MADERA_IN4R_MUTE_MASK 0x0100
2171#define MADERA_IN4R_MUTE_SHIFT 8
2172#define MADERA_IN4R_MUTE_WIDTH 1
2173#define MADERA_IN4R_DIG_VOL_MASK 0x00FF
2174#define MADERA_IN4R_DIG_VOL_SHIFT 0
2175#define MADERA_IN4R_DIG_VOL_WIDTH 8
2176
2177/* (0x0330) IN5L_Control */
2178#define MADERA_IN5L_HPF_MASK 0x8000
2179#define MADERA_IN5L_HPF_SHIFT 15
2180#define MADERA_IN5L_HPF_WIDTH 1
2181#define MADERA_IN5_DMIC_SUP_MASK 0x1800
2182#define MADERA_IN5_DMIC_SUP_SHIFT 11
2183#define MADERA_IN5_DMIC_SUP_WIDTH 2
2184
2185/* (0x0331) ADC_Digital_Volume_5L */
2186#define MADERA_IN5L_MUTE 0x0100
2187#define MADERA_IN5L_MUTE_MASK 0x0100
2188#define MADERA_IN5L_MUTE_SHIFT 8
2189#define MADERA_IN5L_MUTE_WIDTH 1
2190#define MADERA_IN5L_DIG_VOL_MASK 0x00FF
2191#define MADERA_IN5L_DIG_VOL_SHIFT 0
2192#define MADERA_IN5L_DIG_VOL_WIDTH 8
2193
2194/* (0x0332) DMIC5L_Control */
2195#define MADERA_IN5_OSR_MASK 0x0700
2196#define MADERA_IN5_OSR_SHIFT 8
2197#define MADERA_IN5_OSR_WIDTH 3
2198
2199/* (0x0334) IN5R_Control */
2200#define MADERA_IN5R_HPF_MASK 0x8000
2201#define MADERA_IN5R_HPF_SHIFT 15
2202#define MADERA_IN5R_HPF_WIDTH 1
2203#define MADERA_IN5_DMICCLK_SRC_MASK 0x1800
2204#define MADERA_IN5_DMICCLK_SRC_SHIFT 11
2205#define MADERA_IN5_DMICCLK_SRC_WIDTH 2
2206
2207/* (0x0335) ADC_Digital_Volume_5R */
2208#define MADERA_IN5R_MUTE 0x0100
2209#define MADERA_IN5R_MUTE_MASK 0x0100
2210#define MADERA_IN5R_MUTE_SHIFT 8
2211#define MADERA_IN5R_MUTE_WIDTH 1
2212#define MADERA_IN5R_DIG_VOL_MASK 0x00FF
2213#define MADERA_IN5R_DIG_VOL_SHIFT 0
2214#define MADERA_IN5R_DIG_VOL_WIDTH 8
2215
2216/* (0x0338) IN6L_Control */
2217#define MADERA_IN6L_HPF_MASK 0x8000
2218#define MADERA_IN6L_HPF_SHIFT 15
2219#define MADERA_IN6L_HPF_WIDTH 1
2220#define MADERA_IN6_DMIC_SUP_MASK 0x1800
2221#define MADERA_IN6_DMIC_SUP_SHIFT 11
2222#define MADERA_IN6_DMIC_SUP_WIDTH 2
2223
2224/* (0x0339) ADC_Digital_Volume_6L */
2225#define MADERA_IN6L_MUTE 0x0100
2226#define MADERA_IN6L_MUTE_MASK 0x0100
2227#define MADERA_IN6L_MUTE_SHIFT 8
2228#define MADERA_IN6L_MUTE_WIDTH 1
2229#define MADERA_IN6L_DIG_VOL_MASK 0x00FF
2230#define MADERA_IN6L_DIG_VOL_SHIFT 0
2231#define MADERA_IN6L_DIG_VOL_WIDTH 8
2232
2233/* (0x033A) DMIC6L_Control */
2234#define MADERA_IN6_OSR_MASK 0x0700
2235#define MADERA_IN6_OSR_SHIFT 8
2236#define MADERA_IN6_OSR_WIDTH 3
2237
2238/* (0x033C) IN6R_Control */
2239#define MADERA_IN6R_HPF_MASK 0x8000
2240#define MADERA_IN6R_HPF_SHIFT 15
2241#define MADERA_IN6R_HPF_WIDTH 1
2242
2243/* (0x033D) ADC_Digital_Volume_6R */
2244#define MADERA_IN6R_MUTE 0x0100
2245#define MADERA_IN6R_MUTE_MASK 0x0100
2246#define MADERA_IN6R_MUTE_SHIFT 8
2247#define MADERA_IN6R_MUTE_WIDTH 1
2248#define MADERA_IN6R_DIG_VOL_MASK 0x00FF
2249#define MADERA_IN6R_DIG_VOL_SHIFT 0
2250#define MADERA_IN6R_DIG_VOL_WIDTH 8
2251
2252/* (0x033E) DMIC6R_Control */
2253#define MADERA_IN6_DMICCLK_SRC_MASK 0x1800
2254#define MADERA_IN6_DMICCLK_SRC_SHIFT 11
2255#define MADERA_IN6_DMICCLK_SRC_WIDTH 2
2256
2257/* (0x0400) Output_Enables_1 */
2258#define MADERA_EP_SEL 0x8000
2259#define MADERA_EP_SEL_MASK 0x8000
2260#define MADERA_EP_SEL_SHIFT 15
2261#define MADERA_EP_SEL_WIDTH 1
2262#define MADERA_OUT6L_ENA 0x0800
2263#define MADERA_OUT6L_ENA_MASK 0x0800
2264#define MADERA_OUT6L_ENA_SHIFT 11
2265#define MADERA_OUT6L_ENA_WIDTH 1
2266#define MADERA_OUT6R_ENA 0x0400
2267#define MADERA_OUT6R_ENA_MASK 0x0400
2268#define MADERA_OUT6R_ENA_SHIFT 10
2269#define MADERA_OUT6R_ENA_WIDTH 1
2270#define MADERA_OUT5L_ENA 0x0200
2271#define MADERA_OUT5L_ENA_MASK 0x0200
2272#define MADERA_OUT5L_ENA_SHIFT 9
2273#define MADERA_OUT5L_ENA_WIDTH 1
2274#define MADERA_OUT5R_ENA 0x0100
2275#define MADERA_OUT5R_ENA_MASK 0x0100
2276#define MADERA_OUT5R_ENA_SHIFT 8
2277#define MADERA_OUT5R_ENA_WIDTH 1
2278#define MADERA_OUT4L_ENA 0x0080
2279#define MADERA_OUT4L_ENA_MASK 0x0080
2280#define MADERA_OUT4L_ENA_SHIFT 7
2281#define MADERA_OUT4L_ENA_WIDTH 1
2282#define MADERA_OUT4R_ENA 0x0040
2283#define MADERA_OUT4R_ENA_MASK 0x0040
2284#define MADERA_OUT4R_ENA_SHIFT 6
2285#define MADERA_OUT4R_ENA_WIDTH 1
2286#define MADERA_OUT3L_ENA 0x0020
2287#define MADERA_OUT3L_ENA_MASK 0x0020
2288#define MADERA_OUT3L_ENA_SHIFT 5
2289#define MADERA_OUT3L_ENA_WIDTH 1
2290#define MADERA_OUT3R_ENA 0x0010
2291#define MADERA_OUT3R_ENA_MASK 0x0010
2292#define MADERA_OUT3R_ENA_SHIFT 4
2293#define MADERA_OUT3R_ENA_WIDTH 1
2294#define MADERA_OUT2L_ENA 0x0008
2295#define MADERA_OUT2L_ENA_MASK 0x0008
2296#define MADERA_OUT2L_ENA_SHIFT 3
2297#define MADERA_OUT2L_ENA_WIDTH 1
2298#define MADERA_OUT2R_ENA 0x0004
2299#define MADERA_OUT2R_ENA_MASK 0x0004
2300#define MADERA_OUT2R_ENA_SHIFT 2
2301#define MADERA_OUT2R_ENA_WIDTH 1
2302#define MADERA_OUT1L_ENA 0x0002
2303#define MADERA_OUT1L_ENA_MASK 0x0002
2304#define MADERA_OUT1L_ENA_SHIFT 1
2305#define MADERA_OUT1L_ENA_WIDTH 1
2306#define MADERA_OUT1R_ENA 0x0001
2307#define MADERA_OUT1R_ENA_MASK 0x0001
2308#define MADERA_OUT1R_ENA_SHIFT 0
2309#define MADERA_OUT1R_ENA_WIDTH 1
2310
2311/* (0x0409) Output_Volume_Ramp */
2312#define MADERA_OUT_VD_RAMP_MASK 0x0070
2313#define MADERA_OUT_VD_RAMP_SHIFT 4
2314#define MADERA_OUT_VD_RAMP_WIDTH 3
2315#define MADERA_OUT_VI_RAMP_MASK 0x0007
2316#define MADERA_OUT_VI_RAMP_SHIFT 0
2317#define MADERA_OUT_VI_RAMP_WIDTH 3
2318
2319/* (0x0410) Output_Path_Config_1L */
2320#define MADERA_OUT1_MONO 0x1000
2321#define MADERA_OUT1_MONO_MASK 0x1000
2322#define MADERA_OUT1_MONO_SHIFT 12
2323#define MADERA_OUT1_MONO_WIDTH 1
2324#define MADERA_OUT1L_ANC_SRC_MASK 0x0C00
2325#define MADERA_OUT1L_ANC_SRC_SHIFT 10
2326#define MADERA_OUT1L_ANC_SRC_WIDTH 2
2327
2328/* (0x0411) DAC_Digital_Volume_1L */
2329#define MADERA_OUT1L_VU 0x0200
2330#define MADERA_OUT1L_VU_MASK 0x0200
2331#define MADERA_OUT1L_VU_SHIFT 9
2332#define MADERA_OUT1L_VU_WIDTH 1
2333#define MADERA_OUT1L_MUTE 0x0100
2334#define MADERA_OUT1L_MUTE_MASK 0x0100
2335#define MADERA_OUT1L_MUTE_SHIFT 8
2336#define MADERA_OUT1L_MUTE_WIDTH 1
2337#define MADERA_OUT1L_VOL_MASK 0x00FF
2338#define MADERA_OUT1L_VOL_SHIFT 0
2339#define MADERA_OUT1L_VOL_WIDTH 8
2340
2341/* (0x0412) Output_Path_Config_1 */
2342#define MADERA_HP1_GND_SEL_MASK 0x0007
2343#define MADERA_HP1_GND_SEL_SHIFT 0
2344#define MADERA_HP1_GND_SEL_WIDTH 3
2345
2346/* (0x0414) Output_Path_Config_1R */
2347#define MADERA_OUT1R_ANC_SRC_MASK 0x0C00
2348#define MADERA_OUT1R_ANC_SRC_SHIFT 10
2349#define MADERA_OUT1R_ANC_SRC_WIDTH 2
2350
2351/* (0x0415) DAC_Digital_Volume_1R */
2352#define MADERA_OUT1R_MUTE 0x0100
2353#define MADERA_OUT1R_MUTE_MASK 0x0100
2354#define MADERA_OUT1R_MUTE_SHIFT 8
2355#define MADERA_OUT1R_MUTE_WIDTH 1
2356#define MADERA_OUT1R_VOL_MASK 0x00FF
2357#define MADERA_OUT1R_VOL_SHIFT 0
2358#define MADERA_OUT1R_VOL_WIDTH 8
2359
2360/* (0x0418) Output_Path_Config_2L */
2361#define MADERA_OUT2L_ANC_SRC_MASK 0x0C00
2362#define MADERA_OUT2L_ANC_SRC_SHIFT 10
2363#define MADERA_OUT2L_ANC_SRC_WIDTH 2
2364
2365/* (0x0419) DAC_Digital_Volume_2L */
2366#define MADERA_OUT2L_MUTE 0x0100
2367#define MADERA_OUT2L_MUTE_MASK 0x0100
2368#define MADERA_OUT2L_MUTE_SHIFT 8
2369#define MADERA_OUT2L_MUTE_WIDTH 1
2370#define MADERA_OUT2L_VOL_MASK 0x00FF
2371#define MADERA_OUT2L_VOL_SHIFT 0
2372#define MADERA_OUT2L_VOL_WIDTH 8
2373
2374/* (0x041A) Output_Path_Config_2 */
2375#define MADERA_HP2_GND_SEL_MASK 0x0007
2376#define MADERA_HP2_GND_SEL_SHIFT 0
2377#define MADERA_HP2_GND_SEL_WIDTH 3
2378
2379/* (0x041C) Output_Path_Config_2R */
2380#define MADERA_OUT2R_ANC_SRC_MASK 0x0C00
2381#define MADERA_OUT2R_ANC_SRC_SHIFT 10
2382#define MADERA_OUT2R_ANC_SRC_WIDTH 2
2383
2384/* (0x041D) DAC_Digital_Volume_2R */
2385#define MADERA_OUT2R_MUTE 0x0100
2386#define MADERA_OUT2R_MUTE_MASK 0x0100
2387#define MADERA_OUT2R_MUTE_SHIFT 8
2388#define MADERA_OUT2R_MUTE_WIDTH 1
2389#define MADERA_OUT2R_VOL_MASK 0x00FF
2390#define MADERA_OUT2R_VOL_SHIFT 0
2391#define MADERA_OUT2R_VOL_WIDTH 8
2392
2393/* (0x0420) Output_Path_Config_3L */
2394#define MADERA_OUT3L_ANC_SRC_MASK 0x0C00
2395#define MADERA_OUT3L_ANC_SRC_SHIFT 10
2396#define MADERA_OUT3L_ANC_SRC_WIDTH 2
2397
2398/* (0x0421) DAC_Digital_Volume_3L */
2399#define MADERA_OUT3L_MUTE 0x0100
2400#define MADERA_OUT3L_MUTE_MASK 0x0100
2401#define MADERA_OUT3L_MUTE_SHIFT 8
2402#define MADERA_OUT3L_MUTE_WIDTH 1
2403#define MADERA_OUT3L_VOL_MASK 0x00FF
2404#define MADERA_OUT3L_VOL_SHIFT 0
2405#define MADERA_OUT3L_VOL_WIDTH 8
2406
2407/* (0x0424) Output_Path_Config_3R */
2408#define MADERA_OUT3R_ANC_SRC_MASK 0x0C00
2409#define MADERA_OUT3R_ANC_SRC_SHIFT 10
2410#define MADERA_OUT3R_ANC_SRC_WIDTH 2
2411
2412/* (0x0425) DAC_Digital_Volume_3R */
2413#define MADERA_OUT3R_MUTE 0x0100
2414#define MADERA_OUT3R_MUTE_MASK 0x0100
2415#define MADERA_OUT3R_MUTE_SHIFT 8
2416#define MADERA_OUT3R_MUTE_WIDTH 1
2417#define MADERA_OUT3R_VOL_MASK 0x00FF
2418#define MADERA_OUT3R_VOL_SHIFT 0
2419#define MADERA_OUT3R_VOL_WIDTH 8
2420
2421/* (0x0428) Output_Path_Config_4L */
2422#define MADERA_OUT4L_ANC_SRC_MASK 0x0C00
2423#define MADERA_OUT4L_ANC_SRC_SHIFT 10
2424#define MADERA_OUT4L_ANC_SRC_WIDTH 2
2425
2426/* (0x0429) DAC_Digital_Volume_4L */
2427#define MADERA_OUT4L_MUTE 0x0100
2428#define MADERA_OUT4L_MUTE_MASK 0x0100
2429#define MADERA_OUT4L_MUTE_SHIFT 8
2430#define MADERA_OUT4L_MUTE_WIDTH 1
2431#define MADERA_OUT4L_VOL_MASK 0x00FF
2432#define MADERA_OUT4L_VOL_SHIFT 0
2433#define MADERA_OUT4L_VOL_WIDTH 8
2434
2435/* (0x042C) Output_Path_Config_4R */
2436#define MADERA_OUT4R_ANC_SRC_MASK 0x0C00
2437#define MADERA_OUT4R_ANC_SRC_SHIFT 10
2438#define MADERA_OUT4R_ANC_SRC_WIDTH 2
2439
2440/* (0x042D) DAC_Digital_Volume_4R */
2441#define MADERA_OUT4R_MUTE 0x0100
2442#define MADERA_OUT4R_MUTE_MASK 0x0100
2443#define MADERA_OUT4R_MUTE_SHIFT 8
2444#define MADERA_OUT4R_MUTE_WIDTH 1
2445#define MADERA_OUT4R_VOL_MASK 0x00FF
2446#define MADERA_OUT4R_VOL_SHIFT 0
2447#define MADERA_OUT4R_VOL_WIDTH 8
2448
2449/* (0x0430) Output_Path_Config_5L */
2450#define MADERA_OUT5_OSR 0x2000
2451#define MADERA_OUT5_OSR_MASK 0x2000
2452#define MADERA_OUT5_OSR_SHIFT 13
2453#define MADERA_OUT5_OSR_WIDTH 1
2454#define MADERA_OUT5L_ANC_SRC_MASK 0x0C00
2455#define MADERA_OUT5L_ANC_SRC_SHIFT 10
2456#define MADERA_OUT5L_ANC_SRC_WIDTH 2
2457
2458/* (0x0431) DAC_Digital_Volume_5L */
2459#define MADERA_OUT5L_MUTE 0x0100
2460#define MADERA_OUT5L_MUTE_MASK 0x0100
2461#define MADERA_OUT5L_MUTE_SHIFT 8
2462#define MADERA_OUT5L_MUTE_WIDTH 1
2463#define MADERA_OUT5L_VOL_MASK 0x00FF
2464#define MADERA_OUT5L_VOL_SHIFT 0
2465#define MADERA_OUT5L_VOL_WIDTH 8
2466
2467/* (0x0434) Output_Path_Config_5R */
2468#define MADERA_OUT5R_ANC_SRC_MASK 0x0C00
2469#define MADERA_OUT5R_ANC_SRC_SHIFT 10
2470#define MADERA_OUT5R_ANC_SRC_WIDTH 2
2471
2472/* (0x0435) DAC_Digital_Volume_5R */
2473#define MADERA_OUT5R_MUTE 0x0100
2474#define MADERA_OUT5R_MUTE_MASK 0x0100
2475#define MADERA_OUT5R_MUTE_SHIFT 8
2476#define MADERA_OUT5R_MUTE_WIDTH 1
2477#define MADERA_OUT5R_VOL_MASK 0x00FF
2478#define MADERA_OUT5R_VOL_SHIFT 0
2479#define MADERA_OUT5R_VOL_WIDTH 8
2480
2481/* (0x0438) Output_Path_Config_6L */
2482#define MADERA_OUT6_OSR 0x2000
2483#define MADERA_OUT6_OSR_MASK 0x2000
2484#define MADERA_OUT6_OSR_SHIFT 13
2485#define MADERA_OUT6_OSR_WIDTH 1
2486#define MADERA_OUT6L_ANC_SRC_MASK 0x0C00
2487#define MADERA_OUT6L_ANC_SRC_SHIFT 10
2488#define MADERA_OUT6L_ANC_SRC_WIDTH 2
2489
2490/* (0x0439) DAC_Digital_Volume_6L */
2491#define MADERA_OUT6L_MUTE 0x0100
2492#define MADERA_OUT6L_MUTE_MASK 0x0100
2493#define MADERA_OUT6L_MUTE_SHIFT 8
2494#define MADERA_OUT6L_MUTE_WIDTH 1
2495#define MADERA_OUT6L_VOL_MASK 0x00FF
2496#define MADERA_OUT6L_VOL_SHIFT 0
2497#define MADERA_OUT6L_VOL_WIDTH 8
2498
2499/* (0x043C) Output_Path_Config_6R */
2500#define MADERA_OUT6R_ANC_SRC_MASK 0x0C00
2501#define MADERA_OUT6R_ANC_SRC_SHIFT 10
2502#define MADERA_OUT6R_ANC_SRC_WIDTH 2
2503
2504/* (0x043D) DAC_Digital_Volume_6R */
2505#define MADERA_OUT6R_MUTE 0x0100
2506#define MADERA_OUT6R_MUTE_MASK 0x0100
2507#define MADERA_OUT6R_MUTE_SHIFT 8
2508#define MADERA_OUT6R_MUTE_WIDTH 1
2509#define MADERA_OUT6R_VOL_MASK 0x00FF
2510#define MADERA_OUT6R_VOL_SHIFT 0
2511#define MADERA_OUT6R_VOL_WIDTH 8
2512
2513/* (0x0450) - DAC AEC Control 1 */
2514#define MADERA_AEC1_LOOPBACK_SRC_MASK 0x003C
2515#define MADERA_AEC1_LOOPBACK_SRC_SHIFT 2
2516#define MADERA_AEC1_LOOPBACK_SRC_WIDTH 4
2517#define MADERA_AEC1_ENA_STS 0x0002
2518#define MADERA_AEC1_ENA_STS_MASK 0x0002
2519#define MADERA_AEC1_ENA_STS_SHIFT 1
2520#define MADERA_AEC1_ENA_STS_WIDTH 1
2521#define MADERA_AEC1_LOOPBACK_ENA 0x0001
2522#define MADERA_AEC1_LOOPBACK_ENA_MASK 0x0001
2523#define MADERA_AEC1_LOOPBACK_ENA_SHIFT 0
2524#define MADERA_AEC1_LOOPBACK_ENA_WIDTH 1
2525
2526/* (0x0451) DAC_AEC_Control_2 */
2527#define MADERA_AEC2_LOOPBACK_SRC_MASK 0x003C
2528#define MADERA_AEC2_LOOPBACK_SRC_SHIFT 2
2529#define MADERA_AEC2_LOOPBACK_SRC_WIDTH 4
2530#define MADERA_AEC2_ENA_STS 0x0002
2531#define MADERA_AEC2_ENA_STS_MASK 0x0002
2532#define MADERA_AEC2_ENA_STS_SHIFT 1
2533#define MADERA_AEC2_ENA_STS_WIDTH 1
2534#define MADERA_AEC2_LOOPBACK_ENA 0x0001
2535#define MADERA_AEC2_LOOPBACK_ENA_MASK 0x0001
2536#define MADERA_AEC2_LOOPBACK_ENA_SHIFT 0
2537#define MADERA_AEC2_LOOPBACK_ENA_WIDTH 1
2538
2539/* (0x0458) Noise_Gate_Control */
2540#define MADERA_NGATE_HOLD_MASK 0x0030
2541#define MADERA_NGATE_HOLD_SHIFT 4
2542#define MADERA_NGATE_HOLD_WIDTH 2
2543#define MADERA_NGATE_THR_MASK 0x000E
2544#define MADERA_NGATE_THR_SHIFT 1
2545#define MADERA_NGATE_THR_WIDTH 3
2546#define MADERA_NGATE_ENA 0x0001
2547#define MADERA_NGATE_ENA_MASK 0x0001
2548#define MADERA_NGATE_ENA_SHIFT 0
2549#define MADERA_NGATE_ENA_WIDTH 1
2550
2551/* (0x0490) PDM_SPK1_CTRL_1 */
2552#define MADERA_SPK1R_MUTE 0x2000
2553#define MADERA_SPK1R_MUTE_MASK 0x2000
2554#define MADERA_SPK1R_MUTE_SHIFT 13
2555#define MADERA_SPK1R_MUTE_WIDTH 1
2556#define MADERA_SPK1L_MUTE 0x1000
2557#define MADERA_SPK1L_MUTE_MASK 0x1000
2558#define MADERA_SPK1L_MUTE_SHIFT 12
2559#define MADERA_SPK1L_MUTE_WIDTH 1
2560#define MADERA_SPK1_MUTE_ENDIAN 0x0100
2561#define MADERA_SPK1_MUTE_ENDIAN_MASK 0x0100
2562#define MADERA_SPK1_MUTE_ENDIAN_SHIFT 8
2563#define MADERA_SPK1_MUTE_ENDIAN_WIDTH 1
2564#define MADERA_SPK1_MUTE_SEQ1_MASK 0x00FF
2565#define MADERA_SPK1_MUTE_SEQ1_SHIFT 0
2566#define MADERA_SPK1_MUTE_SEQ1_WIDTH 8
2567
2568/* (0x0491) PDM_SPK1_CTRL_2 */
2569#define MADERA_SPK1_FMT 0x0001
2570#define MADERA_SPK1_FMT_MASK 0x0001
2571#define MADERA_SPK1_FMT_SHIFT 0
2572#define MADERA_SPK1_FMT_WIDTH 1
2573
2574/* (0x0492) PDM_SPK2_CTRL_1 */
2575#define MADERA_SPK2R_MUTE 0x2000
2576#define MADERA_SPK2R_MUTE_MASK 0x2000
2577#define MADERA_SPK2R_MUTE_SHIFT 13
2578#define MADERA_SPK2R_MUTE_WIDTH 1
2579#define MADERA_SPK2L_MUTE 0x1000
2580#define MADERA_SPK2L_MUTE_MASK 0x1000
2581#define MADERA_SPK2L_MUTE_SHIFT 12
2582#define MADERA_SPK2L_MUTE_WIDTH 1
2583
2584/* (0x04A0) - HP1 Short Circuit Ctrl */
2585#define MADERA_HP1_SC_ENA 0x1000
2586#define MADERA_HP1_SC_ENA_MASK 0x1000
2587#define MADERA_HP1_SC_ENA_SHIFT 12
2588#define MADERA_HP1_SC_ENA_WIDTH 1
2589
2590/* (0x04A1) - HP2 Short Circuit Ctrl */
2591#define MADERA_HP2_SC_ENA 0x1000
2592#define MADERA_HP2_SC_ENA_MASK 0x1000
2593#define MADERA_HP2_SC_ENA_SHIFT 12
2594#define MADERA_HP2_SC_ENA_WIDTH 1
2595
2596/* (0x04A2) - HP3 Short Circuit Ctrl */
2597#define MADERA_HP3_SC_ENA 0x1000
2598#define MADERA_HP3_SC_ENA_MASK 0x1000
2599#define MADERA_HP3_SC_ENA_SHIFT 12
2600#define MADERA_HP3_SC_ENA_WIDTH 1
2601
2602/* (0x04A8) - HP_Test_Ctrl_5 */
2603#define MADERA_HP1L_ONEFLT 0x0100
2604#define MADERA_HP1L_ONEFLT_MASK 0x0100
2605#define MADERA_HP1L_ONEFLT_SHIFT 8
2606#define MADERA_HP1L_ONEFLT_WIDTH 1
2607
2608/* (0x04A9) - HP_Test_Ctrl_6 */
2609#define MADERA_HP1R_ONEFLT 0x0100
2610#define MADERA_HP1R_ONEFLT_MASK 0x0100
2611#define MADERA_HP1R_ONEFLT_SHIFT 8
2612#define MADERA_HP1R_ONEFLT_WIDTH 1
2613
2614/* (0x0500) AIF1_BCLK_Ctrl */
2615#define MADERA_AIF1_BCLK_INV 0x0080
2616#define MADERA_AIF1_BCLK_INV_MASK 0x0080
2617#define MADERA_AIF1_BCLK_INV_SHIFT 7
2618#define MADERA_AIF1_BCLK_INV_WIDTH 1
2619#define MADERA_AIF1_BCLK_MSTR 0x0020
2620#define MADERA_AIF1_BCLK_MSTR_MASK 0x0020
2621#define MADERA_AIF1_BCLK_MSTR_SHIFT 5
2622#define MADERA_AIF1_BCLK_MSTR_WIDTH 1
2623#define MADERA_AIF1_BCLK_FREQ_MASK 0x001F
2624#define MADERA_AIF1_BCLK_FREQ_SHIFT 0
2625#define MADERA_AIF1_BCLK_FREQ_WIDTH 5
2626
2627/* (0x0501) AIF1_Tx_Pin_Ctrl */
2628#define MADERA_AIF1TX_LRCLK_SRC 0x0008
2629#define MADERA_AIF1TX_LRCLK_SRC_MASK 0x0008
2630#define MADERA_AIF1TX_LRCLK_SRC_SHIFT 3
2631#define MADERA_AIF1TX_LRCLK_SRC_WIDTH 1
2632#define MADERA_AIF1TX_LRCLK_INV 0x0004
2633#define MADERA_AIF1TX_LRCLK_INV_MASK 0x0004
2634#define MADERA_AIF1TX_LRCLK_INV_SHIFT 2
2635#define MADERA_AIF1TX_LRCLK_INV_WIDTH 1
2636#define MADERA_AIF1TX_LRCLK_MSTR 0x0001
2637#define MADERA_AIF1TX_LRCLK_MSTR_MASK 0x0001
2638#define MADERA_AIF1TX_LRCLK_MSTR_SHIFT 0
2639#define MADERA_AIF1TX_LRCLK_MSTR_WIDTH 1
2640
2641/* (0x0502) AIF1_Rx_Pin_Ctrl */
2642#define MADERA_AIF1RX_LRCLK_INV 0x0004
2643#define MADERA_AIF1RX_LRCLK_INV_MASK 0x0004
2644#define MADERA_AIF1RX_LRCLK_INV_SHIFT 2
2645#define MADERA_AIF1RX_LRCLK_INV_WIDTH 1
2646#define MADERA_AIF1RX_LRCLK_FRC 0x0002
2647#define MADERA_AIF1RX_LRCLK_FRC_MASK 0x0002
2648#define MADERA_AIF1RX_LRCLK_FRC_SHIFT 1
2649#define MADERA_AIF1RX_LRCLK_FRC_WIDTH 1
2650#define MADERA_AIF1RX_LRCLK_MSTR 0x0001
2651#define MADERA_AIF1RX_LRCLK_MSTR_MASK 0x0001
2652#define MADERA_AIF1RX_LRCLK_MSTR_SHIFT 0
2653#define MADERA_AIF1RX_LRCLK_MSTR_WIDTH 1
2654
2655/* (0x0503) AIF1_Rate_Ctrl */
2656#define MADERA_AIF1_RATE_MASK 0xF800
2657#define MADERA_AIF1_RATE_SHIFT 11
2658#define MADERA_AIF1_RATE_WIDTH 5
2659#define MADERA_AIF1_TRI 0x0040
2660#define MADERA_AIF1_TRI_MASK 0x0040
2661#define MADERA_AIF1_TRI_SHIFT 6
2662#define MADERA_AIF1_TRI_WIDTH 1
2663
2664/* (0x0504) AIF1_Format */
2665#define MADERA_AIF1_FMT_MASK 0x0007
2666#define MADERA_AIF1_FMT_SHIFT 0
2667#define MADERA_AIF1_FMT_WIDTH 3
2668
2669/* (0x0506) AIF1_Rx_BCLK_Rate */
2670#define MADERA_AIF1RX_BCPF_MASK 0x1FFF
2671#define MADERA_AIF1RX_BCPF_SHIFT 0
2672#define MADERA_AIF1RX_BCPF_WIDTH 13
2673
2674/* (0x0507) AIF1_Frame_Ctrl_1 */
2675#define MADERA_AIF1TX_WL_MASK 0x3F00
2676#define MADERA_AIF1TX_WL_SHIFT 8
2677#define MADERA_AIF1TX_WL_WIDTH 6
2678#define MADERA_AIF1TX_SLOT_LEN_MASK 0x00FF
2679#define MADERA_AIF1TX_SLOT_LEN_SHIFT 0
2680#define MADERA_AIF1TX_SLOT_LEN_WIDTH 8
2681
2682/* (0x0508) AIF1_Frame_Ctrl_2 */
2683#define MADERA_AIF1RX_WL_MASK 0x3F00
2684#define MADERA_AIF1RX_WL_SHIFT 8
2685#define MADERA_AIF1RX_WL_WIDTH 6
2686#define MADERA_AIF1RX_SLOT_LEN_MASK 0x00FF
2687#define MADERA_AIF1RX_SLOT_LEN_SHIFT 0
2688#define MADERA_AIF1RX_SLOT_LEN_WIDTH 8
2689
2690/* (0x0509) AIF1_Frame_Ctrl_3 */
2691#define MADERA_AIF1TX1_SLOT_MASK 0x003F
2692#define MADERA_AIF1TX1_SLOT_SHIFT 0
2693#define MADERA_AIF1TX1_SLOT_WIDTH 6
2694
2695/* (0x0519) AIF1_Tx_Enables */
2696#define MADERA_AIF1TX8_ENA 0x0080
2697#define MADERA_AIF1TX8_ENA_MASK 0x0080
2698#define MADERA_AIF1TX8_ENA_SHIFT 7
2699#define MADERA_AIF1TX8_ENA_WIDTH 1
2700#define MADERA_AIF1TX7_ENA 0x0040
2701#define MADERA_AIF1TX7_ENA_MASK 0x0040
2702#define MADERA_AIF1TX7_ENA_SHIFT 6
2703#define MADERA_AIF1TX7_ENA_WIDTH 1
2704#define MADERA_AIF1TX6_ENA 0x0020
2705#define MADERA_AIF1TX6_ENA_MASK 0x0020
2706#define MADERA_AIF1TX6_ENA_SHIFT 5
2707#define MADERA_AIF1TX6_ENA_WIDTH 1
2708#define MADERA_AIF1TX5_ENA 0x0010
2709#define MADERA_AIF1TX5_ENA_MASK 0x0010
2710#define MADERA_AIF1TX5_ENA_SHIFT 4
2711#define MADERA_AIF1TX5_ENA_WIDTH 1
2712#define MADERA_AIF1TX4_ENA 0x0008
2713#define MADERA_AIF1TX4_ENA_MASK 0x0008
2714#define MADERA_AIF1TX4_ENA_SHIFT 3
2715#define MADERA_AIF1TX4_ENA_WIDTH 1
2716#define MADERA_AIF1TX3_ENA 0x0004
2717#define MADERA_AIF1TX3_ENA_MASK 0x0004
2718#define MADERA_AIF1TX3_ENA_SHIFT 2
2719#define MADERA_AIF1TX3_ENA_WIDTH 1
2720#define MADERA_AIF1TX2_ENA 0x0002
2721#define MADERA_AIF1TX2_ENA_MASK 0x0002
2722#define MADERA_AIF1TX2_ENA_SHIFT 1
2723#define MADERA_AIF1TX2_ENA_WIDTH 1
2724#define MADERA_AIF1TX1_ENA 0x0001
2725#define MADERA_AIF1TX1_ENA_MASK 0x0001
2726#define MADERA_AIF1TX1_ENA_SHIFT 0
2727#define MADERA_AIF1TX1_ENA_WIDTH 1
2728
2729/* (0x051A) AIF1_Rx_Enables */
2730#define MADERA_AIF1RX8_ENA 0x0080
2731#define MADERA_AIF1RX8_ENA_MASK 0x0080
2732#define MADERA_AIF1RX8_ENA_SHIFT 7
2733#define MADERA_AIF1RX8_ENA_WIDTH 1
2734#define MADERA_AIF1RX7_ENA 0x0040
2735#define MADERA_AIF1RX7_ENA_MASK 0x0040
2736#define MADERA_AIF1RX7_ENA_SHIFT 6
2737#define MADERA_AIF1RX7_ENA_WIDTH 1
2738#define MADERA_AIF1RX6_ENA 0x0020
2739#define MADERA_AIF1RX6_ENA_MASK 0x0020
2740#define MADERA_AIF1RX6_ENA_SHIFT 5
2741#define MADERA_AIF1RX6_ENA_WIDTH 1
2742#define MADERA_AIF1RX5_ENA 0x0010
2743#define MADERA_AIF1RX5_ENA_MASK 0x0010
2744#define MADERA_AIF1RX5_ENA_SHIFT 4
2745#define MADERA_AIF1RX5_ENA_WIDTH 1
2746#define MADERA_AIF1RX4_ENA 0x0008
2747#define MADERA_AIF1RX4_ENA_MASK 0x0008
2748#define MADERA_AIF1RX4_ENA_SHIFT 3
2749#define MADERA_AIF1RX4_ENA_WIDTH 1
2750#define MADERA_AIF1RX3_ENA 0x0004
2751#define MADERA_AIF1RX3_ENA_MASK 0x0004
2752#define MADERA_AIF1RX3_ENA_SHIFT 2
2753#define MADERA_AIF1RX3_ENA_WIDTH 1
2754#define MADERA_AIF1RX2_ENA 0x0002
2755#define MADERA_AIF1RX2_ENA_MASK 0x0002
2756#define MADERA_AIF1RX2_ENA_SHIFT 1
2757#define MADERA_AIF1RX2_ENA_WIDTH 1
2758#define MADERA_AIF1RX1_ENA 0x0001
2759#define MADERA_AIF1RX1_ENA_MASK 0x0001
2760#define MADERA_AIF1RX1_ENA_SHIFT 0
2761#define MADERA_AIF1RX1_ENA_WIDTH 1
2762
2763/* (0x0559) AIF2_Tx_Enables */
2764#define MADERA_AIF2TX8_ENA 0x0080
2765#define MADERA_AIF2TX8_ENA_MASK 0x0080
2766#define MADERA_AIF2TX8_ENA_SHIFT 7
2767#define MADERA_AIF2TX8_ENA_WIDTH 1
2768#define MADERA_AIF2TX7_ENA 0x0040
2769#define MADERA_AIF2TX7_ENA_MASK 0x0040
2770#define MADERA_AIF2TX7_ENA_SHIFT 6
2771#define MADERA_AIF2TX7_ENA_WIDTH 1
2772#define MADERA_AIF2TX6_ENA 0x0020
2773#define MADERA_AIF2TX6_ENA_MASK 0x0020
2774#define MADERA_AIF2TX6_ENA_SHIFT 5
2775#define MADERA_AIF2TX6_ENA_WIDTH 1
2776#define MADERA_AIF2TX5_ENA 0x0010
2777#define MADERA_AIF2TX5_ENA_MASK 0x0010
2778#define MADERA_AIF2TX5_ENA_SHIFT 4
2779#define MADERA_AIF2TX5_ENA_WIDTH 1
2780#define MADERA_AIF2TX4_ENA 0x0008
2781#define MADERA_AIF2TX4_ENA_MASK 0x0008
2782#define MADERA_AIF2TX4_ENA_SHIFT 3
2783#define MADERA_AIF2TX4_ENA_WIDTH 1
2784#define MADERA_AIF2TX3_ENA 0x0004
2785#define MADERA_AIF2TX3_ENA_MASK 0x0004
2786#define MADERA_AIF2TX3_ENA_SHIFT 2
2787#define MADERA_AIF2TX3_ENA_WIDTH 1
2788#define MADERA_AIF2TX2_ENA 0x0002
2789#define MADERA_AIF2TX2_ENA_MASK 0x0002
2790#define MADERA_AIF2TX2_ENA_SHIFT 1
2791#define MADERA_AIF2TX2_ENA_WIDTH 1
2792#define MADERA_AIF2TX1_ENA 0x0001
2793#define MADERA_AIF2TX1_ENA_MASK 0x0001
2794#define MADERA_AIF2TX1_ENA_SHIFT 0
2795#define MADERA_AIF2TX1_ENA_WIDTH 1
2796
2797/* (0x055A) AIF2_Rx_Enables */
2798#define MADERA_AIF2RX8_ENA 0x0080
2799#define MADERA_AIF2RX8_ENA_MASK 0x0080
2800#define MADERA_AIF2RX8_ENA_SHIFT 7
2801#define MADERA_AIF2RX8_ENA_WIDTH 1
2802#define MADERA_AIF2RX7_ENA 0x0040
2803#define MADERA_AIF2RX7_ENA_MASK 0x0040
2804#define MADERA_AIF2RX7_ENA_SHIFT 6
2805#define MADERA_AIF2RX7_ENA_WIDTH 1
2806#define MADERA_AIF2RX6_ENA 0x0020
2807#define MADERA_AIF2RX6_ENA_MASK 0x0020
2808#define MADERA_AIF2RX6_ENA_SHIFT 5
2809#define MADERA_AIF2RX6_ENA_WIDTH 1
2810#define MADERA_AIF2RX5_ENA 0x0010
2811#define MADERA_AIF2RX5_ENA_MASK 0x0010
2812#define MADERA_AIF2RX5_ENA_SHIFT 4
2813#define MADERA_AIF2RX5_ENA_WIDTH 1
2814#define MADERA_AIF2RX4_ENA 0x0008
2815#define MADERA_AIF2RX4_ENA_MASK 0x0008
2816#define MADERA_AIF2RX4_ENA_SHIFT 3
2817#define MADERA_AIF2RX4_ENA_WIDTH 1
2818#define MADERA_AIF2RX3_ENA 0x0004
2819#define MADERA_AIF2RX3_ENA_MASK 0x0004
2820#define MADERA_AIF2RX3_ENA_SHIFT 2
2821#define MADERA_AIF2RX3_ENA_WIDTH 1
2822#define MADERA_AIF2RX2_ENA 0x0002
2823#define MADERA_AIF2RX2_ENA_MASK 0x0002
2824#define MADERA_AIF2RX2_ENA_SHIFT 1
2825#define MADERA_AIF2RX2_ENA_WIDTH 1
2826#define MADERA_AIF2RX1_ENA 0x0001
2827#define MADERA_AIF2RX1_ENA_MASK 0x0001
2828#define MADERA_AIF2RX1_ENA_SHIFT 0
2829#define MADERA_AIF2RX1_ENA_WIDTH 1
2830
2831/* (0x0599) AIF3_Tx_Enables */
2832#define MADERA_AIF3TX2_ENA 0x0002
2833#define MADERA_AIF3TX2_ENA_MASK 0x0002
2834#define MADERA_AIF3TX2_ENA_SHIFT 1
2835#define MADERA_AIF3TX2_ENA_WIDTH 1
2836#define MADERA_AIF3TX1_ENA 0x0001
2837#define MADERA_AIF3TX1_ENA_MASK 0x0001
2838#define MADERA_AIF3TX1_ENA_SHIFT 0
2839#define MADERA_AIF3TX1_ENA_WIDTH 1
2840
2841/* (0x059A) AIF3_Rx_Enables */
2842#define MADERA_AIF3RX2_ENA 0x0002
2843#define MADERA_AIF3RX2_ENA_MASK 0x0002
2844#define MADERA_AIF3RX2_ENA_SHIFT 1
2845#define MADERA_AIF3RX2_ENA_WIDTH 1
2846#define MADERA_AIF3RX1_ENA 0x0001
2847#define MADERA_AIF3RX1_ENA_MASK 0x0001
2848#define MADERA_AIF3RX1_ENA_SHIFT 0
2849#define MADERA_AIF3RX1_ENA_WIDTH 1
2850
2851/* (0x05B9) AIF4_Tx_Enables */
2852#define MADERA_AIF4TX2_ENA 0x0002
2853#define MADERA_AIF4TX2_ENA_MASK 0x0002
2854#define MADERA_AIF4TX2_ENA_SHIFT 1
2855#define MADERA_AIF4TX2_ENA_WIDTH 1
2856#define MADERA_AIF4TX1_ENA 0x0001
2857#define MADERA_AIF4TX1_ENA_MASK 0x0001
2858#define MADERA_AIF4TX1_ENA_SHIFT 0
2859#define MADERA_AIF4TX1_ENA_WIDTH 1
2860
2861/* (0x05BA) AIF4_Rx_Enables */
2862#define MADERA_AIF4RX2_ENA 0x0002
2863#define MADERA_AIF4RX2_ENA_MASK 0x0002
2864#define MADERA_AIF4RX2_ENA_SHIFT 1
2865#define MADERA_AIF4RX2_ENA_WIDTH 1
2866#define MADERA_AIF4RX1_ENA 0x0001
2867#define MADERA_AIF4RX1_ENA_MASK 0x0001
2868#define MADERA_AIF4RX1_ENA_SHIFT 0
2869#define MADERA_AIF4RX1_ENA_WIDTH 1
2870
2871/* (0x05C2) SPD1_TX_Control */
2872#define MADERA_SPD1_VAL2 0x2000
2873#define MADERA_SPD1_VAL2_MASK 0x2000
2874#define MADERA_SPD1_VAL2_SHIFT 13
2875#define MADERA_SPD1_VAL2_WIDTH 1
2876#define MADERA_SPD1_VAL1 0x1000
2877#define MADERA_SPD1_VAL1_MASK 0x1000
2878#define MADERA_SPD1_VAL1_SHIFT 12
2879#define MADERA_SPD1_VAL1_WIDTH 1
2880#define MADERA_SPD1_RATE_MASK 0x00F0
2881#define MADERA_SPD1_RATE_SHIFT 4
2882#define MADERA_SPD1_RATE_WIDTH 4
2883#define MADERA_SPD1_ENA 0x0001
2884#define MADERA_SPD1_ENA_MASK 0x0001
2885#define MADERA_SPD1_ENA_SHIFT 0
2886#define MADERA_SPD1_ENA_WIDTH 1
2887
2888/* (0x05F5) SLIMbus_RX_Channel_Enable */
2889#define MADERA_SLIMRX8_ENA 0x0080
2890#define MADERA_SLIMRX8_ENA_MASK 0x0080
2891#define MADERA_SLIMRX8_ENA_SHIFT 7
2892#define MADERA_SLIMRX8_ENA_WIDTH 1
2893#define MADERA_SLIMRX7_ENA 0x0040
2894#define MADERA_SLIMRX7_ENA_MASK 0x0040
2895#define MADERA_SLIMRX7_ENA_SHIFT 6
2896#define MADERA_SLIMRX7_ENA_WIDTH 1
2897#define MADERA_SLIMRX6_ENA 0x0020
2898#define MADERA_SLIMRX6_ENA_MASK 0x0020
2899#define MADERA_SLIMRX6_ENA_SHIFT 5
2900#define MADERA_SLIMRX6_ENA_WIDTH 1
2901#define MADERA_SLIMRX5_ENA 0x0010
2902#define MADERA_SLIMRX5_ENA_MASK 0x0010
2903#define MADERA_SLIMRX5_ENA_SHIFT 4
2904#define MADERA_SLIMRX5_ENA_WIDTH 1
2905#define MADERA_SLIMRX4_ENA 0x0008
2906#define MADERA_SLIMRX4_ENA_MASK 0x0008
2907#define MADERA_SLIMRX4_ENA_SHIFT 3
2908#define MADERA_SLIMRX4_ENA_WIDTH 1
2909#define MADERA_SLIMRX3_ENA 0x0004
2910#define MADERA_SLIMRX3_ENA_MASK 0x0004
2911#define MADERA_SLIMRX3_ENA_SHIFT 2
2912#define MADERA_SLIMRX3_ENA_WIDTH 1
2913#define MADERA_SLIMRX2_ENA 0x0002
2914#define MADERA_SLIMRX2_ENA_MASK 0x0002
2915#define MADERA_SLIMRX2_ENA_SHIFT 1
2916#define MADERA_SLIMRX2_ENA_WIDTH 1
2917#define MADERA_SLIMRX1_ENA 0x0001
2918#define MADERA_SLIMRX1_ENA_MASK 0x0001
2919#define MADERA_SLIMRX1_ENA_SHIFT 0
2920#define MADERA_SLIMRX1_ENA_WIDTH 1
2921
2922/* (0x05F6) SLIMbus_TX_Channel_Enable */
2923#define MADERA_SLIMTX8_ENA 0x0080
2924#define MADERA_SLIMTX8_ENA_MASK 0x0080
2925#define MADERA_SLIMTX8_ENA_SHIFT 7
2926#define MADERA_SLIMTX8_ENA_WIDTH 1
2927#define MADERA_SLIMTX7_ENA 0x0040
2928#define MADERA_SLIMTX7_ENA_MASK 0x0040
2929#define MADERA_SLIMTX7_ENA_SHIFT 6
2930#define MADERA_SLIMTX7_ENA_WIDTH 1
2931#define MADERA_SLIMTX6_ENA 0x0020
2932#define MADERA_SLIMTX6_ENA_MASK 0x0020
2933#define MADERA_SLIMTX6_ENA_SHIFT 5
2934#define MADERA_SLIMTX6_ENA_WIDTH 1
2935#define MADERA_SLIMTX5_ENA 0x0010
2936#define MADERA_SLIMTX5_ENA_MASK 0x0010
2937#define MADERA_SLIMTX5_ENA_SHIFT 4
2938#define MADERA_SLIMTX5_ENA_WIDTH 1
2939#define MADERA_SLIMTX4_ENA 0x0008
2940#define MADERA_SLIMTX4_ENA_MASK 0x0008
2941#define MADERA_SLIMTX4_ENA_SHIFT 3
2942#define MADERA_SLIMTX4_ENA_WIDTH 1
2943#define MADERA_SLIMTX3_ENA 0x0004
2944#define MADERA_SLIMTX3_ENA_MASK 0x0004
2945#define MADERA_SLIMTX3_ENA_SHIFT 2
2946#define MADERA_SLIMTX3_ENA_WIDTH 1
2947#define MADERA_SLIMTX2_ENA 0x0002
2948#define MADERA_SLIMTX2_ENA_MASK 0x0002
2949#define MADERA_SLIMTX2_ENA_SHIFT 1
2950#define MADERA_SLIMTX2_ENA_WIDTH 1
2951#define MADERA_SLIMTX1_ENA 0x0001
2952#define MADERA_SLIMTX1_ENA_MASK 0x0001
2953#define MADERA_SLIMTX1_ENA_SHIFT 0
2954#define MADERA_SLIMTX1_ENA_WIDTH 1
2955
2956/* (0x0E10) EQ1_1 */
2957#define MADERA_EQ1_B1_GAIN_MASK 0xF800
2958#define MADERA_EQ1_B1_GAIN_SHIFT 11
2959#define MADERA_EQ1_B1_GAIN_WIDTH 5
2960#define MADERA_EQ1_B2_GAIN_MASK 0x07C0
2961#define MADERA_EQ1_B2_GAIN_SHIFT 6
2962#define MADERA_EQ1_B2_GAIN_WIDTH 5
2963#define MADERA_EQ1_B3_GAIN_MASK 0x003E
2964#define MADERA_EQ1_B3_GAIN_SHIFT 1
2965#define MADERA_EQ1_B3_GAIN_WIDTH 5
2966#define MADERA_EQ1_ENA 0x0001
2967#define MADERA_EQ1_ENA_MASK 0x0001
2968#define MADERA_EQ1_ENA_SHIFT 0
2969#define MADERA_EQ1_ENA_WIDTH 1
2970
2971/* (0x0E11) EQ1_2 */
2972#define MADERA_EQ1_B4_GAIN_MASK 0xF800
2973#define MADERA_EQ1_B4_GAIN_SHIFT 11
2974#define MADERA_EQ1_B4_GAIN_WIDTH 5
2975#define MADERA_EQ1_B5_GAIN_MASK 0x07C0
2976#define MADERA_EQ1_B5_GAIN_SHIFT 6
2977#define MADERA_EQ1_B5_GAIN_WIDTH 5
2978#define MADERA_EQ1_B1_MODE 0x0001
2979#define MADERA_EQ1_B1_MODE_MASK 0x0001
2980#define MADERA_EQ1_B1_MODE_SHIFT 0
2981#define MADERA_EQ1_B1_MODE_WIDTH 1
2982
2983/* (0x0E26) EQ2_1 */
2984#define MADERA_EQ2_B1_GAIN_MASK 0xF800
2985#define MADERA_EQ2_B1_GAIN_SHIFT 11
2986#define MADERA_EQ2_B1_GAIN_WIDTH 5
2987#define MADERA_EQ2_B2_GAIN_MASK 0x07C0
2988#define MADERA_EQ2_B2_GAIN_SHIFT 6
2989#define MADERA_EQ2_B2_GAIN_WIDTH 5
2990#define MADERA_EQ2_B3_GAIN_MASK 0x003E
2991#define MADERA_EQ2_B3_GAIN_SHIFT 1
2992#define MADERA_EQ2_B3_GAIN_WIDTH 5
2993#define MADERA_EQ2_ENA 0x0001
2994#define MADERA_EQ2_ENA_MASK 0x0001
2995#define MADERA_EQ2_ENA_SHIFT 0
2996#define MADERA_EQ2_ENA_WIDTH 1
2997
2998/* (0x0E27) EQ2_2 */
2999#define MADERA_EQ2_B4_GAIN_MASK 0xF800
3000#define MADERA_EQ2_B4_GAIN_SHIFT 11
3001#define MADERA_EQ2_B4_GAIN_WIDTH 5
3002#define MADERA_EQ2_B5_GAIN_MASK 0x07C0
3003#define MADERA_EQ2_B5_GAIN_SHIFT 6
3004#define MADERA_EQ2_B5_GAIN_WIDTH 5
3005#define MADERA_EQ2_B1_MODE 0x0001
3006#define MADERA_EQ2_B1_MODE_MASK 0x0001
3007#define MADERA_EQ2_B1_MODE_SHIFT 0
3008#define MADERA_EQ2_B1_MODE_WIDTH 1
3009
3010/* (0x0E3C) EQ3_1 */
3011#define MADERA_EQ3_B1_GAIN_MASK 0xF800
3012#define MADERA_EQ3_B1_GAIN_SHIFT 11
3013#define MADERA_EQ3_B1_GAIN_WIDTH 5
3014#define MADERA_EQ3_B2_GAIN_MASK 0x07C0
3015#define MADERA_EQ3_B2_GAIN_SHIFT 6
3016#define MADERA_EQ3_B2_GAIN_WIDTH 5
3017#define MADERA_EQ3_B3_GAIN_MASK 0x003E
3018#define MADERA_EQ3_B3_GAIN_SHIFT 1
3019#define MADERA_EQ3_B3_GAIN_WIDTH 5
3020#define MADERA_EQ3_ENA 0x0001
3021#define MADERA_EQ3_ENA_MASK 0x0001
3022#define MADERA_EQ3_ENA_SHIFT 0
3023#define MADERA_EQ3_ENA_WIDTH 1
3024
3025/* (0x0E3D) EQ3_2 */
3026#define MADERA_EQ3_B4_GAIN_MASK 0xF800
3027#define MADERA_EQ3_B4_GAIN_SHIFT 11
3028#define MADERA_EQ3_B4_GAIN_WIDTH 5
3029#define MADERA_EQ3_B5_GAIN_MASK 0x07C0
3030#define MADERA_EQ3_B5_GAIN_SHIFT 6
3031#define MADERA_EQ3_B5_GAIN_WIDTH 5
3032#define MADERA_EQ3_B1_MODE 0x0001
3033#define MADERA_EQ3_B1_MODE_MASK 0x0001
3034#define MADERA_EQ3_B1_MODE_SHIFT 0
3035#define MADERA_EQ3_B1_MODE_WIDTH 1
3036
3037/* (0x0E52) EQ4_1 */
3038#define MADERA_EQ4_B1_GAIN_MASK 0xF800
3039#define MADERA_EQ4_B1_GAIN_SHIFT 11
3040#define MADERA_EQ4_B1_GAIN_WIDTH 5
3041#define MADERA_EQ4_B2_GAIN_MASK 0x07C0
3042#define MADERA_EQ4_B2_GAIN_SHIFT 6
3043#define MADERA_EQ4_B2_GAIN_WIDTH 5
3044#define MADERA_EQ4_B3_GAIN_MASK 0x003E
3045#define MADERA_EQ4_B3_GAIN_SHIFT 1
3046#define MADERA_EQ4_B3_GAIN_WIDTH 5
3047#define MADERA_EQ4_ENA 0x0001
3048#define MADERA_EQ4_ENA_MASK 0x0001
3049#define MADERA_EQ4_ENA_SHIFT 0
3050#define MADERA_EQ4_ENA_WIDTH 1
3051
3052/* (0x0E53) EQ4_2 */
3053#define MADERA_EQ4_B4_GAIN_MASK 0xF800
3054#define MADERA_EQ4_B4_GAIN_SHIFT 11
3055#define MADERA_EQ4_B4_GAIN_WIDTH 5
3056#define MADERA_EQ4_B5_GAIN_MASK 0x07C0
3057#define MADERA_EQ4_B5_GAIN_SHIFT 6
3058#define MADERA_EQ4_B5_GAIN_WIDTH 5
3059#define MADERA_EQ4_B1_MODE 0x0001
3060#define MADERA_EQ4_B1_MODE_MASK 0x0001
3061#define MADERA_EQ4_B1_MODE_SHIFT 0
3062#define MADERA_EQ4_B1_MODE_WIDTH 1
3063
3064/* (0x0E80) DRC1_ctrl1 */
3065#define MADERA_DRC1L_ENA 0x0002
3066#define MADERA_DRC1L_ENA_MASK 0x0002
3067#define MADERA_DRC1L_ENA_SHIFT 1
3068#define MADERA_DRC1L_ENA_WIDTH 1
3069#define MADERA_DRC1R_ENA 0x0001
3070#define MADERA_DRC1R_ENA_MASK 0x0001
3071#define MADERA_DRC1R_ENA_SHIFT 0
3072#define MADERA_DRC1R_ENA_WIDTH 1
3073
3074/* (0x0E88) DRC2_ctrl1 */
3075#define MADERA_DRC2L_ENA 0x0002
3076#define MADERA_DRC2L_ENA_MASK 0x0002
3077#define MADERA_DRC2L_ENA_SHIFT 1
3078#define MADERA_DRC2L_ENA_WIDTH 1
3079#define MADERA_DRC2R_ENA 0x0001
3080#define MADERA_DRC2R_ENA_MASK 0x0001
3081#define MADERA_DRC2R_ENA_SHIFT 0
3082#define MADERA_DRC2R_ENA_WIDTH 1
3083
3084/* (0x0EC0) HPLPF1_1 */
3085#define MADERA_LHPF1_MODE 0x0002
3086#define MADERA_LHPF1_MODE_MASK 0x0002
3087#define MADERA_LHPF1_MODE_SHIFT 1
3088#define MADERA_LHPF1_MODE_WIDTH 1
3089#define MADERA_LHPF1_ENA 0x0001
3090#define MADERA_LHPF1_ENA_MASK 0x0001
3091#define MADERA_LHPF1_ENA_SHIFT 0
3092#define MADERA_LHPF1_ENA_WIDTH 1
3093
3094/* (0x0EC1) HPLPF1_2 */
3095#define MADERA_LHPF1_COEFF_MASK 0xFFFF
3096#define MADERA_LHPF1_COEFF_SHIFT 0
3097#define MADERA_LHPF1_COEFF_WIDTH 16
3098
3099/* (0x0EC4) HPLPF2_1 */
3100#define MADERA_LHPF2_MODE 0x0002
3101#define MADERA_LHPF2_MODE_MASK 0x0002
3102#define MADERA_LHPF2_MODE_SHIFT 1
3103#define MADERA_LHPF2_MODE_WIDTH 1
3104#define MADERA_LHPF2_ENA 0x0001
3105#define MADERA_LHPF2_ENA_MASK 0x0001
3106#define MADERA_LHPF2_ENA_SHIFT 0
3107#define MADERA_LHPF2_ENA_WIDTH 1
3108
3109/* (0x0EC5) HPLPF2_2 */
3110#define MADERA_LHPF2_COEFF_MASK 0xFFFF
3111#define MADERA_LHPF2_COEFF_SHIFT 0
3112#define MADERA_LHPF2_COEFF_WIDTH 16
3113
3114/* (0x0EC8) HPLPF3_1 */
3115#define MADERA_LHPF3_MODE 0x0002
3116#define MADERA_LHPF3_MODE_MASK 0x0002
3117#define MADERA_LHPF3_MODE_SHIFT 1
3118#define MADERA_LHPF3_MODE_WIDTH 1
3119#define MADERA_LHPF3_ENA 0x0001
3120#define MADERA_LHPF3_ENA_MASK 0x0001
3121#define MADERA_LHPF3_ENA_SHIFT 0
3122#define MADERA_LHPF3_ENA_WIDTH 1
3123
3124/* (0x0EC9) HPLPF3_2 */
3125#define MADERA_LHPF3_COEFF_MASK 0xFFFF
3126#define MADERA_LHPF3_COEFF_SHIFT 0
3127#define MADERA_LHPF3_COEFF_WIDTH 16
3128
3129/* (0x0ECC) HPLPF4_1 */
3130#define MADERA_LHPF4_MODE 0x0002
3131#define MADERA_LHPF4_MODE_MASK 0x0002
3132#define MADERA_LHPF4_MODE_SHIFT 1
3133#define MADERA_LHPF4_MODE_WIDTH 1
3134#define MADERA_LHPF4_ENA 0x0001
3135#define MADERA_LHPF4_ENA_MASK 0x0001
3136#define MADERA_LHPF4_ENA_SHIFT 0
3137#define MADERA_LHPF4_ENA_WIDTH 1
3138
3139/* (0x0ECD) HPLPF4_2 */
3140#define MADERA_LHPF4_COEFF_MASK 0xFFFF
3141#define MADERA_LHPF4_COEFF_SHIFT 0
3142#define MADERA_LHPF4_COEFF_WIDTH 16
3143
3144/* (0x0ED0) ASRC2_ENABLE */
3145#define MADERA_ASRC2_IN2L_ENA 0x0008
3146#define MADERA_ASRC2_IN2L_ENA_MASK 0x0008
3147#define MADERA_ASRC2_IN2L_ENA_SHIFT 3
3148#define MADERA_ASRC2_IN2L_ENA_WIDTH 1
3149#define MADERA_ASRC2_IN2R_ENA 0x0004
3150#define MADERA_ASRC2_IN2R_ENA_MASK 0x0004
3151#define MADERA_ASRC2_IN2R_ENA_SHIFT 2
3152#define MADERA_ASRC2_IN2R_ENA_WIDTH 1
3153#define MADERA_ASRC2_IN1L_ENA 0x0002
3154#define MADERA_ASRC2_IN1L_ENA_MASK 0x0002
3155#define MADERA_ASRC2_IN1L_ENA_SHIFT 1
3156#define MADERA_ASRC2_IN1L_ENA_WIDTH 1
3157#define MADERA_ASRC2_IN1R_ENA 0x0001
3158#define MADERA_ASRC2_IN1R_ENA_MASK 0x0001
3159#define MADERA_ASRC2_IN1R_ENA_SHIFT 0
3160#define MADERA_ASRC2_IN1R_ENA_WIDTH 1
3161
3162/* (0x0ED2) ASRC2_RATE1 */
3163#define MADERA_ASRC2_RATE1_MASK 0xF800
3164#define MADERA_ASRC2_RATE1_SHIFT 11
3165#define MADERA_ASRC2_RATE1_WIDTH 5
3166
3167/* (0x0ED3) ASRC2_RATE2 */
3168#define MADERA_ASRC2_RATE2_MASK 0xF800
3169#define MADERA_ASRC2_RATE2_SHIFT 11
3170#define MADERA_ASRC2_RATE2_WIDTH 5
3171
3172/* (0x0EE0) ASRC1_ENABLE */
3173#define MADERA_ASRC1_IN2L_ENA 0x0008
3174#define MADERA_ASRC1_IN2L_ENA_MASK 0x0008
3175#define MADERA_ASRC1_IN2L_ENA_SHIFT 3
3176#define MADERA_ASRC1_IN2L_ENA_WIDTH 1
3177#define MADERA_ASRC1_IN2R_ENA 0x0004
3178#define MADERA_ASRC1_IN2R_ENA_MASK 0x0004
3179#define MADERA_ASRC1_IN2R_ENA_SHIFT 2
3180#define MADERA_ASRC1_IN2R_ENA_WIDTH 1
3181#define MADERA_ASRC1_IN1L_ENA 0x0002
3182#define MADERA_ASRC1_IN1L_ENA_MASK 0x0002
3183#define MADERA_ASRC1_IN1L_ENA_SHIFT 1
3184#define MADERA_ASRC1_IN1L_ENA_WIDTH 1
3185#define MADERA_ASRC1_IN1R_ENA 0x0001
3186#define MADERA_ASRC1_IN1R_ENA_MASK 0x0001
3187#define MADERA_ASRC1_IN1R_ENA_SHIFT 0
3188#define MADERA_ASRC1_IN1R_ENA_WIDTH 1
3189
3190/* (0x0EE2) ASRC1_RATE1 */
3191#define MADERA_ASRC1_RATE1_MASK 0xF800
3192#define MADERA_ASRC1_RATE1_SHIFT 11
3193#define MADERA_ASRC1_RATE1_WIDTH 5
3194
3195/* (0x0EE3) ASRC1_RATE2 */
3196#define MADERA_ASRC1_RATE2_MASK 0xF800
3197#define MADERA_ASRC1_RATE2_SHIFT 11
3198#define MADERA_ASRC1_RATE2_WIDTH 5
3199
3200/* (0x0EF0) - ISRC1 CTRL 1 */
3201#define MADERA_ISRC1_FSH_MASK 0xF800
3202#define MADERA_ISRC1_FSH_SHIFT 11
3203#define MADERA_ISRC1_FSH_WIDTH 5
3204#define MADERA_ISRC1_CLK_SEL_MASK 0x0700
3205#define MADERA_ISRC1_CLK_SEL_SHIFT 8
3206#define MADERA_ISRC1_CLK_SEL_WIDTH 3
3207
3208/* (0x0EF1) ISRC1_CTRL_2 */
3209#define MADERA_ISRC1_FSL_MASK 0xF800
3210#define MADERA_ISRC1_FSL_SHIFT 11
3211#define MADERA_ISRC1_FSL_WIDTH 5
3212
3213/* (0x0EF2) ISRC1_CTRL_3 */
3214#define MADERA_ISRC1_INT1_ENA 0x8000
3215#define MADERA_ISRC1_INT1_ENA_MASK 0x8000
3216#define MADERA_ISRC1_INT1_ENA_SHIFT 15
3217#define MADERA_ISRC1_INT1_ENA_WIDTH 1
3218#define MADERA_ISRC1_INT2_ENA 0x4000
3219#define MADERA_ISRC1_INT2_ENA_MASK 0x4000
3220#define MADERA_ISRC1_INT2_ENA_SHIFT 14
3221#define MADERA_ISRC1_INT2_ENA_WIDTH 1
3222#define MADERA_ISRC1_INT3_ENA 0x2000
3223#define MADERA_ISRC1_INT3_ENA_MASK 0x2000
3224#define MADERA_ISRC1_INT3_ENA_SHIFT 13
3225#define MADERA_ISRC1_INT3_ENA_WIDTH 1
3226#define MADERA_ISRC1_INT4_ENA 0x1000
3227#define MADERA_ISRC1_INT4_ENA_MASK 0x1000
3228#define MADERA_ISRC1_INT4_ENA_SHIFT 12
3229#define MADERA_ISRC1_INT4_ENA_WIDTH 1
3230#define MADERA_ISRC1_DEC1_ENA 0x0200
3231#define MADERA_ISRC1_DEC1_ENA_MASK 0x0200
3232#define MADERA_ISRC1_DEC1_ENA_SHIFT 9
3233#define MADERA_ISRC1_DEC1_ENA_WIDTH 1
3234#define MADERA_ISRC1_DEC2_ENA 0x0100
3235#define MADERA_ISRC1_DEC2_ENA_MASK 0x0100
3236#define MADERA_ISRC1_DEC2_ENA_SHIFT 8
3237#define MADERA_ISRC1_DEC2_ENA_WIDTH 1
3238#define MADERA_ISRC1_DEC3_ENA 0x0080
3239#define MADERA_ISRC1_DEC3_ENA_MASK 0x0080
3240#define MADERA_ISRC1_DEC3_ENA_SHIFT 7
3241#define MADERA_ISRC1_DEC3_ENA_WIDTH 1
3242#define MADERA_ISRC1_DEC4_ENA 0x0040
3243#define MADERA_ISRC1_DEC4_ENA_MASK 0x0040
3244#define MADERA_ISRC1_DEC4_ENA_SHIFT 6
3245#define MADERA_ISRC1_DEC4_ENA_WIDTH 1
3246#define MADERA_ISRC1_NOTCH_ENA 0x0001
3247#define MADERA_ISRC1_NOTCH_ENA_MASK 0x0001
3248#define MADERA_ISRC1_NOTCH_ENA_SHIFT 0
3249#define MADERA_ISRC1_NOTCH_ENA_WIDTH 1
3250
3251/* (0x0EF3) ISRC2_CTRL_1 */
3252#define MADERA_ISRC2_FSH_MASK 0xF800
3253#define MADERA_ISRC2_FSH_SHIFT 11
3254#define MADERA_ISRC2_FSH_WIDTH 5
3255#define MADERA_ISRC2_CLK_SEL_MASK 0x0700
3256#define MADERA_ISRC2_CLK_SEL_SHIFT 8
3257#define MADERA_ISRC2_CLK_SEL_WIDTH 3
3258
3259/* (0x0EF4) ISRC2_CTRL_2 */
3260#define MADERA_ISRC2_FSL_MASK 0xF800
3261#define MADERA_ISRC2_FSL_SHIFT 11
3262#define MADERA_ISRC2_FSL_WIDTH 5
3263
3264/* (0x0EF5) ISRC2_CTRL_3 */
3265#define MADERA_ISRC2_INT1_ENA 0x8000
3266#define MADERA_ISRC2_INT1_ENA_MASK 0x8000
3267#define MADERA_ISRC2_INT1_ENA_SHIFT 15
3268#define MADERA_ISRC2_INT1_ENA_WIDTH 1
3269#define MADERA_ISRC2_INT2_ENA 0x4000
3270#define MADERA_ISRC2_INT2_ENA_MASK 0x4000
3271#define MADERA_ISRC2_INT2_ENA_SHIFT 14
3272#define MADERA_ISRC2_INT2_ENA_WIDTH 1
3273#define MADERA_ISRC2_INT3_ENA 0x2000
3274#define MADERA_ISRC2_INT3_ENA_MASK 0x2000
3275#define MADERA_ISRC2_INT3_ENA_SHIFT 13
3276#define MADERA_ISRC2_INT3_ENA_WIDTH 1
3277#define MADERA_ISRC2_INT4_ENA 0x1000
3278#define MADERA_ISRC2_INT4_ENA_MASK 0x1000
3279#define MADERA_ISRC2_INT4_ENA_SHIFT 12
3280#define MADERA_ISRC2_INT4_ENA_WIDTH 1
3281#define MADERA_ISRC2_DEC1_ENA 0x0200
3282#define MADERA_ISRC2_DEC1_ENA_MASK 0x0200
3283#define MADERA_ISRC2_DEC1_ENA_SHIFT 9
3284#define MADERA_ISRC2_DEC1_ENA_WIDTH 1
3285#define MADERA_ISRC2_DEC2_ENA 0x0100
3286#define MADERA_ISRC2_DEC2_ENA_MASK 0x0100
3287#define MADERA_ISRC2_DEC2_ENA_SHIFT 8
3288#define MADERA_ISRC2_DEC2_ENA_WIDTH 1
3289#define MADERA_ISRC2_DEC3_ENA 0x0080
3290#define MADERA_ISRC2_DEC3_ENA_MASK 0x0080
3291#define MADERA_ISRC2_DEC3_ENA_SHIFT 7
3292#define MADERA_ISRC2_DEC3_ENA_WIDTH 1
3293#define MADERA_ISRC2_DEC4_ENA 0x0040
3294#define MADERA_ISRC2_DEC4_ENA_MASK 0x0040
3295#define MADERA_ISRC2_DEC4_ENA_SHIFT 6
3296#define MADERA_ISRC2_DEC4_ENA_WIDTH 1
3297#define MADERA_ISRC2_NOTCH_ENA 0x0001
3298#define MADERA_ISRC2_NOTCH_ENA_MASK 0x0001
3299#define MADERA_ISRC2_NOTCH_ENA_SHIFT 0
3300#define MADERA_ISRC2_NOTCH_ENA_WIDTH 1
3301
3302/* (0x0EF6) ISRC3_CTRL_1 */
3303#define MADERA_ISRC3_FSH_MASK 0xF800
3304#define MADERA_ISRC3_FSH_SHIFT 11
3305#define MADERA_ISRC3_FSH_WIDTH 5
3306#define MADERA_ISRC3_CLK_SEL_MASK 0x0700
3307#define MADERA_ISRC3_CLK_SEL_SHIFT 8
3308#define MADERA_ISRC3_CLK_SEL_WIDTH 3
3309
3310/* (0x0EF7) ISRC3_CTRL_2 */
3311#define MADERA_ISRC3_FSL_MASK 0xF800
3312#define MADERA_ISRC3_FSL_SHIFT 11
3313#define MADERA_ISRC3_FSL_WIDTH 5
3314
3315/* (0x0EF8) ISRC3_CTRL_3 */
3316#define MADERA_ISRC3_INT1_ENA 0x8000
3317#define MADERA_ISRC3_INT1_ENA_MASK 0x8000
3318#define MADERA_ISRC3_INT1_ENA_SHIFT 15
3319#define MADERA_ISRC3_INT1_ENA_WIDTH 1
3320#define MADERA_ISRC3_INT2_ENA 0x4000
3321#define MADERA_ISRC3_INT2_ENA_MASK 0x4000
3322#define MADERA_ISRC3_INT2_ENA_SHIFT 14
3323#define MADERA_ISRC3_INT2_ENA_WIDTH 1
3324#define MADERA_ISRC3_INT3_ENA 0x2000
3325#define MADERA_ISRC3_INT3_ENA_MASK 0x2000
3326#define MADERA_ISRC3_INT3_ENA_SHIFT 13
3327#define MADERA_ISRC3_INT3_ENA_WIDTH 1
3328#define MADERA_ISRC3_INT4_ENA 0x1000
3329#define MADERA_ISRC3_INT4_ENA_MASK 0x1000
3330#define MADERA_ISRC3_INT4_ENA_SHIFT 12
3331#define MADERA_ISRC3_INT4_ENA_WIDTH 1
3332#define MADERA_ISRC3_DEC1_ENA 0x0200
3333#define MADERA_ISRC3_DEC1_ENA_MASK 0x0200
3334#define MADERA_ISRC3_DEC1_ENA_SHIFT 9
3335#define MADERA_ISRC3_DEC1_ENA_WIDTH 1
3336#define MADERA_ISRC3_DEC2_ENA 0x0100
3337#define MADERA_ISRC3_DEC2_ENA_MASK 0x0100
3338#define MADERA_ISRC3_DEC2_ENA_SHIFT 8
3339#define MADERA_ISRC3_DEC2_ENA_WIDTH 1
3340#define MADERA_ISRC3_DEC3_ENA 0x0080
3341#define MADERA_ISRC3_DEC3_ENA_MASK 0x0080
3342#define MADERA_ISRC3_DEC3_ENA_SHIFT 7
3343#define MADERA_ISRC3_DEC3_ENA_WIDTH 1
3344#define MADERA_ISRC3_DEC4_ENA 0x0040
3345#define MADERA_ISRC3_DEC4_ENA_MASK 0x0040
3346#define MADERA_ISRC3_DEC4_ENA_SHIFT 6
3347#define MADERA_ISRC3_DEC4_ENA_WIDTH 1
3348#define MADERA_ISRC3_NOTCH_ENA 0x0001
3349#define MADERA_ISRC3_NOTCH_ENA_MASK 0x0001
3350#define MADERA_ISRC3_NOTCH_ENA_SHIFT 0
3351#define MADERA_ISRC3_NOTCH_ENA_WIDTH 1
3352
3353/* (0x0EF9) ISRC4_CTRL_1 */
3354#define MADERA_ISRC4_FSH_MASK 0xF800
3355#define MADERA_ISRC4_FSH_SHIFT 11
3356#define MADERA_ISRC4_FSH_WIDTH 5
3357#define MADERA_ISRC4_CLK_SEL_MASK 0x0700
3358#define MADERA_ISRC4_CLK_SEL_SHIFT 8
3359#define MADERA_ISRC4_CLK_SEL_WIDTH 3
3360
3361/* (0x0EFA) ISRC4_CTRL_2 */
3362#define MADERA_ISRC4_FSL_MASK 0xF800
3363#define MADERA_ISRC4_FSL_SHIFT 11
3364#define MADERA_ISRC4_FSL_WIDTH 5
3365
3366/* (0x0EFB) ISRC4_CTRL_3 */
3367#define MADERA_ISRC4_INT1_ENA 0x8000
3368#define MADERA_ISRC4_INT1_ENA_MASK 0x8000
3369#define MADERA_ISRC4_INT1_ENA_SHIFT 15
3370#define MADERA_ISRC4_INT1_ENA_WIDTH 1
3371#define MADERA_ISRC4_INT2_ENA 0x4000
3372#define MADERA_ISRC4_INT2_ENA_MASK 0x4000
3373#define MADERA_ISRC4_INT2_ENA_SHIFT 14
3374#define MADERA_ISRC4_INT2_ENA_WIDTH 1
3375#define MADERA_ISRC4_INT3_ENA 0x2000
3376#define MADERA_ISRC4_INT3_ENA_MASK 0x2000
3377#define MADERA_ISRC4_INT3_ENA_SHIFT 13
3378#define MADERA_ISRC4_INT3_ENA_WIDTH 1
3379#define MADERA_ISRC4_INT4_ENA 0x1000
3380#define MADERA_ISRC4_INT4_ENA_MASK 0x1000
3381#define MADERA_ISRC4_INT4_ENA_SHIFT 12
3382#define MADERA_ISRC4_INT4_ENA_WIDTH 1
3383#define MADERA_ISRC4_DEC1_ENA 0x0200
3384#define MADERA_ISRC4_DEC1_ENA_MASK 0x0200
3385#define MADERA_ISRC4_DEC1_ENA_SHIFT 9
3386#define MADERA_ISRC4_DEC1_ENA_WIDTH 1
3387#define MADERA_ISRC4_DEC2_ENA 0x0100
3388#define MADERA_ISRC4_DEC2_ENA_MASK 0x0100
3389#define MADERA_ISRC4_DEC2_ENA_SHIFT 8
3390#define MADERA_ISRC4_DEC2_ENA_WIDTH 1
3391#define MADERA_ISRC4_DEC3_ENA 0x0080
3392#define MADERA_ISRC4_DEC3_ENA_MASK 0x0080
3393#define MADERA_ISRC4_DEC3_ENA_SHIFT 7
3394#define MADERA_ISRC4_DEC3_ENA_WIDTH 1
3395#define MADERA_ISRC4_DEC4_ENA 0x0040
3396#define MADERA_ISRC4_DEC4_ENA_MASK 0x0040
3397#define MADERA_ISRC4_DEC4_ENA_SHIFT 6
3398#define MADERA_ISRC4_DEC4_ENA_WIDTH 1
3399#define MADERA_ISRC4_NOTCH_ENA 0x0001
3400#define MADERA_ISRC4_NOTCH_ENA_MASK 0x0001
3401#define MADERA_ISRC4_NOTCH_ENA_SHIFT 0
3402#define MADERA_ISRC4_NOTCH_ENA_WIDTH 1
3403
3404/* (0x0F00) Clock_Control */
3405#define MADERA_EXT_NG_SEL_CLR 0x0080
3406#define MADERA_EXT_NG_SEL_CLR_MASK 0x0080
3407#define MADERA_EXT_NG_SEL_CLR_SHIFT 7
3408#define MADERA_EXT_NG_SEL_CLR_WIDTH 1
3409#define MADERA_EXT_NG_SEL_SET 0x0040
3410#define MADERA_EXT_NG_SEL_SET_MASK 0x0040
3411#define MADERA_EXT_NG_SEL_SET_SHIFT 6
3412#define MADERA_EXT_NG_SEL_SET_WIDTH 1
3413#define MADERA_CLK_R_ENA_CLR 0x0020
3414#define MADERA_CLK_R_ENA_CLR_MASK 0x0020
3415#define MADERA_CLK_R_ENA_CLR_SHIFT 5
3416#define MADERA_CLK_R_ENA_CLR_WIDTH 1
3417#define MADERA_CLK_R_ENA_SET 0x0010
3418#define MADERA_CLK_R_ENA_SET_MASK 0x0010
3419#define MADERA_CLK_R_ENA_SET_SHIFT 4
3420#define MADERA_CLK_R_ENA_SET_WIDTH 1
3421#define MADERA_CLK_NG_ENA_CLR 0x0008
3422#define MADERA_CLK_NG_ENA_CLR_MASK 0x0008
3423#define MADERA_CLK_NG_ENA_CLR_SHIFT 3
3424#define MADERA_CLK_NG_ENA_CLR_WIDTH 1
3425#define MADERA_CLK_NG_ENA_SET 0x0004
3426#define MADERA_CLK_NG_ENA_SET_MASK 0x0004
3427#define MADERA_CLK_NG_ENA_SET_SHIFT 2
3428#define MADERA_CLK_NG_ENA_SET_WIDTH 1
3429#define MADERA_CLK_L_ENA_CLR 0x0002
3430#define MADERA_CLK_L_ENA_CLR_MASK 0x0002
3431#define MADERA_CLK_L_ENA_CLR_SHIFT 1
3432#define MADERA_CLK_L_ENA_CLR_WIDTH 1
3433#define MADERA_CLK_L_ENA_SET 0x0001
3434#define MADERA_CLK_L_ENA_SET_MASK 0x0001
3435#define MADERA_CLK_L_ENA_SET_SHIFT 0
3436#define MADERA_CLK_L_ENA_SET_WIDTH 1
3437
3438/* (0x0F01) ANC_SRC */
3439#define MADERA_IN_RXANCR_SEL_MASK 0x0070
3440#define MADERA_IN_RXANCR_SEL_SHIFT 4
3441#define MADERA_IN_RXANCR_SEL_WIDTH 3
3442#define MADERA_IN_RXANCL_SEL_MASK 0x0007
3443#define MADERA_IN_RXANCL_SEL_SHIFT 0
3444#define MADERA_IN_RXANCL_SEL_WIDTH 3
3445
3446/* (0x0F17) FCL_ADC_reformatter_control */
3447#define MADERA_FCL_MIC_MODE_SEL 0x000C
3448#define MADERA_FCL_MIC_MODE_SEL_SHIFT 2
3449#define MADERA_FCL_MIC_MODE_SEL_WIDTH 2
3450
3451/* (0x0F73) FCR_ADC_reformatter_control */
3452#define MADERA_FCR_MIC_MODE_SEL 0x000C
3453#define MADERA_FCR_MIC_MODE_SEL_SHIFT 2
3454#define MADERA_FCR_MIC_MODE_SEL_WIDTH 2
3455
3456/* (0x1480) DFC1_CTRL_W0 */
3457#define MADERA_DFC1_RATE_MASK 0x007C
3458#define MADERA_DFC1_RATE_SHIFT 2
3459#define MADERA_DFC1_RATE_WIDTH 5
3460#define MADERA_DFC1_DITH_ENA 0x0002
3461#define MADERA_DFC1_DITH_ENA_MASK 0x0002
3462#define MADERA_DFC1_DITH_ENA_SHIFT 1
3463#define MADERA_DFC1_DITH_ENA_WIDTH 1
3464#define MADERA_DFC1_ENA 0x0001
3465#define MADERA_DFC1_ENA_MASK 0x0001
3466#define MADERA_DFC1_ENA_SHIFT 0
3467#define MADERA_DFC1_ENA_WIDTH 1
3468
3469/* (0x1482) DFC1_RX_W0 */
3470#define MADERA_DFC1_RX_DATA_WIDTH_MASK 0x1F00
3471#define MADERA_DFC1_RX_DATA_WIDTH_SHIFT 8
3472#define MADERA_DFC1_RX_DATA_WIDTH_WIDTH 5
3473
3474#define MADERA_DFC1_RX_DATA_TYPE_MASK 0x0007
3475#define MADERA_DFC1_RX_DATA_TYPE_SHIFT 0
3476#define MADERA_DFC1_RX_DATA_TYPE_WIDTH 3
3477
3478/* (0x1484) DFC1_TX_W0 */
3479#define MADERA_DFC1_TX_DATA_WIDTH_MASK 0x1F00
3480#define MADERA_DFC1_TX_DATA_WIDTH_SHIFT 8
3481#define MADERA_DFC1_TX_DATA_WIDTH_WIDTH 5
3482
3483#define MADERA_DFC1_TX_DATA_TYPE_MASK 0x0007
3484#define MADERA_DFC1_TX_DATA_TYPE_SHIFT 0
3485#define MADERA_DFC1_TX_DATA_TYPE_WIDTH 3
3486
3487/* (0x1600) ADSP2_IRQ0 */
3488#define MADERA_DSP_IRQ2 0x0002
3489#define MADERA_DSP_IRQ1 0x0001
3490
3491/* (0x1601) ADSP2_IRQ1 */
3492#define MADERA_DSP_IRQ4 0x0002
3493#define MADERA_DSP_IRQ3 0x0001
3494
3495/* (0x1602) ADSP2_IRQ2 */
3496#define MADERA_DSP_IRQ6 0x0002
3497#define MADERA_DSP_IRQ5 0x0001
3498
3499/* (0x1603) ADSP2_IRQ3 */
3500#define MADERA_DSP_IRQ8 0x0002
3501#define MADERA_DSP_IRQ7 0x0001
3502
3503/* (0x1604) ADSP2_IRQ4 */
3504#define MADERA_DSP_IRQ10 0x0002
3505#define MADERA_DSP_IRQ9 0x0001
3506
3507/* (0x1605) ADSP2_IRQ5 */
3508#define MADERA_DSP_IRQ12 0x0002
3509#define MADERA_DSP_IRQ11 0x0001
3510
3511/* (0x1606) ADSP2_IRQ6 */
3512#define MADERA_DSP_IRQ14 0x0002
3513#define MADERA_DSP_IRQ13 0x0001
3514
3515/* (0x1607) ADSP2_IRQ7 */
3516#define MADERA_DSP_IRQ16 0x0002
3517#define MADERA_DSP_IRQ15 0x0001
3518
3519/* (0x1700) GPIO1_CTRL_1 */
3520#define MADERA_GP1_LVL 0x8000
3521#define MADERA_GP1_LVL_MASK 0x8000
3522#define MADERA_GP1_LVL_SHIFT 15
3523#define MADERA_GP1_LVL_WIDTH 1
3524#define MADERA_GP1_OP_CFG 0x4000
3525#define MADERA_GP1_OP_CFG_MASK 0x4000
3526#define MADERA_GP1_OP_CFG_SHIFT 14
3527#define MADERA_GP1_OP_CFG_WIDTH 1
3528#define MADERA_GP1_DB 0x2000
3529#define MADERA_GP1_DB_MASK 0x2000
3530#define MADERA_GP1_DB_SHIFT 13
3531#define MADERA_GP1_DB_WIDTH 1
3532#define MADERA_GP1_POL 0x1000
3533#define MADERA_GP1_POL_MASK 0x1000
3534#define MADERA_GP1_POL_SHIFT 12
3535#define MADERA_GP1_POL_WIDTH 1
3536#define MADERA_GP1_IP_CFG 0x0800
3537#define MADERA_GP1_IP_CFG_MASK 0x0800
3538#define MADERA_GP1_IP_CFG_SHIFT 11
3539#define MADERA_GP1_IP_CFG_WIDTH 1
3540#define MADERA_GP1_FN_MASK 0x03FF
3541#define MADERA_GP1_FN_SHIFT 0
3542#define MADERA_GP1_FN_WIDTH 10
3543
3544/* (0x1701) GPIO1_CTRL_2 */
3545#define MADERA_GP1_DIR 0x8000
3546#define MADERA_GP1_DIR_MASK 0x8000
3547#define MADERA_GP1_DIR_SHIFT 15
3548#define MADERA_GP1_DIR_WIDTH 1
3549#define MADERA_GP1_PU 0x4000
3550#define MADERA_GP1_PU_MASK 0x4000
3551#define MADERA_GP1_PU_SHIFT 14
3552#define MADERA_GP1_PU_WIDTH 1
3553#define MADERA_GP1_PD 0x2000
3554#define MADERA_GP1_PD_MASK 0x2000
3555#define MADERA_GP1_PD_SHIFT 13
3556#define MADERA_GP1_PD_WIDTH 1
3557#define MADERA_GP1_DRV_STR_MASK 0x1800
3558#define MADERA_GP1_DRV_STR_SHIFT 11
3559#define MADERA_GP1_DRV_STR_WIDTH 2
3560
3561/* (0x1800) IRQ1_Status_1 */
3562#define MADERA_CTRLIF_ERR_EINT1 0x1000
3563#define MADERA_CTRLIF_ERR_EINT1_MASK 0x1000
3564#define MADERA_CTRLIF_ERR_EINT1_SHIFT 12
3565#define MADERA_CTRLIF_ERR_EINT1_WIDTH 1
3566#define MADERA_SYSCLK_FAIL_EINT1 0x0200
3567#define MADERA_SYSCLK_FAIL_EINT1_MASK 0x0200
3568#define MADERA_SYSCLK_FAIL_EINT1_SHIFT 9
3569#define MADERA_SYSCLK_FAIL_EINT1_WIDTH 1
3570#define MADERA_CLOCK_DETECT_EINT1 0x0100
3571#define MADERA_CLOCK_DETECT_EINT1_MASK 0x0100
3572#define MADERA_CLOCK_DETECT_EINT1_SHIFT 8
3573#define MADERA_CLOCK_DETECT_EINT1_WIDTH 1
3574#define MADERA_BOOT_DONE_EINT1 0x0080
3575#define MADERA_BOOT_DONE_EINT1_MASK 0x0080
3576#define MADERA_BOOT_DONE_EINT1_SHIFT 7
3577#define MADERA_BOOT_DONE_EINT1_WIDTH 1
3578
3579/* (0x1801) IRQ1_Status_2 */
3580#define MADERA_FLLAO_LOCK_EINT1 0x0800
3581#define MADERA_FLLAO_LOCK_EINT1_MASK 0x0800
3582#define MADERA_FLLAO_LOCK_EINT1_SHIFT 11
3583#define MADERA_FLLAO_LOCK_EINT1_WIDTH 1
3584#define MADERA_FLL3_LOCK_EINT1 0x0400
3585#define MADERA_FLL3_LOCK_EINT1_MASK 0x0400
3586#define MADERA_FLL3_LOCK_EINT1_SHIFT 10
3587#define MADERA_FLL3_LOCK_EINT1_WIDTH 1
3588#define MADERA_FLL2_LOCK_EINT1 0x0200
3589#define MADERA_FLL2_LOCK_EINT1_MASK 0x0200
3590#define MADERA_FLL2_LOCK_EINT1_SHIFT 9
3591#define MADERA_FLL2_LOCK_EINT1_WIDTH 1
3592#define MADERA_FLL1_LOCK_EINT1 0x0100
3593#define MADERA_FLL1_LOCK_EINT1_MASK 0x0100
3594#define MADERA_FLL1_LOCK_EINT1_SHIFT 8
3595#define MADERA_FLL1_LOCK_EINT1_WIDTH 1
3596
3597/* (0x1805) IRQ1_Status_6 */
3598#define MADERA_MICDET2_EINT1 0x0200
3599#define MADERA_MICDET2_EINT1_MASK 0x0200
3600#define MADERA_MICDET2_EINT1_SHIFT 9
3601#define MADERA_MICDET2_EINT1_WIDTH 1
3602#define MADERA_MICDET1_EINT1 0x0100
3603#define MADERA_MICDET1_EINT1_MASK 0x0100
3604#define MADERA_MICDET1_EINT1_SHIFT 8
3605#define MADERA_MICDET1_EINT1_WIDTH 1
3606#define MADERA_HPDET_EINT1 0x0001
3607#define MADERA_HPDET_EINT1_MASK 0x0001
3608#define MADERA_HPDET_EINT1_SHIFT 0
3609#define MADERA_HPDET_EINT1_WIDTH 1
3610
3611/* (0x1806) IRQ1_Status_7 */
3612#define MADERA_MICD_CLAMP_FALL_EINT1 0x0020
3613#define MADERA_MICD_CLAMP_FALL_EINT1_MASK 0x0020
3614#define MADERA_MICD_CLAMP_FALL_EINT1_SHIFT 5
3615#define MADERA_MICD_CLAMP_FALL_EINT1_WIDTH 1
3616#define MADERA_MICD_CLAMP_RISE_EINT1 0x0010
3617#define MADERA_MICD_CLAMP_RISE_EINT1_MASK 0x0010
3618#define MADERA_MICD_CLAMP_RISE_EINT1_SHIFT 4
3619#define MADERA_MICD_CLAMP_RISE_EINT1_WIDTH 1
3620#define MADERA_JD2_FALL_EINT1 0x0008
3621#define MADERA_JD2_FALL_EINT1_MASK 0x0008
3622#define MADERA_JD2_FALL_EINT1_SHIFT 3
3623#define MADERA_JD2_FALL_EINT1_WIDTH 1
3624#define MADERA_JD2_RISE_EINT1 0x0004
3625#define MADERA_JD2_RISE_EINT1_MASK 0x0004
3626#define MADERA_JD2_RISE_EINT1_SHIFT 2
3627#define MADERA_JD2_RISE_EINT1_WIDTH 1
3628#define MADERA_JD1_FALL_EINT1 0x0002
3629#define MADERA_JD1_FALL_EINT1_MASK 0x0002
3630#define MADERA_JD1_FALL_EINT1_SHIFT 1
3631#define MADERA_JD1_FALL_EINT1_WIDTH 1
3632#define MADERA_JD1_RISE_EINT1 0x0001
3633#define MADERA_JD1_RISE_EINT1_MASK 0x0001
3634#define MADERA_JD1_RISE_EINT1_SHIFT 0
3635#define MADERA_JD1_RISE_EINT1_WIDTH 1
3636
3637/* (0x1808) IRQ1_Status_9 */
3638#define MADERA_ASRC2_IN2_LOCK_EINT1 0x0800
3639#define MADERA_ASRC2_IN2_LOCK_EINT1_MASK 0x0800
3640#define MADERA_ASRC2_IN2_LOCK_EINT1_SHIFT 11
3641#define MADERA_ASRC2_IN2_LOCK_EINT1_WIDTH 1
3642#define MADERA_ASRC2_IN1_LOCK_EINT1 0x0400
3643#define MADERA_ASRC2_IN1_LOCK_EINT1_MASK 0x0400
3644#define MADERA_ASRC2_IN1_LOCK_EINT1_SHIFT 10
3645#define MADERA_ASRC2_IN1_LOCK_EINT1_WIDTH 1
3646#define MADERA_ASRC1_IN2_LOCK_EINT1 0x0200
3647#define MADERA_ASRC1_IN2_LOCK_EINT1_MASK 0x0200
3648#define MADERA_ASRC1_IN2_LOCK_EINT1_SHIFT 9
3649#define MADERA_ASRC1_IN2_LOCK_EINT1_WIDTH 1
3650#define MADERA_ASRC1_IN1_LOCK_EINT1 0x0100
3651#define MADERA_ASRC1_IN1_LOCK_EINT1_MASK 0x0100
3652#define MADERA_ASRC1_IN1_LOCK_EINT1_SHIFT 8
3653#define MADERA_ASRC1_IN1_LOCK_EINT1_WIDTH 1
3654#define MADERA_DRC2_SIG_DET_EINT1 0x0002
3655#define MADERA_DRC2_SIG_DET_EINT1_MASK 0x0002
3656#define MADERA_DRC2_SIG_DET_EINT1_SHIFT 1
3657#define MADERA_DRC2_SIG_DET_EINT1_WIDTH 1
3658#define MADERA_DRC1_SIG_DET_EINT1 0x0001
3659#define MADERA_DRC1_SIG_DET_EINT1_MASK 0x0001
3660#define MADERA_DRC1_SIG_DET_EINT1_SHIFT 0
3661#define MADERA_DRC1_SIG_DET_EINT1_WIDTH 1
3662
3663/* (0x180A) IRQ1_Status_11 */
3664#define MADERA_DSP_IRQ16_EINT1 0x8000
3665#define MADERA_DSP_IRQ16_EINT1_MASK 0x8000
3666#define MADERA_DSP_IRQ16_EINT1_SHIFT 15
3667#define MADERA_DSP_IRQ16_EINT1_WIDTH 1
3668#define MADERA_DSP_IRQ15_EINT1 0x4000
3669#define MADERA_DSP_IRQ15_EINT1_MASK 0x4000
3670#define MADERA_DSP_IRQ15_EINT1_SHIFT 14
3671#define MADERA_DSP_IRQ15_EINT1_WIDTH 1
3672#define MADERA_DSP_IRQ14_EINT1 0x2000
3673#define MADERA_DSP_IRQ14_EINT1_MASK 0x2000
3674#define MADERA_DSP_IRQ14_EINT1_SHIFT 13
3675#define MADERA_DSP_IRQ14_EINT1_WIDTH 1
3676#define MADERA_DSP_IRQ13_EINT1 0x1000
3677#define MADERA_DSP_IRQ13_EINT1_MASK 0x1000
3678#define MADERA_DSP_IRQ13_EINT1_SHIFT 12
3679#define MADERA_DSP_IRQ13_EINT1_WIDTH 1
3680#define MADERA_DSP_IRQ12_EINT1 0x0800
3681#define MADERA_DSP_IRQ12_EINT1_MASK 0x0800
3682#define MADERA_DSP_IRQ12_EINT1_SHIFT 11
3683#define MADERA_DSP_IRQ12_EINT1_WIDTH 1
3684#define MADERA_DSP_IRQ11_EINT1 0x0400
3685#define MADERA_DSP_IRQ11_EINT1_MASK 0x0400
3686#define MADERA_DSP_IRQ11_EINT1_SHIFT 10
3687#define MADERA_DSP_IRQ11_EINT1_WIDTH 1
3688#define MADERA_DSP_IRQ10_EINT1 0x0200
3689#define MADERA_DSP_IRQ10_EINT1_MASK 0x0200
3690#define MADERA_DSP_IRQ10_EINT1_SHIFT 9
3691#define MADERA_DSP_IRQ10_EINT1_WIDTH 1
3692#define MADERA_DSP_IRQ9_EINT1 0x0100
3693#define MADERA_DSP_IRQ9_EINT1_MASK 0x0100
3694#define MADERA_DSP_IRQ9_EINT1_SHIFT 8
3695#define MADERA_DSP_IRQ9_EINT1_WIDTH 1
3696#define MADERA_DSP_IRQ8_EINT1 0x0080
3697#define MADERA_DSP_IRQ8_EINT1_MASK 0x0080
3698#define MADERA_DSP_IRQ8_EINT1_SHIFT 7
3699#define MADERA_DSP_IRQ8_EINT1_WIDTH 1
3700#define MADERA_DSP_IRQ7_EINT1 0x0040
3701#define MADERA_DSP_IRQ7_EINT1_MASK 0x0040
3702#define MADERA_DSP_IRQ7_EINT1_SHIFT 6
3703#define MADERA_DSP_IRQ7_EINT1_WIDTH 1
3704#define MADERA_DSP_IRQ6_EINT1 0x0020
3705#define MADERA_DSP_IRQ6_EINT1_MASK 0x0020
3706#define MADERA_DSP_IRQ6_EINT1_SHIFT 5
3707#define MADERA_DSP_IRQ6_EINT1_WIDTH 1
3708#define MADERA_DSP_IRQ5_EINT1 0x0010
3709#define MADERA_DSP_IRQ5_EINT1_MASK 0x0010
3710#define MADERA_DSP_IRQ5_EINT1_SHIFT 4
3711#define MADERA_DSP_IRQ5_EINT1_WIDTH 1
3712#define MADERA_DSP_IRQ4_EINT1 0x0008
3713#define MADERA_DSP_IRQ4_EINT1_MASK 0x0008
3714#define MADERA_DSP_IRQ4_EINT1_SHIFT 3
3715#define MADERA_DSP_IRQ4_EINT1_WIDTH 1
3716#define MADERA_DSP_IRQ3_EINT1 0x0004
3717#define MADERA_DSP_IRQ3_EINT1_MASK 0x0004
3718#define MADERA_DSP_IRQ3_EINT1_SHIFT 2
3719#define MADERA_DSP_IRQ3_EINT1_WIDTH 1
3720#define MADERA_DSP_IRQ2_EINT1 0x0002
3721#define MADERA_DSP_IRQ2_EINT1_MASK 0x0002
3722#define MADERA_DSP_IRQ2_EINT1_SHIFT 1
3723#define MADERA_DSP_IRQ2_EINT1_WIDTH 1
3724#define MADERA_DSP_IRQ1_EINT1 0x0001
3725#define MADERA_DSP_IRQ1_EINT1_MASK 0x0001
3726#define MADERA_DSP_IRQ1_EINT1_SHIFT 0
3727#define MADERA_DSP_IRQ1_EINT1_WIDTH 1
3728
3729/* (0x180B) IRQ1_Status_12 */
3730#define MADERA_SPKOUTR_SC_EINT1 0x0080
3731#define MADERA_SPKOUTR_SC_EINT1_MASK 0x0080
3732#define MADERA_SPKOUTR_SC_EINT1_SHIFT 7
3733#define MADERA_SPKOUTR_SC_EINT1_WIDTH 1
3734#define MADERA_SPKOUTL_SC_EINT1 0x0040
3735#define MADERA_SPKOUTL_SC_EINT1_MASK 0x0040
3736#define MADERA_SPKOUTL_SC_EINT1_SHIFT 6
3737#define MADERA_SPKOUTL_SC_EINT1_WIDTH 1
3738#define MADERA_HP3R_SC_EINT1 0x0020
3739#define MADERA_HP3R_SC_EINT1_MASK 0x0020
3740#define MADERA_HP3R_SC_EINT1_SHIFT 5
3741#define MADERA_HP3R_SC_EINT1_WIDTH 1
3742#define MADERA_HP3L_SC_EINT1 0x0010
3743#define MADERA_HP3L_SC_EINT1_MASK 0x0010
3744#define MADERA_HP3L_SC_EINT1_SHIFT 4
3745#define MADERA_HP3L_SC_EINT1_WIDTH 1
3746#define MADERA_HP2R_SC_EINT1 0x0008
3747#define MADERA_HP2R_SC_EINT1_MASK 0x0008
3748#define MADERA_HP2R_SC_EINT1_SHIFT 3
3749#define MADERA_HP2R_SC_EINT1_WIDTH 1
3750#define MADERA_HP2L_SC_EINT1 0x0004
3751#define MADERA_HP2L_SC_EINT1_MASK 0x0004
3752#define MADERA_HP2L_SC_EINT1_SHIFT 2
3753#define MADERA_HP2L_SC_EINT1_WIDTH 1
3754#define MADERA_HP1R_SC_EINT1 0x0002
3755#define MADERA_HP1R_SC_EINT1_MASK 0x0002
3756#define MADERA_HP1R_SC_EINT1_SHIFT 1
3757#define MADERA_HP1R_SC_EINT1_WIDTH 1
3758#define MADERA_HP1L_SC_EINT1 0x0001
3759#define MADERA_HP1L_SC_EINT1_MASK 0x0001
3760#define MADERA_HP1L_SC_EINT1_SHIFT 0
3761#define MADERA_HP1L_SC_EINT1_WIDTH 1
3762
3763/* (0x180E) IRQ1_Status_15 */
3764#define MADERA_SPK_OVERHEAT_WARN_EINT1 0x0004
3765#define MADERA_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004
3766#define MADERA_SPK_OVERHEAT_WARN_EINT1_SHIFT 2
3767#define MADERA_SPK_OVERHEAT_WARN_EINT1_WIDTH 1
3768#define MADERA_SPK_OVERHEAT_EINT1 0x0002
3769#define MADERA_SPK_OVERHEAT_EINT1_MASK 0x0002
3770#define MADERA_SPK_OVERHEAT_EINT1_SHIFT 1
3771#define MADERA_SPK_OVERHEAT_EINT1_WIDTH 1
3772#define MADERA_SPK_SHUTDOWN_EINT1 0x0001
3773#define MADERA_SPK_SHUTDOWN_EINT1_MASK 0x0001
3774#define MADERA_SPK_SHUTDOWN_EINT1_SHIFT 0
3775#define MADERA_SPK_SHUTDOWN_EINT1_WIDTH 1
3776
3777/* (0x1820) - IRQ1 Status 33 */
3778#define MADERA_DSP7_BUS_ERR_EINT1 0x0040
3779#define MADERA_DSP7_BUS_ERR_EINT1_MASK 0x0040
3780#define MADERA_DSP7_BUS_ERR_EINT1_SHIFT 6
3781#define MADERA_DSP7_BUS_ERR_EINT1_WIDTH 1
3782#define MADERA_DSP6_BUS_ERR_EINT1 0x0020
3783#define MADERA_DSP6_BUS_ERR_EINT1_MASK 0x0020
3784#define MADERA_DSP6_BUS_ERR_EINT1_SHIFT 5
3785#define MADERA_DSP6_BUS_ERR_EINT1_WIDTH 1
3786#define MADERA_DSP5_BUS_ERR_EINT1 0x0010
3787#define MADERA_DSP5_BUS_ERR_EINT1_MASK 0x0010
3788#define MADERA_DSP5_BUS_ERR_EINT1_SHIFT 4
3789#define MADERA_DSP5_BUS_ERR_EINT1_WIDTH 1
3790#define MADERA_DSP4_BUS_ERR_EINT1 0x0008
3791#define MADERA_DSP4_BUS_ERR_EINT1_MASK 0x0008
3792#define MADERA_DSP4_BUS_ERR_EINT1_SHIFT 3
3793#define MADERA_DSP4_BUS_ERR_EINT1_WIDTH 1
3794#define MADERA_DSP3_BUS_ERR_EINT1 0x0004
3795#define MADERA_DSP3_BUS_ERR_EINT1_MASK 0x0004
3796#define MADERA_DSP3_BUS_ERR_EINT1_SHIFT 2
3797#define MADERA_DSP3_BUS_ERR_EINT1_WIDTH 1
3798#define MADERA_DSP2_BUS_ERR_EINT1 0x0002
3799#define MADERA_DSP2_BUS_ERR_EINT1_MASK 0x0002
3800#define MADERA_DSP2_BUS_ERR_EINT1_SHIFT 1
3801#define MADERA_DSP2_BUS_ERR_EINT1_WIDTH 1
3802#define MADERA_DSP1_BUS_ERR_EINT1 0x0001
3803#define MADERA_DSP1_BUS_ERR_EINT1_MASK 0x0001
3804#define MADERA_DSP1_BUS_ERR_EINT1_SHIFT 0
3805#define MADERA_DSP1_BUS_ERR_EINT1_WIDTH 1
3806
3807/* (0x1845) IRQ1_Mask_6 */
3808#define MADERA_IM_MICDET2_EINT1 0x0200
3809#define MADERA_IM_MICDET2_EINT1_MASK 0x0200
3810#define MADERA_IM_MICDET2_EINT1_SHIFT 9
3811#define MADERA_IM_MICDET2_EINT1_WIDTH 1
3812#define MADERA_IM_MICDET1_EINT1 0x0100
3813#define MADERA_IM_MICDET1_EINT1_MASK 0x0100
3814#define MADERA_IM_MICDET1_EINT1_SHIFT 8
3815#define MADERA_IM_MICDET1_EINT1_WIDTH 1
3816#define MADERA_IM_HPDET_EINT1 0x0001
3817#define MADERA_IM_HPDET_EINT1_MASK 0x0001
3818#define MADERA_IM_HPDET_EINT1_SHIFT 0
3819#define MADERA_IM_HPDET_EINT1_WIDTH 1
3820/* (0x184E) IRQ1_Mask_15 */
3821#define MADERA_IM_SPK_OVERHEAT_WARN_EINT1 0x0004
3822#define MADERA_IM_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004
3823#define MADERA_IM_SPK_OVERHEAT_WARN_EINT1_SHIFT 2
3824#define MADERA_IM_SPK_OVERHEAT_WARN_EINT1_WIDTH 1
3825#define MADERA_IM_SPK_OVERHEAT_EINT1 0x0002
3826#define MADERA_IM_SPK_OVERHEAT_EINT1_MASK 0x0002
3827#define MADERA_IM_SPK_OVERHEAT_EINT1_SHIFT 1
3828#define MADERA_IM_SPK_OVERHEAT_EINT1_WIDTH 1
3829#define MADERA_IM_SPK_SHUTDOWN_EINT1 0x0001
3830#define MADERA_IM_SPK_SHUTDOWN_EINT1_MASK 0x0001
3831#define MADERA_IM_SPK_SHUTDOWN_EINT1_SHIFT 0
3832#define MADERA_IM_SPK_SHUTDOWN_EINT1_WIDTH 1
3833
3834/* (0x1880) - IRQ1 Raw Status 1 */
3835#define MADERA_CTRLIF_ERR_STS1 0x1000
3836#define MADERA_CTRLIF_ERR_STS1_MASK 0x1000
3837#define MADERA_CTRLIF_ERR_STS1_SHIFT 12
3838#define MADERA_CTRLIF_ERR_STS1_WIDTH 1
3839#define MADERA_SYSCLK_FAIL_STS1 0x0200
3840#define MADERA_SYSCLK_FAIL_STS1_MASK 0x0200
3841#define MADERA_SYSCLK_FAIL_STS1_SHIFT 9
3842#define MADERA_SYSCLK_FAIL_STS1_WIDTH 1
3843#define MADERA_CLOCK_DETECT_STS1 0x0100
3844#define MADERA_CLOCK_DETECT_STS1_MASK 0x0100
3845#define MADERA_CLOCK_DETECT_STS1_SHIFT 8
3846#define MADERA_CLOCK_DETECT_STS1_WIDTH 1
3847#define MADERA_BOOT_DONE_STS1 0x0080
3848#define MADERA_BOOT_DONE_STS1_MASK 0x0080
3849#define MADERA_BOOT_DONE_STS1_SHIFT 7
3850#define MADERA_BOOT_DONE_STS1_WIDTH 1
3851
3852/* (0x1881) - IRQ1 Raw Status 2 */
3853#define MADERA_FLL3_LOCK_STS1 0x0400
3854#define MADERA_FLL3_LOCK_STS1_MASK 0x0400
3855#define MADERA_FLL3_LOCK_STS1_SHIFT 10
3856#define MADERA_FLL3_LOCK_STS1_WIDTH 1
3857#define MADERA_FLL2_LOCK_STS1 0x0200
3858#define MADERA_FLL2_LOCK_STS1_MASK 0x0200
3859#define MADERA_FLL2_LOCK_STS1_SHIFT 9
3860#define MADERA_FLL2_LOCK_STS1_WIDTH 1
3861#define MADERA_FLL1_LOCK_STS1 0x0100
3862#define MADERA_FLL1_LOCK_STS1_MASK 0x0100
3863#define MADERA_FLL1_LOCK_STS1_SHIFT 8
3864#define MADERA_FLL1_LOCK_STS1_WIDTH 1
3865
3866/* (0x1886) - IRQ1 Raw Status 7 */
3867#define MADERA_MICD_CLAMP_FALL_STS1 0x0020
3868#define MADERA_MICD_CLAMP_FALL_STS1_MASK 0x0020
3869#define MADERA_MICD_CLAMP_FALL_STS1_SHIFT 5
3870#define MADERA_MICD_CLAMP_FALL_STS1_WIDTH 1
3871#define MADERA_MICD_CLAMP_RISE_STS1 0x0010
3872#define MADERA_MICD_CLAMP_RISE_STS1_MASK 0x0010
3873#define MADERA_MICD_CLAMP_RISE_STS1_SHIFT 4
3874#define MADERA_MICD_CLAMP_RISE_STS1_WIDTH 1
3875#define MADERA_JD2_FALL_STS1 0x0008
3876#define MADERA_JD2_FALL_STS1_MASK 0x0008
3877#define MADERA_JD2_FALL_STS1_SHIFT 3
3878#define MADERA_JD2_FALL_STS1_WIDTH 1
3879#define MADERA_JD2_RISE_STS1 0x0004
3880#define MADERA_JD2_RISE_STS1_MASK 0x0004
3881#define MADERA_JD2_RISE_STS1_SHIFT 2
3882#define MADERA_JD2_RISE_STS1_WIDTH 1
3883#define MADERA_JD1_FALL_STS1 0x0002
3884#define MADERA_JD1_FALL_STS1_MASK 0x0002
3885#define MADERA_JD1_FALL_STS1_SHIFT 1
3886#define MADERA_JD1_FALL_STS1_WIDTH 1
3887#define MADERA_JD1_RISE_STS1 0x0001
3888#define MADERA_JD1_RISE_STS1_MASK 0x0001
3889#define MADERA_JD1_RISE_STS1_SHIFT 0
3890#define MADERA_JD1_RISE_STS1_WIDTH 1
3891
3892/* (0x188E) - IRQ1 Raw Status 15 */
3893#define MADERA_SPK_OVERHEAT_WARN_STS1 0x0004
3894#define MADERA_SPK_OVERHEAT_WARN_STS1_MASK 0x0004
3895#define MADERA_SPK_OVERHEAT_WARN_STS1_SHIFT 2
3896#define MADERA_SPK_OVERHEAT_WARN_STS1_WIDTH 1
3897#define MADERA_SPK_OVERHEAT_STS1 0x0002
3898#define MADERA_SPK_OVERHEAT_STS1_MASK 0x0002
3899#define MADERA_SPK_OVERHEAT_STS1_SHIFT 1
3900#define MADERA_SPK_OVERHEAT_STS1_WIDTH 1
3901#define MADERA_SPK_SHUTDOWN_STS1 0x0001
3902#define MADERA_SPK_SHUTDOWN_STS1_MASK 0x0001
3903#define MADERA_SPK_SHUTDOWN_STS1_SHIFT 0
3904#define MADERA_SPK_SHUTDOWN_STS1_WIDTH 1
3905
3906/* (0x1A06) Interrupt_Debounce_7 */
3907#define MADERA_MICD_CLAMP_DB 0x0010
3908#define MADERA_MICD_CLAMP_DB_MASK 0x0010
3909#define MADERA_MICD_CLAMP_DB_SHIFT 4
3910#define MADERA_MICD_CLAMP_DB_WIDTH 1
3911#define MADERA_JD2_DB 0x0004
3912#define MADERA_JD2_DB_MASK 0x0004
3913#define MADERA_JD2_DB_SHIFT 2
3914#define MADERA_JD2_DB_WIDTH 1
3915#define MADERA_JD1_DB 0x0001
3916#define MADERA_JD1_DB_MASK 0x0001
3917#define MADERA_JD1_DB_SHIFT 0
3918#define MADERA_JD1_DB_WIDTH 1
3919
3920/* (0x1A0E) Interrupt_Debounce_15 */
3921#define MADERA_SPK_OVERHEAT_WARN_DB 0x0004
3922#define MADERA_SPK_OVERHEAT_WARN_DB_MASK 0x0004
3923#define MADERA_SPK_OVERHEAT_WARN_DB_SHIFT 2
3924#define MADERA_SPK_OVERHEAT_WARN_DB_WIDTH 1
3925#define MADERA_SPK_OVERHEAT_DB 0x0002
3926#define MADERA_SPK_OVERHEAT_DB_MASK 0x0002
3927#define MADERA_SPK_OVERHEAT_DB_SHIFT 1
3928#define MADERA_SPK_OVERHEAT_DB_WIDTH 1
3929
3930/* (0x1A80) IRQ1_CTRL */
3931#define MADERA_IM_IRQ1 0x0800
3932#define MADERA_IM_IRQ1_MASK 0x0800
3933#define MADERA_IM_IRQ1_SHIFT 11
3934#define MADERA_IM_IRQ1_WIDTH 1
3935#define MADERA_IRQ_POL 0x0400
3936#define MADERA_IRQ_POL_MASK 0x0400
3937#define MADERA_IRQ_POL_SHIFT 10
3938#define MADERA_IRQ_POL_WIDTH 1
3939
3940/* (0x20004) OTP_HPDET_Cal_1 */
3941#define MADERA_OTP_HPDET_CALIB_OFFSET_11 0xFF000000
3942#define MADERA_OTP_HPDET_CALIB_OFFSET_11_MASK 0xFF000000
3943#define MADERA_OTP_HPDET_CALIB_OFFSET_11_SHIFT 24
3944#define MADERA_OTP_HPDET_CALIB_OFFSET_11_WIDTH 8
3945#define MADERA_OTP_HPDET_CALIB_OFFSET_10 0x00FF0000
3946#define MADERA_OTP_HPDET_CALIB_OFFSET_10_MASK 0x00FF0000
3947#define MADERA_OTP_HPDET_CALIB_OFFSET_10_SHIFT 16
3948#define MADERA_OTP_HPDET_CALIB_OFFSET_10_WIDTH 8
3949#define MADERA_OTP_HPDET_CALIB_OFFSET_01 0x0000FF00
3950#define MADERA_OTP_HPDET_CALIB_OFFSET_01_MASK 0x0000FF00
3951#define MADERA_OTP_HPDET_CALIB_OFFSET_01_SHIFT 8
3952#define MADERA_OTP_HPDET_CALIB_OFFSET_01_WIDTH 8
3953#define MADERA_OTP_HPDET_CALIB_OFFSET_00 0x000000FF
3954#define MADERA_OTP_HPDET_CALIB_OFFSET_00_MASK 0x000000FF
3955#define MADERA_OTP_HPDET_CALIB_OFFSET_00_SHIFT 0
3956#define MADERA_OTP_HPDET_CALIB_OFFSET_00_WIDTH 8
3957
3958/* (0x20006) OTP_HPDET_Cal_2 */
3959#define MADERA_OTP_HPDET_GRADIENT_1X 0x0000FF00
3960#define MADERA_OTP_HPDET_GRADIENT_1X_MASK 0x0000FF00
3961#define MADERA_OTP_HPDET_GRADIENT_1X_SHIFT 8
3962#define MADERA_OTP_HPDET_GRADIENT_1X_WIDTH 8
3963#define MADERA_OTP_HPDET_GRADIENT_0X 0x000000FF
3964#define MADERA_OTP_HPDET_GRADIENT_0X_MASK 0x000000FF
3965#define MADERA_OTP_HPDET_GRADIENT_0X_SHIFT 0
3966#define MADERA_OTP_HPDET_GRADIENT_0X_WIDTH 8
3967
3968#endif
diff --git a/include/linux/mfd/rave-sp.h b/include/linux/mfd/rave-sp.h
index fe0ce7bc59cf..11eef77ef976 100644
--- a/include/linux/mfd/rave-sp.h
+++ b/include/linux/mfd/rave-sp.h
@@ -21,6 +21,7 @@ enum rave_sp_command {
21 RAVE_SP_CMD_STATUS = 0xA0, 21 RAVE_SP_CMD_STATUS = 0xA0,
22 RAVE_SP_CMD_SW_WDT = 0xA1, 22 RAVE_SP_CMD_SW_WDT = 0xA1,
23 RAVE_SP_CMD_PET_WDT = 0xA2, 23 RAVE_SP_CMD_PET_WDT = 0xA2,
24 RAVE_SP_CMD_RMB_EEPROM = 0xA4,
24 RAVE_SP_CMD_SET_BACKLIGHT = 0xA6, 25 RAVE_SP_CMD_SET_BACKLIGHT = 0xA6,
25 RAVE_SP_CMD_RESET = 0xA7, 26 RAVE_SP_CMD_RESET = 0xA7,
26 RAVE_SP_CMD_RESET_REASON = 0xA8, 27 RAVE_SP_CMD_RESET_REASON = 0xA8,
diff --git a/include/linux/mfd/rohm-bd718x7.h b/include/linux/mfd/rohm-bd718x7.h
new file mode 100644
index 000000000000..a528747f8aed
--- /dev/null
+++ b/include/linux/mfd/rohm-bd718x7.h
@@ -0,0 +1,332 @@
1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/* Copyright (C) 2018 ROHM Semiconductors */
3
4#ifndef __LINUX_MFD_BD71837_H__
5#define __LINUX_MFD_BD71837_H__
6
7#include <linux/regmap.h>
8
9enum {
10 BD71837_BUCK1 = 0,
11 BD71837_BUCK2,
12 BD71837_BUCK3,
13 BD71837_BUCK4,
14 BD71837_BUCK5,
15 BD71837_BUCK6,
16 BD71837_BUCK7,
17 BD71837_BUCK8,
18 BD71837_LDO1,
19 BD71837_LDO2,
20 BD71837_LDO3,
21 BD71837_LDO4,
22 BD71837_LDO5,
23 BD71837_LDO6,
24 BD71837_LDO7,
25 BD71837_REGULATOR_CNT,
26};
27
28#define BD71837_BUCK1_VOLTAGE_NUM 0x40
29#define BD71837_BUCK2_VOLTAGE_NUM 0x40
30#define BD71837_BUCK3_VOLTAGE_NUM 0x40
31#define BD71837_BUCK4_VOLTAGE_NUM 0x40
32
33#define BD71837_BUCK5_VOLTAGE_NUM 0x08
34#define BD71837_BUCK6_VOLTAGE_NUM 0x04
35#define BD71837_BUCK7_VOLTAGE_NUM 0x08
36#define BD71837_BUCK8_VOLTAGE_NUM 0x40
37
38#define BD71837_LDO1_VOLTAGE_NUM 0x04
39#define BD71837_LDO2_VOLTAGE_NUM 0x02
40#define BD71837_LDO3_VOLTAGE_NUM 0x10
41#define BD71837_LDO4_VOLTAGE_NUM 0x10
42#define BD71837_LDO5_VOLTAGE_NUM 0x10
43#define BD71837_LDO6_VOLTAGE_NUM 0x10
44#define BD71837_LDO7_VOLTAGE_NUM 0x10
45
46enum {
47 BD71837_REG_REV = 0x00,
48 BD71837_REG_SWRESET = 0x01,
49 BD71837_REG_I2C_DEV = 0x02,
50 BD71837_REG_PWRCTRL0 = 0x03,
51 BD71837_REG_PWRCTRL1 = 0x04,
52 BD71837_REG_BUCK1_CTRL = 0x05,
53 BD71837_REG_BUCK2_CTRL = 0x06,
54 BD71837_REG_BUCK3_CTRL = 0x07,
55 BD71837_REG_BUCK4_CTRL = 0x08,
56 BD71837_REG_BUCK5_CTRL = 0x09,
57 BD71837_REG_BUCK6_CTRL = 0x0A,
58 BD71837_REG_BUCK7_CTRL = 0x0B,
59 BD71837_REG_BUCK8_CTRL = 0x0C,
60 BD71837_REG_BUCK1_VOLT_RUN = 0x0D,
61 BD71837_REG_BUCK1_VOLT_IDLE = 0x0E,
62 BD71837_REG_BUCK1_VOLT_SUSP = 0x0F,
63 BD71837_REG_BUCK2_VOLT_RUN = 0x10,
64 BD71837_REG_BUCK2_VOLT_IDLE = 0x11,
65 BD71837_REG_BUCK3_VOLT_RUN = 0x12,
66 BD71837_REG_BUCK4_VOLT_RUN = 0x13,
67 BD71837_REG_BUCK5_VOLT = 0x14,
68 BD71837_REG_BUCK6_VOLT = 0x15,
69 BD71837_REG_BUCK7_VOLT = 0x16,
70 BD71837_REG_BUCK8_VOLT = 0x17,
71 BD71837_REG_LDO1_VOLT = 0x18,
72 BD71837_REG_LDO2_VOLT = 0x19,
73 BD71837_REG_LDO3_VOLT = 0x1A,
74 BD71837_REG_LDO4_VOLT = 0x1B,
75 BD71837_REG_LDO5_VOLT = 0x1C,
76 BD71837_REG_LDO6_VOLT = 0x1D,
77 BD71837_REG_LDO7_VOLT = 0x1E,
78 BD71837_REG_TRANS_COND0 = 0x1F,
79 BD71837_REG_TRANS_COND1 = 0x20,
80 BD71837_REG_VRFAULTEN = 0x21,
81 BD71837_REG_MVRFLTMASK0 = 0x22,
82 BD71837_REG_MVRFLTMASK1 = 0x23,
83 BD71837_REG_MVRFLTMASK2 = 0x24,
84 BD71837_REG_RCVCFG = 0x25,
85 BD71837_REG_RCVNUM = 0x26,
86 BD71837_REG_PWRONCONFIG0 = 0x27,
87 BD71837_REG_PWRONCONFIG1 = 0x28,
88 BD71837_REG_RESETSRC = 0x29,
89 BD71837_REG_MIRQ = 0x2A,
90 BD71837_REG_IRQ = 0x2B,
91 BD71837_REG_IN_MON = 0x2C,
92 BD71837_REG_POW_STATE = 0x2D,
93 BD71837_REG_OUT32K = 0x2E,
94 BD71837_REG_REGLOCK = 0x2F,
95 BD71837_REG_OTPVER = 0xFF,
96 BD71837_MAX_REGISTER = 0x100,
97};
98
99#define REGLOCK_PWRSEQ 0x1
100#define REGLOCK_VREG 0x10
101
102/* Generic BUCK control masks */
103#define BD71837_BUCK_SEL 0x02
104#define BD71837_BUCK_EN 0x01
105#define BD71837_BUCK_RUN_ON 0x04
106
107/* Generic LDO masks */
108#define BD71837_LDO_SEL 0x80
109#define BD71837_LDO_EN 0x40
110
111/* BD71837 BUCK ramp rate CTRL reg bits */
112#define BUCK_RAMPRATE_MASK 0xC0
113#define BUCK_RAMPRATE_10P00MV 0x0
114#define BUCK_RAMPRATE_5P00MV 0x1
115#define BUCK_RAMPRATE_2P50MV 0x2
116#define BUCK_RAMPRATE_1P25MV 0x3
117
118/* BD71837_REG_BUCK1_VOLT_RUN bits */
119#define BUCK1_RUN_MASK 0x3F
120#define BUCK1_RUN_DEFAULT 0x14
121
122/* BD71837_REG_BUCK1_VOLT_SUSP bits */
123#define BUCK1_SUSP_MASK 0x3F
124#define BUCK1_SUSP_DEFAULT 0x14
125
126/* BD71837_REG_BUCK1_VOLT_IDLE bits */
127#define BUCK1_IDLE_MASK 0x3F
128#define BUCK1_IDLE_DEFAULT 0x14
129
130/* BD71837_REG_BUCK2_VOLT_RUN bits */
131#define BUCK2_RUN_MASK 0x3F
132#define BUCK2_RUN_DEFAULT 0x1E
133
134/* BD71837_REG_BUCK2_VOLT_IDLE bits */
135#define BUCK2_IDLE_MASK 0x3F
136#define BUCK2_IDLE_DEFAULT 0x14
137
138/* BD71837_REG_BUCK3_VOLT_RUN bits */
139#define BUCK3_RUN_MASK 0x3F
140#define BUCK3_RUN_DEFAULT 0x1E
141
142/* BD71837_REG_BUCK4_VOLT_RUN bits */
143#define BUCK4_RUN_MASK 0x3F
144#define BUCK4_RUN_DEFAULT 0x1E
145
146/* BD71837_REG_BUCK5_VOLT bits */
147#define BUCK5_MASK 0x07
148#define BUCK5_DEFAULT 0x02
149
150/* BD71837_REG_BUCK6_VOLT bits */
151#define BUCK6_MASK 0x03
152#define BUCK6_DEFAULT 0x03
153
154/* BD71837_REG_BUCK7_VOLT bits */
155#define BUCK7_MASK 0x07
156#define BUCK7_DEFAULT 0x03
157
158/* BD71837_REG_BUCK8_VOLT bits */
159#define BUCK8_MASK 0x3F
160#define BUCK8_DEFAULT 0x1E
161
162/* BD71837_REG_IRQ bits */
163#define IRQ_SWRST 0x40
164#define IRQ_PWRON_S 0x20
165#define IRQ_PWRON_L 0x10
166#define IRQ_PWRON 0x08
167#define IRQ_WDOG 0x04
168#define IRQ_ON_REQ 0x02
169#define IRQ_STBY_REQ 0x01
170
171/* BD71837_REG_OUT32K bits */
172#define BD71837_OUT32K_EN 0x01
173
174/* BD71837 gated clock rate */
175#define BD71837_CLK_RATE 32768
176
177/* ROHM BD71837 irqs */
178enum {
179 BD71837_INT_STBY_REQ,
180 BD71837_INT_ON_REQ,
181 BD71837_INT_WDOG,
182 BD71837_INT_PWRBTN,
183 BD71837_INT_PWRBTN_L,
184 BD71837_INT_PWRBTN_S,
185 BD71837_INT_SWRST
186};
187
188/* ROHM BD71837 interrupt masks */
189#define BD71837_INT_SWRST_MASK 0x40
190#define BD71837_INT_PWRBTN_S_MASK 0x20
191#define BD71837_INT_PWRBTN_L_MASK 0x10
192#define BD71837_INT_PWRBTN_MASK 0x8
193#define BD71837_INT_WDOG_MASK 0x4
194#define BD71837_INT_ON_REQ_MASK 0x2
195#define BD71837_INT_STBY_REQ_MASK 0x1
196
197/* BD71837_REG_LDO1_VOLT bits */
198#define LDO1_MASK 0x03
199
200/* BD71837_REG_LDO1_VOLT bits */
201#define LDO2_MASK 0x20
202
203/* BD71837_REG_LDO3_VOLT bits */
204#define LDO3_MASK 0x0F
205
206/* BD71837_REG_LDO4_VOLT bits */
207#define LDO4_MASK 0x0F
208
209/* BD71837_REG_LDO5_VOLT bits */
210#define LDO5_MASK 0x0F
211
212/* BD71837_REG_LDO6_VOLT bits */
213#define LDO6_MASK 0x0F
214
215/* BD71837_REG_LDO7_VOLT bits */
216#define LDO7_MASK 0x0F
217
218/* Register write induced reset settings */
219
220/*
221 * Even though the bit zero is not SWRESET type we still want to write zero
222 * to it when changing type. Bit zero is 'SWRESET' trigger bit and if we
223 * write 1 to it we will trigger the action. So always write 0 to it when
224 * changning SWRESET action - no matter what we read from it.
225 */
226#define BD71837_SWRESET_TYPE_MASK 7
227#define BD71837_SWRESET_TYPE_DISABLED 0
228#define BD71837_SWRESET_TYPE_COLD 4
229#define BD71837_SWRESET_TYPE_WARM 6
230
231#define BD71837_SWRESET_RESET_MASK 1
232#define BD71837_SWRESET_RESET 1
233
234/* Poweroff state transition conditions */
235
236#define BD718XX_ON_REQ_POWEROFF_MASK 1
237#define BD718XX_SWRESET_POWEROFF_MASK 2
238#define BD718XX_WDOG_POWEROFF_MASK 4
239#define BD718XX_KEY_L_POWEROFF_MASK 8
240
241#define BD718XX_POWOFF_TO_SNVS 0
242#define BD718XX_POWOFF_TO_RDY 0xF
243
244#define BD718XX_POWOFF_TIME_MASK 0xF0
245enum {
246 BD718XX_POWOFF_TIME_5MS = 0,
247 BD718XX_POWOFF_TIME_10MS,
248 BD718XX_POWOFF_TIME_15MS,
249 BD718XX_POWOFF_TIME_20MS,
250 BD718XX_POWOFF_TIME_25MS,
251 BD718XX_POWOFF_TIME_30MS,
252 BD718XX_POWOFF_TIME_35MS,
253 BD718XX_POWOFF_TIME_40MS,
254 BD718XX_POWOFF_TIME_45MS,
255 BD718XX_POWOFF_TIME_50MS,
256 BD718XX_POWOFF_TIME_75MS,
257 BD718XX_POWOFF_TIME_100MS,
258 BD718XX_POWOFF_TIME_250MS,
259 BD718XX_POWOFF_TIME_500MS,
260 BD718XX_POWOFF_TIME_750MS,
261 BD718XX_POWOFF_TIME_1500MS
262};
263
264/* Poweron sequence state transition conditions */
265#define BD718XX_RDY_TO_SNVS_MASK 0xF
266#define BD718XX_SNVS_TO_RUN_MASK 0xF0
267
268#define BD718XX_PWR_TRIG_KEY_L 1
269#define BD718XX_PWR_TRIG_KEY_S 2
270#define BD718XX_PWR_TRIG_PMIC_ON 4
271#define BD718XX_PWR_TRIG_VSYS_UVLO 8
272#define BD718XX_RDY_TO_SNVS_SIFT 0
273#define BD718XX_SNVS_TO_RUN_SIFT 4
274
275#define BD718XX_PWRBTN_PRESS_DURATION_MASK 0xF
276
277/* Timeout value for detecting short press */
278enum {
279 BD718XX_PWRBTN_SHORT_PRESS_10MS = 0,
280 BD718XX_PWRBTN_SHORT_PRESS_500MS,
281 BD718XX_PWRBTN_SHORT_PRESS_1000MS,
282 BD718XX_PWRBTN_SHORT_PRESS_1500MS,
283 BD718XX_PWRBTN_SHORT_PRESS_2000MS,
284 BD718XX_PWRBTN_SHORT_PRESS_2500MS,
285 BD718XX_PWRBTN_SHORT_PRESS_3000MS,
286 BD718XX_PWRBTN_SHORT_PRESS_3500MS,
287 BD718XX_PWRBTN_SHORT_PRESS_4000MS,
288 BD718XX_PWRBTN_SHORT_PRESS_4500MS,
289 BD718XX_PWRBTN_SHORT_PRESS_5000MS,
290 BD718XX_PWRBTN_SHORT_PRESS_5500MS,
291 BD718XX_PWRBTN_SHORT_PRESS_6000MS,
292 BD718XX_PWRBTN_SHORT_PRESS_6500MS,
293 BD718XX_PWRBTN_SHORT_PRESS_7000MS,
294 BD718XX_PWRBTN_SHORT_PRESS_7500MS
295};
296
297/* Timeout value for detecting LONG press */
298enum {
299 BD718XX_PWRBTN_LONG_PRESS_10MS = 0,
300 BD718XX_PWRBTN_LONG_PRESS_1S,
301 BD718XX_PWRBTN_LONG_PRESS_2S,
302 BD718XX_PWRBTN_LONG_PRESS_3S,
303 BD718XX_PWRBTN_LONG_PRESS_4S,
304 BD718XX_PWRBTN_LONG_PRESS_5S,
305 BD718XX_PWRBTN_LONG_PRESS_6S,
306 BD718XX_PWRBTN_LONG_PRESS_7S,
307 BD718XX_PWRBTN_LONG_PRESS_8S,
308 BD718XX_PWRBTN_LONG_PRESS_9S,
309 BD718XX_PWRBTN_LONG_PRESS_10S,
310 BD718XX_PWRBTN_LONG_PRESS_11S,
311 BD718XX_PWRBTN_LONG_PRESS_12S,
312 BD718XX_PWRBTN_LONG_PRESS_13S,
313 BD718XX_PWRBTN_LONG_PRESS_14S,
314 BD718XX_PWRBTN_LONG_PRESS_15S
315};
316
317struct bd71837_pmic;
318struct bd71837_clk;
319
320struct bd71837 {
321 struct device *dev;
322 struct regmap *regmap;
323 unsigned long int id;
324
325 int chip_irq;
326 struct regmap_irq_chip_data *irq_data;
327
328 struct bd71837_pmic *pmic;
329 struct bd71837_clk *clk;
330};
331
332#endif /* __LINUX_MFD_BD71837_H__ */
diff --git a/include/linux/mfd/wm8994/pdata.h b/include/linux/mfd/wm8994/pdata.h
index 90c60524a496..b19c370fe81a 100644
--- a/include/linux/mfd/wm8994/pdata.h
+++ b/include/linux/mfd/wm8994/pdata.h
@@ -222,6 +222,12 @@ struct wm8994_pdata {
222 */ 222 */
223 bool spkmode_pu; 223 bool spkmode_pu;
224 224
225 /*
226 * CS/ADDR must be pulled internally by the device on this
227 * system.
228 */
229 bool csnaddr_pd;
230
225 /** 231 /**
226 * Maximum number of channels clocks will be generated for, 232 * Maximum number of channels clocks will be generated for,
227 * useful for systems where and I2S bus with multiple data 233 * useful for systems where and I2S bus with multiple data
diff --git a/include/media/cec-notifier.h b/include/media/cec-notifier.h
index cf0add70b0e7..814eeef35a5c 100644
--- a/include/media/cec-notifier.h
+++ b/include/media/cec-notifier.h
@@ -20,8 +20,10 @@ struct cec_notifier;
20#if IS_REACHABLE(CONFIG_CEC_CORE) && IS_ENABLED(CONFIG_CEC_NOTIFIER) 20#if IS_REACHABLE(CONFIG_CEC_CORE) && IS_ENABLED(CONFIG_CEC_NOTIFIER)
21 21
22/** 22/**
23 * cec_notifier_get - find or create a new cec_notifier for the given device. 23 * cec_notifier_get_conn - find or create a new cec_notifier for the given
24 * device and connector tuple.
24 * @dev: device that sends the events. 25 * @dev: device that sends the events.
26 * @conn: the connector name from which the event occurs
25 * 27 *
26 * If a notifier for device @dev already exists, then increase the refcount 28 * If a notifier for device @dev already exists, then increase the refcount
27 * and return that notifier. 29 * and return that notifier.
@@ -31,7 +33,8 @@ struct cec_notifier;
31 * 33 *
32 * Return NULL if the memory could not be allocated. 34 * Return NULL if the memory could not be allocated.
33 */ 35 */
34struct cec_notifier *cec_notifier_get(struct device *dev); 36struct cec_notifier *cec_notifier_get_conn(struct device *dev,
37 const char *conn);
35 38
36/** 39/**
37 * cec_notifier_put - decrease refcount and delete when the refcount reaches 0. 40 * cec_notifier_put - decrease refcount and delete when the refcount reaches 0.
@@ -85,7 +88,8 @@ void cec_register_cec_notifier(struct cec_adapter *adap,
85 struct cec_notifier *notifier); 88 struct cec_notifier *notifier);
86 89
87#else 90#else
88static inline struct cec_notifier *cec_notifier_get(struct device *dev) 91static inline struct cec_notifier *cec_notifier_get_conn(struct device *dev,
92 const char *conn)
89{ 93{
90 /* A non-NULL pointer is expected on success */ 94 /* A non-NULL pointer is expected on success */
91 return (struct cec_notifier *)0xdeadfeed; 95 return (struct cec_notifier *)0xdeadfeed;
@@ -121,6 +125,23 @@ static inline void cec_register_cec_notifier(struct cec_adapter *adap,
121#endif 125#endif
122 126
123/** 127/**
128 * cec_notifier_get - find or create a new cec_notifier for the given device.
129 * @dev: device that sends the events.
130 *
131 * If a notifier for device @dev already exists, then increase the refcount
132 * and return that notifier.
133 *
134 * If it doesn't exist, then allocate a new notifier struct and return a
135 * pointer to that new struct.
136 *
137 * Return NULL if the memory could not be allocated.
138 */
139static inline struct cec_notifier *cec_notifier_get(struct device *dev)
140{
141 return cec_notifier_get_conn(dev, NULL);
142}
143
144/**
124 * cec_notifier_phys_addr_invalidate() - set the physical address to INVALID 145 * cec_notifier_phys_addr_invalidate() - set the physical address to INVALID
125 * 146 *
126 * @n: the CEC notifier 147 * @n: the CEC notifier