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authorHariprasad Shenai <hariprasad@chelsio.com>2014-11-21 02:22:02 -0500
committerDavid S. Miller <davem@davemloft.net>2014-11-22 16:57:47 -0500
commit5167865aaa70d605bb0771368878cbad0553d854 (patch)
tree74fbb5b236d00ef03fb64eaa43597c95b23228b2
parent77a80e23cc0d1fb19e611e7108b3f6a233a67901 (diff)
RDMA/cxgb4/csiostor: Cleansup FW related macros/register defines for PF/VF and LDST
This patch cleanups PF/VF and LDST related macros/register defines that are defined in t4fw_api.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/infiniband/hw/cxgb4/cm.c2
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c61
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/t4_hw.c78
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h270
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c10
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c72
-rw-r--r--drivers/scsi/csiostor/csio_hw.c20
-rw-r--r--drivers/scsi/csiostor/csio_mb.c30
-rw-r--r--drivers/scsi/csiostor/csio_mb.h12
9 files changed, 327 insertions, 228 deletions
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c
index 0ad8e2acd895..4b8c6116c058 100644
--- a/drivers/infiniband/hw/cxgb4/cm.c
+++ b/drivers/infiniband/hw/cxgb4/cm.c
@@ -478,7 +478,7 @@ static void send_flowc(struct c4iw_ep *ep, struct sk_buff *skb)
478 16)) | FW_WR_FLOWID_V(ep->hwtid)); 478 16)) | FW_WR_FLOWID_V(ep->hwtid));
479 479
480 flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; 480 flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN;
481 flowc->mnemval[0].val = cpu_to_be32(FW_PFVF_CMD_PFN 481 flowc->mnemval[0].val = cpu_to_be32(FW_PFVF_CMD_PFN_V
482 (ep->com.dev->rdev.lldi.pf)); 482 (ep->com.dev->rdev.lldi.pf));
483 flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH; 483 flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH;
484 flowc->mnemval[1].val = cpu_to_be32(ep->tx_chan); 484 flowc->mnemval[1].val = cpu_to_be32(ep->tx_chan);
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 6b6d7e16d4ed..4caec41f91e2 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -141,7 +141,7 @@ static unsigned int pfvfres_pmask(struct adapter *adapter,
141 * Give PF's access to all of the ports. 141 * Give PF's access to all of the ports.
142 */ 142 */
143 if (vf == 0) 143 if (vf == 0)
144 return FW_PFVF_CMD_PMASK_MASK; 144 return FW_PFVF_CMD_PMASK_M;
145 145
146 /* 146 /*
147 * For VFs, we'll assign them access to the ports based purely on the 147 * For VFs, we'll assign them access to the ports based purely on the
@@ -512,9 +512,10 @@ static void dcb_tx_queue_prio_enable(struct net_device *dev, int enable)
512 u32 name, value; 512 u32 name, value;
513 int err; 513 int err;
514 514
515 name = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) | 515 name = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) |
516 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH) | 516 FW_PARAMS_PARAM_X_V(
517 FW_PARAMS_PARAM_YZ(txq->q.cntxt_id)); 517 FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH) |
518 FW_PARAMS_PARAM_YZ_V(txq->q.cntxt_id));
518 value = enable ? i : 0xffffffff; 519 value = enable ? i : 0xffffffff;
519 520
520 /* Since we can be called while atomic (from "interrupt 521 /* Since we can be called while atomic (from "interrupt
@@ -2717,9 +2718,10 @@ static int set_rspq_intr_params(struct sge_rspq *q,
2717 new_idx = closest_thres(&adap->sge, cnt); 2718 new_idx = closest_thres(&adap->sge, cnt);
2718 if (q->desc && q->pktcnt_idx != new_idx) { 2719 if (q->desc && q->pktcnt_idx != new_idx) {
2719 /* the queue has already been created, update it */ 2720 /* the queue has already been created, update it */
2720 v = FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) | 2721 v = FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) |
2721 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_IQ_INTCNTTHRESH) | 2722 FW_PARAMS_PARAM_X_V(
2722 FW_PARAMS_PARAM_YZ(q->cntxt_id); 2723 FW_PARAMS_PARAM_DMAQ_IQ_INTCNTTHRESH) |
2724 FW_PARAMS_PARAM_YZ_V(q->cntxt_id);
2723 err = t4_set_params(adap, adap->fn, adap->fn, 0, 1, &v, 2725 err = t4_set_params(adap, adap->fn, adap->fn, 0, 1, &v,
2724 &new_idx); 2726 &new_idx);
2725 if (err) 2727 if (err)
@@ -4870,11 +4872,11 @@ static u32 t4_read_pcie_cfg4(struct adapter *adap, int reg)
4870 htonl(FW_CMD_OP_V(FW_LDST_CMD) | 4872 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
4871 FW_CMD_REQUEST_F | 4873 FW_CMD_REQUEST_F |
4872 FW_CMD_READ_F | 4874 FW_CMD_READ_F |
4873 FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FUNC_PCIE)); 4875 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_FUNC_PCIE));
4874 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd)); 4876 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
4875 ldst_cmd.u.pcie.select_naccess = FW_LDST_CMD_NACCESS(1); 4877 ldst_cmd.u.pcie.select_naccess = FW_LDST_CMD_NACCESS_V(1);
4876 ldst_cmd.u.pcie.ctrl_to_fn = 4878 ldst_cmd.u.pcie.ctrl_to_fn =
4877 (FW_LDST_CMD_LC | FW_LDST_CMD_FN(adap->fn)); 4879 (FW_LDST_CMD_LC_F | FW_LDST_CMD_FN_V(adap->fn));
4878 ldst_cmd.u.pcie.r = reg; 4880 ldst_cmd.u.pcie.r = reg;
4879 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd, sizeof(ldst_cmd), 4881 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd, sizeof(ldst_cmd),
4880 &ldst_cmd); 4882 &ldst_cmd);
@@ -5148,8 +5150,8 @@ static int adap_init0_config(struct adapter *adapter, int reset)
5148 if (cf->size >= FLASH_CFG_MAX_SIZE) 5150 if (cf->size >= FLASH_CFG_MAX_SIZE)
5149 ret = -ENOMEM; 5151 ret = -ENOMEM;
5150 else { 5152 else {
5151 params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | 5153 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
5152 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_CF)); 5154 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CF));
5153 ret = t4_query_params(adapter, adapter->mbox, 5155 ret = t4_query_params(adapter, adapter->mbox,
5154 adapter->fn, 0, 1, params, val); 5156 adapter->fn, 0, 1, params, val);
5155 if (ret == 0) { 5157 if (ret == 0) {
@@ -5167,8 +5169,8 @@ static int adap_init0_config(struct adapter *adapter, int reset)
5167 size_t size = cf->size & ~0x3; 5169 size_t size = cf->size & ~0x3;
5168 __be32 *data = (__be32 *)cf->data; 5170 __be32 *data = (__be32 *)cf->data;
5169 5171
5170 mtype = FW_PARAMS_PARAM_Y_GET(val[0]); 5172 mtype = FW_PARAMS_PARAM_Y_G(val[0]);
5171 maddr = FW_PARAMS_PARAM_Z_GET(val[0]) << 16; 5173 maddr = FW_PARAMS_PARAM_Z_G(val[0]) << 16;
5172 5174
5173 spin_lock(&adapter->win0_lock); 5175 spin_lock(&adapter->win0_lock);
5174 ret = t4_memory_rw(adapter, 0, mtype, maddr, 5176 ret = t4_memory_rw(adapter, 0, mtype, maddr,
@@ -5209,9 +5211,9 @@ static int adap_init0_config(struct adapter *adapter, int reset)
5209 FW_CMD_REQUEST_F | 5211 FW_CMD_REQUEST_F |
5210 FW_CMD_READ_F); 5212 FW_CMD_READ_F);
5211 caps_cmd.cfvalid_to_len16 = 5213 caps_cmd.cfvalid_to_len16 =
5212 htonl(FW_CAPS_CONFIG_CMD_CFVALID | 5214 htonl(FW_CAPS_CONFIG_CMD_CFVALID_F |
5213 FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | 5215 FW_CAPS_CONFIG_CMD_MEMTYPE_CF_V(mtype) |
5214 FW_CAPS_CONFIG_CMD_MEMADDR64K_CF(maddr >> 16) | 5216 FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_V(maddr >> 16) |
5215 FW_LEN16(caps_cmd)); 5217 FW_LEN16(caps_cmd));
5216 ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), 5218 ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd),
5217 &caps_cmd); 5219 &caps_cmd);
@@ -5377,7 +5379,7 @@ static int adap_init0_no_config(struct adapter *adapter, int reset)
5377 PFRES_NEQ, PFRES_NETHCTRL, 5379 PFRES_NEQ, PFRES_NETHCTRL,
5378 PFRES_NIQFLINT, PFRES_NIQ, 5380 PFRES_NIQFLINT, PFRES_NIQ,
5379 PFRES_TC, PFRES_NVI, 5381 PFRES_TC, PFRES_NVI,
5380 FW_PFVF_CMD_CMASK_MASK, 5382 FW_PFVF_CMD_CMASK_M,
5381 pfvfres_pmask(adapter, adapter->fn, 0), 5383 pfvfres_pmask(adapter, adapter->fn, 0),
5382 PFRES_NEXACTF, 5384 PFRES_NEXACTF,
5383 PFRES_R_CAPS, PFRES_WX_CAPS); 5385 PFRES_R_CAPS, PFRES_WX_CAPS);
@@ -5422,7 +5424,7 @@ static int adap_init0_no_config(struct adapter *adapter, int reset)
5422 VFRES_NEQ, VFRES_NETHCTRL, 5424 VFRES_NEQ, VFRES_NETHCTRL,
5423 VFRES_NIQFLINT, VFRES_NIQ, 5425 VFRES_NIQFLINT, VFRES_NIQ,
5424 VFRES_TC, VFRES_NVI, 5426 VFRES_TC, VFRES_NVI,
5425 FW_PFVF_CMD_CMASK_MASK, 5427 FW_PFVF_CMD_CMASK_M,
5426 pfvfres_pmask( 5428 pfvfres_pmask(
5427 adapter, pf, vf), 5429 adapter, pf, vf),
5428 VFRES_NEXACTF, 5430 VFRES_NEXACTF,
@@ -5686,8 +5688,8 @@ static int adap_init0(struct adapter *adap)
5686 * and portvec ... 5688 * and portvec ...
5687 */ 5689 */
5688 v = 5690 v =
5689 FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | 5691 FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
5690 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_PORTVEC); 5692 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_PORTVEC);
5691 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 1, &v, &port_vec); 5693 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 1, &v, &port_vec);
5692 if (ret < 0) 5694 if (ret < 0)
5693 goto bye; 5695 goto bye;
@@ -5723,8 +5725,9 @@ static int adap_init0(struct adapter *adap)
5723 * Find out whether we're dealing with a version of 5725 * Find out whether we're dealing with a version of
5724 * the firmware which has configuration file support. 5726 * the firmware which has configuration file support.
5725 */ 5727 */
5726 params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | 5728 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
5727 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_CF)); 5729 FW_PARAMS_PARAM_X_V(
5730 FW_PARAMS_PARAM_DEV_CF));
5728 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 1, 5731 ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 1,
5729 params, val); 5732 params, val);
5730 5733
@@ -5784,14 +5787,14 @@ static int adap_init0(struct adapter *adap)
5784 * Grab some of our basic fundamental operating parameters. 5787 * Grab some of our basic fundamental operating parameters.
5785 */ 5788 */
5786#define FW_PARAM_DEV(param) \ 5789#define FW_PARAM_DEV(param) \
5787 (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \ 5790 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | \
5788 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param)) 5791 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_##param))
5789 5792
5790#define FW_PARAM_PFVF(param) \ 5793#define FW_PARAM_PFVF(param) \
5791 FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \ 5794 FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) | \
5792 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param)| \ 5795 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_##param)| \
5793 FW_PARAMS_PARAM_Y(0) | \ 5796 FW_PARAMS_PARAM_Y_V(0) | \
5794 FW_PARAMS_PARAM_Z(0) 5797 FW_PARAMS_PARAM_Z_V(0)
5795 5798
5796 params[0] = FW_PARAM_PFVF(EQ_START); 5799 params[0] = FW_PARAM_PFVF(EQ_START);
5797 params[1] = FW_PARAM_PFVF(L2T_START); 5800 params[1] = FW_PARAM_PFVF(L2T_START);
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index 0c78be36601e..9f1b3043d003 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -711,8 +711,8 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p)
711 * Ask firmware for the Core Clock since it knows how to translate the 711 * Ask firmware for the Core Clock since it knows how to translate the
712 * Reference Clock ('V2') VPD field into a Core Clock value ... 712 * Reference Clock ('V2') VPD field into a Core Clock value ...
713 */ 713 */
714 cclk_param = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | 714 cclk_param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
715 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_CCLK)); 715 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK));
716 ret = t4_query_params(adapter, adapter->mbox, 0, 0, 716 ret = t4_query_params(adapter, adapter->mbox, 0, 0,
717 1, &cclk_param, &cclk_val); 717 1, &cclk_param, &cclk_val);
718 718
@@ -2577,7 +2577,7 @@ int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,
2577 memset(&c, 0, sizeof(c)); 2577 memset(&c, 0, sizeof(c));
2578 c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F | 2578 c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F |
2579 FW_CMD_WRITE_F | 2579 FW_CMD_WRITE_F |
2580 FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FIRMWARE)); 2580 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_FIRMWARE));
2581 c.cycles_to_len16 = htonl(FW_LEN16(c)); 2581 c.cycles_to_len16 = htonl(FW_LEN16(c));
2582 c.u.addrval.addr = htonl(addr); 2582 c.u.addrval.addr = htonl(addr);
2583 c.u.addrval.val = htonl(val); 2583 c.u.addrval.val = htonl(val);
@@ -2604,10 +2604,10 @@ int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
2604 2604
2605 memset(&c, 0, sizeof(c)); 2605 memset(&c, 0, sizeof(c));
2606 c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F | 2606 c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F |
2607 FW_CMD_READ_F | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_MDIO)); 2607 FW_CMD_READ_F | FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MDIO));
2608 c.cycles_to_len16 = htonl(FW_LEN16(c)); 2608 c.cycles_to_len16 = htonl(FW_LEN16(c));
2609 c.u.mdio.paddr_mmd = htons(FW_LDST_CMD_PADDR(phy_addr) | 2609 c.u.mdio.paddr_mmd = htons(FW_LDST_CMD_PADDR_V(phy_addr) |
2610 FW_LDST_CMD_MMD(mmd)); 2610 FW_LDST_CMD_MMD_V(mmd));
2611 c.u.mdio.raddr = htons(reg); 2611 c.u.mdio.raddr = htons(reg);
2612 2612
2613 ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), &c); 2613 ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), &c);
@@ -2634,10 +2634,10 @@ int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
2634 2634
2635 memset(&c, 0, sizeof(c)); 2635 memset(&c, 0, sizeof(c));
2636 c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F | 2636 c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F |
2637 FW_CMD_WRITE_F | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_MDIO)); 2637 FW_CMD_WRITE_F | FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MDIO));
2638 c.cycles_to_len16 = htonl(FW_LEN16(c)); 2638 c.cycles_to_len16 = htonl(FW_LEN16(c));
2639 c.u.mdio.paddr_mmd = htons(FW_LDST_CMD_PADDR(phy_addr) | 2639 c.u.mdio.paddr_mmd = htons(FW_LDST_CMD_PADDR_V(phy_addr) |
2640 FW_LDST_CMD_MMD(mmd)); 2640 FW_LDST_CMD_MMD_V(mmd));
2641 c.u.mdio.raddr = htons(reg); 2641 c.u.mdio.raddr = htons(reg);
2642 c.u.mdio.rval = htons(val); 2642 c.u.mdio.rval = htons(val);
2643 2643
@@ -2774,13 +2774,13 @@ retry:
2774 memset(&c, 0, sizeof(c)); 2774 memset(&c, 0, sizeof(c));
2775 INIT_CMD(c, HELLO, WRITE); 2775 INIT_CMD(c, HELLO, WRITE);
2776 c.err_to_clearinit = htonl( 2776 c.err_to_clearinit = htonl(
2777 FW_HELLO_CMD_MASTERDIS(master == MASTER_CANT) | 2777 FW_HELLO_CMD_MASTERDIS_V(master == MASTER_CANT) |
2778 FW_HELLO_CMD_MASTERFORCE(master == MASTER_MUST) | 2778 FW_HELLO_CMD_MASTERFORCE_V(master == MASTER_MUST) |
2779 FW_HELLO_CMD_MBMASTER(master == MASTER_MUST ? mbox : 2779 FW_HELLO_CMD_MBMASTER_V(master == MASTER_MUST ? mbox :
2780 FW_HELLO_CMD_MBMASTER_MASK) | 2780 FW_HELLO_CMD_MBMASTER_M) |
2781 FW_HELLO_CMD_MBASYNCNOT(evt_mbox) | 2781 FW_HELLO_CMD_MBASYNCNOT_V(evt_mbox) |
2782 FW_HELLO_CMD_STAGE(fw_hello_cmd_stage_os) | 2782 FW_HELLO_CMD_STAGE_V(fw_hello_cmd_stage_os) |
2783 FW_HELLO_CMD_CLEARINIT); 2783 FW_HELLO_CMD_CLEARINIT_F);
2784 2784
2785 /* 2785 /*
2786 * Issue the HELLO command to the firmware. If it's not successful 2786 * Issue the HELLO command to the firmware. If it's not successful
@@ -2799,11 +2799,11 @@ retry:
2799 } 2799 }
2800 2800
2801 v = ntohl(c.err_to_clearinit); 2801 v = ntohl(c.err_to_clearinit);
2802 master_mbox = FW_HELLO_CMD_MBMASTER_GET(v); 2802 master_mbox = FW_HELLO_CMD_MBMASTER_G(v);
2803 if (state) { 2803 if (state) {
2804 if (v & FW_HELLO_CMD_ERR) 2804 if (v & FW_HELLO_CMD_ERR_F)
2805 *state = DEV_STATE_ERR; 2805 *state = DEV_STATE_ERR;
2806 else if (v & FW_HELLO_CMD_INIT) 2806 else if (v & FW_HELLO_CMD_INIT_F)
2807 *state = DEV_STATE_INIT; 2807 *state = DEV_STATE_INIT;
2808 else 2808 else
2809 *state = DEV_STATE_UNINIT; 2809 *state = DEV_STATE_UNINIT;
@@ -2820,7 +2820,7 @@ retry:
2820 * this case, the Master PF returned by the firmware will be 2820 * this case, the Master PF returned by the firmware will be
2821 * FW_PCIE_FW_MASTER_MASK so the test below will work ... 2821 * FW_PCIE_FW_MASTER_MASK so the test below will work ...
2822 */ 2822 */
2823 if ((v & (FW_HELLO_CMD_ERR|FW_HELLO_CMD_INIT)) == 0 && 2823 if ((v & (FW_HELLO_CMD_ERR_F|FW_HELLO_CMD_INIT_F)) == 0 &&
2824 master_mbox != mbox) { 2824 master_mbox != mbox) {
2825 int waiting = FW_CMD_HELLO_TIMEOUT; 2825 int waiting = FW_CMD_HELLO_TIMEOUT;
2826 2826
@@ -2961,7 +2961,7 @@ static int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force)
2961 memset(&c, 0, sizeof(c)); 2961 memset(&c, 0, sizeof(c));
2962 INIT_CMD(c, RESET, WRITE); 2962 INIT_CMD(c, RESET, WRITE);
2963 c.val = htonl(PIORST | PIORSTMODE); 2963 c.val = htonl(PIORST | PIORSTMODE);
2964 c.halt_pkd = htonl(FW_RESET_CMD_HALT(1U)); 2964 c.halt_pkd = htonl(FW_RESET_CMD_HALT_F);
2965 ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); 2965 ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);
2966 } 2966 }
2967 2967
@@ -3252,8 +3252,8 @@ int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
3252 3252
3253 memset(&c, 0, sizeof(c)); 3253 memset(&c, 0, sizeof(c));
3254 c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) | FW_CMD_REQUEST_F | 3254 c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) | FW_CMD_REQUEST_F |
3255 FW_CMD_READ_F | FW_PARAMS_CMD_PFN(pf) | 3255 FW_CMD_READ_F | FW_PARAMS_CMD_PFN_V(pf) |
3256 FW_PARAMS_CMD_VFN(vf)); 3256 FW_PARAMS_CMD_VFN_V(vf));
3257 c.retval_len16 = htonl(FW_LEN16(c)); 3257 c.retval_len16 = htonl(FW_LEN16(c));
3258 for (i = 0; i < nparams; i++, p += 2) 3258 for (i = 0; i < nparams; i++, p += 2)
3259 *p = htonl(*params++); 3259 *p = htonl(*params++);
@@ -3293,8 +3293,8 @@ int t4_set_params_nosleep(struct adapter *adap, unsigned int mbox,
3293 memset(&c, 0, sizeof(c)); 3293 memset(&c, 0, sizeof(c));
3294 c.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 3294 c.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) |
3295 FW_CMD_REQUEST_F | FW_CMD_WRITE_F | 3295 FW_CMD_REQUEST_F | FW_CMD_WRITE_F |
3296 FW_PARAMS_CMD_PFN(pf) | 3296 FW_PARAMS_CMD_PFN_V(pf) |
3297 FW_PARAMS_CMD_VFN(vf)); 3297 FW_PARAMS_CMD_VFN_V(vf));
3298 c.retval_len16 = cpu_to_be32(FW_LEN16(c)); 3298 c.retval_len16 = cpu_to_be32(FW_LEN16(c));
3299 3299
3300 while (nparams--) { 3300 while (nparams--) {
@@ -3330,8 +3330,8 @@ int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
3330 3330
3331 memset(&c, 0, sizeof(c)); 3331 memset(&c, 0, sizeof(c));
3332 c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) | FW_CMD_REQUEST_F | 3332 c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) | FW_CMD_REQUEST_F |
3333 FW_CMD_WRITE_F | FW_PARAMS_CMD_PFN(pf) | 3333 FW_CMD_WRITE_F | FW_PARAMS_CMD_PFN_V(pf) |
3334 FW_PARAMS_CMD_VFN(vf)); 3334 FW_PARAMS_CMD_VFN_V(vf));
3335 c.retval_len16 = htonl(FW_LEN16(c)); 3335 c.retval_len16 = htonl(FW_LEN16(c));
3336 while (nparams--) { 3336 while (nparams--) {
3337 *p++ = htonl(*params++); 3337 *p++ = htonl(*params++);
@@ -3372,19 +3372,19 @@ int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
3372 3372
3373 memset(&c, 0, sizeof(c)); 3373 memset(&c, 0, sizeof(c));
3374 c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PFVF_CMD) | FW_CMD_REQUEST_F | 3374 c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PFVF_CMD) | FW_CMD_REQUEST_F |
3375 FW_CMD_WRITE_F | FW_PFVF_CMD_PFN(pf) | 3375 FW_CMD_WRITE_F | FW_PFVF_CMD_PFN_V(pf) |
3376 FW_PFVF_CMD_VFN(vf)); 3376 FW_PFVF_CMD_VFN_V(vf));
3377 c.retval_len16 = htonl(FW_LEN16(c)); 3377 c.retval_len16 = htonl(FW_LEN16(c));
3378 c.niqflint_niq = htonl(FW_PFVF_CMD_NIQFLINT(rxqi) | 3378 c.niqflint_niq = htonl(FW_PFVF_CMD_NIQFLINT_V(rxqi) |
3379 FW_PFVF_CMD_NIQ(rxq)); 3379 FW_PFVF_CMD_NIQ_V(rxq));
3380 c.type_to_neq = htonl(FW_PFVF_CMD_CMASK(cmask) | 3380 c.type_to_neq = htonl(FW_PFVF_CMD_CMASK_V(cmask) |
3381 FW_PFVF_CMD_PMASK(pmask) | 3381 FW_PFVF_CMD_PMASK_V(pmask) |
3382 FW_PFVF_CMD_NEQ(txq)); 3382 FW_PFVF_CMD_NEQ_V(txq));
3383 c.tc_to_nexactf = htonl(FW_PFVF_CMD_TC(tc) | FW_PFVF_CMD_NVI(vi) | 3383 c.tc_to_nexactf = htonl(FW_PFVF_CMD_TC_V(tc) | FW_PFVF_CMD_NVI_V(vi) |
3384 FW_PFVF_CMD_NEXACTF(nexact)); 3384 FW_PFVF_CMD_NEXACTF_V(nexact));
3385 c.r_caps_to_nethctrl = htonl(FW_PFVF_CMD_R_CAPS(rcaps) | 3385 c.r_caps_to_nethctrl = htonl(FW_PFVF_CMD_R_CAPS_V(rcaps) |
3386 FW_PFVF_CMD_WX_CAPS(wxcaps) | 3386 FW_PFVF_CMD_WX_CAPS_V(wxcaps) |
3387 FW_PFVF_CMD_NETHCTRL(txq_eth_ctrl)); 3387 FW_PFVF_CMD_NETHCTRL_V(txq_eth_ctrl));
3388 return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); 3388 return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);
3389} 3389}
3390 3390
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
index 3bc5bdb4d334..5839b8077575 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
@@ -761,7 +761,8 @@ enum fw_ldst_func_mod_index {
761 761
762struct fw_ldst_cmd { 762struct fw_ldst_cmd {
763 __be32 op_to_addrspace; 763 __be32 op_to_addrspace;
764#define FW_LDST_CMD_ADDRSPACE(x) ((x) << 0) 764#define FW_LDST_CMD_ADDRSPACE_S 0
765#define FW_LDST_CMD_ADDRSPACE_V(x) ((x) << FW_LDST_CMD_ADDRSPACE_S)
765 __be32 cycles_to_len16; 766 __be32 cycles_to_len16;
766 union fw_ldst { 767 union fw_ldst {
767 struct fw_ldst_addrval { 768 struct fw_ldst_addrval {
@@ -817,15 +818,33 @@ struct fw_ldst_cmd {
817 } u; 818 } u;
818}; 819};
819 820
820#define FW_LDST_CMD_MSG(x) ((x) << 31) 821#define FW_LDST_CMD_MSG_S 31
821#define FW_LDST_CMD_PADDR(x) ((x) << 8) 822#define FW_LDST_CMD_MSG_V(x) ((x) << FW_LDST_CMD_MSG_S)
822#define FW_LDST_CMD_MMD(x) ((x) << 0) 823
823#define FW_LDST_CMD_FID(x) ((x) << 15) 824#define FW_LDST_CMD_PADDR_S 8
824#define FW_LDST_CMD_CTL(x) ((x) << 0) 825#define FW_LDST_CMD_PADDR_V(x) ((x) << FW_LDST_CMD_PADDR_S)
825#define FW_LDST_CMD_RPLCPF(x) ((x) << 0) 826
826#define FW_LDST_CMD_LC (1U << 4) 827#define FW_LDST_CMD_MMD_S 0
827#define FW_LDST_CMD_NACCESS(x) ((x) << 0) 828#define FW_LDST_CMD_MMD_V(x) ((x) << FW_LDST_CMD_MMD_S)
828#define FW_LDST_CMD_FN(x) ((x) << 0) 829
830#define FW_LDST_CMD_FID_S 15
831#define FW_LDST_CMD_FID_V(x) ((x) << FW_LDST_CMD_FID_S)
832
833#define FW_LDST_CMD_CTL_S 0
834#define FW_LDST_CMD_CTL_V(x) ((x) << FW_LDST_CMD_CTL_S)
835
836#define FW_LDST_CMD_RPLCPF_S 0
837#define FW_LDST_CMD_RPLCPF_V(x) ((x) << FW_LDST_CMD_RPLCPF_S)
838
839#define FW_LDST_CMD_LC_S 4
840#define FW_LDST_CMD_LC_V(x) ((x) << FW_LDST_CMD_LC_S)
841#define FW_LDST_CMD_LC_F FW_LDST_CMD_LC_V(1U)
842
843#define FW_LDST_CMD_FN_S 0
844#define FW_LDST_CMD_FN_V(x) ((x) << FW_LDST_CMD_FN_S)
845
846#define FW_LDST_CMD_NACCESS_S 0
847#define FW_LDST_CMD_NACCESS_V(x) ((x) << FW_LDST_CMD_NACCESS_S)
829 848
830struct fw_reset_cmd { 849struct fw_reset_cmd {
831 __be32 op_to_write; 850 __be32 op_to_write;
@@ -834,11 +853,12 @@ struct fw_reset_cmd {
834 __be32 halt_pkd; 853 __be32 halt_pkd;
835}; 854};
836 855
837#define FW_RESET_CMD_HALT_SHIFT 31 856#define FW_RESET_CMD_HALT_S 31
838#define FW_RESET_CMD_HALT_MASK 0x1 857#define FW_RESET_CMD_HALT_M 0x1
839#define FW_RESET_CMD_HALT(x) ((x) << FW_RESET_CMD_HALT_SHIFT) 858#define FW_RESET_CMD_HALT_V(x) ((x) << FW_RESET_CMD_HALT_S)
840#define FW_RESET_CMD_HALT_GET(x) \ 859#define FW_RESET_CMD_HALT_G(x) \
841 (((x) >> FW_RESET_CMD_HALT_SHIFT) & FW_RESET_CMD_HALT_MASK) 860 (((x) >> FW_RESET_CMD_HALT_S) & FW_RESET_CMD_HALT_M)
861#define FW_RESET_CMD_HALT_F FW_RESET_CMD_HALT_V(1U)
842 862
843enum fw_hellow_cmd { 863enum fw_hellow_cmd {
844 fw_hello_cmd_stage_os = 0x0 864 fw_hello_cmd_stage_os = 0x0
@@ -848,22 +868,42 @@ struct fw_hello_cmd {
848 __be32 op_to_write; 868 __be32 op_to_write;
849 __be32 retval_len16; 869 __be32 retval_len16;
850 __be32 err_to_clearinit; 870 __be32 err_to_clearinit;
851#define FW_HELLO_CMD_ERR (1U << 31)
852#define FW_HELLO_CMD_INIT (1U << 30)
853#define FW_HELLO_CMD_MASTERDIS(x) ((x) << 29)
854#define FW_HELLO_CMD_MASTERFORCE(x) ((x) << 28)
855#define FW_HELLO_CMD_MBMASTER_MASK 0xfU
856#define FW_HELLO_CMD_MBMASTER_SHIFT 24
857#define FW_HELLO_CMD_MBMASTER(x) ((x) << FW_HELLO_CMD_MBMASTER_SHIFT)
858#define FW_HELLO_CMD_MBMASTER_GET(x) \
859 (((x) >> FW_HELLO_CMD_MBMASTER_SHIFT) & FW_HELLO_CMD_MBMASTER_MASK)
860#define FW_HELLO_CMD_MBASYNCNOTINT(x) ((x) << 23)
861#define FW_HELLO_CMD_MBASYNCNOT(x) ((x) << 20)
862#define FW_HELLO_CMD_STAGE(x) ((x) << 17)
863#define FW_HELLO_CMD_CLEARINIT (1U << 16)
864 __be32 fwrev; 871 __be32 fwrev;
865}; 872};
866 873
874#define FW_HELLO_CMD_ERR_S 31
875#define FW_HELLO_CMD_ERR_V(x) ((x) << FW_HELLO_CMD_ERR_S)
876#define FW_HELLO_CMD_ERR_F FW_HELLO_CMD_ERR_V(1U)
877
878#define FW_HELLO_CMD_INIT_S 30
879#define FW_HELLO_CMD_INIT_V(x) ((x) << FW_HELLO_CMD_INIT_S)
880#define FW_HELLO_CMD_INIT_F FW_HELLO_CMD_INIT_V(1U)
881
882#define FW_HELLO_CMD_MASTERDIS_S 29
883#define FW_HELLO_CMD_MASTERDIS_V(x) ((x) << FW_HELLO_CMD_MASTERDIS_S)
884
885#define FW_HELLO_CMD_MASTERFORCE_S 28
886#define FW_HELLO_CMD_MASTERFORCE_V(x) ((x) << FW_HELLO_CMD_MASTERFORCE_S)
887
888#define FW_HELLO_CMD_MBMASTER_S 24
889#define FW_HELLO_CMD_MBMASTER_M 0xfU
890#define FW_HELLO_CMD_MBMASTER_V(x) ((x) << FW_HELLO_CMD_MBMASTER_S)
891#define FW_HELLO_CMD_MBMASTER_G(x) \
892 (((x) >> FW_HELLO_CMD_MBMASTER_S) & FW_HELLO_CMD_MBMASTER_M)
893
894#define FW_HELLO_CMD_MBASYNCNOTINT_S 23
895#define FW_HELLO_CMD_MBASYNCNOTINT_V(x) ((x) << FW_HELLO_CMD_MBASYNCNOTINT_S)
896
897#define FW_HELLO_CMD_MBASYNCNOT_S 20
898#define FW_HELLO_CMD_MBASYNCNOT_V(x) ((x) << FW_HELLO_CMD_MBASYNCNOT_S)
899
900#define FW_HELLO_CMD_STAGE_S 17
901#define FW_HELLO_CMD_STAGE_V(x) ((x) << FW_HELLO_CMD_STAGE_S)
902
903#define FW_HELLO_CMD_CLEARINIT_S 16
904#define FW_HELLO_CMD_CLEARINIT_V(x) ((x) << FW_HELLO_CMD_CLEARINIT_S)
905#define FW_HELLO_CMD_CLEARINIT_F FW_HELLO_CMD_CLEARINIT_V(1U)
906
867struct fw_bye_cmd { 907struct fw_bye_cmd {
868 __be32 op_to_write; 908 __be32 op_to_write;
869 __be32 retval_len16; 909 __be32 retval_len16;
@@ -974,9 +1014,17 @@ struct fw_caps_config_cmd {
974 __be32 finicsum; 1014 __be32 finicsum;
975}; 1015};
976 1016
977#define FW_CAPS_CONFIG_CMD_CFVALID (1U << 27) 1017#define FW_CAPS_CONFIG_CMD_CFVALID_S 27
978#define FW_CAPS_CONFIG_CMD_MEMTYPE_CF(x) ((x) << 24) 1018#define FW_CAPS_CONFIG_CMD_CFVALID_V(x) ((x) << FW_CAPS_CONFIG_CMD_CFVALID_S)
979#define FW_CAPS_CONFIG_CMD_MEMADDR64K_CF(x) ((x) << 16) 1019#define FW_CAPS_CONFIG_CMD_CFVALID_F FW_CAPS_CONFIG_CMD_CFVALID_V(1U)
1020
1021#define FW_CAPS_CONFIG_CMD_MEMTYPE_CF_S 24
1022#define FW_CAPS_CONFIG_CMD_MEMTYPE_CF_V(x) \
1023 ((x) << FW_CAPS_CONFIG_CMD_MEMTYPE_CF_S)
1024
1025#define FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_S 16
1026#define FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_V(x) \
1027 ((x) << FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_S)
980 1028
981/* 1029/*
982 * params command mnemonics 1030 * params command mnemonics
@@ -1072,20 +1120,29 @@ enum fw_params_param_dmaq {
1072 FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH = 0x13, 1120 FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH = 0x13,
1073}; 1121};
1074 1122
1075#define FW_PARAMS_MNEM(x) ((x) << 24) 1123#define FW_PARAMS_MNEM_S 24
1076#define FW_PARAMS_PARAM_X(x) ((x) << 16) 1124#define FW_PARAMS_MNEM_V(x) ((x) << FW_PARAMS_MNEM_S)
1077#define FW_PARAMS_PARAM_Y_SHIFT 8 1125
1078#define FW_PARAMS_PARAM_Y_MASK 0xffU 1126#define FW_PARAMS_PARAM_X_S 16
1079#define FW_PARAMS_PARAM_Y(x) ((x) << FW_PARAMS_PARAM_Y_SHIFT) 1127#define FW_PARAMS_PARAM_X_V(x) ((x) << FW_PARAMS_PARAM_X_S)
1080#define FW_PARAMS_PARAM_Y_GET(x) (((x) >> FW_PARAMS_PARAM_Y_SHIFT) &\ 1128
1081 FW_PARAMS_PARAM_Y_MASK) 1129#define FW_PARAMS_PARAM_Y_S 8
1082#define FW_PARAMS_PARAM_Z_SHIFT 0 1130#define FW_PARAMS_PARAM_Y_M 0xffU
1083#define FW_PARAMS_PARAM_Z_MASK 0xffu 1131#define FW_PARAMS_PARAM_Y_V(x) ((x) << FW_PARAMS_PARAM_Y_S)
1084#define FW_PARAMS_PARAM_Z(x) ((x) << FW_PARAMS_PARAM_Z_SHIFT) 1132#define FW_PARAMS_PARAM_Y_G(x) (((x) >> FW_PARAMS_PARAM_Y_S) &\
1085#define FW_PARAMS_PARAM_Z_GET(x) (((x) >> FW_PARAMS_PARAM_Z_SHIFT) &\ 1133 FW_PARAMS_PARAM_Y_M)
1086 FW_PARAMS_PARAM_Z_MASK) 1134
1087#define FW_PARAMS_PARAM_XYZ(x) ((x) << 0) 1135#define FW_PARAMS_PARAM_Z_S 0
1088#define FW_PARAMS_PARAM_YZ(x) ((x) << 0) 1136#define FW_PARAMS_PARAM_Z_M 0xffu
1137#define FW_PARAMS_PARAM_Z_V(x) ((x) << FW_PARAMS_PARAM_Z_S)
1138#define FW_PARAMS_PARAM_Z_G(x) (((x) >> FW_PARAMS_PARAM_Z_S) &\
1139 FW_PARAMS_PARAM_Z_M)
1140
1141#define FW_PARAMS_PARAM_XYZ_S 0
1142#define FW_PARAMS_PARAM_XYZ_V(x) ((x) << FW_PARAMS_PARAM_XYZ_S)
1143
1144#define FW_PARAMS_PARAM_YZ_S 0
1145#define FW_PARAMS_PARAM_YZ_V(x) ((x) << FW_PARAMS_PARAM_YZ_S)
1089 1146
1090struct fw_params_cmd { 1147struct fw_params_cmd {
1091 __be32 op_to_vfn; 1148 __be32 op_to_vfn;
@@ -1096,8 +1153,11 @@ struct fw_params_cmd {
1096 } param[7]; 1153 } param[7];
1097}; 1154};
1098 1155
1099#define FW_PARAMS_CMD_PFN(x) ((x) << 8) 1156#define FW_PARAMS_CMD_PFN_S 8
1100#define FW_PARAMS_CMD_VFN(x) ((x) << 0) 1157#define FW_PARAMS_CMD_PFN_V(x) ((x) << FW_PARAMS_CMD_PFN_S)
1158
1159#define FW_PARAMS_CMD_VFN_S 0
1160#define FW_PARAMS_CMD_VFN_V(x) ((x) << FW_PARAMS_CMD_VFN_S)
1101 1161
1102struct fw_pfvf_cmd { 1162struct fw_pfvf_cmd {
1103 __be32 op_to_vfn; 1163 __be32 op_to_vfn;
@@ -1111,46 +1171,82 @@ struct fw_pfvf_cmd {
1111 __be32 r4; 1171 __be32 r4;
1112}; 1172};
1113 1173
1114#define FW_PFVF_CMD_PFN(x) ((x) << 8) 1174#define FW_PFVF_CMD_PFN_S 8
1115#define FW_PFVF_CMD_VFN(x) ((x) << 0) 1175#define FW_PFVF_CMD_PFN_V(x) ((x) << FW_PFVF_CMD_PFN_S)
1116 1176
1117#define FW_PFVF_CMD_NIQFLINT(x) ((x) << 20) 1177#define FW_PFVF_CMD_VFN_S 0
1118#define FW_PFVF_CMD_NIQFLINT_GET(x) (((x) >> 20) & 0xfff) 1178#define FW_PFVF_CMD_VFN_V(x) ((x) << FW_PFVF_CMD_VFN_S)
1119 1179
1120#define FW_PFVF_CMD_NIQ(x) ((x) << 0) 1180#define FW_PFVF_CMD_NIQFLINT_S 20
1121#define FW_PFVF_CMD_NIQ_GET(x) (((x) >> 0) & 0xfffff) 1181#define FW_PFVF_CMD_NIQFLINT_M 0xfff
1122 1182#define FW_PFVF_CMD_NIQFLINT_V(x) ((x) << FW_PFVF_CMD_NIQFLINT_S)
1123#define FW_PFVF_CMD_TYPE (1 << 31) 1183#define FW_PFVF_CMD_NIQFLINT_G(x) \
1124#define FW_PFVF_CMD_TYPE_GET(x) (((x) >> 31) & 0x1) 1184 (((x) >> FW_PFVF_CMD_NIQFLINT_S) & FW_PFVF_CMD_NIQFLINT_M)
1125 1185
1126#define FW_PFVF_CMD_CMASK(x) ((x) << 24) 1186#define FW_PFVF_CMD_NIQ_S 0
1127#define FW_PFVF_CMD_CMASK_MASK 0xf 1187#define FW_PFVF_CMD_NIQ_M 0xfffff
1128#define FW_PFVF_CMD_CMASK_GET(x) (((x) >> 24) & FW_PFVF_CMD_CMASK_MASK) 1188#define FW_PFVF_CMD_NIQ_V(x) ((x) << FW_PFVF_CMD_NIQ_S)
1129 1189#define FW_PFVF_CMD_NIQ_G(x) \
1130#define FW_PFVF_CMD_PMASK(x) ((x) << 20) 1190 (((x) >> FW_PFVF_CMD_NIQ_S) & FW_PFVF_CMD_NIQ_M)
1131#define FW_PFVF_CMD_PMASK_MASK 0xf 1191
1132#define FW_PFVF_CMD_PMASK_GET(x) (((x) >> 20) & FW_PFVF_CMD_PMASK_MASK) 1192#define FW_PFVF_CMD_TYPE_S 31
1133 1193#define FW_PFVF_CMD_TYPE_M 0x1
1134#define FW_PFVF_CMD_NEQ(x) ((x) << 0) 1194#define FW_PFVF_CMD_TYPE_V(x) ((x) << FW_PFVF_CMD_TYPE_S)
1135#define FW_PFVF_CMD_NEQ_GET(x) (((x) >> 0) & 0xfffff) 1195#define FW_PFVF_CMD_TYPE_G(x) \
1136 1196 (((x) >> FW_PFVF_CMD_TYPE_S) & FW_PFVF_CMD_TYPE_M)
1137#define FW_PFVF_CMD_TC(x) ((x) << 24) 1197#define FW_PFVF_CMD_TYPE_F FW_PFVF_CMD_TYPE_V(1U)
1138#define FW_PFVF_CMD_TC_GET(x) (((x) >> 24) & 0xff) 1198
1139 1199#define FW_PFVF_CMD_CMASK_S 24
1140#define FW_PFVF_CMD_NVI(x) ((x) << 16) 1200#define FW_PFVF_CMD_CMASK_M 0xf
1141#define FW_PFVF_CMD_NVI_GET(x) (((x) >> 16) & 0xff) 1201#define FW_PFVF_CMD_CMASK_V(x) ((x) << FW_PFVF_CMD_CMASK_S)
1142 1202#define FW_PFVF_CMD_CMASK_G(x) \
1143#define FW_PFVF_CMD_NEXACTF(x) ((x) << 0) 1203 (((x) >> FW_PFVF_CMD_CMASK_S) & FW_PFVF_CMD_CMASK_M)
1144#define FW_PFVF_CMD_NEXACTF_GET(x) (((x) >> 0) & 0xffff) 1204
1145 1205#define FW_PFVF_CMD_PMASK_S 20
1146#define FW_PFVF_CMD_R_CAPS(x) ((x) << 24) 1206#define FW_PFVF_CMD_PMASK_M 0xf
1147#define FW_PFVF_CMD_R_CAPS_GET(x) (((x) >> 24) & 0xff) 1207#define FW_PFVF_CMD_PMASK_V(x) ((x) << FW_PFVF_CMD_PMASK_S)
1148 1208#define FW_PFVF_CMD_PMASK_G(x) \
1149#define FW_PFVF_CMD_WX_CAPS(x) ((x) << 16) 1209 (((x) >> FW_PFVF_CMD_PMASK_S) & FW_PFVF_CMD_PMASK_M)
1150#define FW_PFVF_CMD_WX_CAPS_GET(x) (((x) >> 16) & 0xff) 1210
1151 1211#define FW_PFVF_CMD_NEQ_S 0
1152#define FW_PFVF_CMD_NETHCTRL(x) ((x) << 0) 1212#define FW_PFVF_CMD_NEQ_M 0xfffff
1153#define FW_PFVF_CMD_NETHCTRL_GET(x) (((x) >> 0) & 0xffff) 1213#define FW_PFVF_CMD_NEQ_V(x) ((x) << FW_PFVF_CMD_NEQ_S)
1214#define FW_PFVF_CMD_NEQ_G(x) \
1215 (((x) >> FW_PFVF_CMD_NEQ_S) & FW_PFVF_CMD_NEQ_M)
1216
1217#define FW_PFVF_CMD_TC_S 24
1218#define FW_PFVF_CMD_TC_M 0xff
1219#define FW_PFVF_CMD_TC_V(x) ((x) << FW_PFVF_CMD_TC_S)
1220#define FW_PFVF_CMD_TC_G(x) (((x) >> FW_PFVF_CMD_TC_S) & FW_PFVF_CMD_TC_M)
1221
1222#define FW_PFVF_CMD_NVI_S 16
1223#define FW_PFVF_CMD_NVI_M 0xff
1224#define FW_PFVF_CMD_NVI_V(x) ((x) << FW_PFVF_CMD_NVI_S)
1225#define FW_PFVF_CMD_NVI_G(x) (((x) >> FW_PFVF_CMD_NVI_S) & FW_PFVF_CMD_NVI_M)
1226
1227#define FW_PFVF_CMD_NEXACTF_S 0
1228#define FW_PFVF_CMD_NEXACTF_M 0xffff
1229#define FW_PFVF_CMD_NEXACTF_V(x) ((x) << FW_PFVF_CMD_NEXACTF_S)
1230#define FW_PFVF_CMD_NEXACTF_G(x) \
1231 (((x) >> FW_PFVF_CMD_NEXACTF_S) & FW_PFVF_CMD_NEXACTF_M)
1232
1233#define FW_PFVF_CMD_R_CAPS_S 24
1234#define FW_PFVF_CMD_R_CAPS_M 0xff
1235#define FW_PFVF_CMD_R_CAPS_V(x) ((x) << FW_PFVF_CMD_R_CAPS_S)
1236#define FW_PFVF_CMD_R_CAPS_G(x) \
1237 (((x) >> FW_PFVF_CMD_R_CAPS_S) & FW_PFVF_CMD_R_CAPS_M)
1238
1239#define FW_PFVF_CMD_WX_CAPS_S 16
1240#define FW_PFVF_CMD_WX_CAPS_M 0xff
1241#define FW_PFVF_CMD_WX_CAPS_V(x) ((x) << FW_PFVF_CMD_WX_CAPS_S)
1242#define FW_PFVF_CMD_WX_CAPS_G(x) \
1243 (((x) >> FW_PFVF_CMD_WX_CAPS_S) & FW_PFVF_CMD_WX_CAPS_M)
1244
1245#define FW_PFVF_CMD_NETHCTRL_S 0
1246#define FW_PFVF_CMD_NETHCTRL_M 0xffff
1247#define FW_PFVF_CMD_NETHCTRL_V(x) ((x) << FW_PFVF_CMD_NETHCTRL_S)
1248#define FW_PFVF_CMD_NETHCTRL_G(x) \
1249 (((x) >> FW_PFVF_CMD_NETHCTRL_S) & FW_PFVF_CMD_NETHCTRL_M)
1154 1250
1155enum fw_iq_type { 1251enum fw_iq_type {
1156 FW_IQ_TYPE_FL_INT_CAP, 1252 FW_IQ_TYPE_FL_INT_CAP,
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
index 0b42bddaf284..7c24b50c7d0b 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c
@@ -1030,10 +1030,10 @@ static int set_rxq_intr_params(struct adapter *adapter, struct sge_rspq *rspq,
1030 1030
1031 pktcnt_idx = closest_thres(&adapter->sge, cnt); 1031 pktcnt_idx = closest_thres(&adapter->sge, cnt);
1032 if (rspq->desc && rspq->pktcnt_idx != pktcnt_idx) { 1032 if (rspq->desc && rspq->pktcnt_idx != pktcnt_idx) {
1033 v = FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) | 1033 v = FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) |
1034 FW_PARAMS_PARAM_X( 1034 FW_PARAMS_PARAM_X_V(
1035 FW_PARAMS_PARAM_DMAQ_IQ_INTCNTTHRESH) | 1035 FW_PARAMS_PARAM_DMAQ_IQ_INTCNTTHRESH) |
1036 FW_PARAMS_PARAM_YZ(rspq->cntxt_id); 1036 FW_PARAMS_PARAM_YZ_V(rspq->cntxt_id);
1037 err = t4vf_set_params(adapter, 1, &v, &pktcnt_idx); 1037 err = t4vf_set_params(adapter, 1, &v, &pktcnt_idx);
1038 if (err) 1038 if (err)
1039 return err; 1039 return err;
@@ -2184,8 +2184,8 @@ static int adap_init0(struct adapter *adapter)
2184 * firmware won't understand this and we'll just get 2184 * firmware won't understand this and we'll just get
2185 * unencapsulated messages ... 2185 * unencapsulated messages ...
2186 */ 2186 */
2187 param = FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | 2187 param = FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) |
2188 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_CPLFW4MSG_ENCAP); 2188 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_CPLFW4MSG_ENCAP);
2189 val = 1; 2189 val = 1;
2190 (void) t4vf_set_params(adapter, 1, &param, &val); 2190 (void) t4vf_set_params(adapter, 1, &param, &val);
2191 2191
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
index fae0c95e1a6b..f2087eb013c3 100644
--- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c
@@ -443,20 +443,20 @@ int t4vf_get_sge_params(struct adapter *adapter)
443 u32 params[7], vals[7]; 443 u32 params[7], vals[7];
444 int v; 444 int v;
445 445
446 params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 446 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
447 FW_PARAMS_PARAM_XYZ(SGE_CONTROL)); 447 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL));
448 params[1] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 448 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
449 FW_PARAMS_PARAM_XYZ(SGE_HOST_PAGE_SIZE)); 449 FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE));
450 params[2] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 450 params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
451 FW_PARAMS_PARAM_XYZ(SGE_FL_BUFFER_SIZE0)); 451 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0));
452 params[3] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 452 params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
453 FW_PARAMS_PARAM_XYZ(SGE_FL_BUFFER_SIZE1)); 453 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1));
454 params[4] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 454 params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
455 FW_PARAMS_PARAM_XYZ(SGE_TIMER_VALUE_0_AND_1)); 455 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1));
456 params[5] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 456 params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
457 FW_PARAMS_PARAM_XYZ(SGE_TIMER_VALUE_2_AND_3)); 457 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3));
458 params[6] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 458 params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
459 FW_PARAMS_PARAM_XYZ(SGE_TIMER_VALUE_4_AND_5)); 459 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5));
460 v = t4vf_query_params(adapter, 7, params, vals); 460 v = t4vf_query_params(adapter, 7, params, vals);
461 if (v) 461 if (v)
462 return v; 462 return v;
@@ -479,8 +479,8 @@ int t4vf_get_sge_params(struct adapter *adapter)
479 * right value. 479 * right value.
480 */ 480 */
481 if (!is_t4(adapter->params.chip)) { 481 if (!is_t4(adapter->params.chip)) {
482 params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 482 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
483 FW_PARAMS_PARAM_XYZ(SGE_CONTROL2_A)); 483 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A));
484 v = t4vf_query_params(adapter, 1, params, vals); 484 v = t4vf_query_params(adapter, 1, params, vals);
485 if (v != FW_SUCCESS) { 485 if (v != FW_SUCCESS) {
486 dev_err(adapter->pdev_dev, 486 dev_err(adapter->pdev_dev,
@@ -491,10 +491,10 @@ int t4vf_get_sge_params(struct adapter *adapter)
491 sge_params->sge_control2 = vals[0]; 491 sge_params->sge_control2 = vals[0];
492 } 492 }
493 493
494 params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 494 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
495 FW_PARAMS_PARAM_XYZ(SGE_INGRESS_RX_THRESHOLD)); 495 FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD));
496 params[1] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_REG) | 496 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
497 FW_PARAMS_PARAM_XYZ(SGE_CONM_CTRL)); 497 FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL));
498 v = t4vf_query_params(adapter, 2, params, vals); 498 v = t4vf_query_params(adapter, 2, params, vals);
499 if (v) 499 if (v)
500 return v; 500 return v;
@@ -517,8 +517,8 @@ int t4vf_get_vpd_params(struct adapter *adapter)
517 u32 params[7], vals[7]; 517 u32 params[7], vals[7];
518 int v; 518 int v;
519 519
520 params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | 520 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
521 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_CCLK)); 521 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK));
522 v = t4vf_query_params(adapter, 1, params, vals); 522 v = t4vf_query_params(adapter, 1, params, vals);
523 if (v) 523 if (v)
524 return v; 524 return v;
@@ -540,10 +540,10 @@ int t4vf_get_dev_params(struct adapter *adapter)
540 u32 params[7], vals[7]; 540 u32 params[7], vals[7];
541 int v; 541 int v;
542 542
543 params[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | 543 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
544 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_FWREV)); 544 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV));
545 params[1] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | 545 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
546 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_TPREV)); 546 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV));
547 v = t4vf_query_params(adapter, 2, params, vals); 547 v = t4vf_query_params(adapter, 2, params, vals);
548 if (v) 548 if (v)
549 return v; 549 return v;
@@ -659,22 +659,22 @@ int t4vf_get_vfres(struct adapter *adapter)
659 * Extract VF resource limits and return success. 659 * Extract VF resource limits and return success.
660 */ 660 */
661 word = be32_to_cpu(rpl.niqflint_niq); 661 word = be32_to_cpu(rpl.niqflint_niq);
662 vfres->niqflint = FW_PFVF_CMD_NIQFLINT_GET(word); 662 vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word);
663 vfres->niq = FW_PFVF_CMD_NIQ_GET(word); 663 vfres->niq = FW_PFVF_CMD_NIQ_G(word);
664 664
665 word = be32_to_cpu(rpl.type_to_neq); 665 word = be32_to_cpu(rpl.type_to_neq);
666 vfres->neq = FW_PFVF_CMD_NEQ_GET(word); 666 vfres->neq = FW_PFVF_CMD_NEQ_G(word);
667 vfres->pmask = FW_PFVF_CMD_PMASK_GET(word); 667 vfres->pmask = FW_PFVF_CMD_PMASK_G(word);
668 668
669 word = be32_to_cpu(rpl.tc_to_nexactf); 669 word = be32_to_cpu(rpl.tc_to_nexactf);
670 vfres->tc = FW_PFVF_CMD_TC_GET(word); 670 vfres->tc = FW_PFVF_CMD_TC_G(word);
671 vfres->nvi = FW_PFVF_CMD_NVI_GET(word); 671 vfres->nvi = FW_PFVF_CMD_NVI_G(word);
672 vfres->nexactf = FW_PFVF_CMD_NEXACTF_GET(word); 672 vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word);
673 673
674 word = be32_to_cpu(rpl.r_caps_to_nethctrl); 674 word = be32_to_cpu(rpl.r_caps_to_nethctrl);
675 vfres->r_caps = FW_PFVF_CMD_R_CAPS_GET(word); 675 vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word);
676 vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_GET(word); 676 vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word);
677 vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_GET(word); 677 vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word);
678 678
679 return 0; 679 return 0;
680} 680}
diff --git a/drivers/scsi/csiostor/csio_hw.c b/drivers/scsi/csiostor/csio_hw.c
index 5f06877aa7c4..80ad9c52eebd 100644
--- a/drivers/scsi/csiostor/csio_hw.c
+++ b/drivers/scsi/csiostor/csio_hw.c
@@ -1170,7 +1170,7 @@ csio_hw_fw_halt(struct csio_hw *hw, uint32_t mbox, int32_t force)
1170 } 1170 }
1171 1171
1172 csio_mb_reset(hw, mbp, CSIO_MB_DEFAULT_TMO, 1172 csio_mb_reset(hw, mbp, CSIO_MB_DEFAULT_TMO,
1173 PIORSTMODE | PIORST, FW_RESET_CMD_HALT(1), 1173 PIORSTMODE | PIORST, FW_RESET_CMD_HALT_F,
1174 NULL); 1174 NULL);
1175 1175
1176 if (csio_mb_issue(hw, mbp)) { 1176 if (csio_mb_issue(hw, mbp)) {
@@ -1374,9 +1374,9 @@ csio_hw_fw_config_file(struct csio_hw *hw,
1374 FW_CMD_REQUEST_F | 1374 FW_CMD_REQUEST_F |
1375 FW_CMD_READ_F); 1375 FW_CMD_READ_F);
1376 caps_cmd->cfvalid_to_len16 = 1376 caps_cmd->cfvalid_to_len16 =
1377 htonl(FW_CAPS_CONFIG_CMD_CFVALID | 1377 htonl(FW_CAPS_CONFIG_CMD_CFVALID_F |
1378 FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | 1378 FW_CAPS_CONFIG_CMD_MEMTYPE_CF_V(mtype) |
1379 FW_CAPS_CONFIG_CMD_MEMADDR64K_CF(maddr >> 16) | 1379 FW_CAPS_CONFIG_CMD_MEMADDR64K_CF_V(maddr >> 16) |
1380 FW_LEN16(*caps_cmd)); 1380 FW_LEN16(*caps_cmd));
1381 1381
1382 if (csio_mb_issue(hw, mbp)) { 1382 if (csio_mb_issue(hw, mbp)) {
@@ -1723,8 +1723,8 @@ csio_hw_check_fwconfig(struct csio_hw *hw, u32 *param)
1723 * Find out whether we're dealing with a version of 1723 * Find out whether we're dealing with a version of
1724 * the firmware which has configuration file support. 1724 * the firmware which has configuration file support.
1725 */ 1725 */
1726 _param[0] = (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | 1726 _param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1727 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_CF)); 1727 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CF));
1728 1728
1729 csio_mb_params(hw, mbp, CSIO_MB_DEFAULT_TMO, hw->pfn, 0, 1729 csio_mb_params(hw, mbp, CSIO_MB_DEFAULT_TMO, hw->pfn, 0,
1730 ARRAY_SIZE(_param), _param, NULL, false, NULL); 1730 ARRAY_SIZE(_param), _param, NULL, false, NULL);
@@ -1781,8 +1781,8 @@ csio_hw_flash_config(struct csio_hw *hw, u32 *fw_cfg_param, char *path)
1781 goto leave; 1781 goto leave;
1782 } 1782 }
1783 1783
1784 mtype = FW_PARAMS_PARAM_Y_GET(*fw_cfg_param); 1784 mtype = FW_PARAMS_PARAM_Y_G(*fw_cfg_param);
1785 maddr = FW_PARAMS_PARAM_Z_GET(*fw_cfg_param) << 16; 1785 maddr = FW_PARAMS_PARAM_Z_G(*fw_cfg_param) << 16;
1786 1786
1787 ret = csio_memory_write(hw, mtype, maddr, 1787 ret = csio_memory_write(hw, mtype, maddr,
1788 cf->size + value_to_add, cfg_data); 1788 cf->size + value_to_add, cfg_data);
@@ -1871,8 +1871,8 @@ csio_hw_use_fwconfig(struct csio_hw *hw, int reset, u32 *fw_cfg_param)
1871 goto bye; 1871 goto bye;
1872 } 1872 }
1873 } else { 1873 } else {
1874 mtype = FW_PARAMS_PARAM_Y_GET(*fw_cfg_param); 1874 mtype = FW_PARAMS_PARAM_Y_G(*fw_cfg_param);
1875 maddr = FW_PARAMS_PARAM_Z_GET(*fw_cfg_param) << 16; 1875 maddr = FW_PARAMS_PARAM_Z_G(*fw_cfg_param) << 16;
1876 using_flash = 0; 1876 using_flash = 0;
1877 } 1877 }
1878 1878
diff --git a/drivers/scsi/csiostor/csio_mb.c b/drivers/scsi/csiostor/csio_mb.c
index ffa848987608..a1e0568b657f 100644
--- a/drivers/scsi/csiostor/csio_mb.c
+++ b/drivers/scsi/csiostor/csio_mb.c
@@ -85,13 +85,13 @@ csio_mb_hello(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
85 FW_CMD_REQUEST_F | FW_CMD_WRITE_F); 85 FW_CMD_REQUEST_F | FW_CMD_WRITE_F);
86 cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); 86 cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16));
87 cmdp->err_to_clearinit = htonl( 87 cmdp->err_to_clearinit = htonl(
88 FW_HELLO_CMD_MASTERDIS(master == CSIO_MASTER_CANT) | 88 FW_HELLO_CMD_MASTERDIS_V(master == CSIO_MASTER_CANT) |
89 FW_HELLO_CMD_MASTERFORCE(master == CSIO_MASTER_MUST) | 89 FW_HELLO_CMD_MASTERFORCE_V(master == CSIO_MASTER_MUST) |
90 FW_HELLO_CMD_MBMASTER(master == CSIO_MASTER_MUST ? 90 FW_HELLO_CMD_MBMASTER_V(master == CSIO_MASTER_MUST ?
91 m_mbox : FW_HELLO_CMD_MBMASTER_MASK) | 91 m_mbox : FW_HELLO_CMD_MBMASTER_M) |
92 FW_HELLO_CMD_MBASYNCNOT(a_mbox) | 92 FW_HELLO_CMD_MBASYNCNOT_V(a_mbox) |
93 FW_HELLO_CMD_STAGE(fw_hello_cmd_stage_os) | 93 FW_HELLO_CMD_STAGE_V(fw_hello_cmd_stage_os) |
94 FW_HELLO_CMD_CLEARINIT); 94 FW_HELLO_CMD_CLEARINIT_F);
95 95
96} 96}
97 97
@@ -118,11 +118,11 @@ csio_mb_process_hello_rsp(struct csio_hw *hw, struct csio_mb *mbp,
118 hw->fwrev = ntohl(rsp->fwrev); 118 hw->fwrev = ntohl(rsp->fwrev);
119 119
120 value = ntohl(rsp->err_to_clearinit); 120 value = ntohl(rsp->err_to_clearinit);
121 *mpfn = FW_HELLO_CMD_MBMASTER_GET(value); 121 *mpfn = FW_HELLO_CMD_MBMASTER_G(value);
122 122
123 if (value & FW_HELLO_CMD_INIT) 123 if (value & FW_HELLO_CMD_INIT_F)
124 *state = CSIO_DEV_STATE_INIT; 124 *state = CSIO_DEV_STATE_INIT;
125 else if (value & FW_HELLO_CMD_ERR) 125 else if (value & FW_HELLO_CMD_ERR_F)
126 *state = CSIO_DEV_STATE_ERR; 126 *state = CSIO_DEV_STATE_ERR;
127 else 127 else
128 *state = CSIO_DEV_STATE_UNINIT; 128 *state = CSIO_DEV_STATE_UNINIT;
@@ -205,8 +205,8 @@ csio_mb_params(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
205 cmdp->op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) | 205 cmdp->op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) |
206 FW_CMD_REQUEST_F | 206 FW_CMD_REQUEST_F |
207 (wr ? FW_CMD_WRITE_F : FW_CMD_READ_F) | 207 (wr ? FW_CMD_WRITE_F : FW_CMD_READ_F) |
208 FW_PARAMS_CMD_PFN(pf) | 208 FW_PARAMS_CMD_PFN_V(pf) |
209 FW_PARAMS_CMD_VFN(vf)); 209 FW_PARAMS_CMD_VFN_V(vf));
210 cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); 210 cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16));
211 211
212 /* Write Params */ 212 /* Write Params */
@@ -274,11 +274,11 @@ csio_mb_ldst(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, int reg)
274 htonl(FW_CMD_OP_V(FW_LDST_CMD) | 274 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
275 FW_CMD_REQUEST_F | 275 FW_CMD_REQUEST_F |
276 FW_CMD_READ_F | 276 FW_CMD_READ_F |
277 FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FUNC_PCIE)); 277 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_FUNC_PCIE));
278 ldst_cmd->cycles_to_len16 = htonl(FW_LEN16(struct fw_ldst_cmd)); 278 ldst_cmd->cycles_to_len16 = htonl(FW_LEN16(struct fw_ldst_cmd));
279 ldst_cmd->u.pcie.select_naccess = FW_LDST_CMD_NACCESS(1); 279 ldst_cmd->u.pcie.select_naccess = FW_LDST_CMD_NACCESS_V(1);
280 ldst_cmd->u.pcie.ctrl_to_fn = 280 ldst_cmd->u.pcie.ctrl_to_fn =
281 (FW_LDST_CMD_LC | FW_LDST_CMD_FN(hw->pfn)); 281 (FW_LDST_CMD_LC_F | FW_LDST_CMD_FN_V(hw->pfn));
282 ldst_cmd->u.pcie.r = (uint8_t)reg; 282 ldst_cmd->u.pcie.r = (uint8_t)reg;
283} 283}
284 284
diff --git a/drivers/scsi/csiostor/csio_mb.h b/drivers/scsi/csiostor/csio_mb.h
index a84179e54ab9..1bc82d0bc260 100644
--- a/drivers/scsi/csiostor/csio_mb.h
+++ b/drivers/scsi/csiostor/csio_mb.h
@@ -79,14 +79,14 @@ enum csio_dev_state {
79}; 79};
80 80
81#define FW_PARAM_DEV(param) \ 81#define FW_PARAM_DEV(param) \
82 (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \ 82 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | \
83 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param)) 83 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_##param))
84 84
85#define FW_PARAM_PFVF(param) \ 85#define FW_PARAM_PFVF(param) \
86 (FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \ 86 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) | \
87 FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param)| \ 87 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_##param)| \
88 FW_PARAMS_PARAM_Y(0) | \ 88 FW_PARAMS_PARAM_Y_V(0) | \
89 FW_PARAMS_PARAM_Z(0)) 89 FW_PARAMS_PARAM_Z_V(0))
90 90
91enum { 91enum {
92 PAUSE_RX = 1 << 0, 92 PAUSE_RX = 1 << 0,