aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorM'boumba Cedric Madianga <cedric.madianga@gmail.com>2017-02-01 12:19:07 -0500
committerAlexandre TORGUE <alexandre.torgue@st.com>2017-02-01 12:19:31 -0500
commit51576d360305436a10d92babca37d86b18d32f46 (patch)
tree6c33fd2f294a0fcef60fece07d50d0ad54b548fc
parentf20a406bf74f073d8b22a04eb1bf9062c3e4f848 (diff)
ARM: dts: stm32: Add I2C1 support for STM32F429 SoC
This patch adds I2C1 support for STM32F429 SoC Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
-rw-r--r--arch/arm/boot/dts/stm32f429.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 3f441fbedb8f..ee0da970e8ad 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -342,6 +342,18 @@
342 status = "disabled"; 342 status = "disabled";
343 }; 343 };
344 344
345 i2c1: i2c@40005400 {
346 compatible = "st,stm32f4-i2c";
347 reg = <0x40005400 0x400>;
348 interrupts = <31>,
349 <32>;
350 resets = <&rcc STM32F4_APB1_RESET(I2C1)>;
351 clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C1)>;
352 #address-cells = <1>;
353 #size-cells = <0>;
354 status = "disabled";
355 };
356
345 usart7: serial@40007800 { 357 usart7: serial@40007800 {
346 compatible = "st,stm32-usart", "st,stm32-uart"; 358 compatible = "st,stm32-usart", "st,stm32-uart";
347 reg = <0x40007800 0x400>; 359 reg = <0x40007800 0x400>;
@@ -714,6 +726,16 @@
714 <STM32F429_PB5_FUNC_TIM3_CH2>; 726 <STM32F429_PB5_FUNC_TIM3_CH2>;
715 }; 727 };
716 }; 728 };
729
730 i2c1_pins: i2c1@0 {
731 pins {
732 pinmux = <STM32F429_PB9_FUNC_I2C1_SDA>,
733 <STM32F429_PB6_FUNC_I2C1_SCL>;
734 bias-disable;
735 drive-open-drain;
736 slew-rate = <3>;
737 };
738 };
717 }; 739 };
718 740
719 rcc: rcc@40023810 { 741 rcc: rcc@40023810 {