aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorShawn Guo <shawn.guo@linaro.org>2018-01-24 06:48:25 -0500
committerShawn Guo <shawnguo@kernel.org>2018-02-26 20:19:12 -0500
commit50fd588ae4a6808d9ecd09c3ffe587e306bfa6a9 (patch)
tree65d3379e9b0cde6f398ad60365a09ff405dd79e6
parent47629f676518f1808dc98c5740a31d8d23c940c7 (diff)
clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK
The clock HISTB_USB2_OTG_UTMI_CLK is defined by device tree bindings in include/dt-bindings/clock/histb-clock.h, but hasn't been supported by hi3798cv200 clock driver. Let's add the support for it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r--drivers/clk/hisilicon/crg-hi3798cv200.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c b/drivers/clk/hisilicon/crg-hi3798cv200.c
index d7d1ba0153ec..6017ade0cd92 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -161,6 +161,8 @@ static const struct hisi_gate_clock hi3798cv200_gate_clks[] = {
161 CLK_SET_RATE_PARENT, 0xb8, 1, 0 }, 161 CLK_SET_RATE_PARENT, 0xb8, 1, 0 },
162 { HISTB_USB2_UTMI_CLK, "clk_u2_utmi", "60m", 162 { HISTB_USB2_UTMI_CLK, "clk_u2_utmi", "60m",
163 CLK_SET_RATE_PARENT, 0xb8, 5, 0 }, 163 CLK_SET_RATE_PARENT, 0xb8, 5, 0 },
164 { HISTB_USB2_OTG_UTMI_CLK, "clk_u2_otg_utmi", "60m",
165 CLK_SET_RATE_PARENT, 0xb8, 3, 0 },
164 { HISTB_USB2_PHY1_REF_CLK, "clk_u2_phy1_ref", "24m", 166 { HISTB_USB2_PHY1_REF_CLK, "clk_u2_phy1_ref", "24m",
165 CLK_SET_RATE_PARENT, 0xbc, 0, 0 }, 167 CLK_SET_RATE_PARENT, 0xbc, 0, 0 },
166 { HISTB_USB2_PHY2_REF_CLK, "clk_u2_phy2_ref", "24m", 168 { HISTB_USB2_PHY2_REF_CLK, "clk_u2_phy2_ref", "24m",