diff options
author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2018-01-06 16:26:47 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2018-01-08 14:31:38 -0500 |
commit | 50f3d740d376f664f6accc7e86c9afd8f1c7e1e4 (patch) | |
tree | f356c9a0e70d7844ef9bb5e509fa002dfacc762d | |
parent | 56c0290202ab94a2f2780c449395d4ae8495fab4 (diff) |
sh_eth: fix TXALCR1 offsets
The TXALCR1 offsets are incorrect in the register offset tables, most
probably due to copy&paste error. Luckily, the driver never uses this
register. :-)
Fixes: 4a55530f38e4 ("net: sh_eth: modify the definitions of register")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/renesas/sh_eth.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index f21c1db91c3f..b9e2846589f8 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c | |||
@@ -147,7 +147,7 @@ static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = { | |||
147 | [FWNLCR0] = 0x0090, | 147 | [FWNLCR0] = 0x0090, |
148 | [FWALCR0] = 0x0094, | 148 | [FWALCR0] = 0x0094, |
149 | [TXNLCR1] = 0x00a0, | 149 | [TXNLCR1] = 0x00a0, |
150 | [TXALCR1] = 0x00a0, | 150 | [TXALCR1] = 0x00a4, |
151 | [RXNLCR1] = 0x00a8, | 151 | [RXNLCR1] = 0x00a8, |
152 | [RXALCR1] = 0x00ac, | 152 | [RXALCR1] = 0x00ac, |
153 | [FWNLCR1] = 0x00b0, | 153 | [FWNLCR1] = 0x00b0, |
@@ -399,7 +399,7 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = { | |||
399 | [FWNLCR0] = 0x0090, | 399 | [FWNLCR0] = 0x0090, |
400 | [FWALCR0] = 0x0094, | 400 | [FWALCR0] = 0x0094, |
401 | [TXNLCR1] = 0x00a0, | 401 | [TXNLCR1] = 0x00a0, |
402 | [TXALCR1] = 0x00a0, | 402 | [TXALCR1] = 0x00a4, |
403 | [RXNLCR1] = 0x00a8, | 403 | [RXNLCR1] = 0x00a8, |
404 | [RXALCR1] = 0x00ac, | 404 | [RXALCR1] = 0x00ac, |
405 | [FWNLCR1] = 0x00b0, | 405 | [FWNLCR1] = 0x00b0, |