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authorJoonas Kylmälä <joonas.kylmala@iki.fi>2018-02-08 07:01:39 -0500
committerMaxime Ripard <maxime.ripard@bootlin.com>2018-02-14 07:18:04 -0500
commit50caa75681357737b6c44b7c212964217ffc00de (patch)
treee8ea58bf13dc813991273b79f90903d9ad90fbdf
parentf8d5fe8fc31ad96f5d67a8c5250b101bb83116c4 (diff)
ARM: dts: sunxi: h3-h5: Move pinctrl of mmc0 from dts to dtsi
Most of the boards use the mmc0 pins and their attributes defined in mmc0_pins_a. Let's default to those by moving the pinctrl attributes to the dtsi file. This makes it easier to modify device trees in the future as there is only one place to change the pinctrl attributes. Signed-off-by: Joonas Kylmälä <joonas.kylmala@iki.fi> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
-rw-r--r--arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-beelink-x2.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-nanopi.dtsi2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-2.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-one.dts2
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts2
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts2
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts2
17 files changed, 2 insertions, 32 deletions
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
index 1cdbd9a3ef57..29a85eb14927 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
@@ -60,8 +60,6 @@
60}; 60};
61 61
62&mmc0 { 62&mmc0 {
63 pinctrl-names = "default";
64 pinctrl-0 = <&mmc0_pins_a>;
65 vmmc-supply = <&reg_vcc3v3>; 63 vmmc-supply = <&reg_vcc3v3>;
66 bus-width = <4>; 64 bus-width = <4>;
67 /* 65 /*
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index 9a5017bb1440..f3b066ff63cb 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -112,8 +112,6 @@
112}; 112};
113 113
114&mmc0 { 114&mmc0 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&mmc0_pins_a>;
117 vmmc-supply = <&reg_vcc3v3>; 115 vmmc-supply = <&reg_vcc3v3>;
118 bus-width = <4>; 116 bus-width = <4>;
119 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 117 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 781270fb79c3..bea49ed89cc7 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -136,8 +136,6 @@
136}; 136};
137 137
138&mmc0 { 138&mmc0 {
139 pinctrl-names = "default";
140 pinctrl-0 = <&mmc0_pins_a>;
141 vmmc-supply = <&reg_vcc3v3>; 139 vmmc-supply = <&reg_vcc3v3>;
142 bus-width = <4>; 140 bus-width = <4>;
143 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 141 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index 20bbe2d712d0..9fc07593e907 100644
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -115,8 +115,6 @@
115}; 115};
116 116
117&mmc0 { 117&mmc0 {
118 pinctrl-names = "default";
119 pinctrl-0 = <&mmc0_pins_a>;
120 vmmc-supply = <&reg_vcc3v3>; 118 vmmc-supply = <&reg_vcc3v3>;
121 bus-width = <4>; 119 bus-width = <4>;
122 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 120 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
index d9dc14fe2aa3..d0d41eb86cb4 100644
--- a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -150,8 +150,6 @@
150}; 150};
151 151
152&mmc0 { 152&mmc0 {
153 pinctrl-names = "default";
154 pinctrl-0 = <&mmc0_pins_a>;
155 vmmc-supply = <&reg_vcc_io>; 153 vmmc-supply = <&reg_vcc_io>;
156 bus-width = <4>; 154 bus-width = <4>;
157 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 155 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
index 1e2aa6bc7a7f..07e2e6180792 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
@@ -80,8 +80,6 @@
80}; 80};
81 81
82&mmc0 { 82&mmc0 {
83 pinctrl-names = "default";
84 pinctrl-0 = <&mmc0_pins_a>;
85 vmmc-supply = <&reg_vcc3v3>; 83 vmmc-supply = <&reg_vcc3v3>;
86 bus-width = <4>; 84 bus-width = <4>;
87 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 85 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
index 32bf624dc59d..f110ee382239 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
@@ -96,8 +96,6 @@
96&mmc0 { 96&mmc0 {
97 bus-width = <4>; 97 bus-width = <4>;
98 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; 98 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&mmc0_pins_a>;
101 status = "okay"; 99 status = "okay";
102 vmmc-supply = <&reg_vcc3v3>; 100 vmmc-supply = <&reg_vcc3v3>;
103}; 101};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 99bce9822cad..ac6f52f3fa62 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -132,8 +132,6 @@
132}; 132};
133 133
134&mmc0 { 134&mmc0 {
135 pinctrl-names = "default";
136 pinctrl-0 = <&mmc0_pins_a>;
137 vmmc-supply = <&reg_vcc3v3>; 135 vmmc-supply = <&reg_vcc3v3>;
138 bus-width = <4>; 136 bus-width = <4>;
139 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 137 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
index df444056001a..82ab5b6b730b 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -106,8 +106,6 @@
106}; 106};
107 107
108&mmc0 { 108&mmc0 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&mmc0_pins_a>;
111 vmmc-supply = <&reg_vcc3v3>; 109 vmmc-supply = <&reg_vcc3v3>;
112 bus-width = <4>; 110 bus-width = <4>;
113 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 111 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 4a4236b13220..c1a8cd93c463 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -106,8 +106,6 @@
106}; 106};
107 107
108&mmc0 { 108&mmc0 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&mmc0_pins_a>;
111 vmmc-supply = <&reg_vcc3v3>; 109 vmmc-supply = <&reg_vcc3v3>;
112 bus-width = <4>; 110 bus-width = <4>;
113 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 111 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 583aae37694d..537227b85935 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -128,8 +128,6 @@
128}; 128};
129 129
130&mmc0 { 130&mmc0 {
131 pinctrl-names = "default";
132 pinctrl-0 = <&mmc0_pins_a>;
133 vmmc-supply = <&reg_vcc3v3>; 131 vmmc-supply = <&reg_vcc3v3>;
134 bus-width = <4>; 132 bus-width = <4>;
135 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 133 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 6521d0f6a282..3a0854a96a04 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -141,6 +141,8 @@
141 mmc0: mmc@1c0f000 { 141 mmc0: mmc@1c0f000 {
142 /* compatible and clocks are in per SoC .dtsi file */ 142 /* compatible and clocks are in per SoC .dtsi file */
143 reg = <0x01c0f000 0x1000>; 143 reg = <0x01c0f000 0x1000>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&mmc0_pins_a>;
144 resets = <&ccu RST_BUS_MMC0>; 146 resets = <&ccu RST_BUS_MMC0>;
145 reset-names = "ahb"; 147 reset-names = "ahb";
146 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 148 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
index 1ed9f219deaf..1ef70cb4c9bc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -151,8 +151,6 @@
151}; 151};
152 152
153&mmc0 { 153&mmc0 {
154 pinctrl-names = "default";
155 pinctrl-0 = <&mmc0_pins_a>;
156 vmmc-supply = <&reg_vcc3v3>; 154 vmmc-supply = <&reg_vcc3v3>;
157 bus-width = <4>; 155 bus-width = <4>;
158 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 156 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index f1447003ea3c..cc268a69786c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -126,8 +126,6 @@
126}; 126};
127 127
128&mmc0 { 128&mmc0 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&mmc0_pins_a>;
131 vmmc-supply = <&reg_vcc3v3>; 129 vmmc-supply = <&reg_vcc3v3>;
132 bus-width = <4>; 130 bus-width = <4>;
133 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 131 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 9e51d3a5f4e6..58505fbc2667 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -160,8 +160,6 @@
160}; 160};
161 161
162&mmc0 { 162&mmc0 {
163 pinctrl-names = "default";
164 pinctrl-0 = <&mmc0_pins_a>;
165 vmmc-supply = <&reg_vcc3v3>; 163 vmmc-supply = <&reg_vcc3v3>;
166 bus-width = <4>; 164 bus-width = <4>;
167 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 165 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 0f25c4a6f15d..586ec67f4101 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -167,8 +167,6 @@
167}; 167};
168 168
169&mmc0 { 169&mmc0 {
170 pinctrl-names = "default";
171 pinctrl-0 = <&mmc0_pins_a>;
172 vmmc-supply = <&reg_vcc3v3>; 170 vmmc-supply = <&reg_vcc3v3>;
173 bus-width = <4>; 171 bus-width = <4>;
174 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 172 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index af43533c7134..feee125a4e9a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -74,8 +74,6 @@
74}; 74};
75 75
76&mmc0 { 76&mmc0 {
77 pinctrl-names = "default";
78 pinctrl-0 = <&mmc0_pins_a>;
79 vmmc-supply = <&reg_vcc3v3>; 77 vmmc-supply = <&reg_vcc3v3>;
80 bus-width = <4>; 78 bus-width = <4>;
81 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; 79 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;