diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2018-05-31 10:09:59 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-06-15 13:20:29 -0400 |
commit | 5099114ba3b2e5ae9fb487aeb3ae0434fe38a7da (patch) | |
tree | 57b6a633cf805db3ee9ae73a6626ce18738279dd | |
parent | b646c1dc835b6b73884a88643c2534f1a4a1928f (diff) |
drm/amdgpu/display: drop DRM_AMD_DC_FBC kconfig option
Just enable it always. This was leftover from feature
bring up.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/Kconfig | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_types.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | 7 |
8 files changed, 5 insertions, 50 deletions
diff --git a/drivers/gpu/drm/amd/display/Kconfig b/drivers/gpu/drm/amd/display/Kconfig index d5d4586e6176..9d56889279b3 100644 --- a/drivers/gpu/drm/amd/display/Kconfig +++ b/drivers/gpu/drm/amd/display/Kconfig | |||
@@ -9,16 +9,6 @@ config DRM_AMD_DC | |||
9 | support for AMDGPU. This adds required support for Vega and | 9 | support for AMDGPU. This adds required support for Vega and |
10 | Raven ASICs. | 10 | Raven ASICs. |
11 | 11 | ||
12 | config DRM_AMD_DC_FBC | ||
13 | bool "AMD FBC - Enable Frame Buffer Compression" | ||
14 | depends on DRM_AMD_DC | ||
15 | help | ||
16 | Choose this option if you want to use frame buffer compression | ||
17 | support. | ||
18 | This is a power optimisation feature, check its availability | ||
19 | on your hardware before enabling this option. | ||
20 | |||
21 | |||
22 | config DRM_AMD_DC_DCN1_0 | 12 | config DRM_AMD_DC_DCN1_0 |
23 | bool "DCN 1.0 Raven family" | 13 | bool "DCN 1.0 Raven family" |
24 | depends on DRM_AMD_DC && X86 | 14 | depends on DRM_AMD_DC && X86 |
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index d7d1245c1050..adeb795d80f6 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | |||
@@ -347,7 +347,6 @@ static void hotplug_notify_work_func(struct work_struct *work) | |||
347 | drm_kms_helper_hotplug_event(dev); | 347 | drm_kms_helper_hotplug_event(dev); |
348 | } | 348 | } |
349 | 349 | ||
350 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
351 | /* Allocate memory for FBC compressed data */ | 350 | /* Allocate memory for FBC compressed data */ |
352 | static void amdgpu_dm_fbc_init(struct drm_connector *connector) | 351 | static void amdgpu_dm_fbc_init(struct drm_connector *connector) |
353 | { | 352 | { |
@@ -388,7 +387,6 @@ static void amdgpu_dm_fbc_init(struct drm_connector *connector) | |||
388 | } | 387 | } |
389 | 388 | ||
390 | } | 389 | } |
391 | #endif | ||
392 | 390 | ||
393 | 391 | ||
394 | /* Init display KMS | 392 | /* Init display KMS |
@@ -3429,9 +3427,8 @@ static int amdgpu_dm_connector_get_modes(struct drm_connector *connector) | |||
3429 | amdgpu_dm_connector_ddc_get_modes(connector, edid); | 3427 | amdgpu_dm_connector_ddc_get_modes(connector, edid); |
3430 | amdgpu_dm_connector_add_common_modes(encoder, connector); | 3428 | amdgpu_dm_connector_add_common_modes(encoder, connector); |
3431 | 3429 | ||
3432 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
3433 | amdgpu_dm_fbc_init(connector); | 3430 | amdgpu_dm_fbc_init(connector); |
3434 | #endif | 3431 | |
3435 | return amdgpu_dm_connector->num_modes; | 3432 | return amdgpu_dm_connector->num_modes; |
3436 | } | 3433 | } |
3437 | 3434 | ||
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index d5aa89ad5571..a29dc35954c9 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | |||
@@ -72,13 +72,11 @@ struct irq_list_head { | |||
72 | struct work_struct work; | 72 | struct work_struct work; |
73 | }; | 73 | }; |
74 | 74 | ||
75 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
76 | struct dm_comressor_info { | 75 | struct dm_comressor_info { |
77 | void *cpu_addr; | 76 | void *cpu_addr; |
78 | struct amdgpu_bo *bo_ptr; | 77 | struct amdgpu_bo *bo_ptr; |
79 | uint64_t gpu_addr; | 78 | uint64_t gpu_addr; |
80 | }; | 79 | }; |
81 | #endif | ||
82 | 80 | ||
83 | 81 | ||
84 | struct amdgpu_display_manager { | 82 | struct amdgpu_display_manager { |
@@ -129,9 +127,8 @@ struct amdgpu_display_manager { | |||
129 | * Caches device atomic state for suspend/resume | 127 | * Caches device atomic state for suspend/resume |
130 | */ | 128 | */ |
131 | struct drm_atomic_state *cached_state; | 129 | struct drm_atomic_state *cached_state; |
132 | #if defined(CONFIG_DRM_AMD_DC_FBC) | 130 | |
133 | struct dm_comressor_info compressor; | 131 | struct dm_comressor_info compressor; |
134 | #endif | ||
135 | }; | 132 | }; |
136 | 133 | ||
137 | struct amdgpu_dm_connector { | 134 | struct amdgpu_dm_connector { |
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index be0dee18e09f..f09fa4722fc9 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h | |||
@@ -289,9 +289,7 @@ struct dc { | |||
289 | bool apply_edp_fast_boot_optimization; | 289 | bool apply_edp_fast_boot_optimization; |
290 | 290 | ||
291 | /* FBC compressor */ | 291 | /* FBC compressor */ |
292 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
293 | struct compressor *fbc_compressor; | 292 | struct compressor *fbc_compressor; |
294 | #endif | ||
295 | }; | 293 | }; |
296 | 294 | ||
297 | enum frame_buffer_mode { | 295 | enum frame_buffer_mode { |
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index 7d603c53e45e..e026ce5ac78f 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h | |||
@@ -92,9 +92,7 @@ struct dc_context { | |||
92 | bool created_bios; | 92 | bool created_bios; |
93 | struct gpio_service *gpio_service; | 93 | struct gpio_service *gpio_service; |
94 | struct i2caux *i2caux; | 94 | struct i2caux *i2caux; |
95 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
96 | uint64_t fbc_gpu_addr; | 95 | uint64_t fbc_gpu_addr; |
97 | #endif | ||
98 | }; | 96 | }; |
99 | 97 | ||
100 | 98 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c index 111c4921987f..df027013e50c 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c | |||
@@ -551,9 +551,7 @@ void dce110_compressor_construct(struct dce110_compressor *compressor, | |||
551 | compressor->base.lpt_channels_num = 0; | 551 | compressor->base.lpt_channels_num = 0; |
552 | compressor->base.attached_inst = 0; | 552 | compressor->base.attached_inst = 0; |
553 | compressor->base.is_enabled = false; | 553 | compressor->base.is_enabled = false; |
554 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
555 | compressor->base.funcs = &dce110_compressor_funcs; | 554 | compressor->base.funcs = &dce110_compressor_funcs; |
556 | 555 | ||
557 | #endif | ||
558 | } | 556 | } |
559 | 557 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index cae0054c102a..1dd2ae46d505 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | |||
@@ -34,9 +34,7 @@ | |||
34 | #include "dce/dce_hwseq.h" | 34 | #include "dce/dce_hwseq.h" |
35 | #include "gpio_service_interface.h" | 35 | #include "gpio_service_interface.h" |
36 | 36 | ||
37 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
38 | #include "dce110_compressor.h" | 37 | #include "dce110_compressor.h" |
39 | #endif | ||
40 | 38 | ||
41 | #include "bios/bios_parser_helper.h" | 39 | #include "bios/bios_parser_helper.h" |
42 | #include "timing_generator.h" | 40 | #include "timing_generator.h" |
@@ -1497,10 +1495,8 @@ static void power_down_all_hw_blocks(struct dc *dc) | |||
1497 | 1495 | ||
1498 | power_down_clock_sources(dc); | 1496 | power_down_clock_sources(dc); |
1499 | 1497 | ||
1500 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
1501 | if (dc->fbc_compressor) | 1498 | if (dc->fbc_compressor) |
1502 | dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); | 1499 | dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); |
1503 | #endif | ||
1504 | } | 1500 | } |
1505 | 1501 | ||
1506 | static void disable_vga_and_power_gate_all_controllers( | 1502 | static void disable_vga_and_power_gate_all_controllers( |
@@ -1742,9 +1738,7 @@ static void set_static_screen_control(struct pipe_ctx **pipe_ctx, | |||
1742 | if (events->force_trigger) | 1738 | if (events->force_trigger) |
1743 | value |= 0x1; | 1739 | value |= 0x1; |
1744 | 1740 | ||
1745 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
1746 | value |= 0x84; | 1741 | value |= 0x84; |
1747 | #endif | ||
1748 | 1742 | ||
1749 | for (i = 0; i < num_pipes; i++) | 1743 | for (i = 0; i < num_pipes; i++) |
1750 | pipe_ctx[i]->stream_res.tg->funcs-> | 1744 | pipe_ctx[i]->stream_res.tg->funcs-> |
@@ -1872,8 +1866,6 @@ static void apply_min_clocks( | |||
1872 | } | 1866 | } |
1873 | } | 1867 | } |
1874 | 1868 | ||
1875 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
1876 | |||
1877 | /* | 1869 | /* |
1878 | * Check if FBC can be enabled | 1870 | * Check if FBC can be enabled |
1879 | */ | 1871 | */ |
@@ -1952,7 +1944,6 @@ static void enable_fbc(struct dc *dc, | |||
1952 | compr->funcs->enable_fbc(compr, ¶ms); | 1944 | compr->funcs->enable_fbc(compr, ¶ms); |
1953 | } | 1945 | } |
1954 | } | 1946 | } |
1955 | #endif | ||
1956 | 1947 | ||
1957 | static void dce110_reset_hw_ctx_wrap( | 1948 | static void dce110_reset_hw_ctx_wrap( |
1958 | struct dc *dc, | 1949 | struct dc *dc, |
@@ -2129,10 +2120,9 @@ enum dc_status dce110_apply_ctx_to_hw( | |||
2129 | 2120 | ||
2130 | set_safe_displaymarks(&context->res_ctx, dc->res_pool); | 2121 | set_safe_displaymarks(&context->res_ctx, dc->res_pool); |
2131 | 2122 | ||
2132 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
2133 | if (dc->fbc_compressor) | 2123 | if (dc->fbc_compressor) |
2134 | dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); | 2124 | dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); |
2135 | #endif | 2125 | |
2136 | /*TODO: when pplib works*/ | 2126 | /*TODO: when pplib works*/ |
2137 | apply_min_clocks(dc, context, &clocks_state, true); | 2127 | apply_min_clocks(dc, context, &clocks_state, true); |
2138 | 2128 | ||
@@ -2210,12 +2200,9 @@ enum dc_status dce110_apply_ctx_to_hw( | |||
2210 | 2200 | ||
2211 | dcb->funcs->set_scratch_critical_state(dcb, false); | 2201 | dcb->funcs->set_scratch_critical_state(dcb, false); |
2212 | 2202 | ||
2213 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
2214 | if (dc->fbc_compressor) | 2203 | if (dc->fbc_compressor) |
2215 | enable_fbc(dc, context); | 2204 | enable_fbc(dc, context); |
2216 | 2205 | ||
2217 | #endif | ||
2218 | |||
2219 | return DC_OK; | 2206 | return DC_OK; |
2220 | } | 2207 | } |
2221 | 2208 | ||
@@ -2530,10 +2517,9 @@ static void init_hw(struct dc *dc) | |||
2530 | abm->funcs->init_backlight(abm); | 2517 | abm->funcs->init_backlight(abm); |
2531 | abm->funcs->abm_init(abm); | 2518 | abm->funcs->abm_init(abm); |
2532 | } | 2519 | } |
2533 | #if defined(CONFIG_DRM_AMD_DC_FBC) | 2520 | |
2534 | if (dc->fbc_compressor) | 2521 | if (dc->fbc_compressor) |
2535 | dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor); | 2522 | dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor); |
2536 | #endif | ||
2537 | 2523 | ||
2538 | } | 2524 | } |
2539 | 2525 | ||
@@ -2719,9 +2705,7 @@ static void dce110_program_front_end_for_pipe( | |||
2719 | struct dc_plane_state *plane_state = pipe_ctx->plane_state; | 2705 | struct dc_plane_state *plane_state = pipe_ctx->plane_state; |
2720 | struct xfm_grph_csc_adjustment adjust; | 2706 | struct xfm_grph_csc_adjustment adjust; |
2721 | struct out_csc_color_matrix tbl_entry; | 2707 | struct out_csc_color_matrix tbl_entry; |
2722 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
2723 | unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; | 2708 | unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; |
2724 | #endif | ||
2725 | unsigned int i; | 2709 | unsigned int i; |
2726 | DC_LOGGER_INIT(); | 2710 | DC_LOGGER_INIT(); |
2727 | memset(&tbl_entry, 0, sizeof(tbl_entry)); | 2711 | memset(&tbl_entry, 0, sizeof(tbl_entry)); |
@@ -2762,7 +2746,6 @@ static void dce110_program_front_end_for_pipe( | |||
2762 | 2746 | ||
2763 | program_scaler(dc, pipe_ctx); | 2747 | program_scaler(dc, pipe_ctx); |
2764 | 2748 | ||
2765 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
2766 | /* fbc not applicable on Underlay pipe */ | 2749 | /* fbc not applicable on Underlay pipe */ |
2767 | if (dc->fbc_compressor && old_pipe->stream && | 2750 | if (dc->fbc_compressor && old_pipe->stream && |
2768 | pipe_ctx->pipe_idx != underlay_idx) { | 2751 | pipe_ctx->pipe_idx != underlay_idx) { |
@@ -2771,7 +2754,6 @@ static void dce110_program_front_end_for_pipe( | |||
2771 | else | 2754 | else |
2772 | enable_fbc(dc, dc->current_state); | 2755 | enable_fbc(dc, dc->current_state); |
2773 | } | 2756 | } |
2774 | #endif | ||
2775 | 2757 | ||
2776 | mi->funcs->mem_input_program_surface_config( | 2758 | mi->funcs->mem_input_program_surface_config( |
2777 | mi, | 2759 | mi, |
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c index ee33786bdef6..20c029089551 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | |||
@@ -54,9 +54,8 @@ | |||
54 | 54 | ||
55 | #define DC_LOGGER \ | 55 | #define DC_LOGGER \ |
56 | dc->ctx->logger | 56 | dc->ctx->logger |
57 | #if defined(CONFIG_DRM_AMD_DC_FBC) | 57 | |
58 | #include "dce110/dce110_compressor.h" | 58 | #include "dce110/dce110_compressor.h" |
59 | #endif | ||
60 | 59 | ||
61 | #include "reg_helper.h" | 60 | #include "reg_helper.h" |
62 | 61 | ||
@@ -1267,12 +1266,8 @@ static bool construct( | |||
1267 | } | 1266 | } |
1268 | } | 1267 | } |
1269 | 1268 | ||
1270 | #if defined(CONFIG_DRM_AMD_DC_FBC) | ||
1271 | dc->fbc_compressor = dce110_compressor_create(ctx); | 1269 | dc->fbc_compressor = dce110_compressor_create(ctx); |
1272 | 1270 | ||
1273 | |||
1274 | |||
1275 | #endif | ||
1276 | if (!underlay_create(ctx, &pool->base)) | 1271 | if (!underlay_create(ctx, &pool->base)) |
1277 | goto res_create_fail; | 1272 | goto res_create_fail; |
1278 | 1273 | ||