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authorJoachim Eastwood <manabian@gmail.com>2015-07-30 18:24:21 -0400
committerOlof Johansson <olof@lixom.net>2015-08-05 13:30:16 -0400
commit50016385c2a5d484aa2a8defff23d4b2e2927006 (patch)
treee5dbe573820cfcfd5bc9eb1aee76694fc126dcfd
parent9cf6267d166a8dc004bbbcdb5b6a371bdd33842b (diff)
ARM: dts: lpc18xx: add pl172 memory-controller node
All devices in the LPC18xx/43xx familiy contain a ARM PL172 MultiPort Memory Controller (MPMC). Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/boot/dts/lpc18xx.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index 619d1732a042..2c569a6ddc9a 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -97,6 +97,20 @@
97 status = "disabled"; 97 status = "disabled";
98 }; 98 };
99 99
100 emc: memory-controller@40005000 {
101 compatible = "arm,pl172", "arm,primecell";
102 reg = <0x40005000 0x1000>;
103 clocks = <&ccu1 CLK_CPU_EMCDIV>, <&ccu1 CLK_CPU_EMC>;
104 clock-names = "mpmcclk", "apb_pclk";
105 #address-cells = <2>;
106 #size-cells = <1>;
107 ranges = <0 0 0x1c000000 0x1000000
108 1 0 0x1d000000 0x1000000
109 2 0 0x1e000000 0x1000000
110 3 0 0x1f000000 0x1000000>;
111 status = "disabled";
112 };
113
100 lcdc: lcd-controller@40008000 { 114 lcdc: lcd-controller@40008000 {
101 compatible = "arm,pl111", "arm,primecell"; 115 compatible = "arm,pl111", "arm,primecell";
102 reg = <0x40008000 0x1000>; 116 reg = <0x40008000 0x1000>;