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authorZefir Kurtisi <zefir.kurtisi@neratec.com>2016-10-24 06:40:53 -0400
committerDavid S. Miller <davem@davemloft.net>2016-10-27 16:05:16 -0400
commit4fc6d239ee5640909932c47f3c7b93dd8e415fea (patch)
treeefd2341e2240e75717340679fce03c8dc59bceca
parent67f0160fe34ec5391a428603b9832c9f99d8f3a1 (diff)
Revert "at803x: fix suspend/resume for SGMII link"
This reverts commit 98267311fe3b334ae7c107fa0e2413adcf3ba735. Suspending the SGMII alongside the copper side made the at803x inaccessable while powered down, e.g. it can't be re-probed after suspend. Signed-off-by: Zefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/phy/at803x.c26
1 files changed, 0 insertions, 26 deletions
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index f279a897a5c7..cf74d108953e 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -52,9 +52,6 @@
52#define AT803X_DEBUG_REG_5 0x05 52#define AT803X_DEBUG_REG_5 0x05
53#define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8) 53#define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8)
54 54
55#define AT803X_REG_CHIP_CONFIG 0x1f
56#define AT803X_BT_BX_REG_SEL 0x8000
57
58#define ATH8030_PHY_ID 0x004dd076 55#define ATH8030_PHY_ID 0x004dd076
59#define ATH8031_PHY_ID 0x004dd074 56#define ATH8031_PHY_ID 0x004dd074
60#define ATH8035_PHY_ID 0x004dd072 57#define ATH8035_PHY_ID 0x004dd072
@@ -209,7 +206,6 @@ static int at803x_suspend(struct phy_device *phydev)
209{ 206{
210 int value; 207 int value;
211 int wol_enabled; 208 int wol_enabled;
212 int ccr;
213 209
214 mutex_lock(&phydev->lock); 210 mutex_lock(&phydev->lock);
215 211
@@ -225,16 +221,6 @@ static int at803x_suspend(struct phy_device *phydev)
225 221
226 phy_write(phydev, MII_BMCR, value); 222 phy_write(phydev, MII_BMCR, value);
227 223
228 if (phydev->interface != PHY_INTERFACE_MODE_SGMII)
229 goto done;
230
231 /* also power-down SGMII interface */
232 ccr = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
233 phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr & ~AT803X_BT_BX_REG_SEL);
234 phy_write(phydev, MII_BMCR, phy_read(phydev, MII_BMCR) | BMCR_PDOWN);
235 phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr | AT803X_BT_BX_REG_SEL);
236
237done:
238 mutex_unlock(&phydev->lock); 224 mutex_unlock(&phydev->lock);
239 225
240 return 0; 226 return 0;
@@ -243,7 +229,6 @@ done:
243static int at803x_resume(struct phy_device *phydev) 229static int at803x_resume(struct phy_device *phydev)
244{ 230{
245 int value; 231 int value;
246 int ccr;
247 232
248 mutex_lock(&phydev->lock); 233 mutex_lock(&phydev->lock);
249 234
@@ -251,17 +236,6 @@ static int at803x_resume(struct phy_device *phydev)
251 value &= ~(BMCR_PDOWN | BMCR_ISOLATE); 236 value &= ~(BMCR_PDOWN | BMCR_ISOLATE);
252 phy_write(phydev, MII_BMCR, value); 237 phy_write(phydev, MII_BMCR, value);
253 238
254 if (phydev->interface != PHY_INTERFACE_MODE_SGMII)
255 goto done;
256
257 /* also power-up SGMII interface */
258 ccr = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
259 phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr & ~AT803X_BT_BX_REG_SEL);
260 value = phy_read(phydev, MII_BMCR) & ~(BMCR_PDOWN | BMCR_ISOLATE);
261 phy_write(phydev, MII_BMCR, value);
262 phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr | AT803X_BT_BX_REG_SEL);
263
264done:
265 mutex_unlock(&phydev->lock); 239 mutex_unlock(&phydev->lock);
266 240
267 return 0; 241 return 0;