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authorOlof Johansson <olof@lixom.net>2016-06-20 01:30:16 -0400
committerOlof Johansson <olof@lixom.net>2016-06-20 01:30:16 -0400
commit4fb92c60ebf6300550adb94f368c7a6bef544eee (patch)
tree945d2f70c7a11dac35a5a074d89d93a6b981e78e
parentffd8a5ed578b6d6b2ee91febf38d6822cd229e99 (diff)
parent6d1a5c9381eb022104442b2e036124f12ac748e4 (diff)
Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64
Amlogic DT 64-bit changes for v4.8 - add pinctrl driver and pins for several devices - add reset driver * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: amlogic: Enable Reset Controller on GXBB-based platforms ARM64: dts: amlogic: gxbb: add ethernet ARM64: dts: amlogic: gxbb: pinctrl: add/update UART ARM64: dts: amlogic: add pins for EMMC, SD ARM64: dts: amlogic: Enable pin controller on GXBB-based platforms documentation: Add compatibles for Amlogic Meson GXBB pin controllers ARM64: dts: amlogic: Add hiu and periphs buses Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt2
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts20
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi9
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi3
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi159
5 files changed, 192 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
index 32f4a2d6d0b3..fe7fe0b03cfb 100644
--- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
@@ -5,6 +5,8 @@ Required properties for the root node:
5 "amlogic,meson8b-cbus-pinctrl" 5 "amlogic,meson8b-cbus-pinctrl"
6 "amlogic,meson8-aobus-pinctrl" 6 "amlogic,meson8-aobus-pinctrl"
7 "amlogic,meson8b-aobus-pinctrl" 7 "amlogic,meson8b-aobus-pinctrl"
8 "amlogic,meson-gxbb-periphs-pinctrl"
9 "amlogic,meson-gxbb-aobus-pinctrl"
8 - reg: address and size of registers controlling irq functionality 10 - reg: address and size of registers controlling irq functionality
9 11
10=== GPIO sub-nodes === 12=== GPIO sub-nodes ===
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index 7f2c6747a71e..90a84c514d3d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -45,6 +45,7 @@
45/dts-v1/; 45/dts-v1/;
46 46
47#include "meson-gxbb.dtsi" 47#include "meson-gxbb.dtsi"
48#include <dt-bindings/gpio/gpio.h>
48 49
49/ { 50/ {
50 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; 51 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
@@ -62,8 +63,27 @@
62 device_type = "memory"; 63 device_type = "memory";
63 reg = <0x0 0x0 0x0 0x80000000>; 64 reg = <0x0 0x0 0x0 0x80000000>;
64 }; 65 };
66
67 leds {
68 compatible = "gpio-leds";
69 blue {
70 label = "c2:blue:alive";
71 gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
72 linux,default-trigger = "heartbeat";
73 default-state = "off";
74 };
75 };
65}; 76};
66 77
67&uart_AO { 78&uart_AO {
68 status = "okay"; 79 status = "okay";
80 pinctrl-0 = <&uart_ao_a_pins>;
81 pinctrl-names = "default";
82};
83
84&ethmac {
85 status = "okay";
86 pinctrl-0 = <&eth_pins>;
87 pinctrl-names = "default";
69}; 88};
89
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
index bf7ff1d41851..f4f30f674b4c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
@@ -62,4 +62,13 @@
62/* This UART is brought out to the DB9 connector */ 62/* This UART is brought out to the DB9 connector */
63&uart_AO { 63&uart_AO {
64 status = "okay"; 64 status = "okay";
65 pinctrl-0 = <&uart_ao_a_pins>;
66 pinctrl-names = "default";
65}; 67};
68
69&ethmac {
70 status = "okay";
71 pinctrl-0 = <&eth_pins>;
72 pinctrl-names = "default";
73};
74
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
index 012cdccc8a35..54bb7c739089 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
@@ -56,4 +56,7 @@
56 56
57&uart_AO { 57&uart_AO {
58 status = "okay"; 58 status = "okay";
59 pinctrl-0 = <&uart_ao_a_pins>;
60 pinctrl-names = "default";
61
59}; 62};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 832815d80462..063e3b679207 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -43,6 +43,8 @@
43#include <dt-bindings/gpio/gpio.h> 43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/interrupt-controller/irq.h> 44#include <dt-bindings/interrupt-controller/irq.h>
45#include <dt-bindings/interrupt-controller/arm-gic.h> 45#include <dt-bindings/interrupt-controller/arm-gic.h>
46#include <dt-bindings/gpio/meson-gxbb-gpio.h>
47#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
46 48
47/ { 49/ {
48 compatible = "amlogic,meson-gxbb"; 50 compatible = "amlogic,meson-gxbb";
@@ -129,13 +131,35 @@
129 #size-cells = <2>; 131 #size-cells = <2>;
130 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; 132 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
131 133
134 reset: reset-controller@4404 {
135 compatible = "amlogic,meson-gxbb-reset";
136 reg = <0x0 0x04404 0x0 0x20>;
137 #reset-cells = <1>;
138 };
139
132 uart_A: serial@84c0 { 140 uart_A: serial@84c0 {
133 compatible = "amlogic,meson-uart"; 141 compatible = "amlogic,meson-uart";
134 reg = <0x0 0x084c0 0x0 0x14>; 142 reg = <0x0 0x84c0 0x0 0x14>;
135 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 143 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
136 clocks = <&xtal>; 144 clocks = <&xtal>;
137 status = "disabled"; 145 status = "disabled";
138 }; 146 };
147
148 uart_B: serial@84dc {
149 compatible = "amlogic,meson-uart";
150 reg = <0x0 0x84dc 0x0 0x14>;
151 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
152 clocks = <&xtal>;
153 status = "disabled";
154 };
155
156 uart_C: serial@8700 {
157 compatible = "amlogic,meson-uart";
158 reg = <0x0 0x8700 0x0 0x14>;
159 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
160 clocks = <&xtal>;
161 status = "disabled";
162 };
139 }; 163 };
140 164
141 gic: interrupt-controller@c4301000 { 165 gic: interrupt-controller@c4301000 {
@@ -158,6 +182,29 @@
158 #size-cells = <2>; 182 #size-cells = <2>;
159 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; 183 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
160 184
185 pinctrl_aobus: pinctrl@14 {
186 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
187 #address-cells = <2>;
188 #size-cells = <2>;
189 ranges;
190
191 gpio_ao: bank@14 {
192 reg = <0x0 0x00014 0x0 0x8>,
193 <0x0 0x0002c 0x0 0x4>,
194 <0x0 0x00024 0x0 0x8>;
195 reg-names = "mux", "pull", "gpio";
196 gpio-controller;
197 #gpio-cells = <2>;
198 };
199
200 uart_ao_a_pins: uart_ao_a {
201 mux {
202 groups = "uart_tx_ao_a", "uart_rx_ao_a";
203 function = "uart_ao";
204 };
205 };
206 };
207
161 uart_AO: serial@4c0 { 208 uart_AO: serial@4c0 {
162 compatible = "amlogic,meson-uart"; 209 compatible = "amlogic,meson-uart";
163 reg = <0x0 0x004c0 0x0 0x14>; 210 reg = <0x0 0x004c0 0x0 0x14>;
@@ -167,6 +214,104 @@
167 }; 214 };
168 }; 215 };
169 216
217 periphs: periphs@c8834000 {
218 compatible = "simple-bus";
219 reg = <0x0 0xc8834000 0x0 0x2000>;
220 #address-cells = <2>;
221 #size-cells = <2>;
222 ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
223
224 pinctrl_periphs: pinctrl@4b0 {
225 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
226 #address-cells = <2>;
227 #size-cells = <2>;
228 ranges;
229
230 gpio: bank@4b0 {
231 reg = <0x0 0x004b0 0x0 0x28>,
232 <0x0 0x004e8 0x0 0x14>,
233 <0x0 0x00120 0x0 0x14>,
234 <0x0 0x00430 0x0 0x40>;
235 reg-names = "mux", "pull", "pull-enable", "gpio";
236 gpio-controller;
237 #gpio-cells = <2>;
238 };
239
240 emmc_pins: emmc {
241 mux {
242 groups = "emmc_nand_d07",
243 "emmc_cmd",
244 "emmc_clk";
245 function = "emmc";
246 };
247 };
248
249 sdcard_pins: sdcard {
250 mux {
251 groups = "sdcard_d0",
252 "sdcard_d1",
253 "sdcard_d2",
254 "sdcard_d3",
255 "sdcard_cmd",
256 "sdcard_clk";
257 function = "sdcard";
258 };
259 };
260
261 uart_a_pins: uart_a {
262 mux {
263 groups = "uart_tx_a",
264 "uart_rx_a";
265 function = "uart_a";
266 };
267 };
268
269 uart_b_pins: uart_b {
270 mux {
271 groups = "uart_tx_b",
272 "uart_rx_b";
273 function = "uart_b";
274 };
275 };
276
277 uart_c_pins: uart_c {
278 mux {
279 groups = "uart_tx_c",
280 "uart_rx_c";
281 function = "uart_c";
282 };
283 };
284
285 eth_pins: eth_c {
286 mux {
287 groups = "eth_mdio",
288 "eth_mdc",
289 "eth_clk_rx_clk",
290 "eth_rx_dv",
291 "eth_rxd0",
292 "eth_rxd1",
293 "eth_rxd2",
294 "eth_rxd3",
295 "eth_rgmii_tx_clk",
296 "eth_tx_en",
297 "eth_txd0",
298 "eth_txd1",
299 "eth_txd2",
300 "eth_txd3";
301 function = "eth";
302 };
303 };
304 };
305 };
306
307 hiubus: hiubus@c883c000 {
308 compatible = "simple-bus";
309 reg = <0x0 0xc883c000 0x0 0x2000>;
310 #address-cells = <2>;
311 #size-cells = <2>;
312 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
313 };
314
170 apb: apb@d0000000 { 315 apb: apb@d0000000 {
171 compatible = "simple-bus"; 316 compatible = "simple-bus";
172 reg = <0x0 0xd0000000 0x0 0x200000>; 317 reg = <0x0 0xd0000000 0x0 0x200000>;
@@ -174,5 +319,17 @@
174 #size-cells = <2>; 319 #size-cells = <2>;
175 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; 320 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
176 }; 321 };
322
323 ethmac: ethernet@c9410000 {
324 compatible = "amlogic,meson6-dwmac", "snps,dwmac";
325 reg = <0x0 0xc9410000 0x0 0x10000
326 0x0 0xc8834540 0x0 0x4>;
327 interrupts = <0 8 1>;
328 interrupt-names = "macirq";
329 clocks = <&xtal>;
330 clock-names = "stmmaceth";
331 phy-mode = "rgmii";
332 status = "disabled";
333 };
177 }; 334 };
178}; 335};