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authorAndrzej Hajda <a.hajda@samsung.com>2015-07-09 02:25:40 -0400
committerInki Dae <inki.dae@samsung.com>2015-08-11 04:21:35 -0400
commit4f98f9446f0ec9bc7d1e9274a74e58b04ae48ead (patch)
treea610b89b4669aa416b660ad96e851d4f4f52973c
parent9859e203713a190f79959681836da34606d0d5bd (diff)
drm/exynos/mixer: correct vsync configuration sequence
Specification advises to clear vsync indicator before configuring vsync. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 25f0aac01a89..923aa75143bf 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -906,8 +906,8 @@ static int mixer_enable_vblank(struct exynos_drm_crtc *crtc)
906 } 906 }
907 907
908 /* enable vsync interrupt */ 908 /* enable vsync interrupt */
909 mixer_reg_writemask(res, MXR_INT_EN, MXR_INT_EN_VSYNC, 909 mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
910 MXR_INT_EN_VSYNC); 910 mixer_reg_writemask(res, MXR_INT_EN, ~0, MXR_INT_EN_VSYNC);
911 911
912 return 0; 912 return 0;
913} 913}
@@ -918,6 +918,7 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc)
918 struct mixer_resources *res = &mixer_ctx->mixer_res; 918 struct mixer_resources *res = &mixer_ctx->mixer_res;
919 919
920 /* disable vsync interrupt */ 920 /* disable vsync interrupt */
921 mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
921 mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC); 922 mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC);
922} 923}
923 924
@@ -1046,6 +1047,8 @@ static void mixer_enable(struct exynos_drm_crtc *crtc)
1046 1047
1047 mixer_reg_writemask(res, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET); 1048 mixer_reg_writemask(res, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET);
1048 1049
1050 if (ctx->int_en & MXR_INT_EN_VSYNC)
1051 mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
1049 mixer_reg_write(res, MXR_INT_EN, ctx->int_en); 1052 mixer_reg_write(res, MXR_INT_EN, ctx->int_en);
1050 mixer_win_reset(ctx); 1053 mixer_win_reset(ctx);
1051} 1054}