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authorDavid S. Miller <davem@davemloft.net>2016-12-02 13:52:02 -0500
committerDavid S. Miller <davem@davemloft.net>2016-12-02 13:52:02 -0500
commit4f4f907a6729ae9e132810711c3a05e48311a948 (patch)
tree3f536d5097d363cc96d32bd2016acbd9c3b157cd
parentb5b5eca9aa4166779e184685dcd838f4d0775e76 (diff)
parentea7ae8854a3565a2da84fa91adf2e310c51c6e99 (diff)
Merge branch 'mvneta-64bit'
Gregory CLEMENT says: ==================== Support Armada 37xx SoC (ARMv8 64-bits) in mvneta driver The Armada 37xx is a new ARMv8 SoC from Marvell using same network controller as the older Armada 370/38x/XP SoCs. This series adapts the driver in order to be able to use it on this new SoC. The main changes are: - 64-bits support: the first patches allow using the driver on a 64-bit architecture. - MBUS support: the mbus configuration is different on Armada 37xx from the older SoCs. - per cpu interrupt: Armada 37xx do not support per cpu interrupt for the NETA IP, the non-per-CPU behavior was added back. The first patch is an optimization in the rx path in swbm mode. The second patch remove unnecessary allocation for HWBM. The first item is solved by patches 4 and 5. The 2 last items are solved by patch 6. In patch 7 the dt support is added. Beside Armada 37xx, this series have been again tested on Armada XP and Armada 38x (with Hardware Buffer Management and with Software Buffer Management). This is the 6th version of the series: - 1st version: http://lists.infradead.org/pipermail/linux-arm-kernel/2016-November/469588.html - 2nd version: http://lists.infradead.org/pipermail/linux-arm-kernel/2016-November/470476.html - 3rd version: http://lists.infradead.org/pipermail/linux-arm-kernel/2016-November/470901.html - 4th version: http://lists.infradead.org/pipermail/linux-arm-kernel/2016-November/471039.html - 5th version: http://lists.infradead.org/pipermail/linux-arm-kernel/2016-November/471478.html Changelog: v5 -> v6: - Added Tested-by from Marcin Wojtas on the series - Added Reviewed-by from Jisheng Zhang on patch 3 - Fix eth1 phy mode for Armada 3720 DB board on patch 7 v4 -> v5: - remove unnecessary cast in patch 3 v3 -> v4: - Adding new patch: "net: mvneta: do not allocate buffer in rxq init with HWBM" - Simplify the HWBM case in patch 3 as suggested by Marcin v2 -> v3: - Adding patch 1 "Optimize rx path for small frame" - Fix the kbuild error by moving the "phys_addr += pp->rx_offset_correction;" line from patch 2 to patch 3 where rx_offset_correction is introduced. - Move the memory allocation of the buf_virt_addr of the rxq to be called by the probe function in order to avoid a memory leak. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt7
-rw-r--r--arch/arm64/boot/dts/marvell/armada-3720-db.dts23
-rw-r--r--arch/arm64/boot/dts/marvell/armada-37xx.dtsi23
-rw-r--r--drivers/net/ethernet/marvell/Kconfig10
-rw-r--r--drivers/net/ethernet/marvell/mvneta.c344
5 files changed, 305 insertions, 102 deletions
diff --git a/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt b/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt
index 73be8970815e..7aa840c8768d 100644
--- a/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt
+++ b/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt
@@ -1,7 +1,10 @@
1* Marvell Armada 370 / Armada XP Ethernet Controller (NETA) 1* Marvell Armada 370 / Armada XP / Armada 3700 Ethernet Controller (NETA)
2 2
3Required properties: 3Required properties:
4- compatible: "marvell,armada-370-neta" or "marvell,armada-xp-neta". 4- compatible: could be one of the followings
5 "marvell,armada-370-neta"
6 "marvell,armada-xp-neta"
7 "marvell,armada-3700-neta"
5- reg: address and length of the register set for the device. 8- reg: address and length of the register set for the device.
6- interrupts: interrupt for the device 9- interrupts: interrupt for the device
7- phy: See ethernet.txt file in the same directory. 10- phy: See ethernet.txt file in the same directory.
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 1372e9a6aaa4..a59d36cd6caf 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -81,3 +81,26 @@
81&pcie0 { 81&pcie0 {
82 status = "okay"; 82 status = "okay";
83}; 83};
84
85&mdio {
86 status = "okay";
87 phy0: ethernet-phy@0 {
88 reg = <0>;
89 };
90
91 phy1: ethernet-phy@1 {
92 reg = <1>;
93 };
94};
95
96&eth0 {
97 phy-mode = "rgmii-id";
98 phy = <&phy0>;
99 status = "okay";
100};
101
102&eth1 {
103 phy-mode = "sgmii";
104 phy = <&phy1>;
105 status = "okay";
106};
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index e9bd58793464..3b8eb45bdc76 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -140,6 +140,29 @@
140 }; 140 };
141 }; 141 };
142 142
143 eth0: ethernet@30000 {
144 compatible = "marvell,armada-3700-neta";
145 reg = <0x30000 0x4000>;
146 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
147 clocks = <&sb_periph_clk 8>;
148 status = "disabled";
149 };
150
151 mdio: mdio@32004 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "marvell,orion-mdio";
155 reg = <0x32004 0x4>;
156 };
157
158 eth1: ethernet@40000 {
159 compatible = "marvell,armada-3700-neta";
160 reg = <0x40000 0x4000>;
161 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
162 clocks = <&sb_periph_clk 7>;
163 status = "disabled";
164 };
165
143 usb3: usb@58000 { 166 usb3: usb@58000 {
144 compatible = "marvell,armada3700-xhci", 167 compatible = "marvell,armada3700-xhci",
145 "generic-xhci"; 168 "generic-xhci";
diff --git a/drivers/net/ethernet/marvell/Kconfig b/drivers/net/ethernet/marvell/Kconfig
index 66fd9dbb2ca7..3b8f11fe5e13 100644
--- a/drivers/net/ethernet/marvell/Kconfig
+++ b/drivers/net/ethernet/marvell/Kconfig
@@ -44,6 +44,7 @@ config MVMDIO
44config MVNETA_BM_ENABLE 44config MVNETA_BM_ENABLE
45 tristate "Marvell Armada 38x/XP network interface BM support" 45 tristate "Marvell Armada 38x/XP network interface BM support"
46 depends on MVNETA 46 depends on MVNETA
47 depends on !64BIT
47 ---help--- 48 ---help---
48 This driver supports auxiliary block of the network 49 This driver supports auxiliary block of the network
49 interface units in the Marvell ARMADA XP and ARMADA 38x SoC 50 interface units in the Marvell ARMADA XP and ARMADA 38x SoC
@@ -55,15 +56,15 @@ config MVNETA_BM_ENABLE
55 buffer management. 56 buffer management.
56 57
57config MVNETA 58config MVNETA
58 tristate "Marvell Armada 370/38x/XP network interface support" 59 tristate "Marvell Armada 370/38x/XP/37xx network interface support"
59 depends on PLAT_ORION || COMPILE_TEST 60 depends on ARCH_MVEBU || COMPILE_TEST
60 depends on HAS_DMA 61 depends on HAS_DMA
61 depends on !64BIT
62 select MVMDIO 62 select MVMDIO
63 select FIXED_PHY 63 select FIXED_PHY
64 ---help--- 64 ---help---
65 This driver supports the network interface units in the 65 This driver supports the network interface units in the
66 Marvell ARMADA XP, ARMADA 370 and ARMADA 38x SoC family. 66 Marvell ARMADA XP, ARMADA 370, ARMADA 38x and
67 ARMADA 37xx SoC family.
67 68
68 Note that this driver is distinct from the mv643xx_eth 69 Note that this driver is distinct from the mv643xx_eth
69 driver, which should be used for the older Marvell SoCs 70 driver, which should be used for the older Marvell SoCs
@@ -71,6 +72,7 @@ config MVNETA
71 72
72config MVNETA_BM 73config MVNETA_BM
73 tristate 74 tristate
75 depends on !64BIT
74 default y if MVNETA=y && MVNETA_BM_ENABLE!=n 76 default y if MVNETA=y && MVNETA_BM_ENABLE!=n
75 default MVNETA_BM_ENABLE 77 default MVNETA_BM_ENABLE
76 select HWBM 78 select HWBM
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index 0a24571e44b9..aa87c6858478 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -296,6 +296,12 @@
296/* descriptor aligned size */ 296/* descriptor aligned size */
297#define MVNETA_DESC_ALIGNED_SIZE 32 297#define MVNETA_DESC_ALIGNED_SIZE 32
298 298
299/* Number of bytes to be taken into account by HW when putting incoming data
300 * to the buffers. It is needed in case NET_SKB_PAD exceeds maximum packet
301 * offset supported in MVNETA_RXQ_CONFIG_REG(q) registers.
302 */
303#define MVNETA_RX_PKT_OFFSET_CORRECTION 64
304
299#define MVNETA_RX_PKT_SIZE(mtu) \ 305#define MVNETA_RX_PKT_SIZE(mtu) \
300 ALIGN((mtu) + MVNETA_MH_SIZE + MVNETA_VLAN_TAG_LEN + \ 306 ALIGN((mtu) + MVNETA_MH_SIZE + MVNETA_VLAN_TAG_LEN + \
301 ETH_HLEN + ETH_FCS_LEN, \ 307 ETH_HLEN + ETH_FCS_LEN, \
@@ -391,6 +397,9 @@ struct mvneta_port {
391 spinlock_t lock; 397 spinlock_t lock;
392 bool is_stopped; 398 bool is_stopped;
393 399
400 u32 cause_rx_tx;
401 struct napi_struct napi;
402
394 /* Core clock */ 403 /* Core clock */
395 struct clk *clk; 404 struct clk *clk;
396 /* AXI clock */ 405 /* AXI clock */
@@ -416,6 +425,10 @@ struct mvneta_port {
416 u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)]; 425 u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)];
417 426
418 u32 indir[MVNETA_RSS_LU_TABLE_SIZE]; 427 u32 indir[MVNETA_RSS_LU_TABLE_SIZE];
428
429 /* Flags for special SoC configurations */
430 bool neta_armada3700;
431 u16 rx_offset_correction;
419}; 432};
420 433
421/* The mvneta_tx_desc and mvneta_rx_desc structures describe the 434/* The mvneta_tx_desc and mvneta_rx_desc structures describe the
@@ -561,6 +574,9 @@ struct mvneta_rx_queue {
561 u32 pkts_coal; 574 u32 pkts_coal;
562 u32 time_coal; 575 u32 time_coal;
563 576
577 /* Virtual address of the RX buffer */
578 void **buf_virt_addr;
579
564 /* Virtual address of the RX DMA descriptors array */ 580 /* Virtual address of the RX DMA descriptors array */
565 struct mvneta_rx_desc *descs; 581 struct mvneta_rx_desc *descs;
566 582
@@ -955,14 +971,9 @@ static int mvneta_mbus_io_win_set(struct mvneta_port *pp, u32 base, u32 wsize,
955 return 0; 971 return 0;
956} 972}
957 973
958/* Assign and initialize pools for port. In case of fail 974static int mvneta_bm_port_mbus_init(struct mvneta_port *pp)
959 * buffer manager will remain disabled for current port.
960 */
961static int mvneta_bm_port_init(struct platform_device *pdev,
962 struct mvneta_port *pp)
963{ 975{
964 struct device_node *dn = pdev->dev.of_node; 976 u32 wsize;
965 u32 long_pool_id, short_pool_id, wsize;
966 u8 target, attr; 977 u8 target, attr;
967 int err; 978 int err;
968 979
@@ -981,6 +992,25 @@ static int mvneta_bm_port_init(struct platform_device *pdev,
981 netdev_info(pp->dev, "fail to configure mbus window to BM\n"); 992 netdev_info(pp->dev, "fail to configure mbus window to BM\n");
982 return err; 993 return err;
983 } 994 }
995 return 0;
996}
997
998/* Assign and initialize pools for port. In case of fail
999 * buffer manager will remain disabled for current port.
1000 */
1001static int mvneta_bm_port_init(struct platform_device *pdev,
1002 struct mvneta_port *pp)
1003{
1004 struct device_node *dn = pdev->dev.of_node;
1005 u32 long_pool_id, short_pool_id;
1006
1007 if (!pp->neta_armada3700) {
1008 int ret;
1009
1010 ret = mvneta_bm_port_mbus_init(pp);
1011 if (ret)
1012 return ret;
1013 }
984 1014
985 if (of_property_read_u32(dn, "bm,pool-long", &long_pool_id)) { 1015 if (of_property_read_u32(dn, "bm,pool-long", &long_pool_id)) {
986 netdev_info(pp->dev, "missing long pool id\n"); 1016 netdev_info(pp->dev, "missing long pool id\n");
@@ -1349,22 +1379,27 @@ static void mvneta_defaults_set(struct mvneta_port *pp)
1349 for_each_present_cpu(cpu) { 1379 for_each_present_cpu(cpu) {
1350 int rxq_map = 0, txq_map = 0; 1380 int rxq_map = 0, txq_map = 0;
1351 int rxq, txq; 1381 int rxq, txq;
1382 if (!pp->neta_armada3700) {
1383 for (rxq = 0; rxq < rxq_number; rxq++)
1384 if ((rxq % max_cpu) == cpu)
1385 rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq);
1386
1387 for (txq = 0; txq < txq_number; txq++)
1388 if ((txq % max_cpu) == cpu)
1389 txq_map |= MVNETA_CPU_TXQ_ACCESS(txq);
1390
1391 /* With only one TX queue we configure a special case
1392 * which will allow to get all the irq on a single
1393 * CPU
1394 */
1395 if (txq_number == 1)
1396 txq_map = (cpu == pp->rxq_def) ?
1397 MVNETA_CPU_TXQ_ACCESS(1) : 0;
1352 1398
1353 for (rxq = 0; rxq < rxq_number; rxq++) 1399 } else {
1354 if ((rxq % max_cpu) == cpu) 1400 txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK;
1355 rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq); 1401 rxq_map = MVNETA_CPU_RXQ_ACCESS_ALL_MASK;
1356 1402 }
1357 for (txq = 0; txq < txq_number; txq++)
1358 if ((txq % max_cpu) == cpu)
1359 txq_map |= MVNETA_CPU_TXQ_ACCESS(txq);
1360
1361 /* With only one TX queue we configure a special case
1362 * which will allow to get all the irq on a single
1363 * CPU
1364 */
1365 if (txq_number == 1)
1366 txq_map = (cpu == pp->rxq_def) ?
1367 MVNETA_CPU_TXQ_ACCESS(1) : 0;
1368 1403
1369 mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); 1404 mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map);
1370 } 1405 }
@@ -1573,10 +1608,14 @@ static void mvneta_tx_done_pkts_coal_set(struct mvneta_port *pp,
1573 1608
1574/* Handle rx descriptor fill by setting buf_cookie and buf_phys_addr */ 1609/* Handle rx descriptor fill by setting buf_cookie and buf_phys_addr */
1575static void mvneta_rx_desc_fill(struct mvneta_rx_desc *rx_desc, 1610static void mvneta_rx_desc_fill(struct mvneta_rx_desc *rx_desc,
1576 u32 phys_addr, u32 cookie) 1611 u32 phys_addr, void *virt_addr,
1612 struct mvneta_rx_queue *rxq)
1577{ 1613{
1578 rx_desc->buf_cookie = cookie; 1614 int i;
1615
1579 rx_desc->buf_phys_addr = phys_addr; 1616 rx_desc->buf_phys_addr = phys_addr;
1617 i = rx_desc - rxq->descs;
1618 rxq->buf_virt_addr[i] = virt_addr;
1580} 1619}
1581 1620
1582/* Decrement sent descriptors counter */ 1621/* Decrement sent descriptors counter */
@@ -1781,7 +1820,8 @@ EXPORT_SYMBOL_GPL(mvneta_frag_free);
1781 1820
1782/* Refill processing for SW buffer management */ 1821/* Refill processing for SW buffer management */
1783static int mvneta_rx_refill(struct mvneta_port *pp, 1822static int mvneta_rx_refill(struct mvneta_port *pp,
1784 struct mvneta_rx_desc *rx_desc) 1823 struct mvneta_rx_desc *rx_desc,
1824 struct mvneta_rx_queue *rxq)
1785 1825
1786{ 1826{
1787 dma_addr_t phys_addr; 1827 dma_addr_t phys_addr;
@@ -1799,7 +1839,8 @@ static int mvneta_rx_refill(struct mvneta_port *pp,
1799 return -ENOMEM; 1839 return -ENOMEM;
1800 } 1840 }
1801 1841
1802 mvneta_rx_desc_fill(rx_desc, phys_addr, (u32)data); 1842 phys_addr += pp->rx_offset_correction;
1843 mvneta_rx_desc_fill(rx_desc, phys_addr, data, rxq);
1803 return 0; 1844 return 0;
1804} 1845}
1805 1846
@@ -1861,7 +1902,7 @@ static void mvneta_rxq_drop_pkts(struct mvneta_port *pp,
1861 1902
1862 for (i = 0; i < rxq->size; i++) { 1903 for (i = 0; i < rxq->size; i++) {
1863 struct mvneta_rx_desc *rx_desc = rxq->descs + i; 1904 struct mvneta_rx_desc *rx_desc = rxq->descs + i;
1864 void *data = (void *)rx_desc->buf_cookie; 1905 void *data = rxq->buf_virt_addr[i];
1865 1906
1866 dma_unmap_single(pp->dev->dev.parent, rx_desc->buf_phys_addr, 1907 dma_unmap_single(pp->dev->dev.parent, rx_desc->buf_phys_addr,
1867 MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE); 1908 MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE);
@@ -1894,12 +1935,13 @@ static int mvneta_rx_swbm(struct mvneta_port *pp, int rx_todo,
1894 unsigned char *data; 1935 unsigned char *data;
1895 dma_addr_t phys_addr; 1936 dma_addr_t phys_addr;
1896 u32 rx_status, frag_size; 1937 u32 rx_status, frag_size;
1897 int rx_bytes, err; 1938 int rx_bytes, err, index;
1898 1939
1899 rx_done++; 1940 rx_done++;
1900 rx_status = rx_desc->status; 1941 rx_status = rx_desc->status;
1901 rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE); 1942 rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE);
1902 data = (unsigned char *)rx_desc->buf_cookie; 1943 index = rx_desc - rxq->descs;
1944 data = rxq->buf_virt_addr[index];
1903 phys_addr = rx_desc->buf_phys_addr; 1945 phys_addr = rx_desc->buf_phys_addr;
1904 1946
1905 if (!mvneta_rxq_desc_is_first_last(rx_status) || 1947 if (!mvneta_rxq_desc_is_first_last(rx_status) ||
@@ -1918,7 +1960,7 @@ err_drop_frame:
1918 goto err_drop_frame; 1960 goto err_drop_frame;
1919 1961
1920 dma_sync_single_range_for_cpu(dev->dev.parent, 1962 dma_sync_single_range_for_cpu(dev->dev.parent,
1921 rx_desc->buf_phys_addr, 1963 phys_addr,
1922 MVNETA_MH_SIZE + NET_SKB_PAD, 1964 MVNETA_MH_SIZE + NET_SKB_PAD,
1923 rx_bytes, 1965 rx_bytes,
1924 DMA_FROM_DEVICE); 1966 DMA_FROM_DEVICE);
@@ -1938,7 +1980,7 @@ err_drop_frame:
1938 } 1980 }
1939 1981
1940 /* Refill processing */ 1982 /* Refill processing */
1941 err = mvneta_rx_refill(pp, rx_desc); 1983 err = mvneta_rx_refill(pp, rx_desc, rxq);
1942 if (err) { 1984 if (err) {
1943 netdev_err(dev, "Linux processing - Can't refill\n"); 1985 netdev_err(dev, "Linux processing - Can't refill\n");
1944 rxq->missed++; 1986 rxq->missed++;
@@ -2020,7 +2062,7 @@ static int mvneta_rx_hwbm(struct mvneta_port *pp, int rx_todo,
2020 rx_done++; 2062 rx_done++;
2021 rx_status = rx_desc->status; 2063 rx_status = rx_desc->status;
2022 rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE); 2064 rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE);
2023 data = (unsigned char *)rx_desc->buf_cookie; 2065 data = (u8 *)(uintptr_t)rx_desc->buf_cookie;
2024 phys_addr = rx_desc->buf_phys_addr; 2066 phys_addr = rx_desc->buf_phys_addr;
2025 pool_id = MVNETA_RX_GET_BM_POOL_ID(rx_desc); 2067 pool_id = MVNETA_RX_GET_BM_POOL_ID(rx_desc);
2026 bm_pool = &pp->bm_priv->bm_pools[pool_id]; 2068 bm_pool = &pp->bm_priv->bm_pools[pool_id];
@@ -2610,6 +2652,17 @@ static void mvneta_set_rx_mode(struct net_device *dev)
2610/* Interrupt handling - the callback for request_irq() */ 2652/* Interrupt handling - the callback for request_irq() */
2611static irqreturn_t mvneta_isr(int irq, void *dev_id) 2653static irqreturn_t mvneta_isr(int irq, void *dev_id)
2612{ 2654{
2655 struct mvneta_port *pp = (struct mvneta_port *)dev_id;
2656
2657 mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
2658 napi_schedule(&pp->napi);
2659
2660 return IRQ_HANDLED;
2661}
2662
2663/* Interrupt handling - the callback for request_percpu_irq() */
2664static irqreturn_t mvneta_percpu_isr(int irq, void *dev_id)
2665{
2613 struct mvneta_pcpu_port *port = (struct mvneta_pcpu_port *)dev_id; 2666 struct mvneta_pcpu_port *port = (struct mvneta_pcpu_port *)dev_id;
2614 2667
2615 disable_percpu_irq(port->pp->dev->irq); 2668 disable_percpu_irq(port->pp->dev->irq);
@@ -2657,7 +2710,7 @@ static int mvneta_poll(struct napi_struct *napi, int budget)
2657 struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports); 2710 struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports);
2658 2711
2659 if (!netif_running(pp->dev)) { 2712 if (!netif_running(pp->dev)) {
2660 napi_complete(&port->napi); 2713 napi_complete(napi);
2661 return rx_done; 2714 return rx_done;
2662 } 2715 }
2663 2716
@@ -2686,7 +2739,8 @@ static int mvneta_poll(struct napi_struct *napi, int budget)
2686 */ 2739 */
2687 rx_queue = fls(((cause_rx_tx >> 8) & 0xff)); 2740 rx_queue = fls(((cause_rx_tx >> 8) & 0xff));
2688 2741
2689 cause_rx_tx |= port->cause_rx_tx; 2742 cause_rx_tx |= pp->neta_armada3700 ? pp->cause_rx_tx :
2743 port->cause_rx_tx;
2690 2744
2691 if (rx_queue) { 2745 if (rx_queue) {
2692 rx_queue = rx_queue - 1; 2746 rx_queue = rx_queue - 1;
@@ -2700,11 +2754,27 @@ static int mvneta_poll(struct napi_struct *napi, int budget)
2700 2754
2701 if (budget > 0) { 2755 if (budget > 0) {
2702 cause_rx_tx = 0; 2756 cause_rx_tx = 0;
2703 napi_complete(&port->napi); 2757 napi_complete(napi);
2704 enable_percpu_irq(pp->dev->irq, 0); 2758
2759 if (pp->neta_armada3700) {
2760 unsigned long flags;
2761
2762 local_irq_save(flags);
2763 mvreg_write(pp, MVNETA_INTR_NEW_MASK,
2764 MVNETA_RX_INTR_MASK(rxq_number) |
2765 MVNETA_TX_INTR_MASK(txq_number) |
2766 MVNETA_MISCINTR_INTR_MASK);
2767 local_irq_restore(flags);
2768 } else {
2769 enable_percpu_irq(pp->dev->irq, 0);
2770 }
2705 } 2771 }
2706 2772
2707 port->cause_rx_tx = cause_rx_tx; 2773 if (pp->neta_armada3700)
2774 pp->cause_rx_tx = cause_rx_tx;
2775 else
2776 port->cause_rx_tx = cause_rx_tx;
2777
2708 return rx_done; 2778 return rx_done;
2709} 2779}
2710 2780
@@ -2716,7 +2786,7 @@ static int mvneta_rxq_fill(struct mvneta_port *pp, struct mvneta_rx_queue *rxq,
2716 2786
2717 for (i = 0; i < num; i++) { 2787 for (i = 0; i < num; i++) {
2718 memset(rxq->descs + i, 0, sizeof(struct mvneta_rx_desc)); 2788 memset(rxq->descs + i, 0, sizeof(struct mvneta_rx_desc));
2719 if (mvneta_rx_refill(pp, rxq->descs + i) != 0) { 2789 if (mvneta_rx_refill(pp, rxq->descs + i, rxq) != 0) {
2720 netdev_err(pp->dev, "%s:rxq %d, %d of %d buffs filled\n", 2790 netdev_err(pp->dev, "%s:rxq %d, %d of %d buffs filled\n",
2721 __func__, rxq->id, i, num); 2791 __func__, rxq->id, i, num);
2722 break; 2792 break;
@@ -2773,7 +2843,7 @@ static int mvneta_rxq_init(struct mvneta_port *pp,
2773 mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), rxq->size); 2843 mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), rxq->size);
2774 2844
2775 /* Set Offset */ 2845 /* Set Offset */
2776 mvneta_rxq_offset_set(pp, rxq, NET_SKB_PAD); 2846 mvneta_rxq_offset_set(pp, rxq, NET_SKB_PAD - pp->rx_offset_correction);
2777 2847
2778 /* Set coalescing pkts and time */ 2848 /* Set coalescing pkts and time */
2779 mvneta_rx_pkts_coal_set(pp, rxq, rxq->pkts_coal); 2849 mvneta_rx_pkts_coal_set(pp, rxq, rxq->pkts_coal);
@@ -2784,14 +2854,14 @@ static int mvneta_rxq_init(struct mvneta_port *pp,
2784 mvneta_rxq_buf_size_set(pp, rxq, 2854 mvneta_rxq_buf_size_set(pp, rxq,
2785 MVNETA_RX_BUF_SIZE(pp->pkt_size)); 2855 MVNETA_RX_BUF_SIZE(pp->pkt_size));
2786 mvneta_rxq_bm_disable(pp, rxq); 2856 mvneta_rxq_bm_disable(pp, rxq);
2857 mvneta_rxq_fill(pp, rxq, rxq->size);
2787 } else { 2858 } else {
2788 mvneta_rxq_bm_enable(pp, rxq); 2859 mvneta_rxq_bm_enable(pp, rxq);
2789 mvneta_rxq_long_pool_set(pp, rxq); 2860 mvneta_rxq_long_pool_set(pp, rxq);
2790 mvneta_rxq_short_pool_set(pp, rxq); 2861 mvneta_rxq_short_pool_set(pp, rxq);
2862 mvneta_rxq_non_occup_desc_add(pp, rxq, rxq->size);
2791 } 2863 }
2792 2864
2793 mvneta_rxq_fill(pp, rxq, rxq->size);
2794
2795 return 0; 2865 return 0;
2796} 2866}
2797 2867
@@ -2974,11 +3044,16 @@ static void mvneta_start_dev(struct mvneta_port *pp)
2974 /* start the Rx/Tx activity */ 3044 /* start the Rx/Tx activity */
2975 mvneta_port_enable(pp); 3045 mvneta_port_enable(pp);
2976 3046
2977 /* Enable polling on the port */ 3047 if (!pp->neta_armada3700) {
2978 for_each_online_cpu(cpu) { 3048 /* Enable polling on the port */
2979 struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); 3049 for_each_online_cpu(cpu) {
3050 struct mvneta_pcpu_port *port =
3051 per_cpu_ptr(pp->ports, cpu);
2980 3052
2981 napi_enable(&port->napi); 3053 napi_enable(&port->napi);
3054 }
3055 } else {
3056 napi_enable(&pp->napi);
2982 } 3057 }
2983 3058
2984 /* Unmask interrupts. It has to be done from each CPU */ 3059 /* Unmask interrupts. It has to be done from each CPU */
@@ -3000,10 +3075,15 @@ static void mvneta_stop_dev(struct mvneta_port *pp)
3000 3075
3001 phy_stop(ndev->phydev); 3076 phy_stop(ndev->phydev);
3002 3077
3003 for_each_online_cpu(cpu) { 3078 if (!pp->neta_armada3700) {
3004 struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); 3079 for_each_online_cpu(cpu) {
3080 struct mvneta_pcpu_port *port =
3081 per_cpu_ptr(pp->ports, cpu);
3005 3082
3006 napi_disable(&port->napi); 3083 napi_disable(&port->napi);
3084 }
3085 } else {
3086 napi_disable(&pp->napi);
3007 } 3087 }
3008 3088
3009 netif_carrier_off(pp->dev); 3089 netif_carrier_off(pp->dev);
@@ -3413,31 +3493,37 @@ static int mvneta_open(struct net_device *dev)
3413 goto err_cleanup_rxqs; 3493 goto err_cleanup_rxqs;
3414 3494
3415 /* Connect to port interrupt line */ 3495 /* Connect to port interrupt line */
3416 ret = request_percpu_irq(pp->dev->irq, mvneta_isr, 3496 if (pp->neta_armada3700)
3417 MVNETA_DRIVER_NAME, pp->ports); 3497 ret = request_irq(pp->dev->irq, mvneta_isr, 0,
3498 dev->name, pp);
3499 else
3500 ret = request_percpu_irq(pp->dev->irq, mvneta_percpu_isr,
3501 dev->name, pp->ports);
3418 if (ret) { 3502 if (ret) {
3419 netdev_err(pp->dev, "cannot request irq %d\n", pp->dev->irq); 3503 netdev_err(pp->dev, "cannot request irq %d\n", pp->dev->irq);
3420 goto err_cleanup_txqs; 3504 goto err_cleanup_txqs;
3421 } 3505 }
3422 3506
3423 /* Enable per-CPU interrupt on all the CPU to handle our RX 3507 if (!pp->neta_armada3700) {
3424 * queue interrupts 3508 /* Enable per-CPU interrupt on all the CPU to handle our RX
3425 */ 3509 * queue interrupts
3426 on_each_cpu(mvneta_percpu_enable, pp, true); 3510 */
3511 on_each_cpu(mvneta_percpu_enable, pp, true);
3427 3512
3428 pp->is_stopped = false; 3513 pp->is_stopped = false;
3429 /* Register a CPU notifier to handle the case where our CPU 3514 /* Register a CPU notifier to handle the case where our CPU
3430 * might be taken offline. 3515 * might be taken offline.
3431 */ 3516 */
3432 ret = cpuhp_state_add_instance_nocalls(online_hpstate, 3517 ret = cpuhp_state_add_instance_nocalls(online_hpstate,
3433 &pp->node_online); 3518 &pp->node_online);
3434 if (ret) 3519 if (ret)
3435 goto err_free_irq; 3520 goto err_free_irq;
3436 3521
3437 ret = cpuhp_state_add_instance_nocalls(CPUHP_NET_MVNETA_DEAD, 3522 ret = cpuhp_state_add_instance_nocalls(CPUHP_NET_MVNETA_DEAD,
3438 &pp->node_dead); 3523 &pp->node_dead);
3439 if (ret) 3524 if (ret)
3440 goto err_free_online_hp; 3525 goto err_free_online_hp;
3526 }
3441 3527
3442 /* In default link is down */ 3528 /* In default link is down */
3443 netif_carrier_off(pp->dev); 3529 netif_carrier_off(pp->dev);
@@ -3453,13 +3539,20 @@ static int mvneta_open(struct net_device *dev)
3453 return 0; 3539 return 0;
3454 3540
3455err_free_dead_hp: 3541err_free_dead_hp:
3456 cpuhp_state_remove_instance_nocalls(CPUHP_NET_MVNETA_DEAD, 3542 if (!pp->neta_armada3700)
3457 &pp->node_dead); 3543 cpuhp_state_remove_instance_nocalls(CPUHP_NET_MVNETA_DEAD,
3544 &pp->node_dead);
3458err_free_online_hp: 3545err_free_online_hp:
3459 cpuhp_state_remove_instance_nocalls(online_hpstate, &pp->node_online); 3546 if (!pp->neta_armada3700)
3547 cpuhp_state_remove_instance_nocalls(online_hpstate,
3548 &pp->node_online);
3460err_free_irq: 3549err_free_irq:
3461 on_each_cpu(mvneta_percpu_disable, pp, true); 3550 if (pp->neta_armada3700) {
3462 free_percpu_irq(pp->dev->irq, pp->ports); 3551 free_irq(pp->dev->irq, pp);
3552 } else {
3553 on_each_cpu(mvneta_percpu_disable, pp, true);
3554 free_percpu_irq(pp->dev->irq, pp->ports);
3555 }
3463err_cleanup_txqs: 3556err_cleanup_txqs:
3464 mvneta_cleanup_txqs(pp); 3557 mvneta_cleanup_txqs(pp);
3465err_cleanup_rxqs: 3558err_cleanup_rxqs:
@@ -3472,23 +3565,30 @@ static int mvneta_stop(struct net_device *dev)
3472{ 3565{
3473 struct mvneta_port *pp = netdev_priv(dev); 3566 struct mvneta_port *pp = netdev_priv(dev);
3474 3567
3475 /* Inform that we are stopping so we don't want to setup the 3568 if (!pp->neta_armada3700) {
3476 * driver for new CPUs in the notifiers. The code of the 3569 /* Inform that we are stopping so we don't want to setup the
3477 * notifier for CPU online is protected by the same spinlock, 3570 * driver for new CPUs in the notifiers. The code of the
3478 * so when we get the lock, the notifer work is done. 3571 * notifier for CPU online is protected by the same spinlock,
3479 */ 3572 * so when we get the lock, the notifer work is done.
3480 spin_lock(&pp->lock); 3573 */
3481 pp->is_stopped = true; 3574 spin_lock(&pp->lock);
3482 spin_unlock(&pp->lock); 3575 pp->is_stopped = true;
3576 spin_unlock(&pp->lock);
3483 3577
3484 mvneta_stop_dev(pp); 3578 mvneta_stop_dev(pp);
3485 mvneta_mdio_remove(pp); 3579 mvneta_mdio_remove(pp);
3486 3580
3487 cpuhp_state_remove_instance_nocalls(online_hpstate, &pp->node_online); 3581 cpuhp_state_remove_instance_nocalls(online_hpstate, &pp->node_online);
3488 cpuhp_state_remove_instance_nocalls(CPUHP_NET_MVNETA_DEAD, 3582 cpuhp_state_remove_instance_nocalls(CPUHP_NET_MVNETA_DEAD,
3489 &pp->node_dead); 3583 &pp->node_dead);
3490 on_each_cpu(mvneta_percpu_disable, pp, true); 3584 on_each_cpu(mvneta_percpu_disable, pp, true);
3491 free_percpu_irq(dev->irq, pp->ports); 3585 free_percpu_irq(dev->irq, pp->ports);
3586 } else {
3587 mvneta_stop_dev(pp);
3588 mvneta_mdio_remove(pp);
3589 free_irq(dev->irq, pp);
3590 }
3591
3492 mvneta_cleanup_rxqs(pp); 3592 mvneta_cleanup_rxqs(pp);
3493 mvneta_cleanup_txqs(pp); 3593 mvneta_cleanup_txqs(pp);
3494 3594
@@ -3767,6 +3867,11 @@ static int mvneta_ethtool_set_rxfh(struct net_device *dev, const u32 *indir,
3767 const u8 *key, const u8 hfunc) 3867 const u8 *key, const u8 hfunc)
3768{ 3868{
3769 struct mvneta_port *pp = netdev_priv(dev); 3869 struct mvneta_port *pp = netdev_priv(dev);
3870
3871 /* Current code for Armada 3700 doesn't support RSS features yet */
3872 if (pp->neta_armada3700)
3873 return -EOPNOTSUPP;
3874
3770 /* We require at least one supported parameter to be changed 3875 /* We require at least one supported parameter to be changed
3771 * and no change in any of the unsupported parameters 3876 * and no change in any of the unsupported parameters
3772 */ 3877 */
@@ -3787,6 +3892,10 @@ static int mvneta_ethtool_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
3787{ 3892{
3788 struct mvneta_port *pp = netdev_priv(dev); 3893 struct mvneta_port *pp = netdev_priv(dev);
3789 3894
3895 /* Current code for Armada 3700 doesn't support RSS features yet */
3896 if (pp->neta_armada3700)
3897 return -EOPNOTSUPP;
3898
3790 if (hfunc) 3899 if (hfunc)
3791 *hfunc = ETH_RSS_HASH_TOP; 3900 *hfunc = ETH_RSS_HASH_TOP;
3792 3901
@@ -3865,6 +3974,11 @@ static int mvneta_init(struct device *dev, struct mvneta_port *pp)
3865 rxq->size = pp->rx_ring_size; 3974 rxq->size = pp->rx_ring_size;
3866 rxq->pkts_coal = MVNETA_RX_COAL_PKTS; 3975 rxq->pkts_coal = MVNETA_RX_COAL_PKTS;
3867 rxq->time_coal = MVNETA_RX_COAL_USEC; 3976 rxq->time_coal = MVNETA_RX_COAL_USEC;
3977 rxq->buf_virt_addr = devm_kmalloc(pp->dev->dev.parent,
3978 rxq->size * sizeof(void *),
3979 GFP_KERNEL);
3980 if (!rxq->buf_virt_addr)
3981 return -ENOMEM;
3868 } 3982 }
3869 3983
3870 return 0; 3984 return 0;
@@ -3889,16 +4003,29 @@ static void mvneta_conf_mbus_windows(struct mvneta_port *pp,
3889 win_enable = 0x3f; 4003 win_enable = 0x3f;
3890 win_protect = 0; 4004 win_protect = 0;
3891 4005
3892 for (i = 0; i < dram->num_cs; i++) { 4006 if (dram) {
3893 const struct mbus_dram_window *cs = dram->cs + i; 4007 for (i = 0; i < dram->num_cs; i++) {
3894 mvreg_write(pp, MVNETA_WIN_BASE(i), (cs->base & 0xffff0000) | 4008 const struct mbus_dram_window *cs = dram->cs + i;
3895 (cs->mbus_attr << 8) | dram->mbus_dram_target_id); 4009
4010 mvreg_write(pp, MVNETA_WIN_BASE(i),
4011 (cs->base & 0xffff0000) |
4012 (cs->mbus_attr << 8) |
4013 dram->mbus_dram_target_id);
3896 4014
3897 mvreg_write(pp, MVNETA_WIN_SIZE(i), 4015 mvreg_write(pp, MVNETA_WIN_SIZE(i),
3898 (cs->size - 1) & 0xffff0000); 4016 (cs->size - 1) & 0xffff0000);
3899 4017
3900 win_enable &= ~(1 << i); 4018 win_enable &= ~(1 << i);
3901 win_protect |= 3 << (2 * i); 4019 win_protect |= 3 << (2 * i);
4020 }
4021 } else {
4022 /* For Armada3700 open default 4GB Mbus window, leaving
4023 * arbitration of target/attribute to a different layer
4024 * of configuration.
4025 */
4026 mvreg_write(pp, MVNETA_WIN_SIZE(0), 0xffff0000);
4027 win_enable &= ~BIT(0);
4028 win_protect = 3;
3902 } 4029 }
3903 4030
3904 mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, win_enable); 4031 mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, win_enable);
@@ -4019,8 +4146,19 @@ static int mvneta_probe(struct platform_device *pdev)
4019 4146
4020 pp->rxq_def = rxq_def; 4147 pp->rxq_def = rxq_def;
4021 4148
4149 /* Set RX packet offset correction for platforms, whose
4150 * NET_SKB_PAD, exceeds 64B. It should be 64B for 64-bit
4151 * platforms and 0B for 32-bit ones.
4152 */
4153 pp->rx_offset_correction =
4154 max(0, NET_SKB_PAD - MVNETA_RX_PKT_OFFSET_CORRECTION);
4155
4022 pp->indir[0] = rxq_def; 4156 pp->indir[0] = rxq_def;
4023 4157
4158 /* Get special SoC configurations */
4159 if (of_device_is_compatible(dn, "marvell,armada-3700-neta"))
4160 pp->neta_armada3700 = true;
4161
4024 pp->clk = devm_clk_get(&pdev->dev, "core"); 4162 pp->clk = devm_clk_get(&pdev->dev, "core");
4025 if (IS_ERR(pp->clk)) 4163 if (IS_ERR(pp->clk))
4026 pp->clk = devm_clk_get(&pdev->dev, NULL); 4164 pp->clk = devm_clk_get(&pdev->dev, NULL);
@@ -4088,7 +4226,11 @@ static int mvneta_probe(struct platform_device *pdev)
4088 pp->tx_csum_limit = tx_csum_limit; 4226 pp->tx_csum_limit = tx_csum_limit;
4089 4227
4090 dram_target_info = mv_mbus_dram_info(); 4228 dram_target_info = mv_mbus_dram_info();
4091 if (dram_target_info) 4229 /* Armada3700 requires setting default configuration of Mbus
4230 * windows, however without using filled mbus_dram_target_info
4231 * structure.
4232 */
4233 if (dram_target_info || pp->neta_armada3700)
4092 mvneta_conf_mbus_windows(pp, dram_target_info); 4234 mvneta_conf_mbus_windows(pp, dram_target_info);
4093 4235
4094 pp->tx_ring_size = MVNETA_MAX_TXD; 4236 pp->tx_ring_size = MVNETA_MAX_TXD;
@@ -4121,11 +4263,20 @@ static int mvneta_probe(struct platform_device *pdev)
4121 goto err_netdev; 4263 goto err_netdev;
4122 } 4264 }
4123 4265
4124 for_each_present_cpu(cpu) { 4266 /* Armada3700 network controller does not support per-cpu
4125 struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); 4267 * operation, so only single NAPI should be initialized.
4268 */
4269 if (pp->neta_armada3700) {
4270 netif_napi_add(dev, &pp->napi, mvneta_poll, NAPI_POLL_WEIGHT);
4271 } else {
4272 for_each_present_cpu(cpu) {
4273 struct mvneta_pcpu_port *port =
4274 per_cpu_ptr(pp->ports, cpu);
4126 4275
4127 netif_napi_add(dev, &port->napi, mvneta_poll, NAPI_POLL_WEIGHT); 4276 netif_napi_add(dev, &port->napi, mvneta_poll,
4128 port->pp = pp; 4277 NAPI_POLL_WEIGHT);
4278 port->pp = pp;
4279 }
4129 } 4280 }
4130 4281
4131 dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO; 4282 dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
@@ -4210,6 +4361,7 @@ static int mvneta_remove(struct platform_device *pdev)
4210static const struct of_device_id mvneta_match[] = { 4361static const struct of_device_id mvneta_match[] = {
4211 { .compatible = "marvell,armada-370-neta" }, 4362 { .compatible = "marvell,armada-370-neta" },
4212 { .compatible = "marvell,armada-xp-neta" }, 4363 { .compatible = "marvell,armada-xp-neta" },
4364 { .compatible = "marvell,armada-3700-neta" },
4213 { } 4365 { }
4214}; 4366};
4215MODULE_DEVICE_TABLE(of, mvneta_match); 4367MODULE_DEVICE_TABLE(of, mvneta_match);