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authorPrike Liang <Prike.Liang@amd.com>2019-09-11 01:15:17 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-09-17 15:37:58 -0400
commit4f3a2c10772581840d11b76b5c1147a3767710f7 (patch)
tree30861918a4fb95f8a97389069af7ee167980ebe1
parent73d8e6c7b841d9bf298c8928f228fb433676635c (diff)
drm/amd/amdgpu: power up sdma engine when S3 resume back
The sdma_v4 should be ungated when the IP resume back, otherwise it will hang up and resume time out error. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c10
-rw-r--r--drivers/gpu/drm/amd/powerplay/amdgpu_smu.c3
3 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 61bd10310604..5803fcbae22f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -948,6 +948,7 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, uint32_t block
948 case AMD_IP_BLOCK_TYPE_UVD: 948 case AMD_IP_BLOCK_TYPE_UVD:
949 case AMD_IP_BLOCK_TYPE_VCN: 949 case AMD_IP_BLOCK_TYPE_VCN:
950 case AMD_IP_BLOCK_TYPE_VCE: 950 case AMD_IP_BLOCK_TYPE_VCE:
951 case AMD_IP_BLOCK_TYPE_SDMA:
951 if (swsmu) 952 if (swsmu)
952 ret = smu_dpm_set_power_gate(&adev->smu, block_type, gate); 953 ret = smu_dpm_set_power_gate(&adev->smu, block_type, gate);
953 else 954 else
@@ -956,7 +957,6 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, uint32_t block
956 break; 957 break;
957 case AMD_IP_BLOCK_TYPE_GMC: 958 case AMD_IP_BLOCK_TYPE_GMC:
958 case AMD_IP_BLOCK_TYPE_ACP: 959 case AMD_IP_BLOCK_TYPE_ACP:
959 case AMD_IP_BLOCK_TYPE_SDMA:
960 ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu( 960 ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu(
961 (adev)->powerplay.pp_handle, block_type, gate)); 961 (adev)->powerplay.pp_handle, block_type, gate));
962 break; 962 break;
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index ff18b3a57892..78452cf0115d 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1889,8 +1889,9 @@ static int sdma_v4_0_hw_init(void *handle)
1889 int r; 1889 int r;
1890 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 1890 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
1891 1891
1892 if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs && 1892 if ((adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs &&
1893 adev->powerplay.pp_funcs->set_powergating_by_smu) 1893 adev->powerplay.pp_funcs->set_powergating_by_smu) ||
1894 adev->asic_type == CHIP_RENOIR)
1894 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false); 1895 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);
1895 1896
1896 if (!amdgpu_sriov_vf(adev)) 1897 if (!amdgpu_sriov_vf(adev))
@@ -1917,8 +1918,9 @@ static int sdma_v4_0_hw_fini(void *handle)
1917 sdma_v4_0_ctx_switch_enable(adev, false); 1918 sdma_v4_0_ctx_switch_enable(adev, false);
1918 sdma_v4_0_enable(adev, false); 1919 sdma_v4_0_enable(adev, false);
1919 1920
1920 if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs 1921 if ((adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
1921 && adev->powerplay.pp_funcs->set_powergating_by_smu) 1922 && adev->powerplay.pp_funcs->set_powergating_by_smu) ||
1923 adev->asic_type == CHIP_RENOIR)
1922 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true); 1924 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);
1923 1925
1924 return 0; 1926 return 0;
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 22f3c60d380f..33960fb38a5d 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -354,6 +354,9 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
354 case AMD_IP_BLOCK_TYPE_GFX: 354 case AMD_IP_BLOCK_TYPE_GFX:
355 ret = smu_gfx_off_control(smu, gate); 355 ret = smu_gfx_off_control(smu, gate);
356 break; 356 break;
357 case AMD_IP_BLOCK_TYPE_SDMA:
358 ret = smu_powergate_sdma(smu, gate);
359 break;
357 default: 360 default:
358 break; 361 break;
359 } 362 }