Merge tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64

Allwinner arm64 DT changes for 4.10 Support for the Allwinner A64, their first armv8 SoC. * tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: arm64: dts: add Pine64 support Documentation: devicetree: add vendor prefix for Pine64 arm64: dts: add Allwinner A64 SoC .dtsi Signed-off-by: Olof Johansson <olof@lixom.net>
author: Olof Johansson <olof@lixom.net> 2016-11-18 19:40:48 -0500
committer: Olof Johansson <olof@lixom.net> 2016-11-18 19:41:14 -0500
commit: 4f23683cedfd232ba6117468555315039785de79 (patch)
tree: 7c8b60f9d66114cbc01a80412035b25996a4ce1b
parent: e702ddd3e8f8db76e78af1b2bba857ad4c991270 (diff)
parent: 4e3886081848b7ea16452a92c4324acaab644d49 (diff)
8 files changed, 396 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt
index 3975d0a0e4c2..4d6467cc2aa2 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.txt
+++ b/Documentation/devicetree/bindings/arm/sunxi.txt
@@ -14,4 +14,5 @@ using one of the following compatible strings:
  allwinner,sun8i-a83t
  allwinner,sun8i-h3
  allwinner,sun9i-a80
+  allwinner,sun50i-a64
  nextthing,gr8
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index f0a48ea78659..6edd2fe46275 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -208,6 +208,7 @@ parade	Parade Technologies Inc.
 pericom Pericom Technology Inc.
 phytec  PHYTEC Messtechnik GmbH
 picochip        Picochip Ltd
+pine64  Pine64
 pixcir  PIXCIR MICROELECTRONICS Co., Ltd
 plathome        Plat'Home Co., Ltd.
 plda    PLDA
diff --git a/MAINTAINERS b/MAINTAINERS
index 3d838cf49f81..61e164cc9fb6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1019,6 +1019,7 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Maintained
 N:      sun[x456789]i
 F:      arch/arm/boot/dts/ntc-gr8*
+F:      arch/arm64/boot/dts/allwinner/
 ARM/Allwinner SoC Clock Support
 M:      Emilio López <emilio@elopez.com.ar>
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 6684f97c2722..080232b0270e 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,4 +1,5 @@
 dts-dirs += al
+dts-dirs += allwinner
 dts-dirs += altera
 dts-dirs += amd
 dts-dirs += amlogic
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
new file mode 100644
index 000000000000..1e29a5ae8282
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
+always          := $(dtb-y)
+subdir-y        := $(dts-dirs)
+clean-files     := *.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
new file mode 100644
index 000000000000..790d14daaa6a
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include "sun50i-a64-pine64.dts"
+/ {
+        model = "Pine64+";
+        compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
+        /* TODO: Camera, Ethernet PHY, touchscreen, etc. */
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
new file mode 100644
index 000000000000..47095909d9d6
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+#include "sun50i-a64.dtsi"
+/ {
+        model = "Pine64";
+        compatible = "pine64,pine64", "allwinner,sun50i-a64";
+        aliases {
+                serial0 = &uart0;
+        };
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+};
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins_a>;
+        status = "okay";
+};
+&i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins>;
+        status = "okay";
+};
+&i2c1_pins {
+        bias-pull-up;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
new file mode 100644
index 000000000000..3d70be3a0049
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -0,0 +1,263 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ * based on the Allwinner H3 dtsi:
+ *    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/reset/sun50i-a64-ccu.h>
+/ {
+        interrupt-parent = <&gic>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                cpu0: cpu@0 {
+                        compatible = "arm,cortex-a53", "arm,armv8";
+                        device_type = "cpu";
+                        reg = <0>;
+                        enable-method = "psci";
+                };
+                cpu1: cpu@1 {
+                        compatible = "arm,cortex-a53", "arm,armv8";
+                        device_type = "cpu";
+                        reg = <1>;
+                        enable-method = "psci";
+                };
+                cpu2: cpu@2 {
+                        compatible = "arm,cortex-a53", "arm,armv8";
+                        device_type = "cpu";
+                        reg = <2>;
+                        enable-method = "psci";
+                };
+                cpu3: cpu@3 {
+                        compatible = "arm,cortex-a53", "arm,armv8";
+                        device_type = "cpu";
+                        reg = <3>;
+                        enable-method = "psci";
+                };
+        };
+        osc24M: osc24M_clk {
+                #clock-cells = <0>;
+                compatible = "fixed-clock";
+                clock-frequency = <24000000>;
+                clock-output-names = "osc24M";
+        };
+        osc32k: osc32k_clk {
+                #clock-cells = <0>;
+                compatible = "fixed-clock";
+                clock-frequency = <32768>;
+                clock-output-names = "osc32k";
+        };
+        psci {
+                compatible = "arm,psci-0.2";
+                method = "smc";
+        };
+        timer {
+                compatible = "arm,armv8-timer";
+                interrupts = <GIC_PPI 13
+                        (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 14
+                        (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 11
+                        (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                             <GIC_PPI 10
+                        (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+        };
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                ccu: clock@01c20000 {
+                        compatible = "allwinner,sun50i-a64-ccu";
+                        reg = <0x01c20000 0x400>;
+                        clocks = <&osc24M>, <&osc32k>;
+                        clock-names = "hosc", "losc";
+                        #clock-cells = <1>;
+                        #reset-cells = <1>;
+                };
+                pio: pinctrl@1c20800 {
+                        compatible = "allwinner,sun50i-a64-pinctrl";
+                        reg = <0x01c20800 0x400>;
+                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_PIO>;
+                        gpio-controller;
+                        #gpio-cells = <3>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        i2c1_pins: i2c1_pins {
+                                pins = "PH2", "PH3";
+                                function = "i2c1";
+                        };
+                        uart0_pins_a: uart0@0 {
+                                pins = "PB8", "PB9";
+                                function = "uart0";
+                        };
+                };
+                uart0: serial@1c28000 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28000 0x400>;
+                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&ccu CLK_BUS_UART0>;
+                        resets = <&ccu RST_BUS_UART0>;
+                        status = "disabled";
+                };
+                uart1: serial@1c28400 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28400 0x400>;
+                        interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&ccu CLK_BUS_UART1>;
+                        resets = <&ccu RST_BUS_UART1>;
+                        status = "disabled";
+                };
+                uart2: serial@1c28800 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28800 0x400>;
+                        interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&ccu CLK_BUS_UART2>;
+                        resets = <&ccu RST_BUS_UART2>;
+                        status = "disabled";
+                };
+                uart3: serial@1c28c00 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28c00 0x400>;
+                        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&ccu CLK_BUS_UART3>;
+                        resets = <&ccu RST_BUS_UART3>;
+                        status = "disabled";
+                };
+                uart4: serial@1c29000 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c29000 0x400>;
+                        interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&ccu CLK_BUS_UART4>;
+                        resets = <&ccu RST_BUS_UART4>;
+                        status = "disabled";
+                };
+                i2c0: i2c@1c2ac00 {
+                        compatible = "allwinner,sun6i-a31-i2c";
+                        reg = <0x01c2ac00 0x400>;
+                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_I2C0>;
+                        resets = <&ccu RST_BUS_I2C0>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+                i2c1: i2c@1c2b000 {
+                        compatible = "allwinner,sun6i-a31-i2c";
+                        reg = <0x01c2b000 0x400>;
+                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_I2C1>;
+                        resets = <&ccu RST_BUS_I2C1>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+                i2c2: i2c@1c2b400 {
+                        compatible = "allwinner,sun6i-a31-i2c";
+                        reg = <0x01c2b400 0x400>;
+                        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_I2C2>;
+                        resets = <&ccu RST_BUS_I2C2>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+                gic: interrupt-controller@1c81000 {
+                        compatible = "arm,gic-400";
+                        reg = <0x01c81000 0x1000>,
+                              <0x01c82000 0x2000>,
+                              <0x01c84000 0x2000>,
+                              <0x01c86000 0x2000>;
+                        interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                };
+                rtc: rtc@1f00000 {
+                        compatible = "allwinner,sun6i-a31-rtc";
+                        reg = <0x01f00000 0x54>;
+                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                };
+        };
+};
author	Olof Johansson <olof@lixom.net>	2016-11-18 19:40:48 -0500
committer	Olof Johansson <olof@lixom.net>	2016-11-18 19:41:14 -0500
commit	4f23683cedfd232ba6117468555315039785de79 (patch)
tree	7c8b60f9d66114cbc01a80412035b25996a4ce1b
parent	e702ddd3e8f8db76e78af1b2bba857ad4c991270 (diff)
parent	4e3886081848b7ea16452a92c4324acaab644d49 (diff)

diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt index 3975d0a0e4c2..4d6467cc2aa2 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.txt +++ b/Documentation/devicetree/bindings/arm/sunxi.txt
@@ -14,4 +14,5 @@ using one of the following compatible strings:
14	allwinner,sun8i-a83t	14	allwinner,sun8i-a83t
15	allwinner,sun8i-h3	15	allwinner,sun8i-h3
16	allwinner,sun9i-a80	16	allwinner,sun9i-a80
		17	allwinner,sun50i-a64
17	nextthing,gr8	18	nextthing,gr8


diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index f0a48ea78659..6edd2fe46275 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -208,6 +208,7 @@ parade Parade Technologies Inc.
208	pericom Pericom Technology Inc.	208	pericom Pericom Technology Inc.
209	phytec PHYTEC Messtechnik GmbH	209	phytec PHYTEC Messtechnik GmbH
210	picochip Picochip Ltd	210	picochip Picochip Ltd
		211	pine64 Pine64
211	pixcir PIXCIR MICROELECTRONICS Co., Ltd	212	pixcir PIXCIR MICROELECTRONICS Co., Ltd
212	plathome Plat'Home Co., Ltd.	213	plathome Plat'Home Co., Ltd.
213	plda PLDA	214	plda PLDA


diff --git a/MAINTAINERS b/MAINTAINERS index 3d838cf49f81..61e164cc9fb6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS
@@ -1019,6 +1019,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1019	S: Maintained	1019	S: Maintained
1020	N: sun[x456789]i	1020	N: sun[x456789]i
1021	F: arch/arm/boot/dts/ntc-gr8*	1021	F: arch/arm/boot/dts/ntc-gr8*
		1022	F: arch/arm64/boot/dts/allwinner/
1022		1023
1023	ARM/Allwinner SoC Clock Support	1024	ARM/Allwinner SoC Clock Support
1024	M: Emilio López <emilio@elopez.com.ar>	1025	M: Emilio López <emilio@elopez.com.ar>


diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 6684f97c2722..080232b0270e 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile
@@ -1,4 +1,5 @@
1	dts-dirs += al	1	dts-dirs += al
		2	dts-dirs += allwinner
2	dts-dirs += altera	3	dts-dirs += altera
3	dts-dirs += amd	4	dts-dirs += amd
4	dts-dirs += amlogic	5	dts-dirs += amlogic


diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile new file mode 100644 index 000000000000..1e29a5ae8282 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -0,0 +1,5 @@
		1	dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
		2
		3	always := $(dtb-y)
		4	subdir-y := $(dts-dirs)
		5	clean-files := *.dtb


diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts new file mode 100644 index 000000000000..790d14daaa6a --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -0,0 +1,50 @@
		1	/*
		2	* Copyright (c) 2016 ARM Ltd.
		3	*
		4	* This file is dual-licensed: you can use it either under the terms
		5	* of the GPL or the X11 license, at your option. Note that this dual
		6	* licensing only applies to this file, and not this project as a
		7	* whole.
		8	*
		9	* a) This library is free software; you can redistribute it and/or
		10	* modify it under the terms of the GNU General Public License as
		11	* published by the Free Software Foundation; either version 2 of the
		12	* License, or (at your option) any later version.
		13	*
		14	* This library is distributed in the hope that it will be useful,
		15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		17	* GNU General Public License for more details.
		18	*
		19	* Or, alternatively,
		20	*
		21	* b) Permission is hereby granted, free of charge, to any person
		22	* obtaining a copy of this software and associated documentation
		23	* files (the "Software"), to deal in the Software without
		24	* restriction, including without limitation the rights to use,
		25	* copy, modify, merge, publish, distribute, sublicense, and/or
		26	* sell copies of the Software, and to permit persons to whom the
		27	* Software is furnished to do so, subject to the following
		28	* conditions:
		29	*
		30	* The above copyright notice and this permission notice shall be
		31	* included in all copies or substantial portions of the Software.
		32	*
		33	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		34	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
		35	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		36	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
		37	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
		38	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		39	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		40	* OTHER DEALINGS IN THE SOFTWARE.
		41	*/
		42
		43	#include "sun50i-a64-pine64.dts"
		44
		45	/ {
		46	model = "Pine64+";
		47	compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
		48
		49	/* TODO: Camera, Ethernet PHY, touchscreen, etc. */
		50	};


diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts new file mode 100644 index 000000000000..47095909d9d6 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -0,0 +1,74 @@
		1	/*
		2	* Copyright (c) 2016 ARM Ltd.
		3	*
		4	* This file is dual-licensed: you can use it either under the terms
		5	* of the GPL or the X11 license, at your option. Note that this dual
		6	* licensing only applies to this file, and not this project as a
		7	* whole.
		8	*
		9	* a) This library is free software; you can redistribute it and/or
		10	* modify it under the terms of the GNU General Public License as
		11	* published by the Free Software Foundation; either version 2 of the
		12	* License, or (at your option) any later version.
		13	*
		14	* This library is distributed in the hope that it will be useful,
		15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		17	* GNU General Public License for more details.
		18	*
		19	* Or, alternatively,
		20	*
		21	* b) Permission is hereby granted, free of charge, to any person
		22	* obtaining a copy of this software and associated documentation
		23	* files (the "Software"), to deal in the Software without
		24	* restriction, including without limitation the rights to use,
		25	* copy, modify, merge, publish, distribute, sublicense, and/or
		26	* sell copies of the Software, and to permit persons to whom the
		27	* Software is furnished to do so, subject to the following
		28	* conditions:
		29	*
		30	* The above copyright notice and this permission notice shall be
		31	* included in all copies or substantial portions of the Software.
		32	*
		33	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		34	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
		35	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		36	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
		37	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
		38	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		39	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		40	* OTHER DEALINGS IN THE SOFTWARE.
		41	*/
		42
		43	/dts-v1/;
		44
		45	#include "sun50i-a64.dtsi"
		46
		47	/ {
		48	model = "Pine64";
		49	compatible = "pine64,pine64", "allwinner,sun50i-a64";
		50
		51	aliases {
		52	serial0 = &uart0;
		53	};
		54
		55	chosen {
		56	stdout-path = "serial0:115200n8";
		57	};
		58	};
		59
		60	&uart0 {
		61	pinctrl-names = "default";
		62	pinctrl-0 = <&uart0_pins_a>;
		63	status = "okay";
		64	};
		65
		66	&i2c1 {
		67	pinctrl-names = "default";
		68	pinctrl-0 = <&i2c1_pins>;
		69	status = "okay";
		70	};
		71
		72	&i2c1_pins {
		73	bias-pull-up;
		74	};


diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi new file mode 100644 index 000000000000..3d70be3a0049 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -0,0 +1,263 @@
		1	/*
		2	* Copyright (C) 2016 ARM Ltd.
		3	* based on the Allwinner H3 dtsi:
		4	* Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
		5	*
		6	* This file is dual-licensed: you can use it either under the terms
		7	* of the GPL or the X11 license, at your option. Note that this dual
		8	* licensing only applies to this file, and not this project as a
		9	* whole.
		10	*
		11	* a) This file is free software; you can redistribute it and/or
		12	* modify it under the terms of the GNU General Public License as
		13	* published by the Free Software Foundation; either version 2 of the
		14	* License, or (at your option) any later version.
		15	*
		16	* This file is distributed in the hope that it will be useful,
		17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		19	* GNU General Public License for more details.
		20	*
		21	* Or, alternatively,
		22	*
		23	* b) Permission is hereby granted, free of charge, to any person
		24	* obtaining a copy of this software and associated documentation
		25	* files (the "Software"), to deal in the Software without
		26	* restriction, including without limitation the rights to use,
		27	* copy, modify, merge, publish, distribute, sublicense, and/or
		28	* sell copies of the Software, and to permit persons to whom the
		29	* Software is furnished to do so, subject to the following
		30	* conditions:
		31	*
		32	* The above copyright notice and this permission notice shall be
		33	* included in all copies or substantial portions of the Software.
		34	*
		35	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		36	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
		37	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		38	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
		39	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
		40	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		41	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		42	* OTHER DEALINGS IN THE SOFTWARE.
		43	*/
		44
		45	#include <dt-bindings/clock/sun50i-a64-ccu.h>
		46	#include <dt-bindings/interrupt-controller/arm-gic.h>
		47	#include <dt-bindings/pinctrl/sun4i-a10.h>
		48	#include <dt-bindings/reset/sun50i-a64-ccu.h>
		49
		50	/ {
		51	interrupt-parent = <&gic>;
		52	#address-cells = <1>;
		53	#size-cells = <1>;
		54
		55	cpus {
		56	#address-cells = <1>;
		57	#size-cells = <0>;
		58
		59	cpu0: cpu@0 {
		60	compatible = "arm,cortex-a53", "arm,armv8";
		61	device_type = "cpu";
		62	reg = <0>;
		63	enable-method = "psci";
		64	};
		65
		66	cpu1: cpu@1 {
		67	compatible = "arm,cortex-a53", "arm,armv8";
		68	device_type = "cpu";
		69	reg = <1>;
		70	enable-method = "psci";
		71	};
		72
		73	cpu2: cpu@2 {
		74	compatible = "arm,cortex-a53", "arm,armv8";
		75	device_type = "cpu";
		76	reg = <2>;
		77	enable-method = "psci";
		78	};
		79
		80	cpu3: cpu@3 {
		81	compatible = "arm,cortex-a53", "arm,armv8";
		82	device_type = "cpu";
		83	reg = <3>;
		84	enable-method = "psci";
		85	};
		86	};
		87
		88	osc24M: osc24M_clk {
		89	#clock-cells = <0>;
		90	compatible = "fixed-clock";
		91	clock-frequency = <24000000>;
		92	clock-output-names = "osc24M";
		93	};
		94
		95	osc32k: osc32k_clk {
		96	#clock-cells = <0>;
		97	compatible = "fixed-clock";
		98	clock-frequency = <32768>;
		99	clock-output-names = "osc32k";
		100	};
		101
		102	psci {
		103	compatible = "arm,psci-0.2";
		104	method = "smc";
		105	};
		106
		107	timer {
		108	compatible = "arm,armv8-timer";
		109	interrupts = <GIC_PPI 13
		110	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>,
		111	<GIC_PPI 14
		112	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>,
		113	<GIC_PPI 11
		114	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>,
		115	<GIC_PPI 10
		116	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>;
		117	};
		118
		119	soc {
		120	compatible = "simple-bus";
		121	#address-cells = <1>;
		122	#size-cells = <1>;
		123	ranges;
		124
		125	ccu: clock@01c20000 {
		126	compatible = "allwinner,sun50i-a64-ccu";
		127	reg = <0x01c20000 0x400>;
		128	clocks = <&osc24M>, <&osc32k>;
		129	clock-names = "hosc", "losc";
		130	#clock-cells = <1>;
		131	#reset-cells = <1>;
		132	};
		133
		134	pio: pinctrl@1c20800 {
		135	compatible = "allwinner,sun50i-a64-pinctrl";
		136	reg = <0x01c20800 0x400>;
		137	interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
		138	<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
		139	<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
		140	clocks = <&ccu CLK_BUS_PIO>;
		141	gpio-controller;
		142	#gpio-cells = <3>;
		143	interrupt-controller;
		144	#interrupt-cells = <3>;
		145
		146	i2c1_pins: i2c1_pins {
		147	pins = "PH2", "PH3";
		148	function = "i2c1";
		149	};
		150
		151	uart0_pins_a: uart0@0 {
		152	pins = "PB8", "PB9";
		153	function = "uart0";
		154	};
		155	};
		156
		157	uart0: serial@1c28000 {
		158	compatible = "snps,dw-apb-uart";
		159	reg = <0x01c28000 0x400>;
		160	interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
		161	reg-shift = <2>;
		162	reg-io-width = <4>;
		163	clocks = <&ccu CLK_BUS_UART0>;
		164	resets = <&ccu RST_BUS_UART0>;
		165	status = "disabled";
		166	};
		167
		168	uart1: serial@1c28400 {
		169	compatible = "snps,dw-apb-uart";
		170	reg = <0x01c28400 0x400>;
		171	interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
		172	reg-shift = <2>;
		173	reg-io-width = <4>;
		174	clocks = <&ccu CLK_BUS_UART1>;
		175	resets = <&ccu RST_BUS_UART1>;
		176	status = "disabled";
		177	};
		178
		179	uart2: serial@1c28800 {
		180	compatible = "snps,dw-apb-uart";
		181	reg = <0x01c28800 0x400>;
		182	interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
		183	reg-shift = <2>;
		184	reg-io-width = <4>;
		185	clocks = <&ccu CLK_BUS_UART2>;
		186	resets = <&ccu RST_BUS_UART2>;
		187	status = "disabled";
		188	};
		189
		190	uart3: serial@1c28c00 {
		191	compatible = "snps,dw-apb-uart";
		192	reg = <0x01c28c00 0x400>;
		193	interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
		194	reg-shift = <2>;
		195	reg-io-width = <4>;
		196	clocks = <&ccu CLK_BUS_UART3>;
		197	resets = <&ccu RST_BUS_UART3>;
		198	status = "disabled";
		199	};
		200
		201	uart4: serial@1c29000 {
		202	compatible = "snps,dw-apb-uart";
		203	reg = <0x01c29000 0x400>;
		204	interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
		205	reg-shift = <2>;
		206	reg-io-width = <4>;
		207	clocks = <&ccu CLK_BUS_UART4>;
		208	resets = <&ccu RST_BUS_UART4>;
		209	status = "disabled";
		210	};
		211
		212	i2c0: i2c@1c2ac00 {
		213	compatible = "allwinner,sun6i-a31-i2c";
		214	reg = <0x01c2ac00 0x400>;
		215	interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
		216	clocks = <&ccu CLK_BUS_I2C0>;
		217	resets = <&ccu RST_BUS_I2C0>;
		218	status = "disabled";
		219	#address-cells = <1>;
		220	#size-cells = <0>;
		221	};
		222
		223	i2c1: i2c@1c2b000 {
		224	compatible = "allwinner,sun6i-a31-i2c";
		225	reg = <0x01c2b000 0x400>;
		226	interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		227	clocks = <&ccu CLK_BUS_I2C1>;
		228	resets = <&ccu RST_BUS_I2C1>;
		229	status = "disabled";
		230	#address-cells = <1>;
		231	#size-cells = <0>;
		232	};
		233
		234	i2c2: i2c@1c2b400 {
		235	compatible = "allwinner,sun6i-a31-i2c";
		236	reg = <0x01c2b400 0x400>;
		237	interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
		238	clocks = <&ccu CLK_BUS_I2C2>;
		239	resets = <&ccu RST_BUS_I2C2>;
		240	status = "disabled";
		241	#address-cells = <1>;
		242	#size-cells = <0>;
		243	};
		244
		245	gic: interrupt-controller@1c81000 {
		246	compatible = "arm,gic-400";
		247	reg = <0x01c81000 0x1000>,
		248	<0x01c82000 0x2000>,
		249	<0x01c84000 0x2000>,
		250	<0x01c86000 0x2000>;
		251	interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>;
		252	interrupt-controller;
		253	#interrupt-cells = <3>;
		254	};
		255
		256	rtc: rtc@1f00000 {
		257	compatible = "allwinner,sun6i-a31-rtc";
		258	reg = <0x01f00000 0x54>;
		259	interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
		260	<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
		261	};
		262	};
		263	};