diff options
| author | Daniel Borkmann <daniel@iogearbox.net> | 2018-05-03 19:08:20 -0400 |
|---|---|---|
| committer | Alexei Starovoitov <ast@kernel.org> | 2018-05-03 19:49:20 -0400 |
| commit | 4db25cc988518239a2b9fd76716a829e6deca66a (patch) | |
| tree | da7818c8e41fdf68d805aee4ae238e6dbf54f208 | |
| parent | 0d2d0cedc0814edaa2b6cb290c78ec333b3eed71 (diff) | |
bpf, mips64: remove ld_abs/ld_ind
Since LD_ABS/LD_IND instructions are now removed from the core and
reimplemented through a combination of inlined BPF instructions and
a slow-path helper, we can get rid of the complexity from mips64 JIT.
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
| -rw-r--r-- | arch/mips/net/ebpf_jit.c | 104 |
1 files changed, 0 insertions, 104 deletions
diff --git a/arch/mips/net/ebpf_jit.c b/arch/mips/net/ebpf_jit.c index 3e2798bfea4f..7ba7df9c28fc 100644 --- a/arch/mips/net/ebpf_jit.c +++ b/arch/mips/net/ebpf_jit.c | |||
| @@ -1267,110 +1267,6 @@ jeq_common: | |||
| 1267 | return -EINVAL; | 1267 | return -EINVAL; |
| 1268 | break; | 1268 | break; |
| 1269 | 1269 | ||
| 1270 | case BPF_LD | BPF_B | BPF_ABS: | ||
| 1271 | case BPF_LD | BPF_H | BPF_ABS: | ||
| 1272 | case BPF_LD | BPF_W | BPF_ABS: | ||
| 1273 | case BPF_LD | BPF_DW | BPF_ABS: | ||
| 1274 | ctx->flags |= EBPF_SAVE_RA; | ||
| 1275 | |||
| 1276 | gen_imm_to_reg(insn, MIPS_R_A1, ctx); | ||
| 1277 | emit_instr(ctx, addiu, MIPS_R_A2, MIPS_R_ZERO, size_to_len(insn)); | ||
| 1278 | |||
| 1279 | if (insn->imm < 0) { | ||
| 1280 | emit_const_to_reg(ctx, MIPS_R_T9, (u64)bpf_internal_load_pointer_neg_helper); | ||
| 1281 | } else { | ||
| 1282 | emit_const_to_reg(ctx, MIPS_R_T9, (u64)ool_skb_header_pointer); | ||
| 1283 | emit_instr(ctx, daddiu, MIPS_R_A3, MIPS_R_SP, ctx->tmp_offset); | ||
| 1284 | } | ||
| 1285 | goto ld_skb_common; | ||
| 1286 | |||
| 1287 | case BPF_LD | BPF_B | BPF_IND: | ||
| 1288 | case BPF_LD | BPF_H | BPF_IND: | ||
| 1289 | case BPF_LD | BPF_W | BPF_IND: | ||
| 1290 | case BPF_LD | BPF_DW | BPF_IND: | ||
| 1291 | ctx->flags |= EBPF_SAVE_RA; | ||
| 1292 | src = ebpf_to_mips_reg(ctx, insn, src_reg_no_fp); | ||
| 1293 | if (src < 0) | ||
| 1294 | return src; | ||
| 1295 | ts = get_reg_val_type(ctx, this_idx, insn->src_reg); | ||
| 1296 | if (ts == REG_32BIT_ZERO_EX) { | ||
| 1297 | /* sign extend */ | ||
| 1298 | emit_instr(ctx, sll, MIPS_R_A1, src, 0); | ||
| 1299 | src = MIPS_R_A1; | ||
| 1300 | } | ||
| 1301 | if (insn->imm >= S16_MIN && insn->imm <= S16_MAX) { | ||
| 1302 | emit_instr(ctx, daddiu, MIPS_R_A1, src, insn->imm); | ||
| 1303 | } else { | ||
| 1304 | gen_imm_to_reg(insn, MIPS_R_AT, ctx); | ||
| 1305 | emit_instr(ctx, daddu, MIPS_R_A1, MIPS_R_AT, src); | ||
| 1306 | } | ||
| 1307 | /* truncate to 32-bit int */ | ||
| 1308 | emit_instr(ctx, sll, MIPS_R_A1, MIPS_R_A1, 0); | ||
| 1309 | emit_instr(ctx, daddiu, MIPS_R_A3, MIPS_R_SP, ctx->tmp_offset); | ||
| 1310 | emit_instr(ctx, slt, MIPS_R_AT, MIPS_R_A1, MIPS_R_ZERO); | ||
| 1311 | |||
| 1312 | emit_const_to_reg(ctx, MIPS_R_T8, (u64)bpf_internal_load_pointer_neg_helper); | ||
| 1313 | emit_const_to_reg(ctx, MIPS_R_T9, (u64)ool_skb_header_pointer); | ||
| 1314 | emit_instr(ctx, addiu, MIPS_R_A2, MIPS_R_ZERO, size_to_len(insn)); | ||
| 1315 | emit_instr(ctx, movn, MIPS_R_T9, MIPS_R_T8, MIPS_R_AT); | ||
| 1316 | |||
| 1317 | ld_skb_common: | ||
| 1318 | emit_instr(ctx, jalr, MIPS_R_RA, MIPS_R_T9); | ||
| 1319 | /* delay slot move */ | ||
| 1320 | emit_instr(ctx, daddu, MIPS_R_A0, MIPS_R_S0, MIPS_R_ZERO); | ||
| 1321 | |||
| 1322 | /* Check the error value */ | ||
| 1323 | b_off = b_imm(exit_idx, ctx); | ||
| 1324 | if (is_bad_offset(b_off)) { | ||
| 1325 | target = j_target(ctx, exit_idx); | ||
| 1326 | if (target == (unsigned int)-1) | ||
| 1327 | return -E2BIG; | ||
| 1328 | |||
| 1329 | if (!(ctx->offsets[this_idx] & OFFSETS_B_CONV)) { | ||
| 1330 | ctx->offsets[this_idx] |= OFFSETS_B_CONV; | ||
| 1331 | ctx->long_b_conversion = 1; | ||
| 1332 | } | ||
| 1333 | emit_instr(ctx, bne, MIPS_R_V0, MIPS_R_ZERO, 4 * 3); | ||
| 1334 | emit_instr(ctx, nop); | ||
| 1335 | emit_instr(ctx, j, target); | ||
| 1336 | emit_instr(ctx, nop); | ||
| 1337 | } else { | ||
| 1338 | emit_instr(ctx, beq, MIPS_R_V0, MIPS_R_ZERO, b_off); | ||
| 1339 | emit_instr(ctx, nop); | ||
| 1340 | } | ||
| 1341 | |||
| 1342 | #ifdef __BIG_ENDIAN | ||
| 1343 | need_swap = false; | ||
| 1344 | #else | ||
| 1345 | need_swap = true; | ||
| 1346 | #endif | ||
| 1347 | dst = MIPS_R_V0; | ||
| 1348 | switch (BPF_SIZE(insn->code)) { | ||
| 1349 | case BPF_B: | ||
| 1350 | emit_instr(ctx, lbu, dst, 0, MIPS_R_V0); | ||
| 1351 | break; | ||
| 1352 | case BPF_H: | ||
| 1353 | emit_instr(ctx, lhu, dst, 0, MIPS_R_V0); | ||
| 1354 | if (need_swap) | ||
| 1355 | emit_instr(ctx, wsbh, dst, dst); | ||
| 1356 | break; | ||
| 1357 | case BPF_W: | ||
| 1358 | emit_instr(ctx, lw, dst, 0, MIPS_R_V0); | ||
| 1359 | if (need_swap) { | ||
| 1360 | emit_instr(ctx, wsbh, dst, dst); | ||
| 1361 | emit_instr(ctx, rotr, dst, dst, 16); | ||
| 1362 | } | ||
| 1363 | break; | ||
| 1364 | case BPF_DW: | ||
| 1365 | emit_instr(ctx, ld, dst, 0, MIPS_R_V0); | ||
| 1366 | if (need_swap) { | ||
| 1367 | emit_instr(ctx, dsbh, dst, dst); | ||
| 1368 | emit_instr(ctx, dshd, dst, dst); | ||
| 1369 | } | ||
| 1370 | break; | ||
| 1371 | } | ||
| 1372 | |||
| 1373 | break; | ||
| 1374 | case BPF_ALU | BPF_END | BPF_FROM_BE: | 1270 | case BPF_ALU | BPF_END | BPF_FROM_BE: |
| 1375 | case BPF_ALU | BPF_END | BPF_FROM_LE: | 1271 | case BPF_ALU | BPF_END | BPF_FROM_LE: |
| 1376 | dst = ebpf_to_mips_reg(ctx, insn, dst_reg); | 1272 | dst = ebpf_to_mips_reg(ctx, insn, dst_reg); |
