aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRex Zhu <Rex.Zhu@amd.com>2017-02-05 23:58:57 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-02-09 10:54:08 -0500
commit4d8d44c6ce8ce3c01f4dcc18fdaf542e0d16df45 (patch)
treeecd2facfc967d57b33bab4a8f537e6235009b354
parent31bb90f1cd084e0ca1359455eaf74bb64b5c5c82 (diff)
drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 64e72c39b43c..b1de9e8ccdbc 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4398,16 +4398,14 @@ static int smu7_get_sclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks)
4398 if (table_info == NULL || table_info->vdd_dep_on_sclk == NULL) 4398 if (table_info == NULL || table_info->vdd_dep_on_sclk == NULL)
4399 return -EINVAL; 4399 return -EINVAL;
4400 dep_sclk_table = table_info->vdd_dep_on_sclk; 4400 dep_sclk_table = table_info->vdd_dep_on_sclk;
4401 for (i = 0; i < dep_sclk_table->count; i++) { 4401 for (i = 0; i < dep_sclk_table->count; i++)
4402 clocks->clock[i] = dep_sclk_table->entries[i].clk; 4402 clocks->clock[i] = dep_sclk_table->entries[i].clk;
4403 clocks->count++; 4403 clocks->count = dep_sclk_table->count;
4404 }
4405 } else if (hwmgr->pp_table_version == PP_TABLE_V0) { 4404 } else if (hwmgr->pp_table_version == PP_TABLE_V0) {
4406 sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk; 4405 sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk;
4407 for (i = 0; i < sclk_table->count; i++) { 4406 for (i = 0; i < sclk_table->count; i++)
4408 clocks->clock[i] = sclk_table->entries[i].clk; 4407 clocks->clock[i] = sclk_table->entries[i].clk;
4409 clocks->count++; 4408 clocks->count = sclk_table->count;
4410 }
4411 } 4409 }
4412 4410
4413 return 0; 4411 return 0;
@@ -4441,14 +4439,13 @@ static int smu7_get_mclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks)
4441 clocks->clock[i] = dep_mclk_table->entries[i].clk; 4439 clocks->clock[i] = dep_mclk_table->entries[i].clk;
4442 clocks->latency[i] = smu7_get_mem_latency(hwmgr, 4440 clocks->latency[i] = smu7_get_mem_latency(hwmgr,
4443 dep_mclk_table->entries[i].clk); 4441 dep_mclk_table->entries[i].clk);
4444 clocks->count++;
4445 } 4442 }
4443 clocks->count = dep_mclk_table->count;
4446 } else if (hwmgr->pp_table_version == PP_TABLE_V0) { 4444 } else if (hwmgr->pp_table_version == PP_TABLE_V0) {
4447 mclk_table = hwmgr->dyn_state.vddc_dependency_on_mclk; 4445 mclk_table = hwmgr->dyn_state.vddc_dependency_on_mclk;
4448 for (i = 0; i < mclk_table->count; i++) { 4446 for (i = 0; i < mclk_table->count; i++)
4449 clocks->clock[i] = mclk_table->entries[i].clk; 4447 clocks->clock[i] = mclk_table->entries[i].clk;
4450 clocks->count++; 4448 clocks->count = mclk_table->count;
4451 }
4452 } 4449 }
4453 return 0; 4450 return 0;
4454} 4451}