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authorPC Liao <pc.liao@mediatek.com>2016-02-23 03:20:24 -0500
committerMark Brown <broonie@kernel.org>2016-02-25 21:11:22 -0500
commit4d7cb66c8f9db37ffa2a72cc9b9233ae82e94d7e (patch)
treed9c48c3ae199c98c9782ad56f9faa91be3a8c3c7
parent0f83f9296d5c91d08cf46cf1ba8a17fb870dedf0 (diff)
ASoC: mediatek: remove soft reset and add second I2S clock
To improve I2S flow, this patch removes soft reset and adds second I2S clock to use. Signed-off-by: PC Liao <pc.liao@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/mediatek/mtk-afe-pcm.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/sound/soc/mediatek/mtk-afe-pcm.c b/sound/soc/mediatek/mtk-afe-pcm.c
index 689c51f23d9f..3456bfab4617 100644
--- a/sound/soc/mediatek/mtk-afe-pcm.c
+++ b/sound/soc/mediatek/mtk-afe-pcm.c
@@ -283,20 +283,13 @@ static void mtk_afe_set_i2s_enable(struct mtk_afe *afe, bool enable)
283 283
284 regmap_read(afe->regmap, AFE_I2S_CON2, &val); 284 regmap_read(afe->regmap, AFE_I2S_CON2, &val);
285 if (!!(val & AFE_I2S_CON2_EN) == enable) 285 if (!!(val & AFE_I2S_CON2_EN) == enable)
286 return; /* must skip soft reset */ 286 return;
287
288 /* I2S soft reset begin */
289 regmap_update_bits(afe->regmap, AUDIO_TOP_CON1, 0x4, 0x4);
290 287
291 /* input */ 288 /* input */
292 regmap_update_bits(afe->regmap, AFE_I2S_CON2, 0x1, enable); 289 regmap_update_bits(afe->regmap, AFE_I2S_CON2, 0x1, enable);
293 290
294 /* output */ 291 /* output */
295 regmap_update_bits(afe->regmap, AFE_I2S_CON1, 0x1, enable); 292 regmap_update_bits(afe->regmap, AFE_I2S_CON1, 0x1, enable);
296
297 /* I2S soft reset end */
298 udelay(1);
299 regmap_update_bits(afe->regmap, AUDIO_TOP_CON1, 0x4, 0);
300} 293}
301 294
302static int mtk_afe_dais_enable_clks(struct mtk_afe *afe, 295static int mtk_afe_dais_enable_clks(struct mtk_afe *afe,
@@ -365,6 +358,7 @@ static int mtk_afe_i2s_startup(struct snd_pcm_substream *substream,
365 return 0; 358 return 0;
366 359
367 mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL); 360 mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL);
361 mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S2_M], NULL);
368 regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, 362 regmap_update_bits(afe->regmap, AUDIO_TOP_CON0,
369 AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, 0); 363 AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, 0);
370 return 0; 364 return 0;
@@ -384,6 +378,7 @@ static void mtk_afe_i2s_shutdown(struct snd_pcm_substream *substream,
384 AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, 378 AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M,
385 AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M); 379 AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M);
386 mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL); 380 mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL);
381 mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S2_M], NULL);
387} 382}
388 383
389static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream, 384static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream,
@@ -397,6 +392,9 @@ static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream,
397 mtk_afe_dais_set_clks(afe, 392 mtk_afe_dais_set_clks(afe,
398 afe->clocks[MTK_CLK_I2S1_M], runtime->rate * 256, 393 afe->clocks[MTK_CLK_I2S1_M], runtime->rate * 256,
399 NULL, 0); 394 NULL, 0);
395 mtk_afe_dais_set_clks(afe,
396 afe->clocks[MTK_CLK_I2S2_M], runtime->rate * 256,
397 NULL, 0);
400 /* config I2S */ 398 /* config I2S */
401 ret = mtk_afe_set_i2s(afe, substream->runtime->rate); 399 ret = mtk_afe_set_i2s(afe, substream->runtime->rate);
402 if (ret) 400 if (ret)