Merge branch 'drm-armada-devel' of git://git.armlinux.org.uk/~rmk/linux-arm into drm-next

Building on top of the MALI change previously merged, these changes:
* add tracing support for overlay updates
* refactor some of the plane support code
* de-midlayer the driver
* cleanups from other folk reviewing the code

* 'drm-armada-devel' of git://git.armlinux.org.uk/~rmk/linux-arm:
  drm/armada: fix NULL pointer comparison warning
  drm/armada: use DRM_FB_HELPER_DEFAULT_OPS for fb_ops
  drm/armada: remove some dead code
  drm/armada: mark symbols static where possible
  drm/armada: de-midlayer armada
  drm/armada: use common helper for plane base address
  drm/armada: move setting primary plane position to armada_drm_primary_set()
  drm/armada: split out primary plane update
  drm/armada: move plane state to struct armada_plane
  drm/armada: clean up armada_drm_plane_work_run()
  drm/armada: add tracing support

10 files changed, 325 insertions, 192 deletions

diff --git a/drivers/gpu/drm/armada/Makefile b/drivers/gpu/drm/armada/Makefile
index ffd673615772..a18f156c8b66 100644
--- a/drivers/gpu/drm/armada/Makefile
+++ b/drivers/gpu/drm/armada/Makefile
@@ -1,5 +1,5 @@
 armada-y        := armada_crtc.o armada_drv.o armada_fb.o armada_fbdev.o \
-                   armada_gem.o armada_overlay.o
+                   armada_gem.o armada_overlay.o armada_trace.o
 armada-y        += armada_510.o
 armada-$(CONFIG_DEBUG_FS) += armada_debugfs.o
 
diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c
index a51f8cbcfe26..95cb3966b2ca 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -18,6 +18,7 @@
 #include "armada_fb.h"
 #include "armada_gem.h"
 #include "armada_hw.h"
+#include "armada_trace.h"
 
 struct armada_frame_work {
         struct armada_plane_work work;
@@ -164,19 +165,37 @@ static void armada_drm_crtc_update(struct armada_crtc *dcrtc)
         }
 }
 
+void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
+        int x, int y)
+{
+        u32 addr = drm_fb_obj(fb)->dev_addr;
+        u32 pixel_format = fb->pixel_format;
+        int num_planes = drm_format_num_planes(pixel_format);
+        int i;
+
+        if (num_planes > 3)
+                num_planes = 3;
+
+        for (i = 0; i < num_planes; i++)
+                addrs[i] = addr + fb->offsets[i] + y * fb->pitches[i] +
+                             x * drm_format_plane_cpp(pixel_format, i);
+        for (; i < 3; i++)
+                addrs[i] = 0;
+}
+
 static unsigned armada_drm_crtc_calc_fb(struct drm_framebuffer *fb,
         int x, int y, struct armada_regs *regs, bool interlaced)
 {
-        struct armada_gem_object *obj = drm_fb_obj(fb);
         unsigned pitch = fb->pitches[0];
-        unsigned offset = y * pitch + x * fb->bits_per_pixel / 8;
-        uint32_t addr_odd, addr_even;
+        u32 addrs[3], addr_odd, addr_even;
         unsigned i = 0;
 
         DRM_DEBUG_DRIVER("pitch %u x %d y %d bpp %d\n",
                 pitch, x, y, fb->bits_per_pixel);
 
-        addr_odd = addr_even = obj->dev_addr + offset;
+        armada_drm_plane_calc_addrs(addrs, fb, x, y);
+
+        addr_odd = addr_even = addrs[0];
 
         if (interlaced) {
                 addr_even += pitch;
@@ -192,17 +211,18 @@ static unsigned armada_drm_crtc_calc_fb(struct drm_framebuffer *fb,
 }
 
 static void armada_drm_plane_work_run(struct armada_crtc *dcrtc,
-        struct armada_plane *plane)
+        struct drm_plane *plane)
 {
-        struct armada_plane_work *work = xchg(&plane->work, NULL);
+        struct armada_plane *dplane = drm_to_armada_plane(plane);
+        struct armada_plane_work *work = xchg(&dplane->work, NULL);
 
         /* Handle any pending frame work. */
         if (work) {
-                work->fn(dcrtc, plane, work);
+                work->fn(dcrtc, dplane, work);
                 drm_crtc_vblank_put(&dcrtc->crtc);
         }
 
-        wake_up(&plane->frame_wait);
+        wake_up(&dplane->frame_wait);
 }
 
 int armada_drm_plane_work_queue(struct armada_crtc *dcrtc,
@@ -307,14 +327,12 @@ static void armada_drm_crtc_finish_fb(struct armada_crtc *dcrtc,
 
 static void armada_drm_vblank_off(struct armada_crtc *dcrtc)
 {
-        struct armada_plane *plane = drm_to_armada_plane(dcrtc->crtc.primary);
-
         /*
          * Tell the DRM core that vblank IRQs aren't going to happen for
          * a while.  This cleans up any pending vblank events for us.
          */
         drm_crtc_vblank_off(&dcrtc->crtc);
-        armada_drm_plane_work_run(dcrtc, plane);
+        armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
 }
 
 void armada_drm_crtc_gamma_set(struct drm_crtc *crtc, u16 r, u16 g, u16 b,
@@ -416,10 +434,8 @@ static void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
 
         spin_lock(&dcrtc->irq_lock);
         ovl_plane = dcrtc->plane;
-        if (ovl_plane) {
-                struct armada_plane *plane = drm_to_armada_plane(ovl_plane);
-                armada_drm_plane_work_run(dcrtc, plane);
-        }
+        if (ovl_plane)
+                armada_drm_plane_work_run(dcrtc, ovl_plane);
 
         if (stat & GRA_FRAME_IRQ && dcrtc->interlaced) {
                 int i = stat & GRA_FRAME_IRQ0 ? 0 : 1;
@@ -449,10 +465,8 @@ static void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
 
         spin_unlock(&dcrtc->irq_lock);
 
-        if (stat & GRA_FRAME_IRQ) {
-                struct armada_plane *plane = drm_to_armada_plane(dcrtc->crtc.primary);
-                armada_drm_plane_work_run(dcrtc, plane);
-        }
+        if (stat & GRA_FRAME_IRQ)
+                armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
 }
 
 static irqreturn_t armada_drm_irq(int irq, void *arg)
@@ -466,6 +480,8 @@ static irqreturn_t armada_drm_irq(int irq, void *arg)
          */
         writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR);
 
+        trace_armada_drm_irq(&dcrtc->crtc, stat);
+
         /* Mask out those interrupts we haven't enabled */
         v = stat & dcrtc->irq_ena;
 
@@ -531,6 +547,35 @@ static uint32_t armada_drm_crtc_calculate_csc(struct armada_crtc *dcrtc)
         return val;
 }
 
+static void armada_drm_primary_set(struct drm_crtc *crtc,
+        struct drm_plane *plane, int x, int y)
+{
+        struct armada_plane_state *state = &drm_to_armada_plane(plane)->state;
+        struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
+        struct armada_regs regs[8];
+        bool interlaced = dcrtc->interlaced;
+        unsigned i;
+        u32 ctrl0;
+
+        i = armada_drm_crtc_calc_fb(plane->fb, x, y, regs, interlaced);
+
+        armada_reg_queue_set(regs, i, state->dst_yx, LCD_SPU_GRA_OVSA_HPXL_VLN);
+        armada_reg_queue_set(regs, i, state->src_hw, LCD_SPU_GRA_HPXL_VLN);
+        armada_reg_queue_set(regs, i, state->dst_hw, LCD_SPU_GZM_HPXL_VLN);
+
+        ctrl0 = state->ctrl0;
+        if (interlaced)
+                ctrl0 |= CFG_GRA_FTOGGLE;
+
+        armada_reg_queue_mod(regs, i, ctrl0, CFG_GRAFORMAT |
+                             CFG_GRA_MOD(CFG_SWAPRB | CFG_SWAPUV |
+                                         CFG_SWAPYU | CFG_YUV2RGB) |
+                             CFG_PALETTE_ENA | CFG_GRA_FTOGGLE,
+                             LCD_SPU_DMA_CTRL0);
+        armada_reg_queue_end(regs, i);
+        armada_drm_crtc_update_regs(dcrtc, regs);
+}
+
 /* The mode_config.mutex will be held for this call */
 static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
         struct drm_display_mode *mode, struct drm_display_mode *adj,
@@ -547,9 +592,20 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
 
         interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE);
 
-        i = armada_drm_crtc_calc_fb(dcrtc->crtc.primary->fb,
-                                    x, y, regs, interlaced);
+        val = CFG_GRA_ENA | CFG_GRA_HSMOOTH;
+        val |= CFG_GRA_FMT(drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->fmt);
+        val |= CFG_GRA_MOD(drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->mod);
+
+        if (drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->fmt > CFG_420)
+                val |= CFG_PALETTE_ENA;
+
+        drm_to_armada_plane(crtc->primary)->state.ctrl0 = val;
+        drm_to_armada_plane(crtc->primary)->state.src_hw =
+        drm_to_armada_plane(crtc->primary)->state.dst_hw =
+                adj->crtc_vdisplay << 16 | adj->crtc_hdisplay;
+        drm_to_armada_plane(crtc->primary)->state.dst_yx = 0;
 
+        i = 0;
         rm = adj->crtc_hsync_start - adj->crtc_hdisplay;
         lm = adj->crtc_htotal - adj->crtc_hsync_end;
         bm = adj->crtc_vsync_start - adj->crtc_vdisplay;
@@ -625,8 +681,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
         val = adj->crtc_vdisplay << 16 | adj->crtc_hdisplay;
 
         armada_reg_queue_set(regs, i, val, LCD_SPU_V_H_ACTIVE);
-        armada_reg_queue_set(regs, i, val, LCD_SPU_GRA_HPXL_VLN);
-        armada_reg_queue_set(regs, i, val, LCD_SPU_GZM_HPXL_VLN);
         armada_reg_queue_set(regs, i, (lm << 16) | rm, LCD_SPU_H_PORCH);
         armada_reg_queue_set(regs, i, dcrtc->v[0].spu_v_porch, LCD_SPU_V_PORCH);
         armada_reg_queue_set(regs, i, dcrtc->v[0].spu_v_h_total,
@@ -638,22 +692,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
                                      ADV_VSYNCOFFEN, LCD_SPU_ADV_REG);
         }
 
-        val = CFG_GRA_ENA | CFG_GRA_HSMOOTH;
-        val |= CFG_GRA_FMT(drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->fmt);
-        val |= CFG_GRA_MOD(drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->mod);
-
-        if (drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->fmt > CFG_420)
-                val |= CFG_PALETTE_ENA;
-
-        if (interlaced)
-                val |= CFG_GRA_FTOGGLE;
-
-        armada_reg_queue_mod(regs, i, val, CFG_GRAFORMAT |
-                             CFG_GRA_MOD(CFG_SWAPRB | CFG_SWAPUV |
-                                         CFG_SWAPYU | CFG_YUV2RGB) |
-                             CFG_PALETTE_ENA | CFG_GRA_FTOGGLE,
-                             LCD_SPU_DMA_CTRL0);
-
         val = adj->flags & DRM_MODE_FLAG_NVSYNC ? CFG_VSYNC_INV : 0;
         armada_reg_queue_mod(regs, i, val, CFG_VSYNC_INV, LCD_SPU_DMA_CTRL1);
 
@@ -662,6 +700,8 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
         armada_reg_queue_end(regs, i);
 
         armada_drm_crtc_update_regs(dcrtc, regs);
+
+        armada_drm_primary_set(crtc, crtc->primary, x, y);
         spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
 
         armada_drm_crtc_update(dcrtc);
@@ -1038,7 +1078,7 @@ static int armada_drm_crtc_page_flip(struct drm_crtc *crtc,
          * interrupt, so complete it now.
          */
         if (dpms_blanked(dcrtc->dpms))
-                armada_drm_plane_work_run(dcrtc, drm_to_armada_plane(dcrtc->crtc.primary));
+                armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
 
         return 0;
 }
@@ -1172,7 +1212,6 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
                        CFG_PDWN32x32 | CFG_PDWN16x66 | CFG_PDWN32x66 |
                        CFG_PDWN64x66, dcrtc->base + LCD_SPU_SRAM_PARA1);
         writel_relaxed(0x2032ff81, dcrtc->base + LCD_SPU_DMA_CTRL1);
-        writel_relaxed(0x00000000, dcrtc->base + LCD_SPU_GRA_OVSA_HPXL_VLN);
         writel_relaxed(dcrtc->irq_ena, dcrtc->base + LCD_SPU_IRQ_ENA);
         writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR);
 
diff --git a/drivers/gpu/drm/armada/armada_crtc.h b/drivers/gpu/drm/armada/armada_crtc.h
index 04fdd22d483b..b08043e8cc3b 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -41,10 +41,18 @@ struct armada_plane_work {
                                       struct armada_plane_work *);
 };
 
+struct armada_plane_state {
+        u32 src_hw;
+        u32 dst_hw;
+        u32 dst_yx;
+        u32 ctrl0;
+};
+
 struct armada_plane {
         struct drm_plane        base;
         wait_queue_head_t       frame_wait;
         struct armada_plane_work *work;
+        struct armada_plane_state state;
 };
 #define drm_to_armada_plane(p) container_of(p, struct armada_plane, base)
 
@@ -54,6 +62,8 @@ int armada_drm_plane_work_queue(struct armada_crtc *dcrtc,
 int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout);
 struct armada_plane_work *armada_drm_plane_work_cancel(
         struct armada_crtc *dcrtc, struct armada_plane *plane);
+void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
+        int x, int y);
 
 struct armada_crtc {
         struct drm_crtc         crtc;
diff --git a/drivers/gpu/drm/armada/armada_debugfs.c b/drivers/gpu/drm/armada/armada_debugfs.c
index d4f7ab0a30d4..90222e60d2d6 100644
--- a/drivers/gpu/drm/armada/armada_debugfs.c
+++ b/drivers/gpu/drm/armada/armada_debugfs.c
@@ -113,7 +113,7 @@ static int drm_add_fake_info_node(struct drm_minor *minor, struct dentry *ent,
         struct drm_info_node *node;
 
         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
-        if (node == NULL) {
+        if (!node) {
                 debugfs_remove(ent);
                 return -ENOMEM;
         }
diff --git a/drivers/gpu/drm/armada/armada_drm.h b/drivers/gpu/drm/armada/armada_drm.h
index 3b2bb6128d40..77952d559a3c 100644
--- a/drivers/gpu/drm/armada/armada_drm.h
+++ b/drivers/gpu/drm/armada/armada_drm.h
@@ -53,6 +53,7 @@ struct armada_variant {
 extern const struct armada_variant armada510_ops;
 
 struct armada_private {
+        struct drm_device       drm;
         struct work_struct      fb_unref_work;
         DECLARE_KFIFO(fb_unref, struct drm_framebuffer *, 8);
         struct drm_fb_helper    *fbdev;
diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c
index 94e46da9a758..07086b427c22 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -49,106 +49,6 @@ void armada_drm_queue_unref_work(struct drm_device *dev,
         spin_unlock_irqrestore(&dev->event_lock, flags);
 }
 
-static int armada_drm_load(struct drm_device *dev, unsigned long flags)
-{
-        struct armada_private *priv;
-        struct resource *mem = NULL;
-        int ret, n;
-
-        for (n = 0; ; n++) {
-                struct resource *r = platform_get_resource(dev->platformdev,
-                                                           IORESOURCE_MEM, n);
-                if (!r)
-                        break;
-
-                /* Resources above 64K are graphics memory */
-                if (resource_size(r) > SZ_64K)
-                        mem = r;
-                else
-                        return -EINVAL;
-        }
-
-        if (!mem)
-                return -ENXIO;
-
-        if (!devm_request_mem_region(dev->dev, mem->start,
-                        resource_size(mem), "armada-drm"))
-                return -EBUSY;
-
-        priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
-        if (!priv) {
-                DRM_ERROR("failed to allocate private\n");
-                return -ENOMEM;
-        }
-
-        platform_set_drvdata(dev->platformdev, dev);
-        dev->dev_private = priv;
-
-        INIT_WORK(&priv->fb_unref_work, armada_drm_unref_work);
-        INIT_KFIFO(priv->fb_unref);
-
-        /* Mode setting support */
-        drm_mode_config_init(dev);
-        dev->mode_config.min_width = 320;
-        dev->mode_config.min_height = 200;
-
-        /*
-         * With vscale enabled, the maximum width is 1920 due to the
-         * 1920 by 3 lines RAM
-         */
-        dev->mode_config.max_width = 1920;
-        dev->mode_config.max_height = 2048;
-
-        dev->mode_config.preferred_depth = 24;
-        dev->mode_config.funcs = &armada_drm_mode_config_funcs;
-        drm_mm_init(&priv->linear, mem->start, resource_size(mem));
-        mutex_init(&priv->linear_lock);
-
-        ret = component_bind_all(dev->dev, dev);
-        if (ret)
-                goto err_kms;
-
-        ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
-        if (ret)
-                goto err_comp;
-
-        dev->irq_enabled = true;
-
-        ret = armada_fbdev_init(dev);
-        if (ret)
-                goto err_comp;
-
-        drm_kms_helper_poll_init(dev);
-
-        return 0;
-
- err_comp:
-        component_unbind_all(dev->dev, dev);
- err_kms:
-        drm_mode_config_cleanup(dev);
-        drm_mm_takedown(&priv->linear);
-        flush_work(&priv->fb_unref_work);
-
-        return ret;
-}
-
-static int armada_drm_unload(struct drm_device *dev)
-{
-        struct armada_private *priv = dev->dev_private;
-
-        drm_kms_helper_poll_fini(dev);
-        armada_fbdev_fini(dev);
-
-        component_unbind_all(dev->dev, dev);
-
-        drm_mode_config_cleanup(dev);
-        drm_mm_takedown(&priv->linear);
-        flush_work(&priv->fb_unref_work);
-        dev->dev_private = NULL;
-
-        return 0;
-}
-
 /* These are called under the vbl_lock. */
 static int armada_drm_enable_vblank(struct drm_device *dev, unsigned int pipe)
 {
@@ -186,16 +86,10 @@ static const struct file_operations armada_drm_fops = {
 };
 
 static struct drm_driver armada_drm_driver = {
-        .load                   = armada_drm_load,
         .lastclose              = armada_drm_lastclose,
-        .unload                 = armada_drm_unload,
         .get_vblank_counter     = drm_vblank_no_hw_counter,
         .enable_vblank          = armada_drm_enable_vblank,
         .disable_vblank         = armada_drm_disable_vblank,
-#ifdef CONFIG_DEBUG_FS
-        .debugfs_init           = armada_drm_debugfs_init,
-        .debugfs_cleanup        = armada_drm_debugfs_cleanup,
-#endif
         .gem_free_object_unlocked = armada_gem_free_object,
         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
@@ -218,12 +112,138 @@ static struct drm_driver armada_drm_driver = {
 
 static int armada_drm_bind(struct device *dev)
 {
-        return drm_platform_init(&armada_drm_driver, to_platform_device(dev));
+        struct armada_private *priv;
+        struct resource *mem = NULL;
+        int ret, n;
+
+        for (n = 0; ; n++) {
+                struct resource *r = platform_get_resource(to_platform_device(dev),
+                                                           IORESOURCE_MEM, n);
+                if (!r)
+                        break;
+
+                /* Resources above 64K are graphics memory */
+                if (resource_size(r) > SZ_64K)
+                        mem = r;
+                else
+                        return -EINVAL;
+        }
+
+        if (!mem)
+                return -ENXIO;
+
+        if (!devm_request_mem_region(dev, mem->start, resource_size(mem),
+                                     "armada-drm"))
+                return -EBUSY;
+
+        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+        if (!priv)
+                return -ENOMEM;
+
+        /*
+         * The drm_device structure must be at the start of
+         * armada_private for drm_dev_unref() to work correctly.
+         */
+        BUILD_BUG_ON(offsetof(struct armada_private, drm) != 0);
+
+        ret = drm_dev_init(&priv->drm, &armada_drm_driver, dev);
+        if (ret) {
+                dev_err(dev, "[" DRM_NAME ":%s] drm_dev_init failed: %d\n",
+                        __func__, ret);
+                kfree(priv);
+                return ret;
+        }
+
+        priv->drm.platformdev = to_platform_device(dev);
+        priv->drm.dev_private = priv;
+
+        platform_set_drvdata(priv->drm.platformdev, &priv->drm);
+
+        INIT_WORK(&priv->fb_unref_work, armada_drm_unref_work);
+        INIT_KFIFO(priv->fb_unref);
+
+        /* Mode setting support */
+        drm_mode_config_init(&priv->drm);
+        priv->drm.mode_config.min_width = 320;
+        priv->drm.mode_config.min_height = 200;
+
+        /*
+         * With vscale enabled, the maximum width is 1920 due to the
+         * 1920 by 3 lines RAM
+         */
+        priv->drm.mode_config.max_width = 1920;
+        priv->drm.mode_config.max_height = 2048;
+
+        priv->drm.mode_config.preferred_depth = 24;
+        priv->drm.mode_config.funcs = &armada_drm_mode_config_funcs;
+        drm_mm_init(&priv->linear, mem->start, resource_size(mem));
+        mutex_init(&priv->linear_lock);
+
+        ret = component_bind_all(dev, &priv->drm);
+        if (ret)
+                goto err_kms;
+
+        ret = drm_vblank_init(&priv->drm, priv->drm.mode_config.num_crtc);
+        if (ret)
+                goto err_comp;
+
+        priv->drm.irq_enabled = true;
+
+        ret = armada_fbdev_init(&priv->drm);
+        if (ret)
+                goto err_comp;
+
+        drm_kms_helper_poll_init(&priv->drm);
+
+        ret = drm_dev_register(&priv->drm, 0);
+        if (ret)
+                goto err_poll;
+
+#ifdef CONFIG_DEBUG_FS
+        armada_drm_debugfs_init(priv->drm.primary);
+#endif
+
+        DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
+                 armada_drm_driver.name, armada_drm_driver.major,
+                 armada_drm_driver.minor, armada_drm_driver.patchlevel,
+                 armada_drm_driver.date, dev_name(dev),
+                 priv->drm.primary->index);
+
+        return 0;
+
+ err_poll:
+        drm_kms_helper_poll_fini(&priv->drm);
+        armada_fbdev_fini(&priv->drm);
+ err_comp:
+        component_unbind_all(dev, &priv->drm);
+ err_kms:
+        drm_mode_config_cleanup(&priv->drm);
+        drm_mm_takedown(&priv->linear);
+        flush_work(&priv->fb_unref_work);
+        drm_dev_unref(&priv->drm);
+        return ret;
 }
 
 static void armada_drm_unbind(struct device *dev)
 {
-        drm_put_dev(dev_get_drvdata(dev));
+        struct drm_device *drm = dev_get_drvdata(dev);
+        struct armada_private *priv = drm->dev_private;
+
+        drm_kms_helper_poll_fini(&priv->drm);
+        armada_fbdev_fini(&priv->drm);
+
+#ifdef CONFIG_DEBUG_FS
+        armada_drm_debugfs_cleanup(priv->drm.primary);
+#endif
+        drm_dev_unregister(&priv->drm);
+
+        component_unbind_all(dev, &priv->drm);
+
+        drm_mode_config_cleanup(&priv->drm);
+        drm_mm_takedown(&priv->linear);
+        flush_work(&priv->fb_unref_work);
+
+        drm_dev_unref(&priv->drm);
 }
 
 static int compare_of(struct device *dev, void *data)
diff --git a/drivers/gpu/drm/armada/armada_gem.c b/drivers/gpu/drm/armada/armada_gem.c
index 806791897304..768087ddb046 100644
--- a/drivers/gpu/drm/armada/armada_gem.c
+++ b/drivers/gpu/drm/armada/armada_gem.c
@@ -212,7 +212,7 @@ armada_gem_alloc_private_object(struct drm_device *dev, size_t size)
         return obj;
 }
 
-struct armada_gem_object *armada_gem_alloc_object(struct drm_device *dev,
+static struct armada_gem_object *armada_gem_alloc_object(struct drm_device *dev,
         size_t size)
 {
         struct armada_gem_object *obj;
@@ -419,7 +419,7 @@ int armada_gem_pwrite_ioctl(struct drm_device *dev, void *data,
 }
 
 /* Prime support */
-struct sg_table *
+static struct sg_table *
 armada_gem_prime_map_dma_buf(struct dma_buf_attachment *attach,
         enum dma_data_direction dir)
 {
@@ -594,11 +594,7 @@ int armada_gem_map_import(struct armada_gem_object *dobj)
         int ret;
 
         dobj->sgt = dma_buf_map_attachment(dobj->obj.import_attach,
-                                          DMA_TO_DEVICE);
-        if (!dobj->sgt) {
-                DRM_ERROR("dma_buf_map_attachment() returned NULL\n");
-                return -EINVAL;
-        }
+                                           DMA_TO_DEVICE);
         if (IS_ERR(dobj->sgt)) {
                 ret = PTR_ERR(dobj->sgt);
                 dobj->sgt = NULL;
diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c
index 152b4e716269..6743615232f5 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -15,6 +15,7 @@
 #include "armada_hw.h"
 #include <drm/armada_drm.h>
 #include "armada_ioctlP.h"
+#include "armada_trace.h"
 
 struct armada_ovl_plane_properties {
         uint32_t colorkey_yr;
@@ -32,10 +33,6 @@ struct armada_ovl_plane_properties {
 struct armada_ovl_plane {
         struct armada_plane base;
         struct drm_framebuffer *old_fb;
-        uint32_t src_hw;
-        uint32_t dst_hw;
-        uint32_t dst_yx;
-        uint32_t ctrl0;
         struct {
                 struct armada_plane_work work;
                 struct armada_regs regs[13];
@@ -87,6 +84,8 @@ static void armada_ovl_plane_work(struct armada_crtc *dcrtc,
 {
         struct armada_ovl_plane *dplane = container_of(plane, struct armada_ovl_plane, base);
 
+        trace_armada_ovl_plane_work(&dcrtc->crtc, &plane->base);
+
         armada_drm_crtc_update_regs(dcrtc, dplane->vbl.regs);
         armada_ovl_retire_fb(dplane, NULL);
 }
@@ -120,6 +119,10 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
         bool visible;
         int ret;
 
+        trace_armada_ovl_plane_update(plane, crtc, fb,
+                                 crtc_x, crtc_y, crtc_w, crtc_h,
+                                 src_x, src_y, src_w, src_h);
+
         ret = drm_plane_helper_check_update(plane, crtc, fb, &src, &dest, &clip,
                                             DRM_ROTATE_0,
                                             0, INT_MAX, true, false, &visible);
@@ -141,22 +144,22 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
 
         /* FIXME: overlay on an interlaced display */
         /* Just updating the position/size? */
-        if (plane->fb == fb && dplane->ctrl0 == ctrl0) {
+        if (plane->fb == fb && dplane->base.state.ctrl0 == ctrl0) {
                 val = (drm_rect_height(&src) & 0xffff0000) |
                       drm_rect_width(&src) >> 16;
-                dplane->src_hw = val;
+                dplane->base.state.src_hw = val;
                 writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_HPXL_VLN);
 
                 val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
-                dplane->dst_hw = val;
+                dplane->base.state.dst_hw = val;
                 writel_relaxed(val, dcrtc->base + LCD_SPU_DZM_HPXL_VLN);
 
                 val = dest.y1 << 16 | dest.x1;
-                dplane->dst_yx = val;
+                dplane->base.state.dst_yx = val;
                 writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_OVSA_HPXL_VLN);
 
                 return 0;
-        } else if (~dplane->ctrl0 & ctrl0 & CFG_DMA_ENA) {
+        } else if (~dplane->base.state.ctrl0 & ctrl0 & CFG_DMA_ENA) {
                 /* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
                 armada_updatel(0, CFG_PDWN16x66 | CFG_PDWN32x66,
                                dcrtc->base + LCD_SPU_SRAM_PARA1);
@@ -166,9 +169,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
                 armada_drm_plane_work_cancel(dcrtc, &dplane->base);
 
         if (plane->fb != fb) {
-                struct armada_gem_object *obj = drm_fb_obj(fb);
-                uint32_t addr[3], pixel_format;
-                int i, num_planes, hsub;
+                u32 addrs[3], pixel_format;
+                int num_planes, hsub;
 
                 /*
                  * Take a reference on the new framebuffer - we want to
@@ -182,6 +184,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
                 src_y = src.y1 >> 16;
                 src_x = src.x1 >> 16;
 
+                armada_drm_plane_calc_addrs(addrs, fb, src_x, src_y);
+
                 pixel_format = fb->pixel_format;
                 hsub = drm_format_horz_chroma_subsampling(pixel_format);
                 num_planes = drm_format_num_planes(pixel_format);
@@ -194,24 +198,17 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
                 if (src_x & (hsub - 1) && num_planes == 1)
                         ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
 
-                for (i = 0; i < num_planes; i++)
-                        addr[i] = obj->dev_addr + fb->offsets[i] +
-                                  src_y * fb->pitches[i] +
-                                  src_x * drm_format_plane_cpp(pixel_format, i);
-                for (; i < ARRAY_SIZE(addr); i++)
-                        addr[i] = 0;
-
-                armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
+                armada_reg_queue_set(dplane->vbl.regs, idx, addrs[0],
                                      LCD_SPU_DMA_START_ADDR_Y0);
-                armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
+                armada_reg_queue_set(dplane->vbl.regs, idx, addrs[1],
                                      LCD_SPU_DMA_START_ADDR_U0);
-                armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
+                armada_reg_queue_set(dplane->vbl.regs, idx, addrs[2],
                                      LCD_SPU_DMA_START_ADDR_V0);
-                armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
+                armada_reg_queue_set(dplane->vbl.regs, idx, addrs[0],
                                      LCD_SPU_DMA_START_ADDR_Y1);
-                armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
+                armada_reg_queue_set(dplane->vbl.regs, idx, addrs[1],
                                      LCD_SPU_DMA_START_ADDR_U1);
-                armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
+                armada_reg_queue_set(dplane->vbl.regs, idx, addrs[2],
                                      LCD_SPU_DMA_START_ADDR_V1);
 
                 val = fb->pitches[0] << 16 | fb->pitches[0];
@@ -223,28 +220,28 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
         }
 
         val = (drm_rect_height(&src) & 0xffff0000) | drm_rect_width(&src) >> 16;
-        if (dplane->src_hw != val) {
-                dplane->src_hw = val;
+        if (dplane->base.state.src_hw != val) {
+                dplane->base.state.src_hw = val;
                 armada_reg_queue_set(dplane->vbl.regs, idx, val,
                                      LCD_SPU_DMA_HPXL_VLN);
         }
 
         val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
-        if (dplane->dst_hw != val) {
-                dplane->dst_hw = val;
+        if (dplane->base.state.dst_hw != val) {
+                dplane->base.state.dst_hw = val;
                 armada_reg_queue_set(dplane->vbl.regs, idx, val,
                                      LCD_SPU_DZM_HPXL_VLN);
         }
 
         val = dest.y1 << 16 | dest.x1;
-        if (dplane->dst_yx != val) {
-                dplane->dst_yx = val;
+        if (dplane->base.state.dst_yx != val) {
+                dplane->base.state.dst_yx = val;
                 armada_reg_queue_set(dplane->vbl.regs, idx, val,
                                      LCD_SPU_DMA_OVSA_HPXL_VLN);
         }
 
-        if (dplane->ctrl0 != ctrl0) {
-                dplane->ctrl0 = ctrl0;
+        if (dplane->base.state.ctrl0 != ctrl0) {
+                dplane->base.state.ctrl0 = ctrl0;
                 armada_reg_queue_mod(dplane->vbl.regs, idx, ctrl0,
                         CFG_CBSH_ENA | CFG_DMAFORMAT | CFG_DMA_FTOGGLE |
                         CFG_DMA_HSMOOTH | CFG_DMA_TSTMODE |
@@ -275,7 +272,7 @@ static int armada_ovl_plane_disable(struct drm_plane *plane)
         armada_drm_crtc_plane_disable(dcrtc, plane);
 
         dcrtc->plane = NULL;
-        dplane->ctrl0 = 0;
+        dplane->base.state.ctrl0 = 0;
 
         fb = xchg(&dplane->old_fb, NULL);
         if (fb)
diff --git a/drivers/gpu/drm/armada/armada_trace.c b/drivers/gpu/drm/armada/armada_trace.c
new file mode 100644
index 000000000000..068b336ba75f
--- /dev/null
+++ b/drivers/gpu/drm/armada/armada_trace.c
@@ -0,0 +1,4 @@
+#ifndef __CHECKER__
+#define CREATE_TRACE_POINTS
+#include "armada_trace.h"
+#endif
diff --git a/drivers/gpu/drm/armada/armada_trace.h b/drivers/gpu/drm/armada/armada_trace.h
new file mode 100644
index 000000000000..dc0cba70fd1a
--- /dev/null
+++ b/drivers/gpu/drm/armada/armada_trace.h
@@ -0,0 +1,66 @@
+#if !defined(ARMADA_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
+#define ARMADA_TRACE_H
+
+#include <linux/tracepoint.h>
+#include <drm/drmP.h>
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM armada
+#define TRACE_INCLUDE_FILE armada_trace
+
+TRACE_EVENT(armada_drm_irq,
+        TP_PROTO(struct drm_crtc *crtc, u32 stat),
+        TP_ARGS(crtc, stat),
+        TP_STRUCT__entry(
+                __field(struct drm_crtc *, crtc)
+                __field(u32, stat)
+        ),
+        TP_fast_assign(
+                __entry->crtc = crtc;
+                __entry->stat = stat;
+        ),
+        TP_printk("crtc %p stat 0x%08x",
+                __entry->crtc, __entry->stat)
+);
+
+TRACE_EVENT(armada_ovl_plane_update,
+        TP_PROTO(struct drm_plane *plane, struct drm_crtc *crtc,
+                     struct drm_framebuffer *fb,
+                     int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h,
+                     uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h),
+        TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h),
+        TP_STRUCT__entry(
+                __field(struct drm_plane *, plane)
+                __field(struct drm_crtc *, crtc)
+                __field(struct drm_framebuffer *, fb)
+        ),
+        TP_fast_assign(
+                __entry->plane = plane;
+                __entry->crtc = crtc;
+                __entry->fb = fb;
+        ),
+        TP_printk("plane %p crtc %p fb %p",
+                __entry->plane, __entry->crtc, __entry->fb)
+);
+
+TRACE_EVENT(armada_ovl_plane_work,
+        TP_PROTO(struct drm_crtc *crtc, struct drm_plane *plane),
+        TP_ARGS(crtc, plane),
+        TP_STRUCT__entry(
+                __field(struct drm_plane *, plane)
+                __field(struct drm_crtc *, crtc)
+        ),
+        TP_fast_assign(
+                __entry->plane = plane;
+                __entry->crtc = crtc;
+        ),
+        TP_printk("plane %p crtc %p",
+                __entry->plane, __entry->crtc)
+);
+
+#endif
+
+/* This part must be outside protection */
+#undef TRACE_INCLUDE_PATH
+#define TRACE_INCLUDE_PATH .
+#include <trace/define_trace.h>