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authorFabrice Gasnier <fabrice.gasnier@st.com>2017-04-10 11:49:50 -0400
committerJonathan Cameron <jic23@kernel.org>2017-04-14 11:36:16 -0400
commit4d4b30526eb88c4528ddfa8c113961c1ac178479 (patch)
treeeb212f4d39643823e2d757387799b34e8fa84d32
parent48428d17325291f5be8c0420efca7e312587d9ad (diff)
iio: dac: add support for stm32 DAC
Add support for STMicroelectronics STM32 DAC. It's a 12-bit, voltage output digital-to-analog converter. It has two output channels, each with its own converter. It supports 8 bits or 12bits left/right aligned data format. Only 12bits right-aligned is used here. It has built-in noise or triangle waveform generator, and supports external triggers for conversions. Each channel can be used independently, with separate trigger, then separate IIO devices are used to handle this. Core driver is intended to share common resources such as clock, reset, reference voltage and registers. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
-rw-r--r--drivers/iio/dac/Kconfig15
-rw-r--r--drivers/iio/dac/Makefile2
-rw-r--r--drivers/iio/dac/stm32-dac-core.c180
-rw-r--r--drivers/iio/dac/stm32-dac-core.h51
-rw-r--r--drivers/iio/dac/stm32-dac.c334
5 files changed, 582 insertions, 0 deletions
diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig
index 08f2f9037409..df5abc46cd3f 100644
--- a/drivers/iio/dac/Kconfig
+++ b/drivers/iio/dac/Kconfig
@@ -284,6 +284,21 @@ config MCP4922
284 To compile this driver as a module, choose M here: the module 284 To compile this driver as a module, choose M here: the module
285 will be called mcp4922. 285 will be called mcp4922.
286 286
287config STM32_DAC
288 tristate "STMicroelectronics STM32 DAC"
289 depends on (ARCH_STM32 && OF) || COMPILE_TEST
290 depends on REGULATOR
291 select STM32_DAC_CORE
292 help
293 Say yes here to build support for STMicroelectronics STM32 Digital
294 to Analog Converter (DAC).
295
296 This driver can also be built as a module. If so, the module
297 will be called stm32-dac.
298
299config STM32_DAC_CORE
300 tristate
301
287config VF610_DAC 302config VF610_DAC
288 tristate "Vybrid vf610 DAC driver" 303 tristate "Vybrid vf610 DAC driver"
289 depends on OF 304 depends on OF
diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile
index 6e4d99557309..603587cc2f07 100644
--- a/drivers/iio/dac/Makefile
+++ b/drivers/iio/dac/Makefile
@@ -30,4 +30,6 @@ obj-$(CONFIG_MAX517) += max517.o
30obj-$(CONFIG_MAX5821) += max5821.o 30obj-$(CONFIG_MAX5821) += max5821.o
31obj-$(CONFIG_MCP4725) += mcp4725.o 31obj-$(CONFIG_MCP4725) += mcp4725.o
32obj-$(CONFIG_MCP4922) += mcp4922.o 32obj-$(CONFIG_MCP4922) += mcp4922.o
33obj-$(CONFIG_STM32_DAC_CORE) += stm32-dac-core.o
34obj-$(CONFIG_STM32_DAC) += stm32-dac.o
33obj-$(CONFIG_VF610_DAC) += vf610_dac.o 35obj-$(CONFIG_VF610_DAC) += vf610_dac.o
diff --git a/drivers/iio/dac/stm32-dac-core.c b/drivers/iio/dac/stm32-dac-core.c
new file mode 100644
index 000000000000..75e48788c7ea
--- /dev/null
+++ b/drivers/iio/dac/stm32-dac-core.c
@@ -0,0 +1,180 @@
1/*
2 * This file is part of STM32 DAC driver
3 *
4 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
5 * Author: Fabrice Gasnier <fabrice.gasnier@st.com>.
6 *
7 * License type: GPLv2
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published by
11 * the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE.
16 * See the GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along with
19 * this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <linux/clk.h>
23#include <linux/delay.h>
24#include <linux/module.h>
25#include <linux/of_platform.h>
26#include <linux/regulator/consumer.h>
27#include <linux/reset.h>
28
29#include "stm32-dac-core.h"
30
31/**
32 * struct stm32_dac_priv - stm32 DAC core private data
33 * @pclk: peripheral clock common for all DACs
34 * @rst: peripheral reset control
35 * @vref: regulator reference
36 * @common: Common data for all DAC instances
37 */
38struct stm32_dac_priv {
39 struct clk *pclk;
40 struct reset_control *rst;
41 struct regulator *vref;
42 struct stm32_dac_common common;
43};
44
45static struct stm32_dac_priv *to_stm32_dac_priv(struct stm32_dac_common *com)
46{
47 return container_of(com, struct stm32_dac_priv, common);
48}
49
50static const struct regmap_config stm32_dac_regmap_cfg = {
51 .reg_bits = 32,
52 .val_bits = 32,
53 .reg_stride = sizeof(u32),
54 .max_register = 0x3fc,
55};
56
57static int stm32_dac_probe(struct platform_device *pdev)
58{
59 struct device *dev = &pdev->dev;
60 struct stm32_dac_priv *priv;
61 struct regmap *regmap;
62 struct resource *res;
63 void __iomem *mmio;
64 int ret;
65
66 if (!dev->of_node)
67 return -ENODEV;
68
69 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
70 if (!priv)
71 return -ENOMEM;
72
73 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
74 mmio = devm_ioremap_resource(dev, res);
75 if (IS_ERR(mmio))
76 return PTR_ERR(mmio);
77
78 regmap = devm_regmap_init_mmio(dev, mmio, &stm32_dac_regmap_cfg);
79 if (IS_ERR(regmap))
80 return PTR_ERR(regmap);
81 priv->common.regmap = regmap;
82
83 priv->vref = devm_regulator_get(dev, "vref");
84 if (IS_ERR(priv->vref)) {
85 ret = PTR_ERR(priv->vref);
86 dev_err(dev, "vref get failed, %d\n", ret);
87 return ret;
88 }
89
90 ret = regulator_enable(priv->vref);
91 if (ret < 0) {
92 dev_err(dev, "vref enable failed\n");
93 return ret;
94 }
95
96 ret = regulator_get_voltage(priv->vref);
97 if (ret < 0) {
98 dev_err(dev, "vref get voltage failed, %d\n", ret);
99 goto err_vref;
100 }
101 priv->common.vref_mv = ret / 1000;
102 dev_dbg(dev, "vref+=%dmV\n", priv->common.vref_mv);
103
104 priv->pclk = devm_clk_get(dev, "pclk");
105 if (IS_ERR(priv->pclk)) {
106 ret = PTR_ERR(priv->pclk);
107 dev_err(dev, "pclk get failed\n");
108 goto err_vref;
109 }
110
111 ret = clk_prepare_enable(priv->pclk);
112 if (ret < 0) {
113 dev_err(dev, "pclk enable failed\n");
114 goto err_vref;
115 }
116
117 priv->rst = devm_reset_control_get(dev, NULL);
118 if (!IS_ERR(priv->rst)) {
119 reset_control_assert(priv->rst);
120 udelay(2);
121 reset_control_deassert(priv->rst);
122 }
123
124 /* When clock speed is higher than 80MHz, set HFSEL */
125 priv->common.hfsel = (clk_get_rate(priv->pclk) > 80000000UL);
126 ret = regmap_update_bits(regmap, STM32_DAC_CR, STM32H7_DAC_CR_HFSEL,
127 priv->common.hfsel ? STM32H7_DAC_CR_HFSEL : 0);
128 if (ret)
129 goto err_pclk;
130
131 platform_set_drvdata(pdev, &priv->common);
132
133 ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, dev);
134 if (ret < 0) {
135 dev_err(dev, "failed to populate DT children\n");
136 goto err_pclk;
137 }
138
139 return 0;
140
141err_pclk:
142 clk_disable_unprepare(priv->pclk);
143err_vref:
144 regulator_disable(priv->vref);
145
146 return ret;
147}
148
149static int stm32_dac_remove(struct platform_device *pdev)
150{
151 struct stm32_dac_common *common = platform_get_drvdata(pdev);
152 struct stm32_dac_priv *priv = to_stm32_dac_priv(common);
153
154 of_platform_depopulate(&pdev->dev);
155 clk_disable_unprepare(priv->pclk);
156 regulator_disable(priv->vref);
157
158 return 0;
159}
160
161static const struct of_device_id stm32_dac_of_match[] = {
162 { .compatible = "st,stm32h7-dac-core", },
163 {},
164};
165MODULE_DEVICE_TABLE(of, stm32_dac_of_match);
166
167static struct platform_driver stm32_dac_driver = {
168 .probe = stm32_dac_probe,
169 .remove = stm32_dac_remove,
170 .driver = {
171 .name = "stm32-dac-core",
172 .of_match_table = stm32_dac_of_match,
173 },
174};
175module_platform_driver(stm32_dac_driver);
176
177MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
178MODULE_DESCRIPTION("STMicroelectronics STM32 DAC core driver");
179MODULE_LICENSE("GPL v2");
180MODULE_ALIAS("platform:stm32-dac-core");
diff --git a/drivers/iio/dac/stm32-dac-core.h b/drivers/iio/dac/stm32-dac-core.h
new file mode 100644
index 000000000000..daf09931857c
--- /dev/null
+++ b/drivers/iio/dac/stm32-dac-core.h
@@ -0,0 +1,51 @@
1/*
2 * This file is part of STM32 DAC driver
3 *
4 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
5 * Author: Fabrice Gasnier <fabrice.gasnier@st.com>.
6 *
7 * License type: GPLv2
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published by
11 * the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE.
16 * See the GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along with
19 * this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#ifndef __STM32_DAC_CORE_H
23#define __STM32_DAC_CORE_H
24
25#include <linux/regmap.h>
26
27/* STM32 DAC registers */
28#define STM32_DAC_CR 0x00
29#define STM32_DAC_DHR12R1 0x08
30#define STM32_DAC_DHR12R2 0x14
31#define STM32_DAC_DOR1 0x2C
32#define STM32_DAC_DOR2 0x30
33
34/* STM32_DAC_CR bit fields */
35#define STM32_DAC_CR_EN1 BIT(0)
36#define STM32H7_DAC_CR_HFSEL BIT(15)
37#define STM32_DAC_CR_EN2 BIT(16)
38
39/**
40 * struct stm32_dac_common - stm32 DAC driver common data (for all instances)
41 * @regmap: DAC registers shared via regmap
42 * @vref_mv: reference voltage (mv)
43 * @hfsel: high speed bus clock selected
44 */
45struct stm32_dac_common {
46 struct regmap *regmap;
47 int vref_mv;
48 bool hfsel;
49};
50
51#endif
diff --git a/drivers/iio/dac/stm32-dac.c b/drivers/iio/dac/stm32-dac.c
new file mode 100644
index 000000000000..50f8ec091058
--- /dev/null
+++ b/drivers/iio/dac/stm32-dac.c
@@ -0,0 +1,334 @@
1/*
2 * This file is part of STM32 DAC driver
3 *
4 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
5 * Authors: Amelie Delaunay <amelie.delaunay@st.com>
6 * Fabrice Gasnier <fabrice.gasnier@st.com>
7 *
8 * License type: GPLv2
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 * or FITNESS FOR A PARTICULAR PURPOSE.
17 * See the GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23#include <linux/bitfield.h>
24#include <linux/delay.h>
25#include <linux/iio/iio.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/platform_device.h>
29
30#include "stm32-dac-core.h"
31
32#define STM32_DAC_CHANNEL_1 1
33#define STM32_DAC_CHANNEL_2 2
34#define STM32_DAC_IS_CHAN_1(ch) ((ch) & STM32_DAC_CHANNEL_1)
35
36/**
37 * struct stm32_dac - private data of DAC driver
38 * @common: reference to DAC common data
39 */
40struct stm32_dac {
41 struct stm32_dac_common *common;
42};
43
44static int stm32_dac_is_enabled(struct iio_dev *indio_dev, int channel)
45{
46 struct stm32_dac *dac = iio_priv(indio_dev);
47 u32 en, val;
48 int ret;
49
50 ret = regmap_read(dac->common->regmap, STM32_DAC_CR, &val);
51 if (ret < 0)
52 return ret;
53 if (STM32_DAC_IS_CHAN_1(channel))
54 en = FIELD_GET(STM32_DAC_CR_EN1, val);
55 else
56 en = FIELD_GET(STM32_DAC_CR_EN2, val);
57
58 return !!en;
59}
60
61static int stm32_dac_set_enable_state(struct iio_dev *indio_dev, int ch,
62 bool enable)
63{
64 struct stm32_dac *dac = iio_priv(indio_dev);
65 u32 msk = STM32_DAC_IS_CHAN_1(ch) ? STM32_DAC_CR_EN1 : STM32_DAC_CR_EN2;
66 u32 en = enable ? msk : 0;
67 int ret;
68
69 ret = regmap_update_bits(dac->common->regmap, STM32_DAC_CR, msk, en);
70 if (ret < 0) {
71 dev_err(&indio_dev->dev, "%s failed\n", en ?
72 "Enable" : "Disable");
73 return ret;
74 }
75
76 /*
77 * When HFSEL is set, it is not allowed to write the DHRx register
78 * during 8 clock cycles after the ENx bit is set. It is not allowed
79 * to make software/hardware trigger during this period either.
80 */
81 if (en && dac->common->hfsel)
82 udelay(1);
83
84 return 0;
85}
86
87static int stm32_dac_get_value(struct stm32_dac *dac, int channel, int *val)
88{
89 int ret;
90
91 if (STM32_DAC_IS_CHAN_1(channel))
92 ret = regmap_read(dac->common->regmap, STM32_DAC_DOR1, val);
93 else
94 ret = regmap_read(dac->common->regmap, STM32_DAC_DOR2, val);
95
96 return ret ? ret : IIO_VAL_INT;
97}
98
99static int stm32_dac_set_value(struct stm32_dac *dac, int channel, int val)
100{
101 int ret;
102
103 if (STM32_DAC_IS_CHAN_1(channel))
104 ret = regmap_write(dac->common->regmap, STM32_DAC_DHR12R1, val);
105 else
106 ret = regmap_write(dac->common->regmap, STM32_DAC_DHR12R2, val);
107
108 return ret;
109}
110
111static int stm32_dac_read_raw(struct iio_dev *indio_dev,
112 struct iio_chan_spec const *chan,
113 int *val, int *val2, long mask)
114{
115 struct stm32_dac *dac = iio_priv(indio_dev);
116
117 switch (mask) {
118 case IIO_CHAN_INFO_RAW:
119 return stm32_dac_get_value(dac, chan->channel, val);
120 case IIO_CHAN_INFO_SCALE:
121 *val = dac->common->vref_mv;
122 *val2 = chan->scan_type.realbits;
123 return IIO_VAL_FRACTIONAL_LOG2;
124 default:
125 return -EINVAL;
126 }
127}
128
129static int stm32_dac_write_raw(struct iio_dev *indio_dev,
130 struct iio_chan_spec const *chan,
131 int val, int val2, long mask)
132{
133 struct stm32_dac *dac = iio_priv(indio_dev);
134
135 switch (mask) {
136 case IIO_CHAN_INFO_RAW:
137 return stm32_dac_set_value(dac, chan->channel, val);
138 default:
139 return -EINVAL;
140 }
141}
142
143static int stm32_dac_debugfs_reg_access(struct iio_dev *indio_dev,
144 unsigned reg, unsigned writeval,
145 unsigned *readval)
146{
147 struct stm32_dac *dac = iio_priv(indio_dev);
148
149 if (!readval)
150 return regmap_write(dac->common->regmap, reg, writeval);
151 else
152 return regmap_read(dac->common->regmap, reg, readval);
153}
154
155static const struct iio_info stm32_dac_iio_info = {
156 .read_raw = stm32_dac_read_raw,
157 .write_raw = stm32_dac_write_raw,
158 .debugfs_reg_access = stm32_dac_debugfs_reg_access,
159 .driver_module = THIS_MODULE,
160};
161
162static const char * const stm32_dac_powerdown_modes[] = {
163 "three_state",
164};
165
166static int stm32_dac_get_powerdown_mode(struct iio_dev *indio_dev,
167 const struct iio_chan_spec *chan)
168{
169 return 0;
170}
171
172static int stm32_dac_set_powerdown_mode(struct iio_dev *indio_dev,
173 const struct iio_chan_spec *chan,
174 unsigned int type)
175{
176 return 0;
177}
178
179static ssize_t stm32_dac_read_powerdown(struct iio_dev *indio_dev,
180 uintptr_t private,
181 const struct iio_chan_spec *chan,
182 char *buf)
183{
184 int ret = stm32_dac_is_enabled(indio_dev, chan->channel);
185
186 if (ret < 0)
187 return ret;
188
189 return sprintf(buf, "%d\n", ret ? 0 : 1);
190}
191
192static ssize_t stm32_dac_write_powerdown(struct iio_dev *indio_dev,
193 uintptr_t private,
194 const struct iio_chan_spec *chan,
195 const char *buf, size_t len)
196{
197 bool powerdown;
198 int ret;
199
200 ret = strtobool(buf, &powerdown);
201 if (ret)
202 return ret;
203
204 ret = stm32_dac_set_enable_state(indio_dev, chan->channel, !powerdown);
205 if (ret)
206 return ret;
207
208 return len;
209}
210
211static const struct iio_enum stm32_dac_powerdown_mode_en = {
212 .items = stm32_dac_powerdown_modes,
213 .num_items = ARRAY_SIZE(stm32_dac_powerdown_modes),
214 .get = stm32_dac_get_powerdown_mode,
215 .set = stm32_dac_set_powerdown_mode,
216};
217
218static const struct iio_chan_spec_ext_info stm32_dac_ext_info[] = {
219 {
220 .name = "powerdown",
221 .read = stm32_dac_read_powerdown,
222 .write = stm32_dac_write_powerdown,
223 .shared = IIO_SEPARATE,
224 },
225 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &stm32_dac_powerdown_mode_en),
226 IIO_ENUM_AVAILABLE("powerdown_mode", &stm32_dac_powerdown_mode_en),
227 {},
228};
229
230#define STM32_DAC_CHANNEL(chan, name) { \
231 .type = IIO_VOLTAGE, \
232 .indexed = 1, \
233 .output = 1, \
234 .channel = chan, \
235 .info_mask_separate = \
236 BIT(IIO_CHAN_INFO_RAW) | \
237 BIT(IIO_CHAN_INFO_SCALE), \
238 /* scan_index is always 0 as num_channels is 1 */ \
239 .scan_type = { \
240 .sign = 'u', \
241 .realbits = 12, \
242 .storagebits = 16, \
243 }, \
244 .datasheet_name = name, \
245 .ext_info = stm32_dac_ext_info \
246}
247
248static const struct iio_chan_spec stm32_dac_channels[] = {
249 STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_1, "out1"),
250 STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_2, "out2"),
251};
252
253static int stm32_dac_chan_of_init(struct iio_dev *indio_dev)
254{
255 struct device_node *np = indio_dev->dev.of_node;
256 unsigned int i;
257 u32 channel;
258 int ret;
259
260 ret = of_property_read_u32(np, "reg", &channel);
261 if (ret) {
262 dev_err(&indio_dev->dev, "Failed to read reg property\n");
263 return ret;
264 }
265
266 for (i = 0; i < ARRAY_SIZE(stm32_dac_channels); i++) {
267 if (stm32_dac_channels[i].channel == channel)
268 break;
269 }
270 if (i >= ARRAY_SIZE(stm32_dac_channels)) {
271 dev_err(&indio_dev->dev, "Invalid st,dac-channel\n");
272 return -EINVAL;
273 }
274
275 indio_dev->channels = &stm32_dac_channels[i];
276 /*
277 * Expose only one channel here, as they can be used independently,
278 * with separate trigger. Then separate IIO devices are instantiated
279 * to manage this.
280 */
281 indio_dev->num_channels = 1;
282
283 return 0;
284};
285
286static int stm32_dac_probe(struct platform_device *pdev)
287{
288 struct device_node *np = pdev->dev.of_node;
289 struct iio_dev *indio_dev;
290 struct stm32_dac *dac;
291 int ret;
292
293 if (!np)
294 return -ENODEV;
295
296 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*dac));
297 if (!indio_dev)
298 return -ENOMEM;
299 platform_set_drvdata(pdev, indio_dev);
300
301 dac = iio_priv(indio_dev);
302 dac->common = dev_get_drvdata(pdev->dev.parent);
303 indio_dev->name = dev_name(&pdev->dev);
304 indio_dev->dev.parent = &pdev->dev;
305 indio_dev->dev.of_node = pdev->dev.of_node;
306 indio_dev->info = &stm32_dac_iio_info;
307 indio_dev->modes = INDIO_DIRECT_MODE;
308
309 ret = stm32_dac_chan_of_init(indio_dev);
310 if (ret < 0)
311 return ret;
312
313 return devm_iio_device_register(&pdev->dev, indio_dev);
314}
315
316static const struct of_device_id stm32_dac_of_match[] = {
317 { .compatible = "st,stm32-dac", },
318 {},
319};
320MODULE_DEVICE_TABLE(of, stm32_dac_of_match);
321
322static struct platform_driver stm32_dac_driver = {
323 .probe = stm32_dac_probe,
324 .driver = {
325 .name = "stm32-dac",
326 .of_match_table = stm32_dac_of_match,
327 },
328};
329module_platform_driver(stm32_dac_driver);
330
331MODULE_ALIAS("platform:stm32-dac");
332MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
333MODULE_DESCRIPTION("STMicroelectronics STM32 DAC driver");
334MODULE_LICENSE("GPL v2");