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authorArchit Taneja <architt@codeaurora.org>2015-04-02 01:50:41 -0400
committerStephen Boyd <sboyd@codeaurora.org>2015-04-06 17:07:49 -0400
commit4c385b25fab119144bffb255ad77712fe586ac10 (patch)
treec5cfd13e58e699b94524de7b4ec52d4d57bf587b
parentf375573c96470a27b911aeb1c0a25212d0e145a2 (diff)
clk: qcom: Add EBI2 clocks for IPQ806x
The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. Create structs for these clocks so that they can be used by the NAND controller driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r--drivers/clk/qcom/gcc-ipq806x.c32
-rw-r--r--include/dt-bindings/clock/qcom,gcc-ipq806x.h1
2 files changed, 33 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index ee73cc7f6e55..a50936a17376 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -2172,6 +2172,36 @@ static struct clk_branch usb_fs1_h_clk = {
2172 }, 2172 },
2173}; 2173};
2174 2174
2175static struct clk_branch ebi2_clk = {
2176 .hwcg_reg = 0x3b00,
2177 .hwcg_bit = 6,
2178 .halt_reg = 0x2fcc,
2179 .halt_bit = 1,
2180 .clkr = {
2181 .enable_reg = 0x3b00,
2182 .enable_mask = BIT(4),
2183 .hw.init = &(struct clk_init_data){
2184 .name = "ebi2_clk",
2185 .ops = &clk_branch_ops,
2186 .flags = CLK_IS_ROOT,
2187 },
2188 },
2189};
2190
2191static struct clk_branch ebi2_aon_clk = {
2192 .halt_reg = 0x2fcc,
2193 .halt_bit = 0,
2194 .clkr = {
2195 .enable_reg = 0x3b00,
2196 .enable_mask = BIT(8),
2197 .hw.init = &(struct clk_init_data){
2198 .name = "ebi2_always_on_clk",
2199 .ops = &clk_branch_ops,
2200 .flags = CLK_IS_ROOT,
2201 },
2202 },
2203};
2204
2175static struct clk_regmap *gcc_ipq806x_clks[] = { 2205static struct clk_regmap *gcc_ipq806x_clks[] = {
2176 [PLL0] = &pll0.clkr, 2206 [PLL0] = &pll0.clkr,
2177 [PLL0_VOTE] = &pll0_vote, 2207 [PLL0_VOTE] = &pll0_vote,
@@ -2275,6 +2305,8 @@ static struct clk_regmap *gcc_ipq806x_clks[] = {
2275 [USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr, 2305 [USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr,
2276 [USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr, 2306 [USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr,
2277 [USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr, 2307 [USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr,
2308 [EBI2_CLK] = &ebi2_clk.clkr,
2309 [EBI2_AON_CLK] = &ebi2_aon_clk.clkr,
2278}; 2310};
2279 2311
2280static const struct qcom_reset_map gcc_ipq806x_resets[] = { 2312static const struct qcom_reset_map gcc_ipq806x_resets[] = {
diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
index 04fb29ae30e6..ebd63fd05649 100644
--- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
@@ -288,5 +288,6 @@
288#define UBI32_CORE2_CLK_SRC 278 288#define UBI32_CORE2_CLK_SRC 278
289#define UBI32_CORE1_CLK 279 289#define UBI32_CORE1_CLK 279
290#define UBI32_CORE2_CLK 280 290#define UBI32_CORE2_CLK 280
291#define EBI2_AON_CLK 281
291 292
292#endif 293#endif