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authorStephen Boyd <sboyd@codeaurora.org>2015-01-29 18:38:13 -0500
committerMichael Turquette <mturquette@linaro.org>2015-02-25 15:08:39 -0500
commit4be8fc04700aafeb3c8a9c10ece5652e08ec0e94 (patch)
treeba872a77f78d9c7146a345d15beba8896050ca0c
parent84b919fdb8559a8cd5432d8fa0002219df59cb32 (diff)
clk: qcom: Add PLL4 vote clock
This clock is needed for most audio clock frequencies. Add it. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
-rw-r--r--drivers/clk/qcom/gcc-msm8960.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index b0b562b9ce0e..e60feffc10a1 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -48,6 +48,17 @@ static struct clk_pll pll3 = {
48 }, 48 },
49}; 49};
50 50
51static struct clk_regmap pll4_vote = {
52 .enable_reg = 0x34c0,
53 .enable_mask = BIT(4),
54 .hw.init = &(struct clk_init_data){
55 .name = "pll4_vote",
56 .parent_names = (const char *[]){ "pll4" },
57 .num_parents = 1,
58 .ops = &clk_pll_vote_ops,
59 },
60};
61
51static struct clk_pll pll8 = { 62static struct clk_pll pll8 = {
52 .l_reg = 0x3144, 63 .l_reg = 0x3144,
53 .m_reg = 0x3148, 64 .m_reg = 0x3148,
@@ -3023,6 +3034,7 @@ static struct clk_branch rpm_msg_ram_h_clk = {
3023 3034
3024static struct clk_regmap *gcc_msm8960_clks[] = { 3035static struct clk_regmap *gcc_msm8960_clks[] = {
3025 [PLL3] = &pll3.clkr, 3036 [PLL3] = &pll3.clkr,
3037 [PLL4_VOTE] = &pll4_vote,
3026 [PLL8] = &pll8.clkr, 3038 [PLL8] = &pll8.clkr,
3027 [PLL8_VOTE] = &pll8_vote, 3039 [PLL8_VOTE] = &pll8_vote,
3028 [PLL14] = &pll14.clkr, 3040 [PLL14] = &pll14.clkr,
@@ -3247,6 +3259,7 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = {
3247 3259
3248static struct clk_regmap *gcc_apq8064_clks[] = { 3260static struct clk_regmap *gcc_apq8064_clks[] = {
3249 [PLL3] = &pll3.clkr, 3261 [PLL3] = &pll3.clkr,
3262 [PLL4_VOTE] = &pll4_vote,
3250 [PLL8] = &pll8.clkr, 3263 [PLL8] = &pll8.clkr,
3251 [PLL8_VOTE] = &pll8_vote, 3264 [PLL8_VOTE] = &pll8_vote,
3252 [PLL14] = &pll14.clkr, 3265 [PLL14] = &pll14.clkr,