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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2016-12-05 06:27:37 -0500
committerKalle Valo <kvalo@qca.qualcomm.com>2016-12-15 03:26:42 -0500
commit4bca5303eb55d3876e719367290c08b11c70cf78 (patch)
treeff5ed970d1b946ae67d31062e6fb84e282933f79
parent68fbe792916cdf6c96def64c1bc50a39443a136a (diff)
ath9k: define all EEPROM fields in Little Endian format
The ar9300_eeprom logic is already using only 8-bit (endian neutral), __le16 and __le32 fields to state explicitly how the values should be interpreted. All other EEPROM implementations (4k, 9287 and def) were using u16 and u32 fields with additional logic to swap the values (read from the original EEPROM) so they match the current CPUs endianness. The EEPROM format defaults to "all values are Little Endian", indicated by the absence of the AR5416_EEPMISC_BIG_ENDIAN in the u8 EEPMISC register. If we detect that the EEPROM indicates Big Endian mode (AR5416_EEPMISC_BIG_ENDIAN is set in the EEPMISC register) then we'll swap the values to convert them into Little Endian. This is done by activating the EEPMISC based logic in ath9k_hw_nvram_swap_data even if AH_NO_EEP_SWAP is set (this makes ath9k behave like the FreeBSD driver, which also does not have a flag to enable swapping based on the AR5416_EEPMISC_BIG_ENDIAN bit). Before this logic was only used to enable swapping when "current CPU endianness != EEPROM endianness". After changing all relevant fields to __le16 and __le32 sparse was used to check that all code which reads any of these fields uses le{16,32}_to_cpu. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.c27
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.h75
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_4k.c94
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_9287.c98
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_def.c114
5 files changed, 174 insertions, 234 deletions
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c
index 0e46797601be..fb80ec86e53d 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
@@ -155,17 +155,10 @@ bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data)
155 return ret; 155 return ret;
156} 156}
157 157
158#ifdef __BIG_ENDIAN
159#define EXPECTED_EEPMISC_ENDIAN AR5416_EEPMISC_BIG_ENDIAN
160#else
161#define EXPECTED_EEPMISC_ENDIAN 0
162#endif
163
164int ath9k_hw_nvram_swap_data(struct ath_hw *ah, bool *swap_needed, int size) 158int ath9k_hw_nvram_swap_data(struct ath_hw *ah, bool *swap_needed, int size)
165{ 159{
166 u16 magic; 160 u16 magic;
167 u16 *eepdata; 161 u16 *eepdata;
168 u8 eepmisc;
169 int i; 162 int i;
170 bool needs_byteswap = false; 163 bool needs_byteswap = false;
171 struct ath_common *common = ath9k_hw_common(ah); 164 struct ath_common *common = ath9k_hw_common(ah);
@@ -203,25 +196,17 @@ int ath9k_hw_nvram_swap_data(struct ath_hw *ah, bool *swap_needed, int size)
203 } 196 }
204 } 197 }
205 198
206 *swap_needed = false; 199 if (ah->eep_ops->get_eepmisc(ah) & AR5416_EEPMISC_BIG_ENDIAN) {
207 200 *swap_needed = true;
208 eepmisc = ah->eep_ops->get_eepmisc(ah); 201 ath_dbg(common, EEPROM,
209 if ((eepmisc & AR5416_EEPMISC_BIG_ENDIAN) != EXPECTED_EEPMISC_ENDIAN) { 202 "Big Endian EEPROM detected according to EEPMISC register.\n");
210 if (ah->ah_flags & AH_NO_EEP_SWAP) { 203 } else {
211 ath_info(common, 204 *swap_needed = false;
212 "Ignoring endianness difference in eepmisc register.\n");
213 } else {
214 *swap_needed = true;
215 ath_dbg(common, EEPROM,
216 "EEPROM needs swapping according to the eepmisc register.\n");
217 }
218 } 205 }
219 206
220 return 0; 207 return 0;
221} 208}
222 209
223#undef EXPECTED_EEPMISC_VAL
224
225bool ath9k_hw_nvram_validate_checksum(struct ath_hw *ah, int size) 210bool ath9k_hw_nvram_validate_checksum(struct ath_hw *ah, int size)
226{ 211{
227 u32 i, sum = 0; 212 u32 i, sum = 0;
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h
index 5a24fb5dc0a0..30bf722e33ed 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -23,6 +23,17 @@
23#include <net/cfg80211.h> 23#include <net/cfg80211.h>
24#include "ar9003_eeprom.h" 24#include "ar9003_eeprom.h"
25 25
26/* helpers to swap EEPROM fields, which are stored as __le16 or __le32. Since
27 * we are 100% sure about it we __force these to u16/u32 for the swab calls to
28 * silence the sparse checks. These macros are used when we have a Big Endian
29 * EEPROM (according to AR5416_EEPMISC_BIG_ENDIAN) and need to convert the
30 * fields to __le16/__le32.
31 */
32#define EEPROM_FIELD_SWAB16(field) \
33 (field = (__force __le16)swab16((__force u16)field))
34#define EEPROM_FIELD_SWAB32(field) \
35 (field = (__force __le32)swab32((__force u32)field))
36
26#ifdef __BIG_ENDIAN 37#ifdef __BIG_ENDIAN
27#define AR5416_EEPROM_MAGIC 0x5aa5 38#define AR5416_EEPROM_MAGIC 0x5aa5
28#else 39#else
@@ -270,19 +281,19 @@ enum ath9k_hal_freq_band {
270}; 281};
271 282
272struct base_eep_header { 283struct base_eep_header {
273 u16 length; 284 __le16 length;
274 u16 checksum; 285 __le16 checksum;
275 u16 version; 286 __le16 version;
276 u8 opCapFlags; 287 u8 opCapFlags;
277 u8 eepMisc; 288 u8 eepMisc;
278 u16 regDmn[2]; 289 __le16 regDmn[2];
279 u8 macAddr[6]; 290 u8 macAddr[6];
280 u8 rxMask; 291 u8 rxMask;
281 u8 txMask; 292 u8 txMask;
282 u16 rfSilent; 293 __le16 rfSilent;
283 u16 blueToothOptions; 294 __le16 blueToothOptions;
284 u16 deviceCap; 295 __le16 deviceCap;
285 u32 binBuildNumber; 296 __le32 binBuildNumber;
286 u8 deviceType; 297 u8 deviceType;
287 u8 pwdclkind; 298 u8 pwdclkind;
288 u8 fastClk5g; 299 u8 fastClk5g;
@@ -300,33 +311,33 @@ struct base_eep_header {
300} __packed; 311} __packed;
301 312
302struct base_eep_header_4k { 313struct base_eep_header_4k {
303 u16 length; 314 __le16 length;
304 u16 checksum; 315 __le16 checksum;
305 u16 version; 316 __le16 version;
306 u8 opCapFlags; 317 u8 opCapFlags;
307 u8 eepMisc; 318 u8 eepMisc;
308 u16 regDmn[2]; 319 __le16 regDmn[2];
309 u8 macAddr[6]; 320 u8 macAddr[6];
310 u8 rxMask; 321 u8 rxMask;
311 u8 txMask; 322 u8 txMask;
312 u16 rfSilent; 323 __le16 rfSilent;
313 u16 blueToothOptions; 324 __le16 blueToothOptions;
314 u16 deviceCap; 325 __le16 deviceCap;
315 u32 binBuildNumber; 326 __le32 binBuildNumber;
316 u8 deviceType; 327 u8 deviceType;
317 u8 txGainType; 328 u8 txGainType;
318} __packed; 329} __packed;
319 330
320 331
321struct spur_chan { 332struct spur_chan {
322 u16 spurChan; 333 __le16 spurChan;
323 u8 spurRangeLow; 334 u8 spurRangeLow;
324 u8 spurRangeHigh; 335 u8 spurRangeHigh;
325} __packed; 336} __packed;
326 337
327struct modal_eep_header { 338struct modal_eep_header {
328 u32 antCtrlChain[AR5416_MAX_CHAINS]; 339 __le32 antCtrlChain[AR5416_MAX_CHAINS];
329 u32 antCtrlCommon; 340 __le32 antCtrlCommon;
330 u8 antennaGainCh[AR5416_MAX_CHAINS]; 341 u8 antennaGainCh[AR5416_MAX_CHAINS];
331 u8 switchSettling; 342 u8 switchSettling;
332 u8 txRxAttenCh[AR5416_MAX_CHAINS]; 343 u8 txRxAttenCh[AR5416_MAX_CHAINS];
@@ -361,7 +372,7 @@ struct modal_eep_header {
361 u8 db_ch1; 372 u8 db_ch1;
362 u8 lna_ctl; 373 u8 lna_ctl;
363 u8 miscBits; 374 u8 miscBits;
364 u16 xpaBiasLvlFreq[3]; 375 __le16 xpaBiasLvlFreq[3];
365 u8 futureModal[6]; 376 u8 futureModal[6];
366 377
367 struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS]; 378 struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS];
@@ -375,8 +386,8 @@ struct calDataPerFreqOpLoop {
375} __packed; 386} __packed;
376 387
377struct modal_eep_4k_header { 388struct modal_eep_4k_header {
378 u32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS]; 389 __le32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS];
379 u32 antCtrlCommon; 390 __le32 antCtrlCommon;
380 u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS]; 391 u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS];
381 u8 switchSettling; 392 u8 switchSettling;
382 u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS]; 393 u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS];
@@ -440,19 +451,19 @@ struct modal_eep_4k_header {
440} __packed; 451} __packed;
441 452
442struct base_eep_ar9287_header { 453struct base_eep_ar9287_header {
443 u16 length; 454 __le16 length;
444 u16 checksum; 455 __le16 checksum;
445 u16 version; 456 __le16 version;
446 u8 opCapFlags; 457 u8 opCapFlags;
447 u8 eepMisc; 458 u8 eepMisc;
448 u16 regDmn[2]; 459 __le16 regDmn[2];
449 u8 macAddr[6]; 460 u8 macAddr[6];
450 u8 rxMask; 461 u8 rxMask;
451 u8 txMask; 462 u8 txMask;
452 u16 rfSilent; 463 __le16 rfSilent;
453 u16 blueToothOptions; 464 __le16 blueToothOptions;
454 u16 deviceCap; 465 __le16 deviceCap;
455 u32 binBuildNumber; 466 __le32 binBuildNumber;
456 u8 deviceType; 467 u8 deviceType;
457 u8 openLoopPwrCntl; 468 u8 openLoopPwrCntl;
458 int8_t pwrTableOffset; 469 int8_t pwrTableOffset;
@@ -462,8 +473,8 @@ struct base_eep_ar9287_header {
462} __packed; 473} __packed;
463 474
464struct modal_eep_ar9287_header { 475struct modal_eep_ar9287_header {
465 u32 antCtrlChain[AR9287_MAX_CHAINS]; 476 __le32 antCtrlChain[AR9287_MAX_CHAINS];
466 u32 antCtrlCommon; 477 __le32 antCtrlCommon;
467 int8_t antennaGainCh[AR9287_MAX_CHAINS]; 478 int8_t antennaGainCh[AR9287_MAX_CHAINS];
468 u8 switchSettling; 479 u8 switchSettling;
469 u8 txRxAttenCh[AR9287_MAX_CHAINS]; 480 u8 txRxAttenCh[AR9287_MAX_CHAINS];
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
index 76ce109629b9..4a01ebe53053 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
@@ -20,7 +20,7 @@
20 20
21static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah) 21static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
22{ 22{
23 u16 version = ah->eeprom.map4k.baseEepHeader.version; 23 u16 version = le16_to_cpu(ah->eeprom.map4k.baseEepHeader.version);
24 24
25 return (version & AR5416_EEP_VER_MAJOR_MASK) >> 25 return (version & AR5416_EEP_VER_MAJOR_MASK) >>
26 AR5416_EEP_VER_MAJOR_SHIFT; 26 AR5416_EEP_VER_MAJOR_SHIFT;
@@ -28,7 +28,7 @@ static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
28 28
29static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah) 29static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah)
30{ 30{
31 u16 version = ah->eeprom.map4k.baseEepHeader.version; 31 u16 version = le16_to_cpu(ah->eeprom.map4k.baseEepHeader.version);
32 32
33 return version & AR5416_EEP_VER_MINOR_MASK; 33 return version & AR5416_EEP_VER_MINOR_MASK;
34} 34}
@@ -76,8 +76,8 @@ static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
76static u32 ath9k_dump_4k_modal_eeprom(char *buf, u32 len, u32 size, 76static u32 ath9k_dump_4k_modal_eeprom(char *buf, u32 len, u32 size,
77 struct modal_eep_4k_header *modal_hdr) 77 struct modal_eep_4k_header *modal_hdr)
78{ 78{
79 PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]); 79 PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
80 PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon); 80 PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
81 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); 81 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
82 PR_EEP("Switch Settle", modal_hdr->switchSettling); 82 PR_EEP("Switch Settle", modal_hdr->switchSettling);
83 PR_EEP("Chain0 TxRxAtten", modal_hdr->txRxAttenCh[0]); 83 PR_EEP("Chain0 TxRxAtten", modal_hdr->txRxAttenCh[0]);
@@ -132,6 +132,7 @@ static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
132{ 132{
133 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k; 133 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
134 struct base_eep_header_4k *pBase = &eep->baseEepHeader; 134 struct base_eep_header_4k *pBase = &eep->baseEepHeader;
135 u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
135 136
136 if (!dump_base_hdr) { 137 if (!dump_base_hdr) {
137 len += scnprintf(buf + len, size - len, 138 len += scnprintf(buf + len, size - len,
@@ -143,10 +144,10 @@ static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
143 144
144 PR_EEP("Major Version", ath9k_hw_4k_get_eeprom_ver(ah)); 145 PR_EEP("Major Version", ath9k_hw_4k_get_eeprom_ver(ah));
145 PR_EEP("Minor Version", ath9k_hw_4k_get_eeprom_rev(ah)); 146 PR_EEP("Minor Version", ath9k_hw_4k_get_eeprom_rev(ah));
146 PR_EEP("Checksum", pBase->checksum); 147 PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
147 PR_EEP("Length", pBase->length); 148 PR_EEP("Length", le16_to_cpu(pBase->length));
148 PR_EEP("RegDomain1", pBase->regDmn[0]); 149 PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
149 PR_EEP("RegDomain2", pBase->regDmn[1]); 150 PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
150 PR_EEP("TX Mask", pBase->txMask); 151 PR_EEP("TX Mask", pBase->txMask);
151 PR_EEP("RX Mask", pBase->rxMask); 152 PR_EEP("RX Mask", pBase->rxMask);
152 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); 153 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
@@ -160,9 +161,9 @@ static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
160 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & 161 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
161 AR5416_OPFLAGS_N_5G_HT40)); 162 AR5416_OPFLAGS_N_5G_HT40));
162 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); 163 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
163 PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF); 164 PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
164 PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF); 165 PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
165 PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF); 166 PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
166 PR_EEP("TX Gain type", pBase->txGainType); 167 PR_EEP("TX Gain type", pBase->txGainType);
167 168
168 len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress", 169 len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress",
@@ -194,54 +195,31 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
194 return err; 195 return err;
195 196
196 if (need_swap) 197 if (need_swap)
197 el = swab16(eep->baseEepHeader.length); 198 el = swab16((__force u16)eep->baseEepHeader.length);
198 else 199 else
199 el = eep->baseEepHeader.length; 200 el = le16_to_cpu(eep->baseEepHeader.length);
200 201
201 el = min(el / sizeof(u16), SIZE_EEPROM_4K); 202 el = min(el / sizeof(u16), SIZE_EEPROM_4K);
202 if (!ath9k_hw_nvram_validate_checksum(ah, el)) 203 if (!ath9k_hw_nvram_validate_checksum(ah, el))
203 return -EINVAL; 204 return -EINVAL;
204 205
205 if (need_swap) { 206 if (need_swap) {
206 u32 integer; 207 EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
207 u16 word; 208 EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
208 209 EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
209 word = swab16(eep->baseEepHeader.length); 210 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
210 eep->baseEepHeader.length = word; 211 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
211 212 EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
212 word = swab16(eep->baseEepHeader.checksum); 213 EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
213 eep->baseEepHeader.checksum = word; 214 EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
214 215 EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon);
215 word = swab16(eep->baseEepHeader.version); 216
216 eep->baseEepHeader.version = word; 217 for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++)
217 218 EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]);
218 word = swab16(eep->baseEepHeader.regDmn[0]); 219
219 eep->baseEepHeader.regDmn[0] = word; 220 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
220 221 EEPROM_FIELD_SWAB16(
221 word = swab16(eep->baseEepHeader.regDmn[1]); 222 eep->modalHeader.spurChans[i].spurChan);
222 eep->baseEepHeader.regDmn[1] = word;
223
224 word = swab16(eep->baseEepHeader.rfSilent);
225 eep->baseEepHeader.rfSilent = word;
226
227 word = swab16(eep->baseEepHeader.blueToothOptions);
228 eep->baseEepHeader.blueToothOptions = word;
229
230 word = swab16(eep->baseEepHeader.deviceCap);
231 eep->baseEepHeader.deviceCap = word;
232
233 integer = swab32(eep->modalHeader.antCtrlCommon);
234 eep->modalHeader.antCtrlCommon = integer;
235
236 for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
237 integer = swab32(eep->modalHeader.antCtrlChain[i]);
238 eep->modalHeader.antCtrlChain[i] = integer;
239 }
240
241 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
242 word = swab16(eep->modalHeader.spurChans[i].spurChan);
243 eep->modalHeader.spurChans[i].spurChan = word;
244 }
245 } 223 }
246 224
247 if (!ath9k_hw_nvram_check_version(ah, AR5416_EEP_VER, 225 if (!ath9k_hw_nvram_check_version(ah, AR5416_EEP_VER,
@@ -270,13 +248,13 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
270 case EEP_MAC_MSW: 248 case EEP_MAC_MSW:
271 return get_unaligned_be16(pBase->macAddr + 4); 249 return get_unaligned_be16(pBase->macAddr + 4);
272 case EEP_REG_0: 250 case EEP_REG_0:
273 return pBase->regDmn[0]; 251 return le16_to_cpu(pBase->regDmn[0]);
274 case EEP_OP_CAP: 252 case EEP_OP_CAP:
275 return pBase->deviceCap; 253 return le16_to_cpu(pBase->deviceCap);
276 case EEP_OP_MODE: 254 case EEP_OP_MODE:
277 return pBase->opCapFlags; 255 return pBase->opCapFlags;
278 case EEP_RF_SILENT: 256 case EEP_RF_SILENT:
279 return pBase->rfSilent; 257 return le16_to_cpu(pBase->rfSilent);
280 case EEP_OB_2: 258 case EEP_OB_2:
281 return pModal->ob_0; 259 return pModal->ob_0;
282 case EEP_DB_2: 260 case EEP_DB_2:
@@ -724,7 +702,7 @@ static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
724{ 702{
725 ENABLE_REG_RMW_BUFFER(ah); 703 ENABLE_REG_RMW_BUFFER(ah);
726 REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 704 REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0,
727 pModal->antCtrlChain[0], 0); 705 le32_to_cpu(pModal->antCtrlChain[0]), 0);
728 706
729 REG_RMW(ah, AR_PHY_TIMING_CTRL4(0), 707 REG_RMW(ah, AR_PHY_TIMING_CTRL4(0),
730 SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) | 708 SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
@@ -790,7 +768,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
790 pModal = &eep->modalHeader; 768 pModal = &eep->modalHeader;
791 txRxAttenLocal = 23; 769 txRxAttenLocal = 23;
792 770
793 REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon); 771 REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon));
794 772
795 /* Single chain for 4K EEPROM*/ 773 /* Single chain for 4K EEPROM*/
796 ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal); 774 ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal);
@@ -1054,7 +1032,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
1054 1032
1055static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) 1033static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
1056{ 1034{
1057 return ah->eeprom.map4k.modalHeader.spurChans[i].spurChan; 1035 return le16_to_cpu(ah->eeprom.map4k.modalHeader.spurChans[i].spurChan);
1058} 1036}
1059 1037
1060static u8 ath9k_hw_4k_get_eepmisc(struct ath_hw *ah) 1038static u8 ath9k_hw_4k_get_eepmisc(struct ath_hw *ah)
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
index daeaf12ca23e..9611f020f7c0 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
@@ -22,7 +22,7 @@
22 22
23static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah) 23static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah)
24{ 24{
25 u16 version = ah->eeprom.map9287.baseEepHeader.version; 25 u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version);
26 26
27 return (version & AR5416_EEP_VER_MAJOR_MASK) >> 27 return (version & AR5416_EEP_VER_MAJOR_MASK) >>
28 AR5416_EEP_VER_MAJOR_SHIFT; 28 AR5416_EEP_VER_MAJOR_SHIFT;
@@ -30,7 +30,7 @@ static int ath9k_hw_ar9287_get_eeprom_ver(struct ath_hw *ah)
30 30
31static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah) 31static int ath9k_hw_ar9287_get_eeprom_rev(struct ath_hw *ah)
32{ 32{
33 u16 version = ah->eeprom.map9287.baseEepHeader.version; 33 u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version);
34 34
35 return version & AR5416_EEP_VER_MINOR_MASK; 35 return version & AR5416_EEP_VER_MINOR_MASK;
36} 36}
@@ -79,9 +79,9 @@ static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
79static u32 ar9287_dump_modal_eeprom(char *buf, u32 len, u32 size, 79static u32 ar9287_dump_modal_eeprom(char *buf, u32 len, u32 size,
80 struct modal_eep_ar9287_header *modal_hdr) 80 struct modal_eep_ar9287_header *modal_hdr)
81{ 81{
82 PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]); 82 PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
83 PR_EEP("Chain1 Ant. Control", modal_hdr->antCtrlChain[1]); 83 PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1]));
84 PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon); 84 PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
85 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); 85 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
86 PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]); 86 PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]);
87 PR_EEP("Switch Settle", modal_hdr->switchSettling); 87 PR_EEP("Switch Settle", modal_hdr->switchSettling);
@@ -128,6 +128,7 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
128{ 128{
129 struct ar9287_eeprom *eep = &ah->eeprom.map9287; 129 struct ar9287_eeprom *eep = &ah->eeprom.map9287;
130 struct base_eep_ar9287_header *pBase = &eep->baseEepHeader; 130 struct base_eep_ar9287_header *pBase = &eep->baseEepHeader;
131 u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
131 132
132 if (!dump_base_hdr) { 133 if (!dump_base_hdr) {
133 len += scnprintf(buf + len, size - len, 134 len += scnprintf(buf + len, size - len,
@@ -139,10 +140,10 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
139 140
140 PR_EEP("Major Version", ath9k_hw_ar9287_get_eeprom_ver(ah)); 141 PR_EEP("Major Version", ath9k_hw_ar9287_get_eeprom_ver(ah));
141 PR_EEP("Minor Version", ath9k_hw_ar9287_get_eeprom_rev(ah)); 142 PR_EEP("Minor Version", ath9k_hw_ar9287_get_eeprom_rev(ah));
142 PR_EEP("Checksum", pBase->checksum); 143 PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
143 PR_EEP("Length", pBase->length); 144 PR_EEP("Length", le16_to_cpu(pBase->length));
144 PR_EEP("RegDomain1", pBase->regDmn[0]); 145 PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
145 PR_EEP("RegDomain2", pBase->regDmn[1]); 146 PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
146 PR_EEP("TX Mask", pBase->txMask); 147 PR_EEP("TX Mask", pBase->txMask);
147 PR_EEP("RX Mask", pBase->rxMask); 148 PR_EEP("RX Mask", pBase->rxMask);
148 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); 149 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
@@ -156,9 +157,9 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
156 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & 157 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
157 AR5416_OPFLAGS_N_5G_HT40)); 158 AR5416_OPFLAGS_N_5G_HT40));
158 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); 159 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
159 PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF); 160 PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
160 PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF); 161 PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
161 PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF); 162 PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
162 PR_EEP("Power Table Offset", pBase->pwrTableOffset); 163 PR_EEP("Power Table Offset", pBase->pwrTableOffset);
163 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl); 164 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl);
164 165
@@ -182,8 +183,7 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
182 183
183static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah) 184static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
184{ 185{
185 u32 el, integer; 186 u32 el;
186 u16 word;
187 int i, err; 187 int i, err;
188 bool need_swap; 188 bool need_swap;
189 struct ar9287_eeprom *eep = &ah->eeprom.map9287; 189 struct ar9287_eeprom *eep = &ah->eeprom.map9287;
@@ -193,51 +193,31 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
193 return err; 193 return err;
194 194
195 if (need_swap) 195 if (need_swap)
196 el = swab16(eep->baseEepHeader.length); 196 el = swab16((__force u16)eep->baseEepHeader.length);
197 else 197 else
198 el = eep->baseEepHeader.length; 198 el = le16_to_cpu(eep->baseEepHeader.length);
199 199
200 el = min(el / sizeof(u16), SIZE_EEPROM_AR9287); 200 el = min(el / sizeof(u16), SIZE_EEPROM_AR9287);
201 if (!ath9k_hw_nvram_validate_checksum(ah, el)) 201 if (!ath9k_hw_nvram_validate_checksum(ah, el))
202 return -EINVAL; 202 return -EINVAL;
203 203
204 if (need_swap) { 204 if (need_swap) {
205 word = swab16(eep->baseEepHeader.length); 205 EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
206 eep->baseEepHeader.length = word; 206 EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
207 207 EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
208 word = swab16(eep->baseEepHeader.checksum); 208 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
209 eep->baseEepHeader.checksum = word; 209 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
210 210 EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
211 word = swab16(eep->baseEepHeader.version); 211 EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
212 eep->baseEepHeader.version = word; 212 EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
213 213 EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon);
214 word = swab16(eep->baseEepHeader.regDmn[0]); 214
215 eep->baseEepHeader.regDmn[0] = word; 215 for (i = 0; i < AR9287_MAX_CHAINS; i++)
216 216 EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]);
217 word = swab16(eep->baseEepHeader.regDmn[1]); 217
218 eep->baseEepHeader.regDmn[1] = word; 218 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
219 219 EEPROM_FIELD_SWAB16(
220 word = swab16(eep->baseEepHeader.rfSilent); 220 eep->modalHeader.spurChans[i].spurChan);
221 eep->baseEepHeader.rfSilent = word;
222
223 word = swab16(eep->baseEepHeader.blueToothOptions);
224 eep->baseEepHeader.blueToothOptions = word;
225
226 word = swab16(eep->baseEepHeader.deviceCap);
227 eep->baseEepHeader.deviceCap = word;
228
229 integer = swab32(eep->modalHeader.antCtrlCommon);
230 eep->modalHeader.antCtrlCommon = integer;
231
232 for (i = 0; i < AR9287_MAX_CHAINS; i++) {
233 integer = swab32(eep->modalHeader.antCtrlChain[i]);
234 eep->modalHeader.antCtrlChain[i] = integer;
235 }
236
237 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
238 word = swab16(eep->modalHeader.spurChans[i].spurChan);
239 eep->modalHeader.spurChans[i].spurChan = word;
240 }
241 } 221 }
242 222
243 if (!ath9k_hw_nvram_check_version(ah, AR9287_EEP_VER, 223 if (!ath9k_hw_nvram_check_version(ah, AR9287_EEP_VER,
@@ -267,13 +247,13 @@ static u32 ath9k_hw_ar9287_get_eeprom(struct ath_hw *ah,
267 case EEP_MAC_MSW: 247 case EEP_MAC_MSW:
268 return get_unaligned_be16(pBase->macAddr + 4); 248 return get_unaligned_be16(pBase->macAddr + 4);
269 case EEP_REG_0: 249 case EEP_REG_0:
270 return pBase->regDmn[0]; 250 return le16_to_cpu(pBase->regDmn[0]);
271 case EEP_OP_CAP: 251 case EEP_OP_CAP:
272 return pBase->deviceCap; 252 return le16_to_cpu(pBase->deviceCap);
273 case EEP_OP_MODE: 253 case EEP_OP_MODE:
274 return pBase->opCapFlags; 254 return pBase->opCapFlags;
275 case EEP_RF_SILENT: 255 case EEP_RF_SILENT:
276 return pBase->rfSilent; 256 return le16_to_cpu(pBase->rfSilent);
277 case EEP_TX_MASK: 257 case EEP_TX_MASK:
278 return pBase->txMask; 258 return pBase->txMask;
279 case EEP_RX_MASK: 259 case EEP_RX_MASK:
@@ -878,13 +858,13 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
878 858
879 pModal = &eep->modalHeader; 859 pModal = &eep->modalHeader;
880 860
881 REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon); 861 REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon));
882 862
883 for (i = 0; i < AR9287_MAX_CHAINS; i++) { 863 for (i = 0; i < AR9287_MAX_CHAINS; i++) {
884 regChainOffset = i * 0x1000; 864 regChainOffset = i * 0x1000;
885 865
886 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, 866 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
887 pModal->antCtrlChain[i]); 867 le32_to_cpu(pModal->antCtrlChain[i]));
888 868
889 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, 869 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
890 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) 870 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset)
@@ -982,7 +962,9 @@ static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
982static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah, 962static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
983 u16 i, bool is2GHz) 963 u16 i, bool is2GHz)
984{ 964{
985 return ah->eeprom.map9287.modalHeader.spurChans[i].spurChan; 965 __le16 spur_ch = ah->eeprom.map9287.modalHeader.spurChans[i].spurChan;
966
967 return le16_to_cpu(spur_ch);
986} 968}
987 969
988static u8 ath9k_hw_ar9287_get_eepmisc(struct ath_hw *ah) 970static u8 ath9k_hw_ar9287_get_eepmisc(struct ath_hw *ah)
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index bd5bd627e00a..7d5223451ce9 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -79,7 +79,7 @@ static void ath9k_olc_get_pdadcs(struct ath_hw *ah,
79 79
80static int ath9k_hw_def_get_eeprom_ver(struct ath_hw *ah) 80static int ath9k_hw_def_get_eeprom_ver(struct ath_hw *ah)
81{ 81{
82 u16 version = ah->eeprom.def.baseEepHeader.version; 82 u16 version = le16_to_cpu(ah->eeprom.def.baseEepHeader.version);
83 83
84 return (version & AR5416_EEP_VER_MAJOR_MASK) >> 84 return (version & AR5416_EEP_VER_MAJOR_MASK) >>
85 AR5416_EEP_VER_MAJOR_SHIFT; 85 AR5416_EEP_VER_MAJOR_SHIFT;
@@ -87,7 +87,7 @@ static int ath9k_hw_def_get_eeprom_ver(struct ath_hw *ah)
87 87
88static int ath9k_hw_def_get_eeprom_rev(struct ath_hw *ah) 88static int ath9k_hw_def_get_eeprom_rev(struct ath_hw *ah)
89{ 89{
90 u16 version = ah->eeprom.def.baseEepHeader.version; 90 u16 version = le16_to_cpu(ah->eeprom.def.baseEepHeader.version);
91 91
92 return version & AR5416_EEP_VER_MINOR_MASK; 92 return version & AR5416_EEP_VER_MINOR_MASK;
93} 93}
@@ -135,10 +135,10 @@ static bool ath9k_hw_def_fill_eeprom(struct ath_hw *ah)
135static u32 ath9k_def_dump_modal_eeprom(char *buf, u32 len, u32 size, 135static u32 ath9k_def_dump_modal_eeprom(char *buf, u32 len, u32 size,
136 struct modal_eep_header *modal_hdr) 136 struct modal_eep_header *modal_hdr)
137{ 137{
138 PR_EEP("Chain0 Ant. Control", modal_hdr->antCtrlChain[0]); 138 PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0]));
139 PR_EEP("Chain1 Ant. Control", modal_hdr->antCtrlChain[1]); 139 PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1]));
140 PR_EEP("Chain2 Ant. Control", modal_hdr->antCtrlChain[2]); 140 PR_EEP("Chain2 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[2]));
141 PR_EEP("Ant. Common Control", modal_hdr->antCtrlCommon); 141 PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon));
142 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); 142 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]);
143 PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]); 143 PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]);
144 PR_EEP("Chain2 Ant. Gain", modal_hdr->antennaGainCh[2]); 144 PR_EEP("Chain2 Ant. Gain", modal_hdr->antennaGainCh[2]);
@@ -194,9 +194,9 @@ static u32 ath9k_def_dump_modal_eeprom(char *buf, u32 len, u32 size,
194 PR_EEP("Chain1 OutputBias", modal_hdr->ob_ch1); 194 PR_EEP("Chain1 OutputBias", modal_hdr->ob_ch1);
195 PR_EEP("Chain1 DriverBias", modal_hdr->db_ch1); 195 PR_EEP("Chain1 DriverBias", modal_hdr->db_ch1);
196 PR_EEP("LNA Control", modal_hdr->lna_ctl); 196 PR_EEP("LNA Control", modal_hdr->lna_ctl);
197 PR_EEP("XPA Bias Freq0", modal_hdr->xpaBiasLvlFreq[0]); 197 PR_EEP("XPA Bias Freq0", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[0]));
198 PR_EEP("XPA Bias Freq1", modal_hdr->xpaBiasLvlFreq[1]); 198 PR_EEP("XPA Bias Freq1", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[1]));
199 PR_EEP("XPA Bias Freq2", modal_hdr->xpaBiasLvlFreq[2]); 199 PR_EEP("XPA Bias Freq2", le16_to_cpu(modal_hdr->xpaBiasLvlFreq[2]));
200 200
201 return len; 201 return len;
202} 202}
@@ -206,6 +206,7 @@ static u32 ath9k_hw_def_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
206{ 206{
207 struct ar5416_eeprom_def *eep = &ah->eeprom.def; 207 struct ar5416_eeprom_def *eep = &ah->eeprom.def;
208 struct base_eep_header *pBase = &eep->baseEepHeader; 208 struct base_eep_header *pBase = &eep->baseEepHeader;
209 u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber);
209 210
210 if (!dump_base_hdr) { 211 if (!dump_base_hdr) {
211 len += scnprintf(buf + len, size - len, 212 len += scnprintf(buf + len, size - len,
@@ -221,10 +222,10 @@ static u32 ath9k_hw_def_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
221 222
222 PR_EEP("Major Version", ath9k_hw_def_get_eeprom_ver(ah)); 223 PR_EEP("Major Version", ath9k_hw_def_get_eeprom_ver(ah));
223 PR_EEP("Minor Version", ath9k_hw_def_get_eeprom_rev(ah)); 224 PR_EEP("Minor Version", ath9k_hw_def_get_eeprom_rev(ah));
224 PR_EEP("Checksum", pBase->checksum); 225 PR_EEP("Checksum", le16_to_cpu(pBase->checksum));
225 PR_EEP("Length", pBase->length); 226 PR_EEP("Length", le16_to_cpu(pBase->length));
226 PR_EEP("RegDomain1", pBase->regDmn[0]); 227 PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));
227 PR_EEP("RegDomain2", pBase->regDmn[1]); 228 PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));
228 PR_EEP("TX Mask", pBase->txMask); 229 PR_EEP("TX Mask", pBase->txMask);
229 PR_EEP("RX Mask", pBase->rxMask); 230 PR_EEP("RX Mask", pBase->rxMask);
230 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); 231 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A));
@@ -238,9 +239,9 @@ static u32 ath9k_hw_def_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
238 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & 239 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
239 AR5416_OPFLAGS_N_5G_HT40)); 240 AR5416_OPFLAGS_N_5G_HT40));
240 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); 241 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
241 PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF); 242 PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF);
242 PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF); 243 PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF);
243 PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF); 244 PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF);
244 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl); 245 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl);
245 246
246 len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress", 247 len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress",
@@ -273,61 +274,40 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
273 return err; 274 return err;
274 275
275 if (need_swap) 276 if (need_swap)
276 el = swab16(eep->baseEepHeader.length); 277 el = swab16((__force u16)eep->baseEepHeader.length);
277 else 278 else
278 el = eep->baseEepHeader.length; 279 el = le16_to_cpu(eep->baseEepHeader.length);
279 280
280 el = min(el / sizeof(u16), SIZE_EEPROM_DEF); 281 el = min(el / sizeof(u16), SIZE_EEPROM_DEF);
281 if (!ath9k_hw_nvram_validate_checksum(ah, el)) 282 if (!ath9k_hw_nvram_validate_checksum(ah, el))
282 return -EINVAL; 283 return -EINVAL;
283 284
284 if (need_swap) { 285 if (need_swap) {
285 u32 integer, j; 286 u32 j;
286 u16 word;
287 287
288 word = swab16(eep->baseEepHeader.length); 288 EEPROM_FIELD_SWAB16(eep->baseEepHeader.length);
289 eep->baseEepHeader.length = word; 289 EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum);
290 290 EEPROM_FIELD_SWAB16(eep->baseEepHeader.version);
291 word = swab16(eep->baseEepHeader.checksum); 291 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]);
292 eep->baseEepHeader.checksum = word; 292 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]);
293 293 EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent);
294 word = swab16(eep->baseEepHeader.version); 294 EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions);
295 eep->baseEepHeader.version = word; 295 EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap);
296
297 word = swab16(eep->baseEepHeader.regDmn[0]);
298 eep->baseEepHeader.regDmn[0] = word;
299
300 word = swab16(eep->baseEepHeader.regDmn[1]);
301 eep->baseEepHeader.regDmn[1] = word;
302
303 word = swab16(eep->baseEepHeader.rfSilent);
304 eep->baseEepHeader.rfSilent = word;
305
306 word = swab16(eep->baseEepHeader.blueToothOptions);
307 eep->baseEepHeader.blueToothOptions = word;
308
309 word = swab16(eep->baseEepHeader.deviceCap);
310 eep->baseEepHeader.deviceCap = word;
311 296
312 for (j = 0; j < ARRAY_SIZE(eep->modalHeader); j++) { 297 for (j = 0; j < ARRAY_SIZE(eep->modalHeader); j++) {
313 struct modal_eep_header *pModal = 298 struct modal_eep_header *pModal =
314 &eep->modalHeader[j]; 299 &eep->modalHeader[j];
315 integer = swab32(pModal->antCtrlCommon); 300 EEPROM_FIELD_SWAB32(pModal->antCtrlCommon);
316 pModal->antCtrlCommon = integer;
317 301
318 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 302 for (i = 0; i < AR5416_MAX_CHAINS; i++)
319 integer = swab32(pModal->antCtrlChain[i]); 303 EEPROM_FIELD_SWAB32(pModal->antCtrlChain[i]);
320 pModal->antCtrlChain[i] = integer;
321 }
322 for (i = 0; i < 3; i++) {
323 word = swab16(pModal->xpaBiasLvlFreq[i]);
324 pModal->xpaBiasLvlFreq[i] = word;
325 }
326 304
327 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) { 305 for (i = 0; i < 3; i++)
328 word = swab16(pModal->spurChans[i].spurChan); 306 EEPROM_FIELD_SWAB16(pModal->xpaBiasLvlFreq[i]);
329 pModal->spurChans[i].spurChan = word; 307
330 } 308 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++)
309 EEPROM_FIELD_SWAB16(
310 pModal->spurChans[i].spurChan);
331 } 311 }
332 } 312 }
333 313
@@ -337,7 +317,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
337 317
338 /* Enable fixup for AR_AN_TOP2 if necessary */ 318 /* Enable fixup for AR_AN_TOP2 if necessary */
339 if ((ah->hw_version.devid == AR9280_DEVID_PCI) && 319 if ((ah->hw_version.devid == AR9280_DEVID_PCI) &&
340 ((eep->baseEepHeader.version & 0xff) > 0x0a) && 320 ((le16_to_cpu(eep->baseEepHeader.version) & 0xff) > 0x0a) &&
341 (eep->baseEepHeader.pwdclkind == 0)) 321 (eep->baseEepHeader.pwdclkind == 0))
342 ah->need_an_top2_fixup = true; 322 ah->need_an_top2_fixup = true;
343 323
@@ -370,13 +350,13 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
370 case EEP_MAC_MSW: 350 case EEP_MAC_MSW:
371 return get_unaligned_be16(pBase->macAddr + 4); 351 return get_unaligned_be16(pBase->macAddr + 4);
372 case EEP_REG_0: 352 case EEP_REG_0:
373 return pBase->regDmn[0]; 353 return le16_to_cpu(pBase->regDmn[0]);
374 case EEP_OP_CAP: 354 case EEP_OP_CAP:
375 return pBase->deviceCap; 355 return le16_to_cpu(pBase->deviceCap);
376 case EEP_OP_MODE: 356 case EEP_OP_MODE:
377 return pBase->opCapFlags; 357 return pBase->opCapFlags;
378 case EEP_RF_SILENT: 358 case EEP_RF_SILENT:
379 return pBase->rfSilent; 359 return le16_to_cpu(pBase->rfSilent);
380 case EEP_OB_5: 360 case EEP_OB_5:
381 return pModal[0].ob; 361 return pModal[0].ob;
382 case EEP_DB_5: 362 case EEP_DB_5:
@@ -490,11 +470,13 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
490 struct ar5416_eeprom_def *eep = &ah->eeprom.def; 470 struct ar5416_eeprom_def *eep = &ah->eeprom.def;
491 int i, regChainOffset; 471 int i, regChainOffset;
492 u8 txRxAttenLocal; 472 u8 txRxAttenLocal;
473 u32 antCtrlCommon;
493 474
494 pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]); 475 pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]);
495 txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44; 476 txRxAttenLocal = IS_CHAN_2GHZ(chan) ? 23 : 44;
477 antCtrlCommon = le32_to_cpu(pModal->antCtrlCommon);
496 478
497 REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon & 0xffff); 479 REG_WRITE(ah, AR_PHY_SWITCH_COM, antCtrlCommon & 0xffff);
498 480
499 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 481 for (i = 0; i < AR5416_MAX_CHAINS; i++) {
500 if (AR_SREV_9280(ah)) { 482 if (AR_SREV_9280(ah)) {
@@ -508,7 +490,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
508 regChainOffset = i * 0x1000; 490 regChainOffset = i * 0x1000;
509 491
510 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, 492 REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
511 pModal->antCtrlChain[i]); 493 le32_to_cpu(pModal->antCtrlChain[i]));
512 494
513 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, 495 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
514 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) & 496 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &
@@ -655,7 +637,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
655static void ath9k_hw_def_set_addac(struct ath_hw *ah, 637static void ath9k_hw_def_set_addac(struct ath_hw *ah,
656 struct ath9k_channel *chan) 638 struct ath9k_channel *chan)
657{ 639{
658#define XPA_LVL_FREQ(cnt) (pModal->xpaBiasLvlFreq[cnt]) 640#define XPA_LVL_FREQ(cnt) (le16_to_cpu(pModal->xpaBiasLvlFreq[cnt]))
659 struct modal_eep_header *pModal; 641 struct modal_eep_header *pModal;
660 struct ar5416_eeprom_def *eep = &ah->eeprom.def; 642 struct ar5416_eeprom_def *eep = &ah->eeprom.def;
661 u8 biaslevel; 643 u8 biaslevel;
@@ -1315,7 +1297,9 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
1315 1297
1316static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) 1298static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
1317{ 1299{
1318 return ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan; 1300 __le16 spch = ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan;
1301
1302 return le16_to_cpu(spch);
1319} 1303}
1320 1304
1321static u8 ath9k_hw_def_get_eepmisc(struct ath_hw *ah) 1305static u8 ath9k_hw_def_get_eepmisc(struct ath_hw *ah)