diff options
author | Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> | 2014-12-07 16:49:34 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2015-01-07 12:02:14 -0500 |
commit | 4b2171876b6e93f32ad0576a07d823783ccd1f16 (patch) | |
tree | 191772560686249c818e7a8ebd428402100969e3 | |
parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) |
ARM: OMAP2+: clkt2xxx_apll.c: Remove some unused functions
Removes some functions that are not used anywhere:
omap2_clk_apll54_disable() omap2_clk_apll96_disable()
omap2_clk_apll54_enable() omap2_clk_apll96_enable() omap2xxx_get_apll_clkin()
omap2_clk_apll96_recalc() omap2_clk_apll54_recalc()
This was partially found by using a static code analysis program called cppcheck.
Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
[tony@atomide.com: updated to fix a build warning]
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_apll.c | 71 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock2xxx.h | 9 |
2 files changed, 0 insertions, 80 deletions
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c index c78e893eba7d..02cb08875326 100644 --- a/arch/arm/mach-omap2/clkt2xxx_apll.c +++ b/arch/arm/mach-omap2/clkt2xxx_apll.c | |||
@@ -38,35 +38,6 @@ | |||
38 | 38 | ||
39 | /* Private functions */ | 39 | /* Private functions */ |
40 | 40 | ||
41 | /** | ||
42 | * omap2xxx_clk_apll_locked - is the APLL locked? | ||
43 | * @hw: struct clk_hw * of the APLL to check | ||
44 | * | ||
45 | * If the APLL IP block referred to by @hw indicates that it's locked, | ||
46 | * return true; otherwise, return false. | ||
47 | */ | ||
48 | static bool omap2xxx_clk_apll_locked(struct clk_hw *hw) | ||
49 | { | ||
50 | struct clk_hw_omap *clk = to_clk_hw_omap(hw); | ||
51 | u32 r, apll_mask; | ||
52 | |||
53 | apll_mask = EN_APLL_LOCKED << clk->enable_bit; | ||
54 | |||
55 | r = omap2xxx_cm_get_pll_status(); | ||
56 | |||
57 | return ((r & apll_mask) == apll_mask) ? true : false; | ||
58 | } | ||
59 | |||
60 | int omap2_clk_apll96_enable(struct clk_hw *hw) | ||
61 | { | ||
62 | return omap2xxx_cm_apll96_enable(); | ||
63 | } | ||
64 | |||
65 | int omap2_clk_apll54_enable(struct clk_hw *hw) | ||
66 | { | ||
67 | return omap2xxx_cm_apll54_enable(); | ||
68 | } | ||
69 | |||
70 | static void _apll96_allow_idle(struct clk_hw_omap *clk) | 41 | static void _apll96_allow_idle(struct clk_hw_omap *clk) |
71 | { | 42 | { |
72 | omap2xxx_cm_set_apll96_auto_low_power_stop(); | 43 | omap2xxx_cm_set_apll96_auto_low_power_stop(); |
@@ -87,28 +58,6 @@ static void _apll54_deny_idle(struct clk_hw_omap *clk) | |||
87 | omap2xxx_cm_set_apll54_disable_autoidle(); | 58 | omap2xxx_cm_set_apll54_disable_autoidle(); |
88 | } | 59 | } |
89 | 60 | ||
90 | void omap2_clk_apll96_disable(struct clk_hw *hw) | ||
91 | { | ||
92 | omap2xxx_cm_apll96_disable(); | ||
93 | } | ||
94 | |||
95 | void omap2_clk_apll54_disable(struct clk_hw *hw) | ||
96 | { | ||
97 | omap2xxx_cm_apll54_disable(); | ||
98 | } | ||
99 | |||
100 | unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw, | ||
101 | unsigned long parent_rate) | ||
102 | { | ||
103 | return (omap2xxx_clk_apll_locked(hw)) ? 54000000 : 0; | ||
104 | } | ||
105 | |||
106 | unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw, | ||
107 | unsigned long parent_rate) | ||
108 | { | ||
109 | return (omap2xxx_clk_apll_locked(hw)) ? 96000000 : 0; | ||
110 | } | ||
111 | |||
112 | /* Public data */ | 61 | /* Public data */ |
113 | const struct clk_hw_omap_ops clkhwops_apll54 = { | 62 | const struct clk_hw_omap_ops clkhwops_apll54 = { |
114 | .allow_idle = _apll54_allow_idle, | 63 | .allow_idle = _apll54_allow_idle, |
@@ -120,23 +69,3 @@ const struct clk_hw_omap_ops clkhwops_apll96 = { | |||
120 | .deny_idle = _apll96_deny_idle, | 69 | .deny_idle = _apll96_deny_idle, |
121 | }; | 70 | }; |
122 | 71 | ||
123 | /* Public functions */ | ||
124 | |||
125 | u32 omap2xxx_get_apll_clkin(void) | ||
126 | { | ||
127 | u32 aplls, srate = 0; | ||
128 | |||
129 | aplls = omap2xxx_cm_get_pll_config(); | ||
130 | aplls &= OMAP24XX_APLLS_CLKIN_MASK; | ||
131 | aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT; | ||
132 | |||
133 | if (aplls == APLLS_CLKIN_19_2MHZ) | ||
134 | srate = 19200000; | ||
135 | else if (aplls == APLLS_CLKIN_13MHZ) | ||
136 | srate = 13000000; | ||
137 | else if (aplls == APLLS_CLKIN_12MHZ) | ||
138 | srate = 12000000; | ||
139 | |||
140 | return srate; | ||
141 | } | ||
142 | |||
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h index a090225ceeba..364a4cc7f11b 100644 --- a/arch/arm/mach-omap2/clock2xxx.h +++ b/arch/arm/mach-omap2/clock2xxx.h | |||
@@ -22,12 +22,7 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk, | |||
22 | unsigned long omap2_osc_clk_recalc(struct clk_hw *clk, | 22 | unsigned long omap2_osc_clk_recalc(struct clk_hw *clk, |
23 | unsigned long parent_rate); | 23 | unsigned long parent_rate); |
24 | void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw); | 24 | void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw); |
25 | unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw, | ||
26 | unsigned long parent_rate); | ||
27 | unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw, | ||
28 | unsigned long parent_rate); | ||
29 | unsigned long omap2xxx_clk_get_core_rate(void); | 25 | unsigned long omap2xxx_clk_get_core_rate(void); |
30 | u32 omap2xxx_get_apll_clkin(void); | ||
31 | u32 omap2xxx_get_sysclkdiv(void); | 26 | u32 omap2xxx_get_sysclkdiv(void); |
32 | void omap2xxx_clk_prepare_for_reboot(void); | 27 | void omap2xxx_clk_prepare_for_reboot(void); |
33 | void omap2xxx_clkt_vps_check_bootloader_rates(void); | 28 | void omap2xxx_clkt_vps_check_bootloader_rates(void); |
@@ -48,9 +43,5 @@ int omap2430_clk_init(void); | |||
48 | extern struct clk_hw *dclk_hw; | 43 | extern struct clk_hw *dclk_hw; |
49 | int omap2_enable_osc_ck(struct clk_hw *hw); | 44 | int omap2_enable_osc_ck(struct clk_hw *hw); |
50 | void omap2_disable_osc_ck(struct clk_hw *hw); | 45 | void omap2_disable_osc_ck(struct clk_hw *hw); |
51 | int omap2_clk_apll96_enable(struct clk_hw *hw); | ||
52 | int omap2_clk_apll54_enable(struct clk_hw *hw); | ||
53 | void omap2_clk_apll96_disable(struct clk_hw *hw); | ||
54 | void omap2_clk_apll54_disable(struct clk_hw *hw); | ||
55 | 46 | ||
56 | #endif | 47 | #endif |