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authorSimon Horman <horms+renesas@verge.net.au>2015-12-10 20:07:38 -0500
committerSimon Horman <horms+renesas@verge.net.au>2015-12-10 20:16:49 -0500
commit4b0f88796bd3d19331550dad2a9d958091f874a2 (patch)
tree28397b5e5c89f371e0acca8e876415837ce689ad
parent222ca7838214100fb2f1917bae78405bae7a2869 (diff)
ARM: shmobile: r8a7793: Describe DMA for the serial ports
Add DMA properties to all SCIF, SCIFA, SCIFB, and HSCIF device nodes. Based on similar work for the r8a7791 by Geert Uytterhoeven. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r--arch/arm/boot/dts/r8a7793.dtsi36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 309b33d60001..df607a92b2ed 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -303,6 +303,8 @@
303 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; 303 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
304 clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>; 304 clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>;
305 clock-names = "sci_ick"; 305 clock-names = "sci_ick";
306 dmas = <&dmac0 0x21>, <&dmac0 0x22>;
307 dma-names = "tx", "rx";
306 power-domains = <&cpg_clocks>; 308 power-domains = <&cpg_clocks>;
307 status = "disabled"; 309 status = "disabled";
308 }; 310 };
@@ -313,6 +315,8 @@
313 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; 315 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
314 clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>; 316 clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>;
315 clock-names = "sci_ick"; 317 clock-names = "sci_ick";
318 dmas = <&dmac0 0x25>, <&dmac0 0x26>;
319 dma-names = "tx", "rx";
316 power-domains = <&cpg_clocks>; 320 power-domains = <&cpg_clocks>;
317 status = "disabled"; 321 status = "disabled";
318 }; 322 };
@@ -323,6 +327,8 @@
323 interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; 327 interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;
324 clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>; 328 clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>;
325 clock-names = "sci_ick"; 329 clock-names = "sci_ick";
330 dmas = <&dmac0 0x27>, <&dmac0 0x28>;
331 dma-names = "tx", "rx";
326 power-domains = <&cpg_clocks>; 332 power-domains = <&cpg_clocks>;
327 status = "disabled"; 333 status = "disabled";
328 }; 334 };
@@ -333,6 +339,8 @@
333 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 339 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
334 clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>; 340 clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>;
335 clock-names = "sci_ick"; 341 clock-names = "sci_ick";
342 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
343 dma-names = "tx", "rx";
336 power-domains = <&cpg_clocks>; 344 power-domains = <&cpg_clocks>;
337 status = "disabled"; 345 status = "disabled";
338 }; 346 };
@@ -343,6 +351,8 @@
343 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; 351 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
344 clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>; 352 clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>;
345 clock-names = "sci_ick"; 353 clock-names = "sci_ick";
354 dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
355 dma-names = "tx", "rx";
346 power-domains = <&cpg_clocks>; 356 power-domains = <&cpg_clocks>;
347 status = "disabled"; 357 status = "disabled";
348 }; 358 };
@@ -353,6 +363,8 @@
353 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; 363 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
354 clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>; 364 clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>;
355 clock-names = "sci_ick"; 365 clock-names = "sci_ick";
366 dmas = <&dmac0 0x23>, <&dmac0 0x24>;
367 dma-names = "tx", "rx";
356 power-domains = <&cpg_clocks>; 368 power-domains = <&cpg_clocks>;
357 status = "disabled"; 369 status = "disabled";
358 }; 370 };
@@ -363,6 +375,8 @@
363 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; 375 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
364 clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>; 376 clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
365 clock-names = "sci_ick"; 377 clock-names = "sci_ick";
378 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
379 dma-names = "tx", "rx";
366 power-domains = <&cpg_clocks>; 380 power-domains = <&cpg_clocks>;
367 status = "disabled"; 381 status = "disabled";
368 }; 382 };
@@ -373,6 +387,8 @@
373 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; 387 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
374 clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>; 388 clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
375 clock-names = "sci_ick"; 389 clock-names = "sci_ick";
390 dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
391 dma-names = "tx", "rx";
376 power-domains = <&cpg_clocks>; 392 power-domains = <&cpg_clocks>;
377 status = "disabled"; 393 status = "disabled";
378 }; 394 };
@@ -383,6 +399,8 @@
383 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; 399 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
384 clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>; 400 clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
385 clock-names = "sci_ick"; 401 clock-names = "sci_ick";
402 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
403 dma-names = "tx", "rx";
386 power-domains = <&cpg_clocks>; 404 power-domains = <&cpg_clocks>;
387 status = "disabled"; 405 status = "disabled";
388 }; 406 };
@@ -393,6 +411,8 @@
393 interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>; 411 interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>;
394 clocks = <&mstp7_clks R8A7793_CLK_SCIF0>; 412 clocks = <&mstp7_clks R8A7793_CLK_SCIF0>;
395 clock-names = "sci_ick"; 413 clock-names = "sci_ick";
414 dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
415 dma-names = "tx", "rx";
396 power-domains = <&cpg_clocks>; 416 power-domains = <&cpg_clocks>;
397 status = "disabled"; 417 status = "disabled";
398 }; 418 };
@@ -403,6 +423,8 @@
403 interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>; 423 interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>;
404 clocks = <&mstp7_clks R8A7793_CLK_SCIF1>; 424 clocks = <&mstp7_clks R8A7793_CLK_SCIF1>;
405 clock-names = "sci_ick"; 425 clock-names = "sci_ick";
426 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
427 dma-names = "tx", "rx";
406 power-domains = <&cpg_clocks>; 428 power-domains = <&cpg_clocks>;
407 status = "disabled"; 429 status = "disabled";
408 }; 430 };
@@ -413,6 +435,8 @@
413 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; 435 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
414 clocks = <&mstp7_clks R8A7793_CLK_SCIF2>; 436 clocks = <&mstp7_clks R8A7793_CLK_SCIF2>;
415 clock-names = "sci_ick"; 437 clock-names = "sci_ick";
438 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
439 dma-names = "tx", "rx";
416 power-domains = <&cpg_clocks>; 440 power-domains = <&cpg_clocks>;
417 status = "disabled"; 441 status = "disabled";
418 }; 442 };
@@ -423,6 +447,8 @@
423 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; 447 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&mstp7_clks R8A7793_CLK_SCIF3>; 448 clocks = <&mstp7_clks R8A7793_CLK_SCIF3>;
425 clock-names = "sci_ick"; 449 clock-names = "sci_ick";
450 dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
451 dma-names = "tx", "rx";
426 power-domains = <&cpg_clocks>; 452 power-domains = <&cpg_clocks>;
427 status = "disabled"; 453 status = "disabled";
428 }; 454 };
@@ -433,6 +459,8 @@
433 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; 459 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
434 clocks = <&mstp7_clks R8A7793_CLK_SCIF4>; 460 clocks = <&mstp7_clks R8A7793_CLK_SCIF4>;
435 clock-names = "sci_ick"; 461 clock-names = "sci_ick";
462 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
463 dma-names = "tx", "rx";
436 power-domains = <&cpg_clocks>; 464 power-domains = <&cpg_clocks>;
437 status = "disabled"; 465 status = "disabled";
438 }; 466 };
@@ -443,6 +471,8 @@
443 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; 471 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
444 clocks = <&mstp7_clks R8A7793_CLK_SCIF5>; 472 clocks = <&mstp7_clks R8A7793_CLK_SCIF5>;
445 clock-names = "sci_ick"; 473 clock-names = "sci_ick";
474 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
475 dma-names = "tx", "rx";
446 power-domains = <&cpg_clocks>; 476 power-domains = <&cpg_clocks>;
447 status = "disabled"; 477 status = "disabled";
448 }; 478 };
@@ -453,6 +483,8 @@
453 interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>; 483 interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>;
454 clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>; 484 clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>;
455 clock-names = "sci_ick"; 485 clock-names = "sci_ick";
486 dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
487 dma-names = "tx", "rx";
456 power-domains = <&cpg_clocks>; 488 power-domains = <&cpg_clocks>;
457 status = "disabled"; 489 status = "disabled";
458 }; 490 };
@@ -463,6 +495,8 @@
463 interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>; 495 interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>;
464 clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>; 496 clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>;
465 clock-names = "sci_ick"; 497 clock-names = "sci_ick";
498 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
499 dma-names = "tx", "rx";
466 power-domains = <&cpg_clocks>; 500 power-domains = <&cpg_clocks>;
467 status = "disabled"; 501 status = "disabled";
468 }; 502 };
@@ -473,6 +507,8 @@
473 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; 507 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
474 clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>; 508 clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>;
475 clock-names = "sci_ick"; 509 clock-names = "sci_ick";
510 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
511 dma-names = "tx", "rx";
476 power-domains = <&cpg_clocks>; 512 power-domains = <&cpg_clocks>;
477 status = "disabled"; 513 status = "disabled";
478 }; 514 };