diff options
| author | Thierry Reding <treding@nvidia.com> | 2018-03-15 11:45:45 -0400 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-03-15 14:06:19 -0400 |
| commit | 4ae4b5c0dbaa499f2fd9215caac6e474c8dd477f (patch) | |
| tree | 090110157d7c9c0cb370e3de4d76bc4965559241 | |
| parent | e90124cb46bdb6b8dd642e0066207ace0fc3f972 (diff) | |
drm/tegra: fb: Properly support linear modifier
Instead of relying on the tiling attached to a buffer object, make sure
to set the proper tiling for linear buffers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | drivers/gpu/drm/tegra/fb.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c index 0786159edef3..e69434909a42 100644 --- a/drivers/gpu/drm/tegra/fb.c +++ b/drivers/gpu/drm/tegra/fb.c | |||
| @@ -55,6 +55,11 @@ int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer, | |||
| 55 | uint64_t modifier = fb->base.modifier; | 55 | uint64_t modifier = fb->base.modifier; |
| 56 | 56 | ||
| 57 | switch (modifier) { | 57 | switch (modifier) { |
| 58 | case DRM_FORMAT_MOD_LINEAR: | ||
| 59 | tiling->mode = TEGRA_BO_TILING_MODE_PITCH; | ||
| 60 | tiling->value = 0; | ||
| 61 | break; | ||
| 62 | |||
| 58 | case DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED: | 63 | case DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED: |
| 59 | tiling->mode = TEGRA_BO_TILING_MODE_TILED; | 64 | tiling->mode = TEGRA_BO_TILING_MODE_TILED; |
| 60 | tiling->value = 0; | 65 | tiling->value = 0; |
| @@ -91,9 +96,7 @@ int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer, | |||
| 91 | break; | 96 | break; |
| 92 | 97 | ||
| 93 | default: | 98 | default: |
| 94 | /* TODO: handle YUV formats? */ | 99 | return -EINVAL; |
| 95 | *tiling = fb->planes[0]->tiling; | ||
| 96 | break; | ||
| 97 | } | 100 | } |
| 98 | 101 | ||
| 99 | return 0; | 102 | return 0; |
