diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-05-29 05:27:43 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2015-06-05 16:26:33 -0400 |
commit | 496c28b13eb9d4f9c751b672daad8b110084cfd8 (patch) | |
tree | 183b16b78c5b7db9b20d777b906c95aaf81f4d13 | |
parent | 9f61f62544747db5d5c590bfae9dd19f1337e421 (diff) |
irqchip: renesas: intc-irqpin: Improve binding documentation
Add missing documentation for required properties:
- interrupt-controller,
- parent interrupts (one entry per provided interrupt).
Add missing documentation for optional properties:
- functional clock (managed since commit 705bc96c2c15313c ("irqchip:
renesas-intc-irqpin: Add minimal runtime PM support")),
- power-domains.
Add an example, taken from r8a7740.dtsi.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1432891663-23641-1-git-send-email-geert%2Brenesas@glider.be
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt | 39 |
1 files changed, 37 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt index 4f7946ae8adc..772c550d3b4b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt | |||
@@ -13,9 +13,12 @@ Required properties: | |||
13 | - reg: Base address and length of each register bank used by the external | 13 | - reg: Base address and length of each register bank used by the external |
14 | IRQ pins driven by the interrupt controller hardware module. The base | 14 | IRQ pins driven by the interrupt controller hardware module. The base |
15 | addresses, length and number of required register banks varies with soctype. | 15 | addresses, length and number of required register banks varies with soctype. |
16 | 16 | - interrupt-controller: Identifies the node as an interrupt controller. | |
17 | - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in | 17 | - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in |
18 | interrupts.txt in this directory | 18 | interrupts.txt in this directory. |
19 | - interrupts: Must contain a list of interrupt specifiers. For each interrupt | ||
20 | provided by this irqpin controller instance, there must be one entry, | ||
21 | referring to the corresponding parent interrupt. | ||
19 | 22 | ||
20 | Optional properties: | 23 | Optional properties: |
21 | 24 | ||
@@ -25,3 +28,35 @@ Optional properties: | |||
25 | if different from the default 4 bits | 28 | if different from the default 4 bits |
26 | - control-parent: disable and enable interrupts on the parent interrupt | 29 | - control-parent: disable and enable interrupts on the parent interrupt |
27 | controller, needed for some broken implementations | 30 | controller, needed for some broken implementations |
31 | - clocks: Must contain a reference to the functional clock. This property is | ||
32 | mandatory if the hardware implements a controllable functional clock for | ||
33 | the irqpin controller instance. | ||
34 | - power-domains: Must contain a reference to the power domain. This property is | ||
35 | mandatory if the irqpin controller instance is part of a controllable power | ||
36 | domain. | ||
37 | |||
38 | |||
39 | Example | ||
40 | ------- | ||
41 | |||
42 | irqpin1: interrupt-controller@e6900004 { | ||
43 | compatible = "renesas,intc-irqpin-r8a7740", | ||
44 | "renesas,intc-irqpin"; | ||
45 | #interrupt-cells = <2>; | ||
46 | interrupt-controller; | ||
47 | reg = <0xe6900004 4>, | ||
48 | <0xe6900014 4>, | ||
49 | <0xe6900024 1>, | ||
50 | <0xe6900044 1>, | ||
51 | <0xe6900064 1>; | ||
52 | interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH | ||
53 | 0 149 IRQ_TYPE_LEVEL_HIGH | ||
54 | 0 149 IRQ_TYPE_LEVEL_HIGH | ||
55 | 0 149 IRQ_TYPE_LEVEL_HIGH | ||
56 | 0 149 IRQ_TYPE_LEVEL_HIGH | ||
57 | 0 149 IRQ_TYPE_LEVEL_HIGH | ||
58 | 0 149 IRQ_TYPE_LEVEL_HIGH | ||
59 | 0 149 IRQ_TYPE_LEVEL_HIGH>; | ||
60 | clocks = <&mstp2_clks R8A7740_CLK_INTCA>; | ||
61 | power-domains = <&pd_a4s>; | ||
62 | }; | ||