diff options
author | Suganath Prabu Subramani <suganath-prabu.subramani@broadcom.com> | 2017-10-31 08:32:38 -0400 |
---|---|---|
committer | Martin K. Petersen <martin.petersen@oracle.com> | 2017-11-03 12:20:53 -0400 |
commit | 494f401bcd07d6b39f49f114e4eaa788842f16fe (patch) | |
tree | 82a598401842a981f907b6d2f3f7e580312eb8e0 | |
parent | cd5897eda27dc155146f25ddf4b0dd9967b3e2bb (diff) |
scsi: mpt3sas: Fix sparse warnings
1) Used variable __le64/__le32 whichever required in building NVME
PRP, and passed to LE Controller.
2) Remove unused functions, And Declared functions as static which are
used only in mpt3sas_scsih.c.
Signed-off-by: Chaitra P B <chaitra.basappa@broadcom.com>
Signed-off-by: Suganath Prabu S <suganath-prabu.subramani@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r-- | drivers/scsi/mpt3sas/mpt3sas_base.c | 22 | ||||
-rw-r--r-- | drivers/scsi/mpt3sas/mpt3sas_scsih.c | 37 |
2 files changed, 16 insertions, 43 deletions
diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 0da639d96c08..3061c1724eaf 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c | |||
@@ -1437,8 +1437,8 @@ _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, | |||
1437 | size_t data_in_sz) | 1437 | size_t data_in_sz) |
1438 | { | 1438 | { |
1439 | int prp_size = NVME_PRP_SIZE; | 1439 | int prp_size = NVME_PRP_SIZE; |
1440 | u64 *prp_entry, *prp1_entry, *prp2_entry, *prp_entry_phys; | 1440 | __le64 *prp_entry, *prp1_entry, *prp2_entry, *prp_entry_phys; |
1441 | u64 *prp_page, *prp_page_phys; | 1441 | __le64 *prp_page, *prp_page_phys; |
1442 | u32 offset, entry_len; | 1442 | u32 offset, entry_len; |
1443 | u32 page_mask_result, page_mask; | 1443 | u32 page_mask_result, page_mask; |
1444 | dma_addr_t paddr; | 1444 | dma_addr_t paddr; |
@@ -1455,17 +1455,17 @@ _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, | |||
1455 | * PRP1 is located at a 24 byte offset from the start of the NVMe | 1455 | * PRP1 is located at a 24 byte offset from the start of the NVMe |
1456 | * command. Then set the current PRP entry pointer to PRP1. | 1456 | * command. Then set the current PRP entry pointer to PRP1. |
1457 | */ | 1457 | */ |
1458 | prp1_entry = (u64 *)(nvme_encap_request->NVMe_Command + | 1458 | prp1_entry = (__le64 *)(nvme_encap_request->NVMe_Command + |
1459 | NVME_CMD_PRP1_OFFSET); | 1459 | NVME_CMD_PRP1_OFFSET); |
1460 | prp2_entry = (u64 *)(nvme_encap_request->NVMe_Command + | 1460 | prp2_entry = (__le64 *)(nvme_encap_request->NVMe_Command + |
1461 | NVME_CMD_PRP2_OFFSET); | 1461 | NVME_CMD_PRP2_OFFSET); |
1462 | prp_entry = prp1_entry; | 1462 | prp_entry = prp1_entry; |
1463 | /* | 1463 | /* |
1464 | * For the PRP entries, use the specially allocated buffer of | 1464 | * For the PRP entries, use the specially allocated buffer of |
1465 | * contiguous memory. | 1465 | * contiguous memory. |
1466 | */ | 1466 | */ |
1467 | prp_page = (u64 *)mpt3sas_base_get_pcie_sgl(ioc, smid); | 1467 | prp_page = (__le64 *)mpt3sas_base_get_pcie_sgl(ioc, smid); |
1468 | prp_page_phys = (u64 *)mpt3sas_base_get_pcie_sgl_dma(ioc, smid); | 1468 | prp_page_phys = (__le64 *)mpt3sas_base_get_pcie_sgl_dma(ioc, smid); |
1469 | 1469 | ||
1470 | /* | 1470 | /* |
1471 | * Check if we are within 1 entry of a page boundary we don't | 1471 | * Check if we are within 1 entry of a page boundary we don't |
@@ -1475,8 +1475,8 @@ _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, | |||
1475 | page_mask_result = (uintptr_t)((u8 *)prp_page + prp_size) & page_mask; | 1475 | page_mask_result = (uintptr_t)((u8 *)prp_page + prp_size) & page_mask; |
1476 | if (!page_mask_result) { | 1476 | if (!page_mask_result) { |
1477 | /* Bump up to next page boundary. */ | 1477 | /* Bump up to next page boundary. */ |
1478 | prp_page = (u64 *)((u8 *)prp_page + prp_size); | 1478 | prp_page = (__le64 *)((u8 *)prp_page + prp_size); |
1479 | prp_page_phys = (u64 *)((u8 *)prp_page_phys + prp_size); | 1479 | prp_page_phys = (__le64 *)((u8 *)prp_page_phys + prp_size); |
1480 | } | 1480 | } |
1481 | 1481 | ||
1482 | /* | 1482 | /* |
@@ -1604,7 +1604,7 @@ _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, | |||
1604 | * Returns: true: PRPs are built | 1604 | * Returns: true: PRPs are built |
1605 | * false: IEEE SGLs needs to be built | 1605 | * false: IEEE SGLs needs to be built |
1606 | */ | 1606 | */ |
1607 | void | 1607 | static void |
1608 | base_make_prp_nvme(struct MPT3SAS_ADAPTER *ioc, | 1608 | base_make_prp_nvme(struct MPT3SAS_ADAPTER *ioc, |
1609 | struct scsi_cmnd *scmd, | 1609 | struct scsi_cmnd *scmd, |
1610 | Mpi25SCSIIORequest_t *mpi_request, | 1610 | Mpi25SCSIIORequest_t *mpi_request, |
@@ -1612,7 +1612,7 @@ base_make_prp_nvme(struct MPT3SAS_ADAPTER *ioc, | |||
1612 | { | 1612 | { |
1613 | int sge_len, offset, num_prp_in_chain = 0; | 1613 | int sge_len, offset, num_prp_in_chain = 0; |
1614 | Mpi25IeeeSgeChain64_t *main_chain_element, *ptr_first_sgl; | 1614 | Mpi25IeeeSgeChain64_t *main_chain_element, *ptr_first_sgl; |
1615 | u64 *curr_buff; | 1615 | __le64 *curr_buff; |
1616 | dma_addr_t msg_phys; | 1616 | dma_addr_t msg_phys; |
1617 | u64 sge_addr; | 1617 | u64 sge_addr; |
1618 | u32 page_mask, page_mask_result; | 1618 | u32 page_mask, page_mask_result; |
@@ -1740,7 +1740,7 @@ base_is_prp_possible(struct MPT3SAS_ADAPTER *ioc, | |||
1740 | struct scatterlist *sg_scmd; | 1740 | struct scatterlist *sg_scmd; |
1741 | bool build_prp = true; | 1741 | bool build_prp = true; |
1742 | 1742 | ||
1743 | data_length = cpu_to_le32(scsi_bufflen(scmd)); | 1743 | data_length = scsi_bufflen(scmd); |
1744 | sg_scmd = scsi_sglist(scmd); | 1744 | sg_scmd = scsi_sglist(scmd); |
1745 | 1745 | ||
1746 | /* If Datalenth is <= 16K and number of SGE’s entries are <= 2 | 1746 | /* If Datalenth is <= 16K and number of SGE’s entries are <= 2 |
diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c index 4fc9eb8cceda..93c5fe062686 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c +++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c | |||
@@ -599,7 +599,7 @@ __mpt3sas_get_pdev_from_target(struct MPT3SAS_ADAPTER *ioc, | |||
599 | * | 599 | * |
600 | * This searches for pcie_device from target, then return pcie_device object. | 600 | * This searches for pcie_device from target, then return pcie_device object. |
601 | */ | 601 | */ |
602 | struct _pcie_device * | 602 | static struct _pcie_device * |
603 | mpt3sas_get_pdev_from_target(struct MPT3SAS_ADAPTER *ioc, | 603 | mpt3sas_get_pdev_from_target(struct MPT3SAS_ADAPTER *ioc, |
604 | struct MPT3SAS_TARGET *tgt_priv) | 604 | struct MPT3SAS_TARGET *tgt_priv) |
605 | { | 605 | { |
@@ -942,7 +942,7 @@ _scsih_sas_device_init_add(struct MPT3SAS_ADAPTER *ioc, | |||
942 | } | 942 | } |
943 | 943 | ||
944 | 944 | ||
945 | struct _pcie_device * | 945 | static struct _pcie_device * |
946 | __mpt3sas_get_pdev_by_wwid(struct MPT3SAS_ADAPTER *ioc, u64 wwid) | 946 | __mpt3sas_get_pdev_by_wwid(struct MPT3SAS_ADAPTER *ioc, u64 wwid) |
947 | { | 947 | { |
948 | struct _pcie_device *pcie_device; | 948 | struct _pcie_device *pcie_device; |
@@ -975,7 +975,7 @@ found_device: | |||
975 | * | 975 | * |
976 | * This searches for pcie_device based on wwid, then return pcie_device object. | 976 | * This searches for pcie_device based on wwid, then return pcie_device object. |
977 | */ | 977 | */ |
978 | struct _pcie_device * | 978 | static struct _pcie_device * |
979 | mpt3sas_get_pdev_by_wwid(struct MPT3SAS_ADAPTER *ioc, u64 wwid) | 979 | mpt3sas_get_pdev_by_wwid(struct MPT3SAS_ADAPTER *ioc, u64 wwid) |
980 | { | 980 | { |
981 | struct _pcie_device *pcie_device; | 981 | struct _pcie_device *pcie_device; |
@@ -989,7 +989,7 @@ mpt3sas_get_pdev_by_wwid(struct MPT3SAS_ADAPTER *ioc, u64 wwid) | |||
989 | } | 989 | } |
990 | 990 | ||
991 | 991 | ||
992 | struct _pcie_device * | 992 | static struct _pcie_device * |
993 | __mpt3sas_get_pdev_by_idchannel(struct MPT3SAS_ADAPTER *ioc, int id, | 993 | __mpt3sas_get_pdev_by_idchannel(struct MPT3SAS_ADAPTER *ioc, int id, |
994 | int channel) | 994 | int channel) |
995 | { | 995 | { |
@@ -1012,34 +1012,7 @@ found_device: | |||
1012 | return pcie_device; | 1012 | return pcie_device; |
1013 | } | 1013 | } |
1014 | 1014 | ||
1015 | 1015 | static struct _pcie_device * | |
1016 | /** | ||
1017 | * mpt3sas_get_pdev_by_idchannel - pcie device search | ||
1018 | * @ioc: per adapter object | ||
1019 | * @id: Target ID | ||
1020 | * @channel: Channel ID | ||
1021 | * | ||
1022 | * Context: This function will acquire ioc->pcie_device_lock and will release | ||
1023 | * before returning the pcie_device object. | ||
1024 | * | ||
1025 | * This searches for pcie_device based on id and channel, then return | ||
1026 | * pcie_device object. | ||
1027 | */ | ||
1028 | struct _pcie_device * | ||
1029 | mpt3sas_get_pdev_by_idchannel(struct MPT3SAS_ADAPTER *ioc, int id, int channel) | ||
1030 | { | ||
1031 | struct _pcie_device *pcie_device; | ||
1032 | unsigned long flags; | ||
1033 | |||
1034 | spin_lock_irqsave(&ioc->pcie_device_lock, flags); | ||
1035 | pcie_device = __mpt3sas_get_pdev_by_idchannel(ioc, id, channel); | ||
1036 | spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); | ||
1037 | |||
1038 | return pcie_device; | ||
1039 | } | ||
1040 | |||
1041 | |||
1042 | struct _pcie_device * | ||
1043 | __mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle) | 1016 | __mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle) |
1044 | { | 1017 | { |
1045 | struct _pcie_device *pcie_device; | 1018 | struct _pcie_device *pcie_device; |