diff options
author | Jiang Liu <jiang.liu@linux.intel.com> | 2015-04-13 22:29:48 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2015-04-24 09:36:53 -0400 |
commit | 494b89749f3857d4e726c0715fe2db6cf40cc82c (patch) | |
tree | 54de048c358fe56624f0aca07a36d41d06ce41bf | |
parent | 3c6e567509ed4e60593b1683a1e557c34e503be6 (diff) |
irq_remapping/amd: Clean up unsued code
Now we have converted to hierarchical irqdomains, so clean up unused
code.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Tested-by: Joerg Roedel <jroedel@suse.de>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: David Cohen <david.a.cohen@linux.intel.com>
Cc: Sander Eikelenboom <linux@eikelenboom.it>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: iommu@lists.linux-foundation.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dimitri Sivanich <sivanich@sgi.com>
Cc: Joerg Roedel <joro@8bytes.org>
Link: http://lkml.kernel.org/r/1428978610-28986-12-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | drivers/iommu/amd_iommu.c | 144 |
1 files changed, 0 insertions, 144 deletions
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index 8858cb6c70de..7d9f5acd06f3 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c | |||
@@ -3993,22 +3993,6 @@ out: | |||
3993 | return index; | 3993 | return index; |
3994 | } | 3994 | } |
3995 | 3995 | ||
3996 | static int get_irte(u16 devid, int index, union irte *irte) | ||
3997 | { | ||
3998 | struct irq_remap_table *table; | ||
3999 | unsigned long flags; | ||
4000 | |||
4001 | table = get_irq_table(devid, false); | ||
4002 | if (!table) | ||
4003 | return -ENOMEM; | ||
4004 | |||
4005 | spin_lock_irqsave(&table->lock, flags); | ||
4006 | irte->val = table->table[index]; | ||
4007 | spin_unlock_irqrestore(&table->lock, flags); | ||
4008 | |||
4009 | return 0; | ||
4010 | } | ||
4011 | |||
4012 | static int modify_irte(u16 devid, int index, union irte irte) | 3996 | static int modify_irte(u16 devid, int index, union irte irte) |
4013 | { | 3997 | { |
4014 | struct irq_remap_table *table; | 3998 | struct irq_remap_table *table; |
@@ -4055,131 +4039,6 @@ static void free_irte(u16 devid, int index) | |||
4055 | iommu_completion_wait(iommu); | 4039 | iommu_completion_wait(iommu); |
4056 | } | 4040 | } |
4057 | 4041 | ||
4058 | static int setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry, | ||
4059 | unsigned int destination, int vector, | ||
4060 | struct io_apic_irq_attr *attr) | ||
4061 | { | ||
4062 | struct irq_remap_table *table; | ||
4063 | struct irq_2_irte *irte_info; | ||
4064 | struct irq_cfg *cfg; | ||
4065 | union irte irte; | ||
4066 | int ioapic_id; | ||
4067 | int index; | ||
4068 | int devid; | ||
4069 | int ret; | ||
4070 | |||
4071 | cfg = irq_cfg(irq); | ||
4072 | if (!cfg) | ||
4073 | return -EINVAL; | ||
4074 | |||
4075 | irte_info = &cfg->irq_2_irte; | ||
4076 | ioapic_id = mpc_ioapic_id(attr->ioapic); | ||
4077 | devid = get_ioapic_devid(ioapic_id); | ||
4078 | |||
4079 | if (devid < 0) | ||
4080 | return devid; | ||
4081 | |||
4082 | table = get_irq_table(devid, true); | ||
4083 | if (table == NULL) | ||
4084 | return -ENOMEM; | ||
4085 | |||
4086 | index = attr->ioapic_pin; | ||
4087 | |||
4088 | /* Setup IRQ remapping info */ | ||
4089 | cfg->remapped = 1; | ||
4090 | irte_info->devid = devid; | ||
4091 | irte_info->index = index; | ||
4092 | |||
4093 | /* Setup IRTE for IOMMU */ | ||
4094 | irte.val = 0; | ||
4095 | irte.fields.vector = vector; | ||
4096 | irte.fields.int_type = apic->irq_delivery_mode; | ||
4097 | irte.fields.destination = destination; | ||
4098 | irte.fields.dm = apic->irq_dest_mode; | ||
4099 | irte.fields.valid = 1; | ||
4100 | |||
4101 | ret = modify_irte(devid, index, irte); | ||
4102 | if (ret) | ||
4103 | return ret; | ||
4104 | |||
4105 | /* Setup IOAPIC entry */ | ||
4106 | memset(entry, 0, sizeof(*entry)); | ||
4107 | |||
4108 | entry->vector = index; | ||
4109 | entry->mask = 0; | ||
4110 | entry->trigger = attr->trigger; | ||
4111 | entry->polarity = attr->polarity; | ||
4112 | |||
4113 | /* | ||
4114 | * Mask level triggered irqs. | ||
4115 | */ | ||
4116 | if (attr->trigger) | ||
4117 | entry->mask = 1; | ||
4118 | |||
4119 | return 0; | ||
4120 | } | ||
4121 | |||
4122 | static int set_affinity(struct irq_data *data, const struct cpumask *mask, | ||
4123 | bool force) | ||
4124 | { | ||
4125 | struct irq_2_irte *irte_info; | ||
4126 | unsigned int dest, irq; | ||
4127 | struct irq_cfg *cfg; | ||
4128 | union irte irte; | ||
4129 | int err; | ||
4130 | |||
4131 | if (!config_enabled(CONFIG_SMP)) | ||
4132 | return -1; | ||
4133 | |||
4134 | cfg = irqd_cfg(data); | ||
4135 | irq = data->irq; | ||
4136 | irte_info = &cfg->irq_2_irte; | ||
4137 | |||
4138 | if (!cpumask_intersects(mask, cpu_online_mask)) | ||
4139 | return -EINVAL; | ||
4140 | |||
4141 | if (get_irte(irte_info->devid, irte_info->index, &irte)) | ||
4142 | return -EBUSY; | ||
4143 | |||
4144 | if (assign_irq_vector(irq, cfg, mask)) | ||
4145 | return -EBUSY; | ||
4146 | |||
4147 | err = apic->cpu_mask_to_apicid_and(cfg->domain, mask, &dest); | ||
4148 | if (err) { | ||
4149 | if (assign_irq_vector(irq, cfg, data->affinity)) | ||
4150 | pr_err("AMD-Vi: Failed to recover vector for irq %d\n", irq); | ||
4151 | return err; | ||
4152 | } | ||
4153 | |||
4154 | irte.fields.vector = cfg->vector; | ||
4155 | irte.fields.destination = dest; | ||
4156 | |||
4157 | modify_irte(irte_info->devid, irte_info->index, irte); | ||
4158 | |||
4159 | if (cfg->move_in_progress) | ||
4160 | send_cleanup_vector(cfg); | ||
4161 | |||
4162 | cpumask_copy(data->affinity, mask); | ||
4163 | |||
4164 | return 0; | ||
4165 | } | ||
4166 | |||
4167 | static int free_irq(int irq) | ||
4168 | { | ||
4169 | struct irq_2_irte *irte_info; | ||
4170 | struct irq_cfg *cfg; | ||
4171 | |||
4172 | cfg = irq_cfg(irq); | ||
4173 | if (!cfg) | ||
4174 | return -EINVAL; | ||
4175 | |||
4176 | irte_info = &cfg->irq_2_irte; | ||
4177 | |||
4178 | free_irte(irte_info->devid, irte_info->index); | ||
4179 | |||
4180 | return 0; | ||
4181 | } | ||
4182 | |||
4183 | static int get_devid(struct irq_alloc_info *info) | 4042 | static int get_devid(struct irq_alloc_info *info) |
4184 | { | 4043 | { |
4185 | int devid = -1; | 4044 | int devid = -1; |
@@ -4252,9 +4111,6 @@ struct irq_remap_ops amd_iommu_irq_ops = { | |||
4252 | .disable = amd_iommu_disable, | 4111 | .disable = amd_iommu_disable, |
4253 | .reenable = amd_iommu_reenable, | 4112 | .reenable = amd_iommu_reenable, |
4254 | .enable_faulting = amd_iommu_enable_faulting, | 4113 | .enable_faulting = amd_iommu_enable_faulting, |
4255 | .setup_ioapic_entry = setup_ioapic_entry, | ||
4256 | .set_affinity = set_affinity, | ||
4257 | .free_irq = free_irq, | ||
4258 | .get_ir_irq_domain = get_ir_irq_domain, | 4114 | .get_ir_irq_domain = get_ir_irq_domain, |
4259 | .get_irq_domain = get_irq_domain, | 4115 | .get_irq_domain = get_irq_domain, |
4260 | }; | 4116 | }; |