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authorH Hartley Sweeten <hsweeten@visionengravers.com>2017-08-08 16:51:29 -0400
committerMark Brown <broonie@kernel.org>2017-08-09 12:53:03 -0400
commit48738831018003c80f1131e77a25b8e832bec6f1 (patch)
tree37cd09a02bac760d28bc2b53796f5adce82fb760
parentac8d06df9a1f40a9feb759dd7ef5664328ae7694 (diff)
spi: spi-ep93xx: pass the spi_master pointer around
Change the parameters for some of the functions so that the spi_master pointer is passed around instead of the private data ep93xx_spi pointer. This allows removing the 'pdev' member of the private data and will help with some later cleanup. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi-ep93xx.c90
1 files changed, 49 insertions, 41 deletions
diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c
index 041842e0d028..2d80e36f5015 100644
--- a/drivers/spi/spi-ep93xx.c
+++ b/drivers/spi/spi-ep93xx.c
@@ -70,7 +70,6 @@
70 70
71/** 71/**
72 * struct ep93xx_spi - EP93xx SPI controller structure 72 * struct ep93xx_spi - EP93xx SPI controller structure
73 * @pdev: pointer to platform device
74 * @clk: clock for the controller 73 * @clk: clock for the controller
75 * @mmio: pointer to ioremap()'d registers 74 * @mmio: pointer to ioremap()'d registers
76 * @sspdr_phys: physical address of the SSPDR register 75 * @sspdr_phys: physical address of the SSPDR register
@@ -90,7 +89,6 @@
90 * the client 89 * the client
91 */ 90 */
92struct ep93xx_spi { 91struct ep93xx_spi {
93 const struct platform_device *pdev;
94 struct clk *clk; 92 struct clk *clk;
95 void __iomem *mmio; 93 void __iomem *mmio;
96 unsigned long sspdr_phys; 94 unsigned long sspdr_phys;
@@ -113,15 +111,15 @@ struct ep93xx_spi {
113 111
114/** 112/**
115 * ep93xx_spi_calc_divisors() - calculates SPI clock divisors 113 * ep93xx_spi_calc_divisors() - calculates SPI clock divisors
116 * @espi: ep93xx SPI controller struct 114 * @master: SPI master
117 * @rate: desired SPI output clock rate 115 * @rate: desired SPI output clock rate
118 * @div_cpsr: pointer to return the cpsr (pre-scaler) divider 116 * @div_cpsr: pointer to return the cpsr (pre-scaler) divider
119 * @div_scr: pointer to return the scr divider 117 * @div_scr: pointer to return the scr divider
120 */ 118 */
121static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi, 119static int ep93xx_spi_calc_divisors(struct spi_master *master,
122 u32 rate, u8 *div_cpsr, u8 *div_scr) 120 u32 rate, u8 *div_cpsr, u8 *div_scr)
123{ 121{
124 struct spi_master *master = platform_get_drvdata(espi->pdev); 122 struct ep93xx_spi *espi = spi_master_get_devdata(master);
125 unsigned long spi_clk_rate = clk_get_rate(espi->clk); 123 unsigned long spi_clk_rate = clk_get_rate(espi->clk);
126 int cpsr, scr; 124 int cpsr, scr;
127 125
@@ -162,17 +160,18 @@ static void ep93xx_spi_cs_control(struct spi_device *spi, bool enable)
162 gpio_set_value(spi->cs_gpio, !enable); 160 gpio_set_value(spi->cs_gpio, !enable);
163} 161}
164 162
165static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi, 163static int ep93xx_spi_chip_setup(struct spi_master *master,
166 struct spi_device *spi, 164 struct spi_device *spi,
167 struct spi_transfer *xfer) 165 struct spi_transfer *xfer)
168{ 166{
167 struct ep93xx_spi *espi = spi_master_get_devdata(master);
169 u8 dss = bits_per_word_to_dss(xfer->bits_per_word); 168 u8 dss = bits_per_word_to_dss(xfer->bits_per_word);
170 u8 div_cpsr = 0; 169 u8 div_cpsr = 0;
171 u8 div_scr = 0; 170 u8 div_scr = 0;
172 u16 cr0; 171 u16 cr0;
173 int err; 172 int err;
174 173
175 err = ep93xx_spi_calc_divisors(espi, xfer->speed_hz, 174 err = ep93xx_spi_calc_divisors(master, xfer->speed_hz,
176 &div_cpsr, &div_scr); 175 &div_cpsr, &div_scr);
177 if (err) 176 if (err)
178 return err; 177 return err;
@@ -181,9 +180,9 @@ static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
181 cr0 |= (spi->mode & (SPI_CPHA | SPI_CPOL)) << SSPCR0_MODE_SHIFT; 180 cr0 |= (spi->mode & (SPI_CPHA | SPI_CPOL)) << SSPCR0_MODE_SHIFT;
182 cr0 |= dss; 181 cr0 |= dss;
183 182
184 dev_dbg(&espi->pdev->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", 183 dev_dbg(&master->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n",
185 spi->mode, div_cpsr, div_scr, dss); 184 spi->mode, div_cpsr, div_scr, dss);
186 dev_dbg(&espi->pdev->dev, "setup: cr0 %#x\n", cr0); 185 dev_dbg(&master->dev, "setup: cr0 %#x\n", cr0);
187 186
188 writel(div_cpsr, espi->mmio + SSPCPSR); 187 writel(div_cpsr, espi->mmio + SSPCPSR);
189 writel(cr0, espi->mmio + SSPCR0); 188 writel(cr0, espi->mmio + SSPCR0);
@@ -234,8 +233,9 @@ static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t)
234 * When this function is finished, RX FIFO should be empty and TX FIFO should be 233 * When this function is finished, RX FIFO should be empty and TX FIFO should be
235 * full. 234 * full.
236 */ 235 */
237static int ep93xx_spi_read_write(struct ep93xx_spi *espi) 236static int ep93xx_spi_read_write(struct spi_master *master)
238{ 237{
238 struct ep93xx_spi *espi = spi_master_get_devdata(master);
239 struct spi_message *msg = espi->current_msg; 239 struct spi_message *msg = espi->current_msg;
240 struct spi_transfer *t = msg->state; 240 struct spi_transfer *t = msg->state;
241 241
@@ -257,13 +257,15 @@ static int ep93xx_spi_read_write(struct ep93xx_spi *espi)
257 return -EINPROGRESS; 257 return -EINPROGRESS;
258} 258}
259 259
260static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi) 260static void ep93xx_spi_pio_transfer(struct spi_master *master)
261{ 261{
262 struct ep93xx_spi *espi = spi_master_get_devdata(master);
263
262 /* 264 /*
263 * Now everything is set up for the current transfer. We prime the TX 265 * Now everything is set up for the current transfer. We prime the TX
264 * FIFO, enable interrupts, and wait for the transfer to complete. 266 * FIFO, enable interrupts, and wait for the transfer to complete.
265 */ 267 */
266 if (ep93xx_spi_read_write(espi)) { 268 if (ep93xx_spi_read_write(master)) {
267 u32 val; 269 u32 val;
268 270
269 val = readl(espi->mmio + SSPCR1); 271 val = readl(espi->mmio + SSPCR1);
@@ -276,7 +278,7 @@ static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi)
276 278
277/** 279/**
278 * ep93xx_spi_dma_prepare() - prepares a DMA transfer 280 * ep93xx_spi_dma_prepare() - prepares a DMA transfer
279 * @espi: ep93xx SPI controller struct 281 * @master: SPI master
280 * @dir: DMA transfer direction 282 * @dir: DMA transfer direction
281 * 283 *
282 * Function configures the DMA, maps the buffer and prepares the DMA 284 * Function configures the DMA, maps the buffer and prepares the DMA
@@ -284,8 +286,10 @@ static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi)
284 * in case of failure. 286 * in case of failure.
285 */ 287 */
286static struct dma_async_tx_descriptor * 288static struct dma_async_tx_descriptor *
287ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir) 289ep93xx_spi_dma_prepare(struct spi_master *master,
290 enum dma_transfer_direction dir)
288{ 291{
292 struct ep93xx_spi *espi = spi_master_get_devdata(master);
289 struct spi_transfer *t = espi->current_msg->state; 293 struct spi_transfer *t = espi->current_msg->state;
290 struct dma_async_tx_descriptor *txd; 294 struct dma_async_tx_descriptor *txd;
291 enum dma_slave_buswidth buswidth; 295 enum dma_slave_buswidth buswidth;
@@ -361,7 +365,7 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
361 } 365 }
362 366
363 if (WARN_ON(len)) { 367 if (WARN_ON(len)) {
364 dev_warn(&espi->pdev->dev, "len = %zu expected 0!\n", len); 368 dev_warn(&master->dev, "len = %zu expected 0!\n", len);
365 return ERR_PTR(-EINVAL); 369 return ERR_PTR(-EINVAL);
366 } 370 }
367 371
@@ -379,15 +383,16 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
379 383
380/** 384/**
381 * ep93xx_spi_dma_finish() - finishes with a DMA transfer 385 * ep93xx_spi_dma_finish() - finishes with a DMA transfer
382 * @espi: ep93xx SPI controller struct 386 * @master: SPI master
383 * @dir: DMA transfer direction 387 * @dir: DMA transfer direction
384 * 388 *
385 * Function finishes with the DMA transfer. After this, the DMA buffer is 389 * Function finishes with the DMA transfer. After this, the DMA buffer is
386 * unmapped. 390 * unmapped.
387 */ 391 */
388static void ep93xx_spi_dma_finish(struct ep93xx_spi *espi, 392static void ep93xx_spi_dma_finish(struct spi_master *master,
389 enum dma_transfer_direction dir) 393 enum dma_transfer_direction dir)
390{ 394{
395 struct ep93xx_spi *espi = spi_master_get_devdata(master);
391 struct dma_chan *chan; 396 struct dma_chan *chan;
392 struct sg_table *sgt; 397 struct sg_table *sgt;
393 398
@@ -407,22 +412,23 @@ static void ep93xx_spi_dma_callback(void *callback_param)
407 complete(callback_param); 412 complete(callback_param);
408} 413}
409 414
410static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi) 415static void ep93xx_spi_dma_transfer(struct spi_master *master)
411{ 416{
417 struct ep93xx_spi *espi = spi_master_get_devdata(master);
412 struct spi_message *msg = espi->current_msg; 418 struct spi_message *msg = espi->current_msg;
413 struct dma_async_tx_descriptor *rxd, *txd; 419 struct dma_async_tx_descriptor *rxd, *txd;
414 420
415 rxd = ep93xx_spi_dma_prepare(espi, DMA_DEV_TO_MEM); 421 rxd = ep93xx_spi_dma_prepare(master, DMA_DEV_TO_MEM);
416 if (IS_ERR(rxd)) { 422 if (IS_ERR(rxd)) {
417 dev_err(&espi->pdev->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd)); 423 dev_err(&master->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd));
418 msg->status = PTR_ERR(rxd); 424 msg->status = PTR_ERR(rxd);
419 return; 425 return;
420 } 426 }
421 427
422 txd = ep93xx_spi_dma_prepare(espi, DMA_MEM_TO_DEV); 428 txd = ep93xx_spi_dma_prepare(master, DMA_MEM_TO_DEV);
423 if (IS_ERR(txd)) { 429 if (IS_ERR(txd)) {
424 ep93xx_spi_dma_finish(espi, DMA_DEV_TO_MEM); 430 ep93xx_spi_dma_finish(master, DMA_DEV_TO_MEM);
425 dev_err(&espi->pdev->dev, "DMA TX failed: %ld\n", PTR_ERR(txd)); 431 dev_err(&master->dev, "DMA TX failed: %ld\n", PTR_ERR(txd));
426 msg->status = PTR_ERR(txd); 432 msg->status = PTR_ERR(txd);
427 return; 433 return;
428 } 434 }
@@ -440,13 +446,13 @@ static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi)
440 446
441 wait_for_completion(&espi->wait); 447 wait_for_completion(&espi->wait);
442 448
443 ep93xx_spi_dma_finish(espi, DMA_MEM_TO_DEV); 449 ep93xx_spi_dma_finish(master, DMA_MEM_TO_DEV);
444 ep93xx_spi_dma_finish(espi, DMA_DEV_TO_MEM); 450 ep93xx_spi_dma_finish(master, DMA_DEV_TO_MEM);
445} 451}
446 452
447/** 453/**
448 * ep93xx_spi_process_transfer() - processes one SPI transfer 454 * ep93xx_spi_process_transfer() - processes one SPI transfer
449 * @espi: ep93xx SPI controller struct 455 * @master: SPI master
450 * @msg: current message 456 * @msg: current message
451 * @t: transfer to process 457 * @t: transfer to process
452 * 458 *
@@ -454,17 +460,18 @@ static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi)
454 * transfer is complete (may sleep) and updates @msg->status based on whether 460 * transfer is complete (may sleep) and updates @msg->status based on whether
455 * transfer was successfully processed or not. 461 * transfer was successfully processed or not.
456 */ 462 */
457static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi, 463static void ep93xx_spi_process_transfer(struct spi_master *master,
458 struct spi_message *msg, 464 struct spi_message *msg,
459 struct spi_transfer *t) 465 struct spi_transfer *t)
460{ 466{
467 struct ep93xx_spi *espi = spi_master_get_devdata(master);
461 int err; 468 int err;
462 469
463 msg->state = t; 470 msg->state = t;
464 471
465 err = ep93xx_spi_chip_setup(espi, msg->spi, t); 472 err = ep93xx_spi_chip_setup(master, msg->spi, t);
466 if (err) { 473 if (err) {
467 dev_err(&espi->pdev->dev, 474 dev_err(&master->dev,
468 "failed to setup chip for transfer\n"); 475 "failed to setup chip for transfer\n");
469 msg->status = err; 476 msg->status = err;
470 return; 477 return;
@@ -479,9 +486,9 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
479 * So in these cases we will be using PIO and don't bother for DMA. 486 * So in these cases we will be using PIO and don't bother for DMA.
480 */ 487 */
481 if (espi->dma_rx && t->len > SPI_FIFO_SIZE) 488 if (espi->dma_rx && t->len > SPI_FIFO_SIZE)
482 ep93xx_spi_dma_transfer(espi); 489 ep93xx_spi_dma_transfer(master);
483 else 490 else
484 ep93xx_spi_pio_transfer(espi); 491 ep93xx_spi_pio_transfer(master);
485 492
486 /* 493 /*
487 * In case of error during transmit, we bail out from processing 494 * In case of error during transmit, we bail out from processing
@@ -516,7 +523,7 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
516 523
517/* 524/*
518 * ep93xx_spi_process_message() - process one SPI message 525 * ep93xx_spi_process_message() - process one SPI message
519 * @espi: ep93xx SPI controller struct 526 * @master: SPI master
520 * @msg: message to process 527 * @msg: message to process
521 * 528 *
522 * This function processes a single SPI message. We go through all transfers in 529 * This function processes a single SPI message. We go through all transfers in
@@ -526,9 +533,10 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
526 * @msg->status contains %0 in case of success or negative error code in case of 533 * @msg->status contains %0 in case of success or negative error code in case of
527 * failure. 534 * failure.
528 */ 535 */
529static void ep93xx_spi_process_message(struct ep93xx_spi *espi, 536static void ep93xx_spi_process_message(struct spi_master *master,
530 struct spi_message *msg) 537 struct spi_message *msg)
531{ 538{
539 struct ep93xx_spi *espi = spi_master_get_devdata(master);
532 unsigned long timeout; 540 unsigned long timeout;
533 struct spi_transfer *t; 541 struct spi_transfer *t;
534 542
@@ -538,7 +546,7 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
538 timeout = jiffies + msecs_to_jiffies(SPI_TIMEOUT); 546 timeout = jiffies + msecs_to_jiffies(SPI_TIMEOUT);
539 while (readl(espi->mmio + SSPSR) & SSPSR_RNE) { 547 while (readl(espi->mmio + SSPSR) & SSPSR_RNE) {
540 if (time_after(jiffies, timeout)) { 548 if (time_after(jiffies, timeout)) {
541 dev_warn(&espi->pdev->dev, 549 dev_warn(&master->dev,
542 "timeout while flushing RX FIFO\n"); 550 "timeout while flushing RX FIFO\n");
543 msg->status = -ETIMEDOUT; 551 msg->status = -ETIMEDOUT;
544 return; 552 return;
@@ -558,7 +566,7 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
558 ep93xx_spi_cs_control(msg->spi, true); 566 ep93xx_spi_cs_control(msg->spi, true);
559 567
560 list_for_each_entry(t, &msg->transfers, transfer_list) { 568 list_for_each_entry(t, &msg->transfers, transfer_list) {
561 ep93xx_spi_process_transfer(espi, msg, t); 569 ep93xx_spi_process_transfer(master, msg, t);
562 if (msg->status) 570 if (msg->status)
563 break; 571 break;
564 } 572 }
@@ -580,7 +588,7 @@ static int ep93xx_spi_transfer_one_message(struct spi_master *master,
580 msg->actual_length = 0; 588 msg->actual_length = 0;
581 589
582 espi->current_msg = msg; 590 espi->current_msg = msg;
583 ep93xx_spi_process_message(espi, msg); 591 ep93xx_spi_process_message(master, msg);
584 espi->current_msg = NULL; 592 espi->current_msg = NULL;
585 593
586 spi_finalize_current_message(master); 594 spi_finalize_current_message(master);
@@ -590,7 +598,8 @@ static int ep93xx_spi_transfer_one_message(struct spi_master *master,
590 598
591static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id) 599static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
592{ 600{
593 struct ep93xx_spi *espi = dev_id; 601 struct spi_master *master = dev_id;
602 struct ep93xx_spi *espi = spi_master_get_devdata(master);
594 u32 val; 603 u32 val;
595 604
596 /* 605 /*
@@ -600,7 +609,7 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
600 if (readl(espi->mmio + SSPIIR) & SSPIIR_RORIS) { 609 if (readl(espi->mmio + SSPIIR) & SSPIIR_RORIS) {
601 /* clear the overrun interrupt */ 610 /* clear the overrun interrupt */
602 writel(0, espi->mmio + SSPICR); 611 writel(0, espi->mmio + SSPICR);
603 dev_warn(&espi->pdev->dev, 612 dev_warn(&master->dev,
604 "receive overrun, aborting the message\n"); 613 "receive overrun, aborting the message\n");
605 espi->current_msg->status = -EIO; 614 espi->current_msg->status = -EIO;
606 } else { 615 } else {
@@ -608,7 +617,7 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
608 * Interrupt is either RX (RIS) or TX (TIS). For both cases we 617 * Interrupt is either RX (RIS) or TX (TIS). For both cases we
609 * simply execute next data transfer. 618 * simply execute next data transfer.
610 */ 619 */
611 if (ep93xx_spi_read_write(espi)) { 620 if (ep93xx_spi_read_write(master)) {
612 /* 621 /*
613 * In normal case, there still is some processing left 622 * In normal case, there still is some processing left
614 * for current transfer. Let's wait for the next 623 * for current transfer. Let's wait for the next
@@ -815,7 +824,6 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
815 */ 824 */
816 master->max_speed_hz = clk_get_rate(espi->clk) / 2; 825 master->max_speed_hz = clk_get_rate(espi->clk) / 2;
817 master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256); 826 master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256);
818 espi->pdev = pdev;
819 827
820 espi->sspdr_phys = res->start + SSPDR; 828 espi->sspdr_phys = res->start + SSPDR;
821 829
@@ -826,7 +834,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
826 } 834 }
827 835
828 error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt, 836 error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt,
829 0, "ep93xx-spi", espi); 837 0, "ep93xx-spi", master);
830 if (error) { 838 if (error) {
831 dev_err(&pdev->dev, "failed to request irq\n"); 839 dev_err(&pdev->dev, "failed to request irq\n");
832 goto fail_release_master; 840 goto fail_release_master;