drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating

No functional change since WA is already applied.
But since it has different names on different databases,
let's document it here to avoid future confusion.

Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306012812.19779-1-rodrigo.vivi@intel.com

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1ed1abb5b6a0..6cab20ce167a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8492,7 +8492,7 @@ static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
         if (!HAS_PCH_CNP(dev_priv))
                 return;
 
-        /* Display WA #1181: cnp */
+        /* Display WA #1181 WaSouthDisplayDisablePWMCGEGating: cnp */
         I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) |
                    CNP_PWM_CGE_GATING_DISABLE);
 }