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authorBen Skeggs <bskeggs@redhat.com>2016-06-03 01:05:52 -0400
committerBen Skeggs <bskeggs@redhat.com>2016-06-06 18:11:25 -0400
commit4691409b3e2250ed66aa8dcefa23fe765daf7add (patch)
tree3dbb36f9071aa7d37db474b368c906069cb77f8a
parenta8953c52b95167b5d21a66f0859751570271d834 (diff)
drm/nouveau/disp/sor/gm107: training pattern registers are like gm200
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h9
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c53
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c15
6 files changed, 64 insertions, 18 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
index a74c5dd27dc0..e2a64ed14b22 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
@@ -18,6 +18,7 @@ nvkm-y += nvkm/engine/disp/piornv50.o
18nvkm-y += nvkm/engine/disp/sornv50.o 18nvkm-y += nvkm/engine/disp/sornv50.o
19nvkm-y += nvkm/engine/disp/sorg94.o 19nvkm-y += nvkm/engine/disp/sorg94.o
20nvkm-y += nvkm/engine/disp/sorgf119.o 20nvkm-y += nvkm/engine/disp/sorgf119.o
21nvkm-y += nvkm/engine/disp/sorgm107.o
21nvkm-y += nvkm/engine/disp/sorgm200.o 22nvkm-y += nvkm/engine/disp/sorgm200.o
22nvkm-y += nvkm/engine/disp/dport.o 23nvkm-y += nvkm/engine/disp/dport.o
23 24
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
index b6944142d616..f4b9cf8574be 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
@@ -36,7 +36,7 @@ gm107_disp = {
36 .outp.internal.crt = nv50_dac_output_new, 36 .outp.internal.crt = nv50_dac_output_new,
37 .outp.internal.tmds = nv50_sor_output_new, 37 .outp.internal.tmds = nv50_sor_output_new,
38 .outp.internal.lvds = nv50_sor_output_new, 38 .outp.internal.lvds = nv50_sor_output_new,
39 .outp.internal.dp = gf119_sor_dp_new, 39 .outp.internal.dp = gm107_sor_dp_new,
40 .dac.nr = 3, 40 .dac.nr = 3,
41 .dac.power = nv50_dac_power, 41 .dac.power = nv50_dac_power,
42 .dac.sense = nv50_dac_sense, 42 .dac.sense = nv50_dac_sense,
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h
index e9067ba4e179..4e983f6d7032 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h
@@ -62,7 +62,12 @@ int g94_sor_dp_lnk_pwr(struct nvkm_output_dp *, int);
62int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, 62int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
63 struct nvkm_output **); 63 struct nvkm_output **);
64int gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *, int, int, bool); 64int gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *, int, int, bool);
65int gf119_sor_dp_drv_ctl(struct nvkm_output_dp *, int, int, int, int);
65 66
66int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, 67int gm107_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
67 struct nvkm_output **); 68 struct nvkm_output **);
69int gm107_sor_dp_pattern(struct nvkm_output_dp *, int);
70
71int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
72 struct nvkm_output **);
68#endif 73#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
index 5111560b4809..22706c0a54b5 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
@@ -63,7 +63,7 @@ gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef)
63 return 0; 63 return 0;
64} 64}
65 65
66static int 66int
67gf119_sor_dp_drv_ctl(struct nvkm_output_dp *outp, 67gf119_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
68 int ln, int vs, int pe, int pc) 68 int ln, int vs, int pe, int pc)
69{ 69{
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c
new file mode 100644
index 000000000000..37790b2617c5
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c
@@ -0,0 +1,53 @@
1/*
2 * Copyright 2016 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24#include "nv50.h"
25#include "outpdp.h"
26
27int
28gm107_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
29{
30 struct nvkm_device *device = outp->base.disp->engine.subdev.device;
31 const u32 soff = outp->base.or * 0x800;
32 const u32 data = 0x01010101 * pattern;
33 if (outp->base.info.sorconf.link & 1)
34 nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
35 else
36 nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
37 return 0;
38}
39
40static const struct nvkm_output_dp_func
41gm107_sor_dp_func = {
42 .pattern = gm107_sor_dp_pattern,
43 .lnk_pwr = g94_sor_dp_lnk_pwr,
44 .lnk_ctl = gf119_sor_dp_lnk_ctl,
45 .drv_ctl = gf119_sor_dp_drv_ctl,
46};
47
48int
49gm107_sor_dp_new(struct nvkm_disp *disp, int index,
50 struct dcb_output *dcbE, struct nvkm_output **poutp)
51{
52 return nvkm_output_dp_new_(&gm107_sor_dp_func, disp, index, dcbE, poutp);
53}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
index 2cfbef9c344f..c44fa7ea672a 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
@@ -57,19 +57,6 @@ gm200_sor_dp_lane_map(struct nvkm_device *device, u8 lane)
57} 57}
58 58
59static int 59static int
60gm200_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
61{
62 struct nvkm_device *device = outp->base.disp->engine.subdev.device;
63 const u32 soff = gm200_sor_soff(outp);
64 const u32 data = 0x01010101 * pattern;
65 if (outp->base.info.sorconf.link & 1)
66 nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
67 else
68 nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
69 return 0;
70}
71
72static int
73gm200_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr) 60gm200_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
74{ 61{
75 struct nvkm_device *device = outp->base.disp->engine.subdev.device; 62 struct nvkm_device *device = outp->base.disp->engine.subdev.device;
@@ -129,7 +116,7 @@ gm200_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
129 116
130static const struct nvkm_output_dp_func 117static const struct nvkm_output_dp_func
131gm200_sor_dp_func = { 118gm200_sor_dp_func = {
132 .pattern = gm200_sor_dp_pattern, 119 .pattern = gm107_sor_dp_pattern,
133 .lnk_pwr = gm200_sor_dp_lnk_pwr, 120 .lnk_pwr = gm200_sor_dp_lnk_pwr,
134 .lnk_ctl = gf119_sor_dp_lnk_ctl, 121 .lnk_ctl = gf119_sor_dp_lnk_ctl,
135 .drv_ctl = gm200_sor_dp_drv_ctl, 122 .drv_ctl = gm200_sor_dp_drv_ctl,