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authorArchit Taneja <architt@codeaurora.org>2018-01-17 04:34:45 -0500
committerRob Clark <robdclark@gmail.com>2018-02-20 10:41:21 -0500
commit45be9dc52eb4b9ec6f98da9263c8fcb39fbd86b3 (patch)
tree6f68e971dd92a1687c0ba3254cfec68851f5d3cf
parentc1d97083cd48a2b3f4382f0122889d1d73661b2e (diff)
dt-bindings: display: msm/dsi: Remove unused properties
"qcom,dsi-host-index" and "qcom,dsi-phy-index" DT props aren't acceptable and have never been used in any DT files. Remove them. Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
-rw-r--r--Documentation/devicetree/bindings/display/msm/dsi.txt4
1 files changed, 0 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
index a6671bd2c85a..457c688736be 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi.txt
+++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
@@ -7,8 +7,6 @@ Required properties:
7- reg: Physical base address and length of the registers of controller 7- reg: Physical base address and length of the registers of controller
8- reg-names: The names of register regions. The following regions are required: 8- reg-names: The names of register regions. The following regions are required:
9 * "dsi_ctrl" 9 * "dsi_ctrl"
10- qcom,dsi-host-index: The ID of DSI controller hardware instance. This should
11 be 0 or 1, since we have 2 DSI controllers at most for now.
12- interrupts: The interrupt signal from the DSI block. 10- interrupts: The interrupt signal from the DSI block.
13- power-domains: Should be <&mmcc MDSS_GDSC>. 11- power-domains: Should be <&mmcc MDSS_GDSC>.
14- clocks: Phandles to device clocks. 12- clocks: Phandles to device clocks.
@@ -96,8 +94,6 @@ Required properties:
96 * "dsi_phy_regulator" 94 * "dsi_phy_regulator"
97- clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating 95- clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating
98 2 clocks: A byte clock (index 0), and a pixel clock (index 1). 96 2 clocks: A byte clock (index 0), and a pixel clock (index 1).
99- qcom,dsi-phy-index: The ID of DSI PHY hardware instance. This should
100 be 0 or 1, since we have 2 DSI PHYs at most for now.
101- power-domains: Should be <&mmcc MDSS_GDSC>. 97- power-domains: Should be <&mmcc MDSS_GDSC>.
102- clocks: Phandles to device clocks. See [1] for details on clock bindings. 98- clocks: Phandles to device clocks. See [1] for details on clock bindings.
103- clock-names: the following clocks are required: 99- clock-names: the following clocks are required: