diff options
author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2018-10-02 07:11:59 -0400 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-10-03 20:39:36 -0400 |
commit | 45be1573ad1916bde112cc4d168ffa48a18e9b4e (patch) | |
tree | d97882513d6f6b0a892830aedc7aae7e98c0339e | |
parent | 84a9c4d55907feece68c6012d3c030cf5c841ceb (diff) |
ARM: dts: uniphier: Add USB3 controller nodes
Add USB3 controller nodes including usb-core, resets, regulator, ss-phy
and hs-phy. This supports for Pro4, PXs2 and the boards.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r-- | arch/arm/boot/dts/uniphier-ld6b-ref.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/uniphier-pro4-ace.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/uniphier-pro4-ref.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/uniphier-pro4-sanji.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/uniphier-pro4.dtsi | 94 | ||||
-rw-r--r-- | arch/arm/boot/dts/uniphier-pxs2-gentil.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/uniphier-pxs2-vodka.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/uniphier-pxs2.dtsi | 180 |
8 files changed, 318 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts index e505a94272de..3d9080ee7aef 100644 --- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts +++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts | |||
@@ -80,6 +80,14 @@ | |||
80 | }; | 80 | }; |
81 | }; | 81 | }; |
82 | 82 | ||
83 | &usb0 { | ||
84 | status = "okay"; | ||
85 | }; | ||
86 | |||
87 | &usb1 { | ||
88 | status = "okay"; | ||
89 | }; | ||
90 | |||
83 | &nand { | 91 | &nand { |
84 | status = "okay"; | 92 | status = "okay"; |
85 | }; | 93 | }; |
diff --git a/arch/arm/boot/dts/uniphier-pro4-ace.dts b/arch/arm/boot/dts/uniphier-pro4-ace.dts index 46e0917877d2..92cc48dd86d0 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ace.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts | |||
@@ -90,3 +90,11 @@ | |||
90 | reg = <1>; | 90 | reg = <1>; |
91 | }; | 91 | }; |
92 | }; | 92 | }; |
93 | |||
94 | &usb0 { | ||
95 | status = "okay"; | ||
96 | }; | ||
97 | |||
98 | &usb1 { | ||
99 | status = "okay"; | ||
100 | }; | ||
diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/uniphier-pro4-ref.dts index 1429908cbdb9..28038b17bbb3 100644 --- a/arch/arm/boot/dts/uniphier-pro4-ref.dts +++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts | |||
@@ -88,6 +88,14 @@ | |||
88 | }; | 88 | }; |
89 | }; | 89 | }; |
90 | 90 | ||
91 | &usb0 { | ||
92 | status = "okay"; | ||
93 | }; | ||
94 | |||
95 | &usb1 { | ||
96 | status = "okay"; | ||
97 | }; | ||
98 | |||
91 | &nand { | 99 | &nand { |
92 | status = "okay"; | 100 | status = "okay"; |
93 | }; | 101 | }; |
diff --git a/arch/arm/boot/dts/uniphier-pro4-sanji.dts b/arch/arm/boot/dts/uniphier-pro4-sanji.dts index eaca4a7b00c9..dda1a2f214a8 100644 --- a/arch/arm/boot/dts/uniphier-pro4-sanji.dts +++ b/arch/arm/boot/dts/uniphier-pro4-sanji.dts | |||
@@ -85,3 +85,11 @@ | |||
85 | reg = <1>; | 85 | reg = <1>; |
86 | }; | 86 | }; |
87 | }; | 87 | }; |
88 | |||
89 | &usb0 { | ||
90 | status = "okay"; | ||
91 | }; | ||
92 | |||
93 | &usb1 { | ||
94 | status = "okay"; | ||
95 | }; | ||
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index e4113f6a51b1..bcd2e40cb4f6 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi | |||
@@ -445,6 +445,100 @@ | |||
445 | }; | 445 | }; |
446 | }; | 446 | }; |
447 | 447 | ||
448 | usb0: usb@65a00000 { | ||
449 | compatible = "socionext,uniphier-dwc3", "snps,dwc3"; | ||
450 | status = "disabled"; | ||
451 | reg = <0x65a00000 0xcd00>; | ||
452 | interrupt-names = "host", "peripheral"; | ||
453 | interrupts = <0 134 4>, <0 135 4>; | ||
454 | pinctrl-names = "default"; | ||
455 | pinctrl-0 = <&pinctrl_usb0>; | ||
456 | clock-names = "ref", "bus_early", "suspend"; | ||
457 | clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>; | ||
458 | resets = <&usb0_rst 4>; | ||
459 | phys = <&usb0_ssphy>; | ||
460 | dr_mode = "host"; | ||
461 | }; | ||
462 | |||
463 | usb-glue@65b00000 { | ||
464 | compatible = "socionext,uniphier-pro4-dwc3-glue", | ||
465 | "simple-mfd"; | ||
466 | #address-cells = <1>; | ||
467 | #size-cells = <1>; | ||
468 | ranges = <0 0x65b00000 0x100>; | ||
469 | |||
470 | usb0_vbus: regulator@0 { | ||
471 | compatible = "socionext,uniphier-pro4-usb3-regulator"; | ||
472 | reg = <0 0x10>; | ||
473 | clock-names = "gio", "link"; | ||
474 | clocks = <&sys_clk 12>, <&sys_clk 14>; | ||
475 | reset-names = "gio", "link"; | ||
476 | resets = <&sys_rst 12>, <&sys_rst 14>; | ||
477 | }; | ||
478 | |||
479 | usb0_ssphy: ss-phy@10 { | ||
480 | compatible = "socionext,uniphier-pro4-usb3-ssphy"; | ||
481 | reg = <0x10 0x10>; | ||
482 | #phy-cells = <0>; | ||
483 | clock-names = "gio", "link"; | ||
484 | clocks = <&sys_clk 12>, <&sys_clk 14>; | ||
485 | reset-names = "gio", "link"; | ||
486 | resets = <&sys_rst 12>, <&sys_rst 14>; | ||
487 | vbus-supply = <&usb0_vbus>; | ||
488 | }; | ||
489 | |||
490 | usb0_rst: reset@40 { | ||
491 | compatible = "socionext,uniphier-pro4-usb3-reset"; | ||
492 | reg = <0x40 0x4>; | ||
493 | #reset-cells = <1>; | ||
494 | clock-names = "gio", "link"; | ||
495 | clocks = <&sys_clk 12>, <&sys_clk 14>; | ||
496 | reset-names = "gio", "link"; | ||
497 | resets = <&sys_rst 12>, <&sys_rst 14>; | ||
498 | }; | ||
499 | }; | ||
500 | |||
501 | usb1: usb@65c00000 { | ||
502 | compatible = "socionext,uniphier-dwc3", "snps,dwc3"; | ||
503 | status = "disabled"; | ||
504 | reg = <0x65c00000 0xcd00>; | ||
505 | interrupt-names = "host", "peripheral"; | ||
506 | interrupts = <0 137 4>, <0 138 4>; | ||
507 | pinctrl-names = "default"; | ||
508 | pinctrl-0 = <&pinctrl_usb1>; | ||
509 | clock-names = "ref", "bus_early", "suspend"; | ||
510 | clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>; | ||
511 | resets = <&usb1_rst 4>; | ||
512 | dr_mode = "host"; | ||
513 | }; | ||
514 | |||
515 | usb-glue@65d00000 { | ||
516 | compatible = "socionext,uniphier-pro4-dwc3-glue", | ||
517 | "simple-mfd"; | ||
518 | #address-cells = <1>; | ||
519 | #size-cells = <1>; | ||
520 | ranges = <0 0x65d00000 0x100>; | ||
521 | |||
522 | usb1_vbus: regulator@0 { | ||
523 | compatible = "socionext,uniphier-pro4-usb3-regulator"; | ||
524 | reg = <0 0x10>; | ||
525 | clock-names = "gio", "link"; | ||
526 | clocks = <&sys_clk 12>, <&sys_clk 15>; | ||
527 | reset-names = "gio", "link"; | ||
528 | resets = <&sys_rst 12>, <&sys_rst 15>; | ||
529 | }; | ||
530 | |||
531 | usb1_rst: reset@40 { | ||
532 | compatible = "socionext,uniphier-pro4-usb3-reset"; | ||
533 | reg = <0x40 0x4>; | ||
534 | #reset-cells = <1>; | ||
535 | clock-names = "gio", "link"; | ||
536 | clocks = <&sys_clk 12>, <&sys_clk 15>; | ||
537 | reset-names = "gio", "link"; | ||
538 | resets = <&sys_rst 12>, <&sys_rst 15>; | ||
539 | }; | ||
540 | }; | ||
541 | |||
448 | nand: nand@68000000 { | 542 | nand: nand@68000000 { |
449 | compatible = "socionext,uniphier-denali-nand-v5a"; | 543 | compatible = "socionext,uniphier-denali-nand-v5a"; |
450 | status = "disabled"; | 544 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts index 3a34694ed43c..e27fd4f2a569 100644 --- a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts +++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts | |||
@@ -90,3 +90,11 @@ | |||
90 | reg = <1>; | 90 | reg = <1>; |
91 | }; | 91 | }; |
92 | }; | 92 | }; |
93 | |||
94 | &usb0 { | ||
95 | status = "okay"; | ||
96 | }; | ||
97 | |||
98 | &usb1 { | ||
99 | status = "okay"; | ||
100 | }; | ||
diff --git a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts index 545cc3e666a0..23fe42b7408b 100644 --- a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts +++ b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts | |||
@@ -91,3 +91,7 @@ | |||
91 | reg = <1>; | 91 | reg = <1>; |
92 | }; | 92 | }; |
93 | }; | 93 | }; |
94 | |||
95 | &usb0 { | ||
96 | status = "okay"; | ||
97 | }; | ||
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 1a26154e49a1..8d20e9548e39 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi | |||
@@ -579,6 +579,186 @@ | |||
579 | }; | 579 | }; |
580 | }; | 580 | }; |
581 | 581 | ||
582 | usb0: usb@65a00000 { | ||
583 | compatible = "socionext,uniphier-dwc3", "snps,dwc3"; | ||
584 | status = "disabled"; | ||
585 | reg = <0x65a00000 0xcd00>; | ||
586 | interrupt-names = "host", "peripheral"; | ||
587 | interrupts = <0 134 4>, <0 135 4>; | ||
588 | pinctrl-names = "default"; | ||
589 | pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; | ||
590 | clock-names = "ref", "bus_early", "suspend"; | ||
591 | clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>; | ||
592 | resets = <&usb0_rst 15>; | ||
593 | phys = <&usb0_hsphy0>, <&usb0_hsphy1>, | ||
594 | <&usb0_ssphy0>, <&usb0_ssphy1>; | ||
595 | dr_mode = "host"; | ||
596 | }; | ||
597 | |||
598 | usb-glue@65b00000 { | ||
599 | compatible = "socionext,uniphier-pxs2-dwc3-glue", | ||
600 | "simple-mfd"; | ||
601 | #address-cells = <1>; | ||
602 | #size-cells = <1>; | ||
603 | ranges = <0 0x65b00000 0x400>; | ||
604 | |||
605 | usb0_rst: reset@0 { | ||
606 | compatible = "socionext,uniphier-pxs2-usb3-reset"; | ||
607 | reg = <0x0 0x4>; | ||
608 | #reset-cells = <1>; | ||
609 | clock-names = "link"; | ||
610 | clocks = <&sys_clk 14>; | ||
611 | reset-names = "link"; | ||
612 | resets = <&sys_rst 14>; | ||
613 | }; | ||
614 | |||
615 | usb0_vbus0: regulator@100 { | ||
616 | compatible = "socionext,uniphier-pxs2-usb3-regulator"; | ||
617 | reg = <0x100 0x10>; | ||
618 | clock-names = "link"; | ||
619 | clocks = <&sys_clk 14>; | ||
620 | reset-names = "link"; | ||
621 | resets = <&sys_rst 14>; | ||
622 | }; | ||
623 | |||
624 | usb0_vbus1: regulator@110 { | ||
625 | compatible = "socionext,uniphier-pxs2-usb3-regulator"; | ||
626 | reg = <0x110 0x10>; | ||
627 | clock-names = "link"; | ||
628 | clocks = <&sys_clk 14>; | ||
629 | reset-names = "link"; | ||
630 | resets = <&sys_rst 14>; | ||
631 | }; | ||
632 | |||
633 | usb0_hsphy0: hs-phy@200 { | ||
634 | compatible = "socionext,uniphier-pxs2-usb3-hsphy"; | ||
635 | reg = <0x200 0x10>; | ||
636 | #phy-cells = <0>; | ||
637 | clock-names = "link", "phy"; | ||
638 | clocks = <&sys_clk 14>, <&sys_clk 16>; | ||
639 | reset-names = "link", "phy"; | ||
640 | resets = <&sys_rst 14>, <&sys_rst 16>; | ||
641 | vbus-supply = <&usb0_vbus0>; | ||
642 | }; | ||
643 | |||
644 | usb0_hsphy1: hs-phy@210 { | ||
645 | compatible = "socionext,uniphier-pxs2-usb3-hsphy"; | ||
646 | reg = <0x210 0x10>; | ||
647 | #phy-cells = <0>; | ||
648 | clock-names = "link", "phy"; | ||
649 | clocks = <&sys_clk 14>, <&sys_clk 16>; | ||
650 | reset-names = "link", "phy"; | ||
651 | resets = <&sys_rst 14>, <&sys_rst 16>; | ||
652 | vbus-supply = <&usb0_vbus1>; | ||
653 | }; | ||
654 | |||
655 | usb0_ssphy0: ss-phy@300 { | ||
656 | compatible = "socionext,uniphier-pxs2-usb3-ssphy"; | ||
657 | reg = <0x300 0x10>; | ||
658 | #phy-cells = <0>; | ||
659 | clock-names = "link", "phy"; | ||
660 | clocks = <&sys_clk 14>, <&sys_clk 17>; | ||
661 | reset-names = "link", "phy"; | ||
662 | resets = <&sys_rst 14>, <&sys_rst 17>; | ||
663 | vbus-supply = <&usb0_vbus0>; | ||
664 | }; | ||
665 | |||
666 | usb0_ssphy1: ss-phy@310 { | ||
667 | compatible = "socionext,uniphier-pxs2-usb3-ssphy"; | ||
668 | reg = <0x310 0x10>; | ||
669 | #phy-cells = <0>; | ||
670 | clock-names = "link", "phy"; | ||
671 | clocks = <&sys_clk 14>, <&sys_clk 18>; | ||
672 | reset-names = "link", "phy"; | ||
673 | resets = <&sys_rst 14>, <&sys_rst 18>; | ||
674 | vbus-supply = <&usb0_vbus1>; | ||
675 | }; | ||
676 | }; | ||
677 | |||
678 | usb1: usb@65c00000 { | ||
679 | compatible = "socionext,uniphier-dwc3", "snps,dwc3"; | ||
680 | status = "disabled"; | ||
681 | reg = <0x65c00000 0xcd00>; | ||
682 | interrupt-names = "host", "peripheral"; | ||
683 | interrupts = <0 137 4>, <0 138 4>; | ||
684 | pinctrl-names = "default"; | ||
685 | pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; | ||
686 | clock-names = "ref", "bus_early", "suspend"; | ||
687 | clocks = <&sys_clk 15>, <&sys_clk 15>, <&sys_clk 15>; | ||
688 | resets = <&usb1_rst 15>; | ||
689 | phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>; | ||
690 | dr_mode = "host"; | ||
691 | }; | ||
692 | |||
693 | usb-glue@65d00000 { | ||
694 | compatible = "socionext,uniphier-pxs2-dwc3-glue", | ||
695 | "simple-mfd"; | ||
696 | #address-cells = <1>; | ||
697 | #size-cells = <1>; | ||
698 | ranges = <0 0x65d00000 0x400>; | ||
699 | |||
700 | usb1_rst: reset@0 { | ||
701 | compatible = "socionext,uniphier-pxs2-usb3-reset"; | ||
702 | reg = <0x0 0x4>; | ||
703 | #reset-cells = <1>; | ||
704 | clock-names = "link"; | ||
705 | clocks = <&sys_clk 15>; | ||
706 | reset-names = "link"; | ||
707 | resets = <&sys_rst 15>; | ||
708 | }; | ||
709 | |||
710 | usb1_vbus0: regulator@100 { | ||
711 | compatible = "socionext,uniphier-pxs2-usb3-regulator"; | ||
712 | reg = <0x100 0x10>; | ||
713 | clock-names = "link"; | ||
714 | clocks = <&sys_clk 15>; | ||
715 | reset-names = "link"; | ||
716 | resets = <&sys_rst 15>; | ||
717 | }; | ||
718 | |||
719 | usb1_vbus1: regulator@110 { | ||
720 | compatible = "socionext,uniphier-pxs2-usb3-regulator"; | ||
721 | reg = <0x110 0x10>; | ||
722 | clock-names = "link"; | ||
723 | clocks = <&sys_clk 15>; | ||
724 | reset-names = "link"; | ||
725 | resets = <&sys_rst 15>; | ||
726 | }; | ||
727 | |||
728 | usb1_hsphy0: hs-phy@200 { | ||
729 | compatible = "socionext,uniphier-pxs2-usb3-hsphy"; | ||
730 | reg = <0x200 0x10>; | ||
731 | #phy-cells = <0>; | ||
732 | clock-names = "link", "phy"; | ||
733 | clocks = <&sys_clk 15>, <&sys_clk 20>; | ||
734 | reset-names = "link", "phy"; | ||
735 | resets = <&sys_rst 15>, <&sys_rst 20>; | ||
736 | vbus-supply = <&usb1_vbus0>; | ||
737 | }; | ||
738 | |||
739 | usb1_hsphy1: hs-phy@210 { | ||
740 | compatible = "socionext,uniphier-pxs2-usb3-hsphy"; | ||
741 | reg = <0x210 0x10>; | ||
742 | #phy-cells = <0>; | ||
743 | clock-names = "link", "phy"; | ||
744 | clocks = <&sys_clk 15>, <&sys_clk 20>; | ||
745 | reset-names = "link", "phy"; | ||
746 | resets = <&sys_rst 15>, <&sys_rst 20>; | ||
747 | vbus-supply = <&usb1_vbus1>; | ||
748 | }; | ||
749 | |||
750 | usb1_ssphy0: ss-phy@300 { | ||
751 | compatible = "socionext,uniphier-pxs2-usb3-ssphy"; | ||
752 | reg = <0x300 0x10>; | ||
753 | #phy-cells = <0>; | ||
754 | clock-names = "link", "phy"; | ||
755 | clocks = <&sys_clk 15>, <&sys_clk 21>; | ||
756 | reset-names = "link", "phy"; | ||
757 | resets = <&sys_rst 15>, <&sys_rst 21>; | ||
758 | vbus-supply = <&usb1_vbus0>; | ||
759 | }; | ||
760 | }; | ||
761 | |||
582 | nand: nand@68000000 { | 762 | nand: nand@68000000 { |
583 | compatible = "socionext,uniphier-denali-nand-v5b"; | 763 | compatible = "socionext,uniphier-denali-nand-v5b"; |
584 | status = "disabled"; | 764 | status = "disabled"; |