diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-07-21 20:27:42 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-07-21 20:27:42 -0400 |
commit | 45ae4df9220701071ffec057d4b0071943022ab3 (patch) | |
tree | d1e0776e1ec140b0cd87301feca66b5635cb64db | |
parent | ef81e63e17ab34cea26f24b951188d16143efc92 (diff) | |
parent | 5858610f0dd76151c4e12420fd11801d23737663 (diff) |
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
- Fix interrupt type on ethernet switch for i.MX-based RDU2
- GPC on i.MX exposed too large a register window which resulted in
userspace being able to crash the machine.
- Fixup of bad merge resolution moving GPIO DT nodes under pinctrl on
droid4.
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: imx6: RDU2: fix irq type for mv88e6xxx switch
soc: imx: gpc: restrict register range for regmap access
ARM: dts: omap4-droid4: fix dts w.r.t. pwm
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4-droid4-xt894.dts | 9 | ||||
-rw-r--r-- | drivers/soc/imx/gpc.c | 21 |
3 files changed, 25 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi index 19a075aee19e..f14df0baf2ab 100644 --- a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +++ b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | |||
@@ -692,7 +692,7 @@ | |||
692 | dsa,member = <0 0>; | 692 | dsa,member = <0 0>; |
693 | eeprom-length = <512>; | 693 | eeprom-length = <512>; |
694 | interrupt-parent = <&gpio6>; | 694 | interrupt-parent = <&gpio6>; |
695 | interrupts = <3 IRQ_TYPE_EDGE_FALLING>; | 695 | interrupts = <3 IRQ_TYPE_LEVEL_LOW>; |
696 | interrupt-controller; | 696 | interrupt-controller; |
697 | #interrupt-cells = <2>; | 697 | #interrupt-cells = <2>; |
698 | 698 | ||
diff --git a/arch/arm/boot/dts/omap4-droid4-xt894.dts b/arch/arm/boot/dts/omap4-droid4-xt894.dts index bdf73cbcec3a..e7c3c563ff8f 100644 --- a/arch/arm/boot/dts/omap4-droid4-xt894.dts +++ b/arch/arm/boot/dts/omap4-droid4-xt894.dts | |||
@@ -159,13 +159,7 @@ | |||
159 | 159 | ||
160 | dais = <&mcbsp2_port>, <&mcbsp3_port>; | 160 | dais = <&mcbsp2_port>, <&mcbsp3_port>; |
161 | }; | 161 | }; |
162 | }; | ||
163 | |||
164 | &dss { | ||
165 | status = "okay"; | ||
166 | }; | ||
167 | 162 | ||
168 | &gpio6 { | ||
169 | pwm8: dmtimer-pwm-8 { | 163 | pwm8: dmtimer-pwm-8 { |
170 | pinctrl-names = "default"; | 164 | pinctrl-names = "default"; |
171 | pinctrl-0 = <&vibrator_direction_pin>; | 165 | pinctrl-0 = <&vibrator_direction_pin>; |
@@ -192,7 +186,10 @@ | |||
192 | pwm-names = "enable", "direction"; | 186 | pwm-names = "enable", "direction"; |
193 | direction-duty-cycle-ns = <10000000>; | 187 | direction-duty-cycle-ns = <10000000>; |
194 | }; | 188 | }; |
189 | }; | ||
195 | 190 | ||
191 | &dss { | ||
192 | status = "okay"; | ||
196 | }; | 193 | }; |
197 | 194 | ||
198 | &dsi1 { | 195 | &dsi1 { |
diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index 32f0748fd067..0097a939487f 100644 --- a/drivers/soc/imx/gpc.c +++ b/drivers/soc/imx/gpc.c | |||
@@ -27,9 +27,16 @@ | |||
27 | #define GPC_PGC_SW2ISO_SHIFT 0x8 | 27 | #define GPC_PGC_SW2ISO_SHIFT 0x8 |
28 | #define GPC_PGC_SW_SHIFT 0x0 | 28 | #define GPC_PGC_SW_SHIFT 0x0 |
29 | 29 | ||
30 | #define GPC_PGC_PCI_PDN 0x200 | ||
31 | #define GPC_PGC_PCI_SR 0x20c | ||
32 | |||
30 | #define GPC_PGC_GPU_PDN 0x260 | 33 | #define GPC_PGC_GPU_PDN 0x260 |
31 | #define GPC_PGC_GPU_PUPSCR 0x264 | 34 | #define GPC_PGC_GPU_PUPSCR 0x264 |
32 | #define GPC_PGC_GPU_PDNSCR 0x268 | 35 | #define GPC_PGC_GPU_PDNSCR 0x268 |
36 | #define GPC_PGC_GPU_SR 0x26c | ||
37 | |||
38 | #define GPC_PGC_DISP_PDN 0x240 | ||
39 | #define GPC_PGC_DISP_SR 0x24c | ||
33 | 40 | ||
34 | #define GPU_VPU_PUP_REQ BIT(1) | 41 | #define GPU_VPU_PUP_REQ BIT(1) |
35 | #define GPU_VPU_PDN_REQ BIT(0) | 42 | #define GPU_VPU_PDN_REQ BIT(0) |
@@ -318,10 +325,24 @@ static const struct of_device_id imx_gpc_dt_ids[] = { | |||
318 | { } | 325 | { } |
319 | }; | 326 | }; |
320 | 327 | ||
328 | static const struct regmap_range yes_ranges[] = { | ||
329 | regmap_reg_range(GPC_CNTR, GPC_CNTR), | ||
330 | regmap_reg_range(GPC_PGC_PCI_PDN, GPC_PGC_PCI_SR), | ||
331 | regmap_reg_range(GPC_PGC_GPU_PDN, GPC_PGC_GPU_SR), | ||
332 | regmap_reg_range(GPC_PGC_DISP_PDN, GPC_PGC_DISP_SR), | ||
333 | }; | ||
334 | |||
335 | static const struct regmap_access_table access_table = { | ||
336 | .yes_ranges = yes_ranges, | ||
337 | .n_yes_ranges = ARRAY_SIZE(yes_ranges), | ||
338 | }; | ||
339 | |||
321 | static const struct regmap_config imx_gpc_regmap_config = { | 340 | static const struct regmap_config imx_gpc_regmap_config = { |
322 | .reg_bits = 32, | 341 | .reg_bits = 32, |
323 | .val_bits = 32, | 342 | .val_bits = 32, |
324 | .reg_stride = 4, | 343 | .reg_stride = 4, |
344 | .rd_table = &access_table, | ||
345 | .wr_table = &access_table, | ||
325 | .max_register = 0x2ac, | 346 | .max_register = 0x2ac, |
326 | }; | 347 | }; |
327 | 348 | ||