Merge branch 'drm-next-4.15-dc' of git://people.freedesktop.org/~agd5f/linux into drm-next

A bunch of smatch fixes for the dc code.

* 'drm-next-4.15-dc' of git://people.freedesktop.org/~agd5f/linux:
  amd/display: Fix potential null dereference in dce_calcs.c
  amdgpu/dm: Remove unused forward declaration
  drm/amdgpu: Remove unused dc_stream from amdgpu_crtc
  amdgpu/dc: Fix double unlock in amdgpu_dm_commit_planes
  amdgpu/dc: Fix missing null checks in amdgpu_dm.c
  amdgpu/dc: Fix potential null dereferences in amdgpu_dm.c
  amdgpu/dc: fix more indentation warnings
  amdgpu/dc: handle allocation failures in dc_commit_planes_to_stream.
  amdgpu/dc: fix indentation warning from smatch.
  amdgpu/dc: fix non-ansi function decls.
  drm/amd/display: remove some unneeded code
  drm/amd/display: checking for NULL instead of IS_ERR()
  drm/amd/display: small cleanup in destruct()

23 files changed, 114 insertions, 99 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 59e2e5d59562..ffde1e9666e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -436,8 +436,6 @@ struct amdgpu_crtc {
         enum amdgpu_interrupt_state vsync_timer_enabled;
 
         int otg_inst;
-        /* After Set Mode stream will be non-NULL */
-        const struct dc_stream *stream;
         struct drm_pending_vblank_event *event;
 };
 
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 33a15a1d818c..8ed6767b4616 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -430,10 +430,12 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
         /* Display Core create. */
         adev->dm.dc = dc_create(&init_data);
 
-        if (adev->dm.dc)
+        if (adev->dm.dc) {
                 DRM_INFO("Display Core initialized!\n");
-        else
+        } else {
                 DRM_INFO("Display Core failed to initialize!\n");
+                goto error;
+        }
 
         INIT_WORK(&adev->dm.mst_hotplug_work, hotplug_notify_work_func);
 
@@ -517,7 +519,7 @@ static int detect_mst_link_for_all_connectors(struct drm_device *dev)
         drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
 
         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-                   aconnector = to_amdgpu_dm_connector(connector);
+                aconnector = to_amdgpu_dm_connector(connector);
                 if (aconnector->dc_link->type == dc_connection_mst_branch) {
                         DRM_DEBUG_DRIVER("DM_MST: starting TM on aconnector: %p [id: %d]\n",
                                         aconnector, aconnector->base.base.id);
@@ -1296,7 +1298,7 @@ amdgpu_dm_register_backlight_device(struct amdgpu_display_manager *dm)
                         &amdgpu_dm_backlight_ops,
                         &props);
 
-        if (NULL == dm->backlight_dev)
+        if (IS_ERR(dm->backlight_dev))
                 DRM_ERROR("DM: Backlight registration failed!\n");
         else
                 DRM_DEBUG_DRIVER("DM: Registered Backlight device: %s\n", bl_name);
@@ -2273,7 +2275,7 @@ decide_crtc_timing_for_drm_display_mode(struct drm_display_mode *drm_mode,
         }
 }
 
-static void create_fake_sink(struct amdgpu_dm_connector *aconnector)
+static int create_fake_sink(struct amdgpu_dm_connector *aconnector)
 {
         struct dc_sink *sink = NULL;
         struct dc_sink_init_data sink_init_data = { 0 };
@@ -2282,14 +2284,18 @@ static void create_fake_sink(struct amdgpu_dm_connector *aconnector)
         sink_init_data.sink_signal = aconnector->dc_link->connector_signal;
 
         sink = dc_sink_create(&sink_init_data);
-        if (!sink)
+        if (!sink) {
                 DRM_ERROR("Failed to create sink!\n");
+                return -ENOMEM;
+        }
 
         sink->sink_signal = SIGNAL_TYPE_VIRTUAL;
         aconnector->fake_enable = true;
 
         aconnector->dc_sink = sink;
         aconnector->dc_link->local_sink = sink;
+
+        return 0;
 }
 
 static struct dc_stream_state *
@@ -2323,7 +2329,8 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
                 if (aconnector->mst_port)
                         goto stream_create_fail;
 
-                create_fake_sink(aconnector);
+                if (create_fake_sink(aconnector))
+                        goto stream_create_fail;
         }
 
         stream = dc_create_stream_for_sink(aconnector->dc_sink);
@@ -2423,6 +2430,8 @@ dm_crtc_duplicate_state(struct drm_crtc *crtc)
                 return NULL;
 
         state = kzalloc(sizeof(*state), GFP_KERNEL);
+        if (!state)
+                return NULL;
 
         __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
 
@@ -3419,6 +3428,8 @@ create_i2c(struct ddc_service *ddc_service,
         struct amdgpu_i2c_adapter *i2c;
 
         i2c = kzalloc(sizeof(struct amdgpu_i2c_adapter), GFP_KERNEL);
+        if (!i2c)
+                return NULL;
         i2c->base.owner = THIS_MODULE;
         i2c->base.class = I2C_CLASS_DDC;
         i2c->base.dev.parent = &adev->pdev->dev;
@@ -3449,6 +3460,11 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,
         DRM_DEBUG_DRIVER("%s()\n", __func__);
 
         i2c = create_i2c(link->ddc, link->link_index, &res);
+        if (!i2c) {
+                DRM_ERROR("Failed to create i2c adapter data\n");
+                return -ENOMEM;
+        }
+
         aconnector->i2c = i2c;
         res = i2c_add_adapter(&i2c->base);
 
@@ -3888,7 +3904,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                         DRM_ERROR("%s: acrtc %d, already busy\n",
                                   __func__,
                                   acrtc_attach->crtc_id);
-                        spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
                         /* In commit tail framework this cannot happen */
                         WARN_ON(1);
                 }
@@ -4712,10 +4727,10 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                 goto fail;
         }
 
-         /* Run this here since we want to validate the streams we created */
-         ret = drm_atomic_helper_check_planes(dev, state);
-         if (ret)
-                 goto fail;
+        /* Run this here since we want to validate the streams we created */
+        ret = drm_atomic_helper_check_planes(dev, state);
+        if (ret)
+                goto fail;
 
         /* Check scaling and underscan changes*/
         /*TODO Removed scaling changes validation due to inability to commit
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index be3b70d683e7..f42f8357b676 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -199,8 +199,6 @@ struct amdgpu_framebuffer;
 struct amdgpu_display_manager;
 struct dc_validation_set;
 struct dc_plane_state;
-/* TODO rename to dc_stream_state */
-struct  dc_stream;
 
 struct dm_plane_state {
         struct drm_plane_state base;
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index 43e9a9959288..1ee1717f2e6f 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -1373,7 +1373,7 @@ static enum bp_result get_firmware_info_v3_1(
                                 bp->cmd_tbl.get_smu_clock_info(bp) * 10;
         }
 
-         return BP_RESULT_OK;
+        return BP_RESULT_OK;
 }
 
 static enum bp_result bios_parser_get_encoder_cap_info(
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
index 64eab356d336..ba68693758a7 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
@@ -373,15 +373,15 @@ static void init_set_crtc_timing(struct bios_parser *bp)
         uint32_t dtd_version =
                         BIOS_CMD_TABLE_PARA_REVISION(setcrtc_usingdtdtiming);
 
-                switch (dtd_version) {
-                case 3:
-                        bp->cmd_tbl.set_crtc_timing =
-                                        set_crtc_using_dtd_timing_v3;
-                        break;
-                default:
-                        bp->cmd_tbl.set_crtc_timing = NULL;
-                        break;
-                }
+        switch (dtd_version) {
+        case 3:
+                bp->cmd_tbl.set_crtc_timing =
+                        set_crtc_using_dtd_timing_v3;
+                break;
+        default:
+                bp->cmd_tbl.set_crtc_timing = NULL;
+                break;
+        }
 }
 
 static enum bp_result set_crtc_using_dtd_timing_v3(
diff --git a/drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c b/drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c
index 8049320e8b03..ca24154468c7 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c
@@ -358,7 +358,7 @@ static const struct command_table_helper command_table_helper_funcs = {
  * const struct command_table_helper **h - [out] struct of functions
  *
  */
-const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table()
+const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table(void)
 {
         return &command_table_helper_funcs;
 }
diff --git a/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c b/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c
index d342cdecba11..0237ae575068 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c
@@ -412,7 +412,7 @@ static const struct command_table_helper command_table_helper_funcs = {
  * const struct command_table_helper **h - [out] struct of functions
  *
  */
-const struct command_table_helper *dal_cmd_tbl_helper_dce112_get_table2()
+const struct command_table_helper *dal_cmd_tbl_helper_dce112_get_table2(void)
 {
         return &command_table_helper_funcs;
 }
diff --git a/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c b/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c
index 48e59963dad4..452034f83e4c 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c
@@ -412,7 +412,7 @@ static const struct command_table_helper command_table_helper_funcs = {
  * const struct command_table_helper **h - [out] struct of functions
  *
  */
-const struct command_table_helper *dal_cmd_tbl_helper_dce112_get_table()
+const struct command_table_helper *dal_cmd_tbl_helper_dce112_get_table(void)
 {
         return &command_table_helper_funcs;
 }
diff --git a/drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c b/drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c
index 295e16ef3f73..8b30b558cf1f 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c
@@ -348,7 +348,7 @@ static const struct command_table_helper command_table_helper_funcs = {
                 dal_cmd_table_helper_encoder_mode_bp_to_atom,
 };
 
-const struct command_table_helper *dal_cmd_tbl_helper_dce80_get_table()
+const struct command_table_helper *dal_cmd_tbl_helper_dce80_get_table(void)
 {
         return &command_table_helper_funcs;
 }
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
index 4f8a95368ffc..6347712db834 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
@@ -2794,6 +2794,8 @@ bool bw_calcs(struct dc_context *ctx,
 {
         struct bw_calcs_data *data = kzalloc(sizeof(struct bw_calcs_data),
                                              GFP_KERNEL);
+        if (!data)
+                return false;
 
         populate_initial_data(pipe, pipe_count, data);
 
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index e1515230c661..3dce35e66b09 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -1155,7 +1155,7 @@ static unsigned int dcn_find_normalized_clock_vdd_Level(
                         unsigned factor = (ddr4_dram_factor_single_Channel * dc->dcn_soc->number_of_channels);
 
                         if (clocks_in_khz > dc->dcn_soc->fabric_and_dram_bandwidth_vmax0p9*1000000/factor) {
-                        vdd_level = dcn_bw_v_max0p91;
+                                vdd_level = dcn_bw_v_max0p91;
                                 BREAK_TO_DEBUGGER();
                         } else if (clocks_in_khz > dc->dcn_soc->fabric_and_dram_bandwidth_vnom0p8*1000000/factor) {
                                 vdd_level = dcn_bw_v_max0p9;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index a71392ffc46d..ce3c57b38bc0 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -952,6 +952,14 @@ bool dc_commit_planes_to_stream(
         scaling_info = kcalloc(MAX_SURFACES, sizeof(struct dc_scaling_info),
                                GFP_KERNEL);
 
+        if (!flip_addr || !plane_info || !scaling_info) {
+                kfree(flip_addr);
+                kfree(plane_info);
+                kfree(scaling_info);
+                kfree(stream_update);
+                return false;
+        }
+
         memset(updates, 0, sizeof(updates));
 
         stream_update->src = dc_stream->src;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 572b885195c7..de04b95e103a 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -182,11 +182,11 @@ bool dc_stream_set_cursor_attributes(
 
         if (NULL == stream) {
                 dm_error("DC: dc_stream is NULL!\n");
-                        return false;
+                return false;
         }
         if (NULL == attributes) {
                 dm_error("DC: attributes is NULL!\n");
-                        return false;
+                return false;
         }
 
         if (attributes->address.quad_part == 0) {
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
index 5aa2270f36fd..ade5b8ee9c3c 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
@@ -145,7 +145,7 @@ void dc_gamma_release(struct dc_gamma **gamma)
         *gamma = NULL;
 }
 
-struct dc_gamma *dc_create_gamma()
+struct dc_gamma *dc_create_gamma(void)
 {
         struct dc_gamma *gamma = kzalloc(sizeof(*gamma), GFP_KERNEL);
 
@@ -175,7 +175,7 @@ void dc_transfer_func_release(struct dc_transfer_func *tf)
         kref_put(&tf->refcount, dc_transfer_func_free);
 }
 
-struct dc_transfer_func *dc_create_transfer_func()
+struct dc_transfer_func *dc_create_transfer_func(void)
 {
         struct dc_transfer_func *tf = kzalloc(sizeof(*tf), GFP_KERNEL);
 
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
index 526ec5c8eafd..d882adf746a5 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
@@ -179,19 +179,19 @@ static void check_audio_bandwidth_hdmi(
         /* Number of Audio Packets (multiplied by 10) per Line (for 8 ch number
          * of Audio samples per line multiplied by 10 - Layout 1)
          */
-         samples /= 32;
-         samples *= crtc_info->v_active;
-         /*Number of samples multiplied by 10, per second */
-         samples *= crtc_info->refresh_rate;
-         /*Number of Audio samples per second */
-         samples /= 10;
-
-         /* @todo do it after deep color is implemented
-          * 8xx - deep color bandwidth scaling
-          * Extra bandwidth is avaliable in deep color b/c link runs faster than
-          * pixel rate. This has the effect of allowing more tmds characters to
-          * be transmitted during blank
-          */
+        samples /= 32;
+        samples *= crtc_info->v_active;
+        /*Number of samples multiplied by 10, per second */
+        samples *= crtc_info->refresh_rate;
+        /*Number of Audio samples per second */
+        samples /= 10;
+
+        /* @todo do it after deep color is implemented
+         * 8xx - deep color bandwidth scaling
+         * Extra bandwidth is avaliable in deep color b/c link runs faster than
+         * pixel rate. This has the effect of allowing more tmds characters to
+         * be transmitted during blank
+         */
 
         switch (crtc_info->color_depth) {
         case COLOR_DEPTH_888:
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
index 3691c7498d08..fd77df573b61 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
@@ -130,14 +130,14 @@ static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)
         if (wait == true) {
                 for (retryCount = 0; retryCount <= 100; retryCount++) {
                         dce_get_dmcu_psr_state(dmcu, &psr_state);
-                                if (enable) {
-                                        if (psr_state != 0)
-                                                break;
-                                } else {
-                                        if (psr_state == 0)
-                                                break;
-                                }
-                                udelay(10);
+                        if (enable) {
+                                if (psr_state != 0)
+                                        break;
+                        } else {
+                                if (psr_state == 0)
+                                        break;
+                        }
+                        udelay(10);
                 }
         }
 }
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 399a5984ada3..1229a3315018 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -775,8 +775,8 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
          * connect DIG back_end to front_end while enable_stream and
          * disconnect them during disable_stream
          * BY this, it is logic clean to separate stream and link */
-         link->link_enc->funcs->connect_dig_be_to_fe(link->link_enc,
-                        pipe_ctx->stream_res.stream_enc->id, true);
+        link->link_enc->funcs->connect_dig_be_to_fe(link->link_enc,
+                                                    pipe_ctx->stream_res.stream_enc->id, true);
 
 }
 
@@ -1306,7 +1306,7 @@ static enum dc_status apply_single_controller_ctx_to_hw(
                 stream->timing.display_color_depth,
                 pipe_ctx->stream->signal);
 
-        pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
+                pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
                         pipe_ctx->stream_res.opp,
                         &stream->bit_depth_params,
                         &stream->clamping);
@@ -2594,21 +2594,21 @@ uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context)
         uint8_t j;
         uint32_t min_vertical_blank_time = -1;
 
-                for (j = 0; j < context->stream_count; j++) {
-                        struct dc_stream_state *stream = context->streams[j];
-                        uint32_t vertical_blank_in_pixels = 0;
-                        uint32_t vertical_blank_time = 0;
+        for (j = 0; j < context->stream_count; j++) {
+                struct dc_stream_state *stream = context->streams[j];
+                uint32_t vertical_blank_in_pixels = 0;
+                uint32_t vertical_blank_time = 0;
 
-                        vertical_blank_in_pixels = stream->timing.h_total *
-                                (stream->timing.v_total
-                                        - stream->timing.v_addressable);
+                vertical_blank_in_pixels = stream->timing.h_total *
+                        (stream->timing.v_total
+                         - stream->timing.v_addressable);
 
-                        vertical_blank_time = vertical_blank_in_pixels
-                                * 1000 / stream->timing.pix_clk_khz;
+                vertical_blank_time = vertical_blank_in_pixels
+                        * 1000 / stream->timing.pix_clk_khz;
 
-                        if (min_vertical_blank_time > vertical_blank_time)
-                                min_vertical_blank_time = vertical_blank_time;
-                }
+                if (min_vertical_blank_time > vertical_blank_time)
+                        min_vertical_blank_time = vertical_blank_time;
+        }
 
         return min_vertical_blank_time;
 }
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index 95d871be3a0b..2502182d5e82 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -293,10 +293,9 @@ void dce120_timing_generator_tear_down_global_swap_lock(
                         FD(DCP0_DCP_GSL_CONTROL__DCP_GSL_SYNC_SOURCE), 0,
                         FD(DCP0_DCP_GSL_CONTROL__DCP_GSL_DELAY_SURFACE_UPDATE_PENDING), 0);
 
-                CRTC_REG_SET_2(
-                        CRTC0_CRTC_GSL_CONTROL,
-                        CRTC_GSL_CHECK_LINE_NUM, 0,
-                        CRTC_GSL_FORCE_DELAY, 0x2); /*TODO Why this value here ?*/
+        CRTC_REG_SET_2(CRTC0_CRTC_GSL_CONTROL,
+                       CRTC_GSL_CHECK_LINE_NUM, 0,
+                       CRTC_GSL_FORCE_DELAY, 0x2); /*TODO Why this value here ?*/
 }
 
 /* Reset slave controllers on master VSync */
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
index 7784001c3a17..40627c244bf5 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
@@ -124,7 +124,7 @@ static void program_gamut_remap(
                 const uint16_t *regval,
                 enum gamut_remap_select select)
 {
-         uint16_t selection = 0;
+        uint16_t selection = 0;
         struct color_matrices_reg gam_regs;
 
         if (regval == NULL || select == GAMUT_REMAP_BYPASS) {
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index d911590d08bc..4c4bd72d4e40 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -725,10 +725,8 @@ static void destruct(struct dcn10_resource_pool *pool)
                 }
         }
 
-        for (i = 0; i < pool->base.stream_enc_count; i++) {
-                if (pool->base.stream_enc[i] != NULL)
-                kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));
-        }
+        for (i = 0; i < pool->base.stream_enc_count; i++)
+                kfree(pool->base.stream_enc[i]);
 
         for (i = 0; i < pool->base.audio_count; i++) {
                 if (pool->base.audios[i])
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
index 1994865d4351..c7333cdf1802 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
@@ -236,13 +236,10 @@ static void tgn10_program_timing(
         if (tg->dlg_otg_param.signal == SIGNAL_TYPE_DISPLAY_PORT ||
                 tg->dlg_otg_param.signal == SIGNAL_TYPE_DISPLAY_PORT_MST ||
                 tg->dlg_otg_param.signal == SIGNAL_TYPE_EDP) {
-                v_init = asic_blank_start;
                 start_point = 1;
                 if (patched_crtc_timing.flags.INTERLACE == 1)
                         field_num = 1;
         }
-        if (v_init < 0)
-                v_init = 0;
         v_fp2 = 0;
         if (tg->dlg_otg_param.vstartup_start > asic_blank_end)
                 v_fp2 = tg->dlg_otg_param.vstartup_start > asic_blank_end;
diff --git a/drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c b/drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
index 0c4bbc10510d..81f9f3e34c10 100644
--- a/drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
+++ b/drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
@@ -318,7 +318,7 @@ static void process_channel_reply(
                                 REG_GET(AUX_SW_DATA,
                                                 AUX_SW_DATA, &aux_sw_data_val);
 
-                                 reply->data[i] = aux_sw_data_val;
+                                reply->data[i] = aux_sw_data_val;
                                 ++i;
                         }
 
diff --git a/drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c b/drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
index 1a5b3f70ddc9..56e25b3d65fd 100644
--- a/drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
+++ b/drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
@@ -133,13 +133,13 @@ static void release_engine(
                 safe_to_reset = (i2c_sw_status == 1);
         }
 
-                if (safe_to_reset)
-                        REG_UPDATE_2(
-                                        DC_I2C_CONTROL,
-                                        DC_I2C_SOFT_RESET, 1,
-                                        DC_I2C_SW_STATUS_RESET, 1);
-                else
-                        REG_UPDATE(DC_I2C_CONTROL, DC_I2C_SW_STATUS_RESET, 1);
+        if (safe_to_reset)
+                REG_UPDATE_2(
+                        DC_I2C_CONTROL,
+                        DC_I2C_SOFT_RESET, 1,
+                        DC_I2C_SW_STATUS_RESET, 1);
+        else
+                REG_UPDATE(DC_I2C_CONTROL, DC_I2C_SW_STATUS_RESET, 1);
 
         /* HW I2c engine - clock gating feature */
         if (!hw_engine->engine_keep_power_up_count)
@@ -301,16 +301,16 @@ static bool process_transaction(
          * For an I2C send operation, the LSB must be programmed to 0;
          * for I2C receive operation, the LSB must be programmed to 1. */
         if (hw_engine->transaction_count == 0) {
-                        value = REG_SET_4(DC_I2C_DATA, 0,
-                                                DC_I2C_DATA_RW, false,
-                                                DC_I2C_DATA, request->address,
-                                                DC_I2C_INDEX, 0,
-                                                DC_I2C_INDEX_WRITE, 1);
+                value = REG_SET_4(DC_I2C_DATA, 0,
+                                  DC_I2C_DATA_RW, false,
+                                  DC_I2C_DATA, request->address,
+                                  DC_I2C_INDEX, 0,
+                                  DC_I2C_INDEX_WRITE, 1);
                 hw_engine->buffer_used_write = 0;
         } else
-                        value = REG_SET_2(DC_I2C_DATA, 0,
-                                                DC_I2C_DATA_RW, false,
-                                                DC_I2C_DATA, request->address);
+                value = REG_SET_2(DC_I2C_DATA, 0,
+                                  DC_I2C_DATA_RW, false,
+                                  DC_I2C_DATA, request->address);
 
         hw_engine->buffer_used_write++;