Merge tag 'sunxi-drm-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into drm-next

sun4i-drm changes for 4.10

Support for the Allwinner A31 SoC display engine using the sun4i-drm
driver.

* tag 'sunxi-drm-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  drm/sun4i: Add a few formats
  drm/sun4i: Add compatible strings for A31/A31s display pipelines
  drm/sun4i: Add compatible string for A31/A31s TCON (timing controller)
  drm/sun4i: tcon: Move SoC specific quirks to a DT matched data structure
  drm/sun4i: sun6i-drc: Support DRC on A31 and A31s

7 files changed, 78 insertions, 20 deletions

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index b95696d748c7..b82c00449468 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -28,6 +28,8 @@ The TCON acts as a timing controller for RGB, LVDS and TV interfaces.
 Required properties:
  - compatible: value must be either:
    * allwinner,sun5i-a13-tcon
+   * allwinner,sun6i-a31-tcon
+   * allwinner,sun6i-a31s-tcon
    * allwinner,sun8i-a33-tcon
  - reg: base address and size of memory-mapped region
  - interrupts: interrupt associated to this IP
@@ -50,7 +52,7 @@ Required properties:
   second the block connected to the TCON channel 1 (usually the TV
   encoder)
 
-On the A13, there is one more clock required:
+On SoCs other than the A33, there is one more clock required:
    - 'tcon-ch1': The clock driving the TCON channel 1
 
 DRC
@@ -64,6 +66,8 @@ adaptive backlight control.
 
 Required properties:
   - compatible: value must be one of:
+    * allwinner,sun6i-a31-drc
+    * allwinner,sun6i-a31s-drc
     * allwinner,sun8i-a33-drc
   - reg: base address and size of the memory-mapped region.
   - interrupts: interrupt associated to this IP
@@ -87,6 +91,7 @@ system.
 Required properties:
   - compatible: value must be one of:
     * allwinner,sun5i-a13-display-backend
+    * allwinner,sun6i-a31-display-backend
     * allwinner,sun8i-a33-display-backend
   - reg: base address and size of the memory-mapped region.
   - clocks: phandles to the clocks feeding the frontend and backend
@@ -117,6 +122,7 @@ deinterlacing and color space conversion.
 Required properties:
   - compatible: value must be one of:
     * allwinner,sun5i-a13-display-frontend
+    * allwinner,sun6i-a31-display-frontend
     * allwinner,sun8i-a33-display-frontend
   - reg: base address and size of the memory-mapped region.
   - interrupts: interrupt associated to this IP
@@ -142,6 +148,8 @@ extra node.
 Required properties:
   - compatible: value must be one of:
     * allwinner,sun5i-a13-display-engine
+    * allwinner,sun6i-a31-display-engine
+    * allwinner,sun6i-a31s-display-engine
     * allwinner,sun8i-a33-display-engine
 
   - allwinner,pipelines: list of phandle to the display engine
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 32c0584e3c35..7eb2a965f83d 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -95,6 +95,22 @@ static int sun4i_backend_drm_format_to_layer(struct drm_plane *plane,
                 *mode = SUN4I_BACKEND_LAY_FBFMT_ARGB8888;
                 break;
 
+        case DRM_FORMAT_ARGB4444:
+                *mode = SUN4I_BACKEND_LAY_FBFMT_ARGB4444;
+                break;
+
+        case DRM_FORMAT_ARGB1555:
+                *mode = SUN4I_BACKEND_LAY_FBFMT_ARGB1555;
+                break;
+
+        case DRM_FORMAT_RGBA5551:
+                *mode = SUN4I_BACKEND_LAY_FBFMT_RGBA5551;
+                break;
+
+        case DRM_FORMAT_RGBA4444:
+                *mode = SUN4I_BACKEND_LAY_FBFMT_RGBA4444;
+                break;
+
         case DRM_FORMAT_XRGB8888:
                 *mode = SUN4I_BACKEND_LAY_FBFMT_XRGB8888;
                 break;
@@ -103,6 +119,10 @@ static int sun4i_backend_drm_format_to_layer(struct drm_plane *plane,
                 *mode = SUN4I_BACKEND_LAY_FBFMT_RGB888;
                 break;
 
+        case DRM_FORMAT_RGB565:
+                *mode = SUN4I_BACKEND_LAY_FBFMT_RGB565;
+                break;
+
         default:
                 return -EINVAL;
         }
@@ -408,6 +428,7 @@ static int sun4i_backend_remove(struct platform_device *pdev)
 
 static const struct of_device_id sun4i_backend_of_table[] = {
         { .compatible = "allwinner,sun5i-a13-display-backend" },
+        { .compatible = "allwinner,sun6i-a31-display-backend" },
         { .compatible = "allwinner,sun8i-a33-display-backend" },
         { }
 };
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index aae723cd6d79..2891aa914cfa 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -200,12 +200,15 @@ static const struct component_master_ops sun4i_drv_master_ops = {
 static bool sun4i_drv_node_is_frontend(struct device_node *node)
 {
         return of_device_is_compatible(node, "allwinner,sun5i-a13-display-frontend") ||
+                of_device_is_compatible(node, "allwinner,sun6i-a31-display-frontend") ||
                 of_device_is_compatible(node, "allwinner,sun8i-a33-display-frontend");
 }
 
 static bool sun4i_drv_node_is_tcon(struct device_node *node)
 {
         return of_device_is_compatible(node, "allwinner,sun5i-a13-tcon") ||
+                of_device_is_compatible(node, "allwinner,sun6i-a31-tcon") ||
+                of_device_is_compatible(node, "allwinner,sun6i-a31s-tcon") ||
                 of_device_is_compatible(node, "allwinner,sun8i-a33-tcon");
 }
 
@@ -321,6 +324,8 @@ static int sun4i_drv_remove(struct platform_device *pdev)
 
 static const struct of_device_id sun4i_drv_of_table[] = {
         { .compatible = "allwinner,sun5i-a13-display-engine" },
+        { .compatible = "allwinner,sun6i-a31-display-engine" },
+        { .compatible = "allwinner,sun6i-a31s-display-engine" },
         { .compatible = "allwinner,sun8i-a33-display-engine" },
         { }
 };
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c
index f0035bf5efea..5d53c977bca5 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -73,12 +73,18 @@ static const struct drm_plane_funcs sun4i_backend_layer_funcs = {
 static const uint32_t sun4i_backend_layer_formats_primary[] = {
         DRM_FORMAT_ARGB8888,
         DRM_FORMAT_RGB888,
+        DRM_FORMAT_RGB565,
         DRM_FORMAT_XRGB8888,
 };
 
 static const uint32_t sun4i_backend_layer_formats_overlay[] = {
         DRM_FORMAT_ARGB8888,
+        DRM_FORMAT_ARGB4444,
+        DRM_FORMAT_ARGB1555,
+        DRM_FORMAT_RGBA5551,
+        DRM_FORMAT_RGBA4444,
         DRM_FORMAT_RGB888,
+        DRM_FORMAT_RGB565,
         DRM_FORMAT_XRGB8888,
 };
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index cadacb517f95..c6afb2448655 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -20,6 +20,7 @@
 #include <linux/component.h>
 #include <linux/ioport.h>
 #include <linux/of_address.h>
+#include <linux/of_device.h>
 #include <linux/of_graph.h>
 #include <linux/of_irq.h>
 #include <linux/regmap.h>
@@ -62,7 +63,7 @@ void sun4i_tcon_channel_disable(struct sun4i_tcon *tcon, int channel)
                 return;
         }
 
-        WARN_ON(!tcon->has_channel_1);
+        WARN_ON(!tcon->quirks->has_channel_1);
         regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
                            SUN4I_TCON1_CTL_TCON_ENABLE, 0);
         clk_disable_unprepare(tcon->sclk1);
@@ -80,7 +81,7 @@ void sun4i_tcon_channel_enable(struct sun4i_tcon *tcon, int channel)
                 return;
         }
 
-        WARN_ON(!tcon->has_channel_1);
+        WARN_ON(!tcon->quirks->has_channel_1);
         regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
                            SUN4I_TCON1_CTL_TCON_ENABLE,
                            SUN4I_TCON1_CTL_TCON_ENABLE);
@@ -202,7 +203,7 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,
         u8 clk_delay;
         u32 val;
 
-        WARN_ON(!tcon->has_channel_1);
+        WARN_ON(!tcon->quirks->has_channel_1);
 
         /* Adjust clock delay */
         clk_delay = sun4i_tcon_get_clk_delay(mode, 1);
@@ -266,7 +267,7 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,
         /*
          * FIXME: Undocumented bits
          */
-        if (tcon->has_mux)
+        if (tcon->quirks->has_unknown_mux)
                 regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1);
 }
 EXPORT_SYMBOL(sun4i_tcon1_mode_set);
@@ -327,7 +328,7 @@ static int sun4i_tcon_init_clocks(struct device *dev,
                 return PTR_ERR(tcon->sclk0);
         }
 
-        if (tcon->has_channel_1) {
+        if (tcon->quirks->has_channel_1) {
                 tcon->sclk1 = devm_clk_get(dev, "tcon-ch1");
                 if (IS_ERR(tcon->sclk1)) {
                         dev_err(dev, "Couldn't get the TCON channel 1 clock\n");
@@ -487,14 +488,7 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
         drv->tcon = tcon;
         tcon->drm = drm;
         tcon->dev = dev;
-
-        if (of_device_is_compatible(dev->of_node, "allwinner,sun5i-a13-tcon")) {
-                tcon->has_mux = true;
-                tcon->has_channel_1 = true;
-        } else {
-                tcon->has_mux = false;
-                tcon->has_channel_1 = false;
-        }
+        tcon->quirks = of_device_get_match_data(dev);
 
         tcon->lcd_rst = devm_reset_control_get(dev, "lcd");
         if (IS_ERR(tcon->lcd_rst)) {
@@ -588,9 +582,28 @@ static int sun4i_tcon_remove(struct platform_device *pdev)
         return 0;
 }
 
+static const struct sun4i_tcon_quirks sun5i_a13_quirks = {
+        .has_unknown_mux = true,
+        .has_channel_1  = true,
+};
+
+static const struct sun4i_tcon_quirks sun6i_a31_quirks = {
+        .has_channel_1  = true,
+};
+
+static const struct sun4i_tcon_quirks sun6i_a31s_quirks = {
+        .has_channel_1  = true,
+};
+
+static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
+        /* nothing is supported */
+};
+
 static const struct of_device_id sun4i_tcon_of_table[] = {
-        { .compatible = "allwinner,sun5i-a13-tcon" },
-        { .compatible = "allwinner,sun8i-a33-tcon" },
+        { .compatible = "allwinner,sun5i-a13-tcon", .data = &sun5i_a13_quirks },
+        { .compatible = "allwinner,sun6i-a31-tcon", .data = &sun6i_a31_quirks },
+        { .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks },
+        { .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks },
         { }
 };
 MODULE_DEVICE_TABLE(of, sun4i_tcon_of_table);
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index 12bd48925f4d..166064bafe2e 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -142,6 +142,11 @@
 
 #define SUN4I_TCON_MAX_CHANNELS         2
 
+struct sun4i_tcon_quirks {
+        bool    has_unknown_mux; /* sun5i has undocumented mux */
+        bool    has_channel_1;  /* a33 does not have channel 1 */
+};
+
 struct sun4i_tcon {
         struct device                   *dev;
         struct drm_device               *drm;
@@ -160,12 +165,10 @@ struct sun4i_tcon {
         /* Reset control */
         struct reset_control            *lcd_rst;
 
-        /* Platform adjustments */
-        bool                            has_mux;
-
         struct drm_panel                *panel;
 
-        bool                            has_channel_1;
+        /* Platform adjustments */
+        const struct sun4i_tcon_quirks  *quirks;
 };
 
 struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node);
diff --git a/drivers/gpu/drm/sun4i/sun6i_drc.c b/drivers/gpu/drm/sun4i/sun6i_drc.c
index bf6d846d8132..6ef707c5a719 100644
--- a/drivers/gpu/drm/sun4i/sun6i_drc.c
+++ b/drivers/gpu/drm/sun4i/sun6i_drc.c
@@ -98,6 +98,8 @@ static int sun6i_drc_remove(struct platform_device *pdev)
 }
 
 static const struct of_device_id sun6i_drc_of_table[] = {
+        { .compatible = "allwinner,sun6i-a31-drc" },
+        { .compatible = "allwinner,sun6i-a31s-drc" },
         { .compatible = "allwinner,sun8i-a33-drc" },
         { }
 };