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authorIvaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>2016-06-22 15:22:17 -0400
committerTony Lindgren <tony@atomide.com>2016-06-30 00:46:31 -0400
commit4406d52a0b735b27472846953fd0565302af6f3c (patch)
treec253a8a108123f85f2df0c4077656bf01e8bf668
parent1a695a905c18548062509178b98bc91e67510864 (diff)
ir-rx51: Fix build after multiarch changes broke it
The ir-rx51 driver for n900 has been disabled since the multiarch changes as plat include directory no longer is SoC specific. Let's fix it with minimal changes to pass the dmtimer calls in pdata. Then the following changes can be done while things can be tested to be working for each change: 1. Change the non-pwm dmtimer to use just hrtimer if possible 2. Change the pwm dmtimer to use Linux PWM API with the new drivers/pwm/pwm-omap-dmtimer.c and remove the direct calls to dmtimer functions 3. Parse configuration from device tree and drop the pdata Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: linux-media@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Pali Rohár <pali.rohar@gmail.com>
-rw-r--r--drivers/media/rc/Kconfig2
-rw-r--r--drivers/media/rc/ir-rx51.c99
2 files changed, 54 insertions, 47 deletions
diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig
index bd4d68500085..370e16e07867 100644
--- a/drivers/media/rc/Kconfig
+++ b/drivers/media/rc/Kconfig
@@ -336,7 +336,7 @@ config IR_TTUSBIR
336 336
337config IR_RX51 337config IR_RX51
338 tristate "Nokia N900 IR transmitter diode" 338 tristate "Nokia N900 IR transmitter diode"
339 depends on OMAP_DM_TIMER && ARCH_OMAP2PLUS && LIRC && !ARCH_MULTIPLATFORM 339 depends on OMAP_DM_TIMER && PWM_OMAP_DMTIMER && ARCH_OMAP2PLUS && LIRC
340 ---help--- 340 ---help---
341 Say Y or M here if you want to enable support for the IR 341 Say Y or M here if you want to enable support for the IR
342 transmitter diode built in the Nokia N900 (RX51) device. 342 transmitter diode built in the Nokia N900 (RX51) device.
diff --git a/drivers/media/rc/ir-rx51.c b/drivers/media/rc/ir-rx51.c
index 4e1711a40466..da839c3a8c8b 100644
--- a/drivers/media/rc/ir-rx51.c
+++ b/drivers/media/rc/ir-rx51.c
@@ -19,6 +19,7 @@
19 * 19 *
20 */ 20 */
21 21
22#include <linux/clk.h>
22#include <linux/module.h> 23#include <linux/module.h>
23#include <linux/interrupt.h> 24#include <linux/interrupt.h>
24#include <linux/uaccess.h> 25#include <linux/uaccess.h>
@@ -26,11 +27,9 @@
26#include <linux/sched.h> 27#include <linux/sched.h>
27#include <linux/wait.h> 28#include <linux/wait.h>
28 29
29#include <plat/dmtimer.h>
30#include <plat/clock.h>
31
32#include <media/lirc.h> 30#include <media/lirc.h>
33#include <media/lirc_dev.h> 31#include <media/lirc_dev.h>
32#include <linux/platform_data/pwm_omap_dmtimer.h>
34#include <linux/platform_data/media/ir-rx51.h> 33#include <linux/platform_data/media/ir-rx51.h>
35 34
36#define LIRC_RX51_DRIVER_FEATURES (LIRC_CAN_SET_SEND_DUTY_CYCLE | \ 35#define LIRC_RX51_DRIVER_FEATURES (LIRC_CAN_SET_SEND_DUTY_CYCLE | \
@@ -44,8 +43,9 @@
44#define TIMER_MAX_VALUE 0xffffffff 43#define TIMER_MAX_VALUE 0xffffffff
45 44
46struct lirc_rx51 { 45struct lirc_rx51 {
47 struct omap_dm_timer *pwm_timer; 46 pwm_omap_dmtimer *pwm_timer;
48 struct omap_dm_timer *pulse_timer; 47 pwm_omap_dmtimer *pulse_timer;
48 struct pwm_omap_dmtimer_pdata *dmtimer;
49 struct device *dev; 49 struct device *dev;
50 struct lirc_rx51_platform_data *pdata; 50 struct lirc_rx51_platform_data *pdata;
51 wait_queue_head_t wqueue; 51 wait_queue_head_t wqueue;
@@ -63,14 +63,14 @@ struct lirc_rx51 {
63 63
64static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51) 64static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
65{ 65{
66 omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1, 66 lirc_rx51->dmtimer->set_pwm(lirc_rx51->pwm_timer, 0, 1,
67 OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE); 67 PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE);
68} 68}
69 69
70static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51) 70static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
71{ 71{
72 omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1, 72 lirc_rx51->dmtimer->set_pwm(lirc_rx51->pwm_timer, 0, 1,
73 OMAP_TIMER_TRIGGER_NONE); 73 PWM_OMAP_DMTIMER_TRIGGER_NONE);
74} 74}
75 75
76static int init_timing_params(struct lirc_rx51 *lirc_rx51) 76static int init_timing_params(struct lirc_rx51 *lirc_rx51)
@@ -79,12 +79,12 @@ static int init_timing_params(struct lirc_rx51 *lirc_rx51)
79 79
80 load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq); 80 load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq);
81 match = -(lirc_rx51->duty_cycle * -load / 100); 81 match = -(lirc_rx51->duty_cycle * -load / 100);
82 omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load); 82 lirc_rx51->dmtimer->set_load(lirc_rx51->pwm_timer, 1, load);
83 omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match); 83 lirc_rx51->dmtimer->set_match(lirc_rx51->pwm_timer, 1, match);
84 omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2); 84 lirc_rx51->dmtimer->write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
85 omap_dm_timer_start(lirc_rx51->pwm_timer); 85 lirc_rx51->dmtimer->start(lirc_rx51->pwm_timer);
86 omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0); 86 lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer, 0);
87 omap_dm_timer_start(lirc_rx51->pulse_timer); 87 lirc_rx51->dmtimer->start(lirc_rx51->pulse_timer);
88 88
89 lirc_rx51->match = 0; 89 lirc_rx51->match = 0;
90 90
@@ -100,15 +100,15 @@ static int pulse_timer_set_timeout(struct lirc_rx51 *lirc_rx51, int usec)
100 BUG_ON(usec < 0); 100 BUG_ON(usec < 0);
101 101
102 if (lirc_rx51->match == 0) 102 if (lirc_rx51->match == 0)
103 counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer); 103 counter = lirc_rx51->dmtimer->read_counter(lirc_rx51->pulse_timer);
104 else 104 else
105 counter = lirc_rx51->match; 105 counter = lirc_rx51->match;
106 106
107 counter += (u32)(lirc_rx51->fclk_khz * usec / (1000)); 107 counter += (u32)(lirc_rx51->fclk_khz * usec / (1000));
108 omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter); 108 lirc_rx51->dmtimer->set_match(lirc_rx51->pulse_timer, 1, counter);
109 omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 109 lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer,
110 OMAP_TIMER_INT_MATCH); 110 PWM_OMAP_DMTIMER_INT_MATCH);
111 if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer), 111 if (tics_after(lirc_rx51->dmtimer->read_counter(lirc_rx51->pulse_timer),
112 counter)) { 112 counter)) {
113 return 1; 113 return 1;
114 } 114 }
@@ -120,18 +120,18 @@ static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
120 unsigned int retval; 120 unsigned int retval;
121 struct lirc_rx51 *lirc_rx51 = ptr; 121 struct lirc_rx51 *lirc_rx51 = ptr;
122 122
123 retval = omap_dm_timer_read_status(lirc_rx51->pulse_timer); 123 retval = lirc_rx51->dmtimer->read_status(lirc_rx51->pulse_timer);
124 if (!retval) 124 if (!retval)
125 return IRQ_NONE; 125 return IRQ_NONE;
126 126
127 if (retval & ~OMAP_TIMER_INT_MATCH) 127 if (retval & ~PWM_OMAP_DMTIMER_INT_MATCH)
128 dev_err_ratelimited(lirc_rx51->dev, 128 dev_err_ratelimited(lirc_rx51->dev,
129 ": Unexpected interrupt source: %x\n", retval); 129 ": Unexpected interrupt source: %x\n", retval);
130 130
131 omap_dm_timer_write_status(lirc_rx51->pulse_timer, 131 lirc_rx51->dmtimer->write_status(lirc_rx51->pulse_timer,
132 OMAP_TIMER_INT_MATCH | 132 PWM_OMAP_DMTIMER_INT_MATCH |
133 OMAP_TIMER_INT_OVERFLOW | 133 PWM_OMAP_DMTIMER_INT_OVERFLOW |
134 OMAP_TIMER_INT_CAPTURE); 134 PWM_OMAP_DMTIMER_INT_CAPTURE);
135 if (lirc_rx51->wbuf_index < 0) { 135 if (lirc_rx51->wbuf_index < 0) {
136 dev_err_ratelimited(lirc_rx51->dev, 136 dev_err_ratelimited(lirc_rx51->dev,
137 ": BUG wbuf_index has value of %i\n", 137 ": BUG wbuf_index has value of %i\n",
@@ -165,9 +165,9 @@ end:
165 /* Stop TX here */ 165 /* Stop TX here */
166 lirc_rx51_off(lirc_rx51); 166 lirc_rx51_off(lirc_rx51);
167 lirc_rx51->wbuf_index = -1; 167 lirc_rx51->wbuf_index = -1;
168 omap_dm_timer_stop(lirc_rx51->pwm_timer); 168 lirc_rx51->dmtimer->stop(lirc_rx51->pwm_timer);
169 omap_dm_timer_stop(lirc_rx51->pulse_timer); 169 lirc_rx51->dmtimer->stop(lirc_rx51->pulse_timer);
170 omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0); 170 lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer, 0);
171 wake_up_interruptible(&lirc_rx51->wqueue); 171 wake_up_interruptible(&lirc_rx51->wqueue);
172 172
173 return IRQ_HANDLED; 173 return IRQ_HANDLED;
@@ -178,28 +178,29 @@ static int lirc_rx51_init_port(struct lirc_rx51 *lirc_rx51)
178 struct clk *clk_fclk; 178 struct clk *clk_fclk;
179 int retval, pwm_timer = lirc_rx51->pwm_timer_num; 179 int retval, pwm_timer = lirc_rx51->pwm_timer_num;
180 180
181 lirc_rx51->pwm_timer = omap_dm_timer_request_specific(pwm_timer); 181 lirc_rx51->pwm_timer = lirc_rx51->dmtimer->request_specific(pwm_timer);
182 if (lirc_rx51->pwm_timer == NULL) { 182 if (lirc_rx51->pwm_timer == NULL) {
183 dev_err(lirc_rx51->dev, ": Error requesting GPT%d timer\n", 183 dev_err(lirc_rx51->dev, ": Error requesting GPT%d timer\n",
184 pwm_timer); 184 pwm_timer);
185 return -EBUSY; 185 return -EBUSY;
186 } 186 }
187 187
188 lirc_rx51->pulse_timer = omap_dm_timer_request(); 188 lirc_rx51->pulse_timer = lirc_rx51->dmtimer->request();
189 if (lirc_rx51->pulse_timer == NULL) { 189 if (lirc_rx51->pulse_timer == NULL) {
190 dev_err(lirc_rx51->dev, ": Error requesting pulse timer\n"); 190 dev_err(lirc_rx51->dev, ": Error requesting pulse timer\n");
191 retval = -EBUSY; 191 retval = -EBUSY;
192 goto err1; 192 goto err1;
193 } 193 }
194 194
195 omap_dm_timer_set_source(lirc_rx51->pwm_timer, OMAP_TIMER_SRC_SYS_CLK); 195 lirc_rx51->dmtimer->set_source(lirc_rx51->pwm_timer,
196 omap_dm_timer_set_source(lirc_rx51->pulse_timer, 196 PWM_OMAP_DMTIMER_SRC_SYS_CLK);
197 OMAP_TIMER_SRC_SYS_CLK); 197 lirc_rx51->dmtimer->set_source(lirc_rx51->pulse_timer,
198 PWM_OMAP_DMTIMER_SRC_SYS_CLK);
198 199
199 omap_dm_timer_enable(lirc_rx51->pwm_timer); 200 lirc_rx51->dmtimer->enable(lirc_rx51->pwm_timer);
200 omap_dm_timer_enable(lirc_rx51->pulse_timer); 201 lirc_rx51->dmtimer->enable(lirc_rx51->pulse_timer);
201 202
202 lirc_rx51->irq_num = omap_dm_timer_get_irq(lirc_rx51->pulse_timer); 203 lirc_rx51->irq_num = lirc_rx51->dmtimer->get_irq(lirc_rx51->pulse_timer);
203 retval = request_irq(lirc_rx51->irq_num, lirc_rx51_interrupt_handler, 204 retval = request_irq(lirc_rx51->irq_num, lirc_rx51_interrupt_handler,
204 IRQF_SHARED, "lirc_pulse_timer", lirc_rx51); 205 IRQF_SHARED, "lirc_pulse_timer", lirc_rx51);
205 if (retval) { 206 if (retval) {
@@ -207,28 +208,28 @@ static int lirc_rx51_init_port(struct lirc_rx51 *lirc_rx51)
207 goto err2; 208 goto err2;
208 } 209 }
209 210
210 clk_fclk = omap_dm_timer_get_fclk(lirc_rx51->pwm_timer); 211 clk_fclk = lirc_rx51->dmtimer->get_fclk(lirc_rx51->pwm_timer);
211 lirc_rx51->fclk_khz = clk_fclk->rate / 1000; 212 lirc_rx51->fclk_khz = clk_get_rate(clk_fclk) / 1000;
212 213
213 return 0; 214 return 0;
214 215
215err2: 216err2:
216 omap_dm_timer_free(lirc_rx51->pulse_timer); 217 lirc_rx51->dmtimer->free(lirc_rx51->pulse_timer);
217err1: 218err1:
218 omap_dm_timer_free(lirc_rx51->pwm_timer); 219 lirc_rx51->dmtimer->free(lirc_rx51->pwm_timer);
219 220
220 return retval; 221 return retval;
221} 222}
222 223
223static int lirc_rx51_free_port(struct lirc_rx51 *lirc_rx51) 224static int lirc_rx51_free_port(struct lirc_rx51 *lirc_rx51)
224{ 225{
225 omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0); 226 lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer, 0);
226 free_irq(lirc_rx51->irq_num, lirc_rx51); 227 free_irq(lirc_rx51->irq_num, lirc_rx51);
227 lirc_rx51_off(lirc_rx51); 228 lirc_rx51_off(lirc_rx51);
228 omap_dm_timer_disable(lirc_rx51->pwm_timer); 229 lirc_rx51->dmtimer->disable(lirc_rx51->pwm_timer);
229 omap_dm_timer_disable(lirc_rx51->pulse_timer); 230 lirc_rx51->dmtimer->disable(lirc_rx51->pulse_timer);
230 omap_dm_timer_free(lirc_rx51->pwm_timer); 231 lirc_rx51->dmtimer->free(lirc_rx51->pwm_timer);
231 omap_dm_timer_free(lirc_rx51->pulse_timer); 232 lirc_rx51->dmtimer->free(lirc_rx51->pulse_timer);
232 lirc_rx51->wbuf_index = -1; 233 lirc_rx51->wbuf_index = -1;
233 234
234 return 0; 235 return 0;
@@ -446,7 +447,13 @@ static int lirc_rx51_probe(struct platform_device *dev)
446{ 447{
447 lirc_rx51_driver.features = LIRC_RX51_DRIVER_FEATURES; 448 lirc_rx51_driver.features = LIRC_RX51_DRIVER_FEATURES;
448 lirc_rx51.pdata = dev->dev.platform_data; 449 lirc_rx51.pdata = dev->dev.platform_data;
450 if (!lirc_rx51.pdata->dmtimer) {
451 dev_err(&dev->dev, "no dmtimer?\n");
452 return -ENODEV;
453 }
454
449 lirc_rx51.pwm_timer_num = lirc_rx51.pdata->pwm_timer; 455 lirc_rx51.pwm_timer_num = lirc_rx51.pdata->pwm_timer;
456 lirc_rx51.dmtimer = lirc_rx51.pdata->dmtimer;
450 lirc_rx51.dev = &dev->dev; 457 lirc_rx51.dev = &dev->dev;
451 lirc_rx51_driver.dev = &dev->dev; 458 lirc_rx51_driver.dev = &dev->dev;
452 lirc_rx51_driver.minor = lirc_register_driver(&lirc_rx51_driver); 459 lirc_rx51_driver.minor = lirc_register_driver(&lirc_rx51_driver);