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authorNicolas Ferre <nicolas.ferre@atmel.com>2014-11-19 04:05:54 -0500
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-11-19 05:39:11 -0500
commit4403ac46edcdb51e92d36ad9f00ea3bbb766342e (patch)
tree7dbc5662516295c5b99ba3e60623066b4c1bbeff
parent469b9c394183a3c17747fec2d23bd10a87e0175b (diff)
ARM: at91: remove at91sam9263 legacy board support
Remove legacy support for at91sam9263 boards. This include board files removal plus all legacy code for non DT boards support. Use the Device Tree for running this board with newer kernels. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat
-rw-r--r--arch/arm/configs/at91sam9263_defconfig151
-rw-r--r--arch/arm/mach-at91/Kconfig.non_dt21
-rw-r--r--arch/arm/mach-at91/Makefile4
-rw-r--r--arch/arm/mach-at91/at91sam9263.c399
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c1538
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c493
6 files changed, 0 insertions, 2606 deletions
diff --git a/arch/arm/configs/at91sam9263_defconfig b/arch/arm/configs/at91sam9263_defconfig
deleted file mode 100644
index 8b671c977b81..000000000000
--- a/arch/arm/configs/at91sam9263_defconfig
+++ /dev/null
@@ -1,151 +0,0 @@
1# CONFIG_LOCALVERSION_AUTO is not set
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_IKCONFIG=y
5CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=14
7CONFIG_NAMESPACES=y
8CONFIG_EMBEDDED=y
9CONFIG_SLAB=y
10CONFIG_MODULES=y
11CONFIG_MODULE_UNLOAD=y
12# CONFIG_BLK_DEV_BSG is not set
13# CONFIG_IOSCHED_DEADLINE is not set
14# CONFIG_IOSCHED_CFQ is not set
15CONFIG_ARCH_AT91=y
16CONFIG_ARCH_AT91SAM9263=y
17CONFIG_MACH_AT91SAM9263EK=y
18CONFIG_MTD_AT91_DATAFLASH_CARD=y
19# CONFIG_ARM_THUMB is not set
20CONFIG_AEABI=y
21CONFIG_ZBOOT_ROM_TEXT=0x0
22CONFIG_ZBOOT_ROM_BSS=0x0
23CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
24CONFIG_AUTO_ZRELADDR=y
25CONFIG_NET=y
26CONFIG_PACKET=y
27CONFIG_UNIX=y
28CONFIG_NET_KEY=y
29CONFIG_INET=y
30CONFIG_IP_MULTICAST=y
31CONFIG_IP_ADVANCED_ROUTER=y
32CONFIG_IP_ROUTE_VERBOSE=y
33CONFIG_IP_PNP=y
34CONFIG_IP_PNP_DHCP=y
35CONFIG_IP_PNP_BOOTP=y
36CONFIG_IP_PNP_RARP=y
37CONFIG_NET_IPIP=y
38CONFIG_IP_MROUTE=y
39CONFIG_IP_PIMSM_V1=y
40CONFIG_IP_PIMSM_V2=y
41# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
42# CONFIG_INET_XFRM_MODE_TUNNEL is not set
43# CONFIG_INET_XFRM_MODE_BEET is not set
44# CONFIG_INET_LRO is not set
45# CONFIG_INET_DIAG is not set
46CONFIG_IPV6=y
47# CONFIG_WIRELESS is not set
48CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
49CONFIG_DEVTMPFS=y
50CONFIG_DEVTMPFS_MOUNT=y
51CONFIG_MTD=y
52CONFIG_MTD_CMDLINE_PARTS=y
53CONFIG_MTD_BLOCK=y
54CONFIG_NFTL=y
55CONFIG_NFTL_RW=y
56CONFIG_MTD_DATAFLASH=y
57CONFIG_MTD_BLOCK2MTD=y
58CONFIG_MTD_NAND=y
59CONFIG_MTD_NAND_ATMEL=y
60CONFIG_MTD_UBI=y
61CONFIG_MTD_UBI_GLUEBI=y
62CONFIG_BLK_DEV_LOOP=y
63CONFIG_BLK_DEV_RAM=y
64CONFIG_BLK_DEV_RAM_SIZE=8192
65CONFIG_ATMEL_TCLIB=y
66CONFIG_SCSI=y
67CONFIG_BLK_DEV_SD=y
68CONFIG_NETDEVICES=y
69CONFIG_MACB=y
70CONFIG_SMSC_PHY=y
71# CONFIG_WLAN is not set
72CONFIG_INPUT_POLLDEV=m
73# CONFIG_INPUT_MOUSEDEV is not set
74CONFIG_INPUT_EVDEV=y
75# CONFIG_KEYBOARD_ATKBD is not set
76CONFIG_KEYBOARD_GPIO=y
77# CONFIG_INPUT_MOUSE is not set
78CONFIG_INPUT_TOUCHSCREEN=y
79CONFIG_TOUCHSCREEN_ADS7846=y
80# CONFIG_LEGACY_PTYS is not set
81CONFIG_SERIAL_ATMEL=y
82CONFIG_SERIAL_ATMEL_CONSOLE=y
83CONFIG_HW_RANDOM=y
84CONFIG_I2C=y
85CONFIG_I2C_CHARDEV=y
86CONFIG_I2C_GPIO=y
87CONFIG_SPI=y
88CONFIG_SPI_ATMEL=y
89CONFIG_GPIO_SYSFS=y
90CONFIG_POWER_SUPPLY=y
91CONFIG_POWER_RESET=y
92# CONFIG_HWMON is not set
93CONFIG_WATCHDOG=y
94CONFIG_WATCHDOG_NOWAYOUT=y
95CONFIG_AT91SAM9X_WATCHDOG=y
96CONFIG_FB=y
97CONFIG_FB_ATMEL=y
98CONFIG_BACKLIGHT_LCD_SUPPORT=y
99CONFIG_LCD_CLASS_DEVICE=y
100CONFIG_BACKLIGHT_CLASS_DEVICE=y
101CONFIG_FRAMEBUFFER_CONSOLE=y
102CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
103CONFIG_LOGO=y
104CONFIG_SOUND=y
105CONFIG_SND=y
106CONFIG_SND_SEQUENCER=y
107CONFIG_SND_MIXER_OSS=y
108CONFIG_SND_PCM_OSS=y
109# CONFIG_SND_SUPPORT_OLD_API is not set
110# CONFIG_SND_VERBOSE_PROCFS is not set
111# CONFIG_SND_DRIVERS is not set
112# CONFIG_SND_ARM is not set
113CONFIG_SND_ATMEL_AC97C=y
114# CONFIG_SND_SPI is not set
115CONFIG_SND_USB_AUDIO=m
116CONFIG_USB=y
117CONFIG_USB_MON=y
118CONFIG_USB_OHCI_HCD=y
119CONFIG_USB_STORAGE=y
120CONFIG_USB_GADGET=y
121CONFIG_USB_ATMEL_USBA=y
122CONFIG_USB_G_SERIAL=y
123CONFIG_MMC=y
124CONFIG_SDIO_UART=m
125CONFIG_MMC_ATMELMCI=m
126CONFIG_NEW_LEDS=y
127CONFIG_LEDS_CLASS=y
128CONFIG_LEDS_GPIO=y
129CONFIG_LEDS_PWM=y
130CONFIG_LEDS_TRIGGERS=y
131CONFIG_LEDS_TRIGGER_HEARTBEAT=y
132CONFIG_RTC_CLASS=y
133CONFIG_RTC_DRV_AT91SAM9=y
134CONFIG_PWM=y
135CONFIG_PWM_ATMEL=y
136CONFIG_EXT4_FS=y
137CONFIG_VFAT_FS=y
138CONFIG_TMPFS=y
139CONFIG_UBIFS_FS=y
140CONFIG_UBIFS_FS_ADVANCED_COMPR=y
141CONFIG_NFS_FS=y
142CONFIG_NFS_V3_ACL=y
143CONFIG_NFS_V4=y
144CONFIG_ROOT_NFS=y
145CONFIG_NLS_CODEPAGE_437=y
146CONFIG_NLS_CODEPAGE_850=y
147CONFIG_NLS_ISO8859_1=y
148CONFIG_NLS_UTF8=y
149CONFIG_DEBUG_USER=y
150CONFIG_XZ_DEC=y
151CONFIG_FONTS=y
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index 22963a829e5c..a9458234ab23 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -27,12 +27,6 @@ config ARCH_AT91SAM9261
27 select AT91_USE_OLD_CLK 27 select AT91_USE_OLD_CLK
28 select OLD_IRQ_AT91 28 select OLD_IRQ_AT91
29 29
30config ARCH_AT91SAM9263
31 bool "AT91SAM9263"
32 select SOC_AT91SAM9263
33 select AT91_USE_OLD_CLK
34 select OLD_IRQ_AT91
35
36endchoice 30endchoice
37 31
38config ARCH_AT91SAM9G20 32config ARCH_AT91SAM9G20
@@ -260,21 +254,6 @@ endif
260 254
261# ---------------------------------------------------------- 255# ----------------------------------------------------------
262 256
263if ARCH_AT91SAM9263
264
265comment "AT91SAM9263 Board Type"
266
267config MACH_AT91SAM9263EK
268 bool "Atmel AT91SAM9263-EK Evaluation Kit"
269 select HAVE_AT91_DATAFLASH_CARD
270 help
271 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
272 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
273
274endif
275
276# ----------------------------------------------------------
277
278comment "AT91 Board Options" 257comment "AT91 Board Options"
279 258
280config MTD_AT91_DATAFLASH_CARD 259config MTD_AT91_DATAFLASH_CARD
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index ae8aa1a898e8..e0361357e018 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -23,7 +23,6 @@ obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
23obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o 23obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
24obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o 24obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
25obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o 25obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
26obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
27 26
28# AT91RM9200 board-specific support 27# AT91RM9200 board-specific support
29obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 28obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
@@ -52,9 +51,6 @@ obj-$(CONFIG_MACH_FLEXIBITY) += board-flexibity.o
52obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o 51obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
53obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o 52obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o
54 53
55# AT91SAM9263 board-specific support
56obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
57
58# AT91SAM9G20 board-specific support 54# AT91SAM9G20 board-specific support
59obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o 55obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
60obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o 56obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index fbff228cc63e..e7ad14864083 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -10,304 +10,11 @@
10 * 10 *
11 */ 11 */
12 12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/clk/at91_pmc.h>
16
17#include <asm/proc-fns.h>
18#include <asm/irq.h>
19#include <asm/mach/arch.h>
20#include <asm/mach/map.h>
21#include <asm/system_misc.h> 13#include <asm/system_misc.h>
22#include <mach/at91sam9263.h>
23#include <mach/hardware.h> 14#include <mach/hardware.h>
24 15
25#include "at91_aic.h"
26#include "soc.h" 16#include "soc.h"
27#include "generic.h" 17#include "generic.h"
28#include "sam9_smc.h"
29#include "pm.h"
30
31#if defined(CONFIG_OLD_CLK_AT91)
32#include "clock.h"
33/* --------------------------------------------------------------------
34 * Clocks
35 * -------------------------------------------------------------------- */
36
37/*
38 * The peripheral clocks.
39 */
40static struct clk pioA_clk = {
41 .name = "pioA_clk",
42 .pmc_mask = 1 << AT91SAM9263_ID_PIOA,
43 .type = CLK_TYPE_PERIPHERAL,
44};
45static struct clk pioB_clk = {
46 .name = "pioB_clk",
47 .pmc_mask = 1 << AT91SAM9263_ID_PIOB,
48 .type = CLK_TYPE_PERIPHERAL,
49};
50static struct clk pioCDE_clk = {
51 .name = "pioCDE_clk",
52 .pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
53 .type = CLK_TYPE_PERIPHERAL,
54};
55static struct clk usart0_clk = {
56 .name = "usart0_clk",
57 .pmc_mask = 1 << AT91SAM9263_ID_US0,
58 .type = CLK_TYPE_PERIPHERAL,
59};
60static struct clk usart1_clk = {
61 .name = "usart1_clk",
62 .pmc_mask = 1 << AT91SAM9263_ID_US1,
63 .type = CLK_TYPE_PERIPHERAL,
64};
65static struct clk usart2_clk = {
66 .name = "usart2_clk",
67 .pmc_mask = 1 << AT91SAM9263_ID_US2,
68 .type = CLK_TYPE_PERIPHERAL,
69};
70static struct clk mmc0_clk = {
71 .name = "mci0_clk",
72 .pmc_mask = 1 << AT91SAM9263_ID_MCI0,
73 .type = CLK_TYPE_PERIPHERAL,
74};
75static struct clk mmc1_clk = {
76 .name = "mci1_clk",
77 .pmc_mask = 1 << AT91SAM9263_ID_MCI1,
78 .type = CLK_TYPE_PERIPHERAL,
79};
80static struct clk can_clk = {
81 .name = "can_clk",
82 .pmc_mask = 1 << AT91SAM9263_ID_CAN,
83 .type = CLK_TYPE_PERIPHERAL,
84};
85static struct clk twi_clk = {
86 .name = "twi_clk",
87 .pmc_mask = 1 << AT91SAM9263_ID_TWI,
88 .type = CLK_TYPE_PERIPHERAL,
89};
90static struct clk spi0_clk = {
91 .name = "spi0_clk",
92 .pmc_mask = 1 << AT91SAM9263_ID_SPI0,
93 .type = CLK_TYPE_PERIPHERAL,
94};
95static struct clk spi1_clk = {
96 .name = "spi1_clk",
97 .pmc_mask = 1 << AT91SAM9263_ID_SPI1,
98 .type = CLK_TYPE_PERIPHERAL,
99};
100static struct clk ssc0_clk = {
101 .name = "ssc0_clk",
102 .pmc_mask = 1 << AT91SAM9263_ID_SSC0,
103 .type = CLK_TYPE_PERIPHERAL,
104};
105static struct clk ssc1_clk = {
106 .name = "ssc1_clk",
107 .pmc_mask = 1 << AT91SAM9263_ID_SSC1,
108 .type = CLK_TYPE_PERIPHERAL,
109};
110static struct clk ac97_clk = {
111 .name = "ac97_clk",
112 .pmc_mask = 1 << AT91SAM9263_ID_AC97C,
113 .type = CLK_TYPE_PERIPHERAL,
114};
115static struct clk tcb_clk = {
116 .name = "tcb_clk",
117 .pmc_mask = 1 << AT91SAM9263_ID_TCB,
118 .type = CLK_TYPE_PERIPHERAL,
119};
120static struct clk pwm_clk = {
121 .name = "pwm_clk",
122 .pmc_mask = 1 << AT91SAM9263_ID_PWMC,
123 .type = CLK_TYPE_PERIPHERAL,
124};
125static struct clk macb_clk = {
126 .name = "pclk",
127 .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
128 .type = CLK_TYPE_PERIPHERAL,
129};
130static struct clk dma_clk = {
131 .name = "dma_clk",
132 .pmc_mask = 1 << AT91SAM9263_ID_DMA,
133 .type = CLK_TYPE_PERIPHERAL,
134};
135static struct clk twodge_clk = {
136 .name = "2dge_clk",
137 .pmc_mask = 1 << AT91SAM9263_ID_2DGE,
138 .type = CLK_TYPE_PERIPHERAL,
139};
140static struct clk udc_clk = {
141 .name = "udc_clk",
142 .pmc_mask = 1 << AT91SAM9263_ID_UDP,
143 .type = CLK_TYPE_PERIPHERAL,
144};
145static struct clk isi_clk = {
146 .name = "isi_clk",
147 .pmc_mask = 1 << AT91SAM9263_ID_ISI,
148 .type = CLK_TYPE_PERIPHERAL,
149};
150static struct clk lcdc_clk = {
151 .name = "lcdc_clk",
152 .pmc_mask = 1 << AT91SAM9263_ID_LCDC,
153 .type = CLK_TYPE_PERIPHERAL,
154};
155static struct clk ohci_clk = {
156 .name = "ohci_clk",
157 .pmc_mask = 1 << AT91SAM9263_ID_UHP,
158 .type = CLK_TYPE_PERIPHERAL,
159};
160
161static struct clk *periph_clocks[] __initdata = {
162 &pioA_clk,
163 &pioB_clk,
164 &pioCDE_clk,
165 &usart0_clk,
166 &usart1_clk,
167 &usart2_clk,
168 &mmc0_clk,
169 &mmc1_clk,
170 &can_clk,
171 &twi_clk,
172 &spi0_clk,
173 &spi1_clk,
174 &ssc0_clk,
175 &ssc1_clk,
176 &ac97_clk,
177 &tcb_clk,
178 &pwm_clk,
179 &macb_clk,
180 &twodge_clk,
181 &udc_clk,
182 &isi_clk,
183 &lcdc_clk,
184 &dma_clk,
185 &ohci_clk,
186 // irq0 .. irq1
187};
188
189static struct clk_lookup periph_clocks_lookups[] = {
190 /* One additional fake clock for macb_hclk */
191 CLKDEV_CON_ID("hclk", &macb_clk),
192 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
193 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
194 CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),
195 CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),
196 CLKDEV_CON_DEV_ID("hclk", "at91sam9263-lcdfb.0", &lcdc_clk),
197 CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
198 CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
199 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
200 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
201 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
202 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
203 CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),
204 /* fake hclk clock */
205 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
206 CLKDEV_CON_ID("pioA", &pioA_clk),
207 CLKDEV_CON_ID("pioB", &pioB_clk),
208 CLKDEV_CON_ID("pioC", &pioCDE_clk),
209 CLKDEV_CON_ID("pioD", &pioCDE_clk),
210 CLKDEV_CON_ID("pioE", &pioCDE_clk),
211 /* more usart lookup table for DT entries */
212 CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
213 CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
214 CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
215 CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
216 /* more tc lookup table for DT entries */
217 CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),
218 CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
219 CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
220 CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
221 CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
222 CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
223 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
224 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
225 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
226 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
227 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
228 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
229 CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
230};
231
232static struct clk_lookup usart_clocks_lookups[] = {
233 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
234 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
235 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
236 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
237};
238
239/*
240 * The four programmable clocks.
241 * You must configure pin multiplexing to bring these signals out.
242 */
243static struct clk pck0 = {
244 .name = "pck0",
245 .pmc_mask = AT91_PMC_PCK0,
246 .type = CLK_TYPE_PROGRAMMABLE,
247 .id = 0,
248};
249static struct clk pck1 = {
250 .name = "pck1",
251 .pmc_mask = AT91_PMC_PCK1,
252 .type = CLK_TYPE_PROGRAMMABLE,
253 .id = 1,
254};
255static struct clk pck2 = {
256 .name = "pck2",
257 .pmc_mask = AT91_PMC_PCK2,
258 .type = CLK_TYPE_PROGRAMMABLE,
259 .id = 2,
260};
261static struct clk pck3 = {
262 .name = "pck3",
263 .pmc_mask = AT91_PMC_PCK3,
264 .type = CLK_TYPE_PROGRAMMABLE,
265 .id = 3,
266};
267
268static void __init at91sam9263_register_clocks(void)
269{
270 int i;
271
272 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
273 clk_register(periph_clocks[i]);
274
275 clkdev_add_table(periph_clocks_lookups,
276 ARRAY_SIZE(periph_clocks_lookups));
277 clkdev_add_table(usart_clocks_lookups,
278 ARRAY_SIZE(usart_clocks_lookups));
279
280 clk_register(&pck0);
281 clk_register(&pck1);
282 clk_register(&pck2);
283 clk_register(&pck3);
284}
285#else
286#define at91sam9263_register_clocks NULL
287#endif
288
289/* --------------------------------------------------------------------
290 * GPIO
291 * -------------------------------------------------------------------- */
292
293static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
294 {
295 .id = AT91SAM9263_ID_PIOA,
296 .regbase = AT91SAM9263_BASE_PIOA,
297 }, {
298 .id = AT91SAM9263_ID_PIOB,
299 .regbase = AT91SAM9263_BASE_PIOB,
300 }, {
301 .id = AT91SAM9263_ID_PIOCDE,
302 .regbase = AT91SAM9263_BASE_PIOC,
303 }, {
304 .id = AT91SAM9263_ID_PIOCDE,
305 .regbase = AT91SAM9263_BASE_PIOD,
306 }, {
307 .id = AT91SAM9263_ID_PIOCDE,
308 .regbase = AT91SAM9263_BASE_PIOE,
309 }
310};
311 18
312/* -------------------------------------------------------------------- 19/* --------------------------------------------------------------------
313 * AT91SAM9263 processor initialization 20 * AT91SAM9263 processor initialization
@@ -319,121 +26,15 @@ static void __init at91sam9263_map_io(void)
319 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); 26 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
320} 27}
321 28
322static void __init at91sam9263_ioremap_registers(void)
323{
324 at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
325 at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
326 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
327 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
328 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
329 at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
330 at91_pm_set_standby(at91sam9_sdram_standby);
331}
332
333static void __init at91sam9263_initialize(void) 29static void __init at91sam9263_initialize(void)
334{ 30{
335 arm_pm_idle = at91sam9_idle; 31 arm_pm_idle = at91sam9_idle;
336 32
337 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); 33 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0);
338 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); 34 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1);
339
340 /* Register GPIO subsystem */
341 at91_gpio_init(at91sam9263_gpio, 5);
342}
343
344static struct resource rstc_resources[] = {
345 [0] = {
346 .start = AT91SAM9263_BASE_RSTC,
347 .end = AT91SAM9263_BASE_RSTC + SZ_16 - 1,
348 .flags = IORESOURCE_MEM,
349 },
350 [1] = {
351 .start = AT91SAM9263_BASE_SDRAMC0,
352 .end = AT91SAM9263_BASE_SDRAMC0 + SZ_512 - 1,
353 .flags = IORESOURCE_MEM,
354 },
355};
356
357static struct platform_device rstc_device = {
358 .name = "at91-sam9260-reset",
359 .resource = rstc_resources,
360 .num_resources = ARRAY_SIZE(rstc_resources),
361};
362
363static struct resource shdwc_resources[] = {
364 [0] = {
365 .start = AT91SAM9263_BASE_SHDWC,
366 .end = AT91SAM9263_BASE_SHDWC + SZ_16 - 1,
367 .flags = IORESOURCE_MEM,
368 },
369};
370
371static struct platform_device shdwc_device = {
372 .name = "at91-poweroff",
373 .resource = shdwc_resources,
374 .num_resources = ARRAY_SIZE(shdwc_resources),
375};
376
377static void __init at91sam9263_register_devices(void)
378{
379 platform_device_register(&rstc_device);
380 platform_device_register(&shdwc_device);
381}
382
383/* --------------------------------------------------------------------
384 * Interrupt initialization
385 * -------------------------------------------------------------------- */
386
387/*
388 * The default interrupt priority levels (0 = lowest, 7 = highest).
389 */
390static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
391 7, /* Advanced Interrupt Controller (FIQ) */
392 7, /* System Peripherals */
393 1, /* Parallel IO Controller A */
394 1, /* Parallel IO Controller B */
395 1, /* Parallel IO Controller C, D and E */
396 0,
397 0,
398 5, /* USART 0 */
399 5, /* USART 1 */
400 5, /* USART 2 */
401 0, /* Multimedia Card Interface 0 */
402 0, /* Multimedia Card Interface 1 */
403 3, /* CAN */
404 6, /* Two-Wire Interface */
405 5, /* Serial Peripheral Interface 0 */
406 5, /* Serial Peripheral Interface 1 */
407 4, /* Serial Synchronous Controller 0 */
408 4, /* Serial Synchronous Controller 1 */
409 5, /* AC97 Controller */
410 0, /* Timer Counter 0, 1 and 2 */
411 0, /* Pulse Width Modulation Controller */
412 3, /* Ethernet */
413 0,
414 0, /* 2D Graphic Engine */
415 2, /* USB Device Port */
416 0, /* Image Sensor Interface */
417 3, /* LDC Controller */
418 0, /* DMA Controller */
419 0,
420 2, /* USB Host port */
421 0, /* Advanced Interrupt Controller (IRQ0) */
422 0, /* Advanced Interrupt Controller (IRQ1) */
423};
424
425static void __init at91sam9263_init_time(void)
426{
427 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
428} 35}
429 36
430AT91_SOC_START(at91sam9263) 37AT91_SOC_START(at91sam9263)
431 .map_io = at91sam9263_map_io, 38 .map_io = at91sam9263_map_io,
432 .default_irq_priority = at91sam9263_default_irq_priority,
433 .extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
434 .ioremap_registers = at91sam9263_ioremap_registers,
435 .register_clocks = at91sam9263_register_clocks,
436 .register_devices = at91sam9263_register_devices,
437 .init = at91sam9263_initialize, 39 .init = at91sam9263_initialize,
438 .init_time = at91sam9263_init_time,
439AT91_SOC_END 40AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
deleted file mode 100644
index cef0e2f57068..000000000000
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ /dev/null
@@ -1,1538 +0,0 @@
1/*
2 * arch/arm/mach-at91/at91sam9263_devices.c
3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17#include <linux/platform_device.h>
18#include <linux/i2c-gpio.h>
19
20#include <linux/fb.h>
21#include <video/atmel_lcdc.h>
22
23#include <mach/at91sam9263.h>
24#include <mach/at91sam9263_matrix.h>
25#include <mach/at91_matrix.h>
26#include <mach/at91sam9_smc.h>
27#include <mach/hardware.h>
28
29#include "board.h"
30#include "generic.h"
31#include "gpio.h"
32
33
34/* --------------------------------------------------------------------
35 * USB Host
36 * -------------------------------------------------------------------- */
37
38#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
39static u64 ohci_dmamask = DMA_BIT_MASK(32);
40static struct at91_usbh_data usbh_data;
41
42static struct resource usbh_resources[] = {
43 [0] = {
44 .start = AT91SAM9263_UHP_BASE,
45 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
50 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
55static struct platform_device at91_usbh_device = {
56 .name = "at91_ohci",
57 .id = -1,
58 .dev = {
59 .dma_mask = &ohci_dmamask,
60 .coherent_dma_mask = DMA_BIT_MASK(32),
61 .platform_data = &usbh_data,
62 },
63 .resource = usbh_resources,
64 .num_resources = ARRAY_SIZE(usbh_resources),
65};
66
67void __init at91_add_device_usbh(struct at91_usbh_data *data)
68{
69 int i;
70
71 if (!data)
72 return;
73
74 /* Enable VBus control for UHP ports */
75 for (i = 0; i < data->ports; i++) {
76 if (gpio_is_valid(data->vbus_pin[i]))
77 at91_set_gpio_output(data->vbus_pin[i],
78 data->vbus_pin_active_low[i]);
79 }
80
81 /* Enable overcurrent notification */
82 for (i = 0; i < data->ports; i++) {
83 if (gpio_is_valid(data->overcurrent_pin[i]))
84 at91_set_gpio_input(data->overcurrent_pin[i], 1);
85 }
86
87 usbh_data = *data;
88 platform_device_register(&at91_usbh_device);
89}
90#else
91void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
92#endif
93
94
95/* --------------------------------------------------------------------
96 * USB Device (Gadget)
97 * -------------------------------------------------------------------- */
98
99#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
100static struct at91_udc_data udc_data;
101
102static struct resource udc_resources[] = {
103 [0] = {
104 .start = AT91SAM9263_BASE_UDP,
105 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
106 .flags = IORESOURCE_MEM,
107 },
108 [1] = {
109 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
110 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
111 .flags = IORESOURCE_IRQ,
112 },
113};
114
115static struct platform_device at91_udc_device = {
116 .name = "at91_udc",
117 .id = -1,
118 .dev = {
119 .platform_data = &udc_data,
120 },
121 .resource = udc_resources,
122 .num_resources = ARRAY_SIZE(udc_resources),
123};
124
125void __init at91_add_device_udc(struct at91_udc_data *data)
126{
127 if (!data)
128 return;
129
130 if (gpio_is_valid(data->vbus_pin)) {
131 at91_set_gpio_input(data->vbus_pin, 0);
132 at91_set_deglitch(data->vbus_pin, 1);
133 }
134
135 /* Pullup pin is handled internally by USB device peripheral */
136
137 udc_data = *data;
138 platform_device_register(&at91_udc_device);
139}
140#else
141void __init at91_add_device_udc(struct at91_udc_data *data) {}
142#endif
143
144
145/* --------------------------------------------------------------------
146 * Ethernet
147 * -------------------------------------------------------------------- */
148
149#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
150static u64 eth_dmamask = DMA_BIT_MASK(32);
151static struct macb_platform_data eth_data;
152
153static struct resource eth_resources[] = {
154 [0] = {
155 .start = AT91SAM9263_BASE_EMAC,
156 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
157 .flags = IORESOURCE_MEM,
158 },
159 [1] = {
160 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
161 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
162 .flags = IORESOURCE_IRQ,
163 },
164};
165
166static struct platform_device at91sam9263_eth_device = {
167 .name = "macb",
168 .id = -1,
169 .dev = {
170 .dma_mask = &eth_dmamask,
171 .coherent_dma_mask = DMA_BIT_MASK(32),
172 .platform_data = &eth_data,
173 },
174 .resource = eth_resources,
175 .num_resources = ARRAY_SIZE(eth_resources),
176};
177
178void __init at91_add_device_eth(struct macb_platform_data *data)
179{
180 if (!data)
181 return;
182
183 if (gpio_is_valid(data->phy_irq_pin)) {
184 at91_set_gpio_input(data->phy_irq_pin, 0);
185 at91_set_deglitch(data->phy_irq_pin, 1);
186 }
187
188 /* Pins used for MII and RMII */
189 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
190 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
191 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
192 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
193 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
194 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
195 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
196 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
197 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
198 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
199
200 if (!data->is_rmii) {
201 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
202 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
203 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
204 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
205 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
206 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
207 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
208 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
209 }
210
211 eth_data = *data;
212 platform_device_register(&at91sam9263_eth_device);
213}
214#else
215void __init at91_add_device_eth(struct macb_platform_data *data) {}
216#endif
217
218
219/* --------------------------------------------------------------------
220 * MMC / SD
221 * -------------------------------------------------------------------- */
222
223#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
224static u64 mmc_dmamask = DMA_BIT_MASK(32);
225static struct mci_platform_data mmc0_data, mmc1_data;
226
227static struct resource mmc0_resources[] = {
228 [0] = {
229 .start = AT91SAM9263_BASE_MCI0,
230 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
235 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
236 .flags = IORESOURCE_IRQ,
237 },
238};
239
240static struct platform_device at91sam9263_mmc0_device = {
241 .name = "atmel_mci",
242 .id = 0,
243 .dev = {
244 .dma_mask = &mmc_dmamask,
245 .coherent_dma_mask = DMA_BIT_MASK(32),
246 .platform_data = &mmc0_data,
247 },
248 .resource = mmc0_resources,
249 .num_resources = ARRAY_SIZE(mmc0_resources),
250};
251
252static struct resource mmc1_resources[] = {
253 [0] = {
254 .start = AT91SAM9263_BASE_MCI1,
255 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
256 .flags = IORESOURCE_MEM,
257 },
258 [1] = {
259 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
260 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
261 .flags = IORESOURCE_IRQ,
262 },
263};
264
265static struct platform_device at91sam9263_mmc1_device = {
266 .name = "atmel_mci",
267 .id = 1,
268 .dev = {
269 .dma_mask = &mmc_dmamask,
270 .coherent_dma_mask = DMA_BIT_MASK(32),
271 .platform_data = &mmc1_data,
272 },
273 .resource = mmc1_resources,
274 .num_resources = ARRAY_SIZE(mmc1_resources),
275};
276
277void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
278{
279 unsigned int i;
280 unsigned int slot_count = 0;
281
282 if (!data)
283 return;
284
285 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
286
287 if (!data->slot[i].bus_width)
288 continue;
289
290 /* input/irq */
291 if (gpio_is_valid(data->slot[i].detect_pin)) {
292 at91_set_gpio_input(data->slot[i].detect_pin,
293 1);
294 at91_set_deglitch(data->slot[i].detect_pin,
295 1);
296 }
297 if (gpio_is_valid(data->slot[i].wp_pin))
298 at91_set_gpio_input(data->slot[i].wp_pin, 1);
299
300 if (mmc_id == 0) { /* MCI0 */
301 switch (i) {
302 case 0: /* slot A */
303 /* CMD */
304 at91_set_A_periph(AT91_PIN_PA1, 1);
305 /* DAT0, maybe DAT1..DAT3 */
306 at91_set_A_periph(AT91_PIN_PA0, 1);
307 if (data->slot[i].bus_width == 4) {
308 at91_set_A_periph(AT91_PIN_PA3, 1);
309 at91_set_A_periph(AT91_PIN_PA4, 1);
310 at91_set_A_periph(AT91_PIN_PA5, 1);
311 }
312 slot_count++;
313 break;
314 case 1: /* slot B */
315 /* CMD */
316 at91_set_A_periph(AT91_PIN_PA16, 1);
317 /* DAT0, maybe DAT1..DAT3 */
318 at91_set_A_periph(AT91_PIN_PA17, 1);
319 if (data->slot[i].bus_width == 4) {
320 at91_set_A_periph(AT91_PIN_PA18, 1);
321 at91_set_A_periph(AT91_PIN_PA19, 1);
322 at91_set_A_periph(AT91_PIN_PA20, 1);
323 }
324 slot_count++;
325 break;
326 default:
327 printk(KERN_ERR
328 "AT91: SD/MMC slot %d not available\n", i);
329 break;
330 }
331 if (slot_count) {
332 /* CLK */
333 at91_set_A_periph(AT91_PIN_PA12, 0);
334
335 mmc0_data = *data;
336 platform_device_register(&at91sam9263_mmc0_device);
337 }
338 } else if (mmc_id == 1) { /* MCI1 */
339 switch (i) {
340 case 0: /* slot A */
341 /* CMD */
342 at91_set_A_periph(AT91_PIN_PA7, 1);
343 /* DAT0, maybe DAT1..DAT3 */
344 at91_set_A_periph(AT91_PIN_PA8, 1);
345 if (data->slot[i].bus_width == 4) {
346 at91_set_A_periph(AT91_PIN_PA9, 1);
347 at91_set_A_periph(AT91_PIN_PA10, 1);
348 at91_set_A_periph(AT91_PIN_PA11, 1);
349 }
350 slot_count++;
351 break;
352 case 1: /* slot B */
353 /* CMD */
354 at91_set_A_periph(AT91_PIN_PA21, 1);
355 /* DAT0, maybe DAT1..DAT3 */
356 at91_set_A_periph(AT91_PIN_PA22, 1);
357 if (data->slot[i].bus_width == 4) {
358 at91_set_A_periph(AT91_PIN_PA23, 1);
359 at91_set_A_periph(AT91_PIN_PA24, 1);
360 at91_set_A_periph(AT91_PIN_PA25, 1);
361 }
362 slot_count++;
363 break;
364 default:
365 printk(KERN_ERR
366 "AT91: SD/MMC slot %d not available\n", i);
367 break;
368 }
369 if (slot_count) {
370 /* CLK */
371 at91_set_A_periph(AT91_PIN_PA6, 0);
372
373 mmc1_data = *data;
374 platform_device_register(&at91sam9263_mmc1_device);
375 }
376 }
377 }
378}
379#else
380void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
381#endif
382
383/* --------------------------------------------------------------------
384 * Compact Flash (PCMCIA or IDE)
385 * -------------------------------------------------------------------- */
386
387#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
388 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
389
390static struct at91_cf_data cf0_data;
391
392static struct resource cf0_resources[] = {
393 [0] = {
394 .start = AT91_CHIPSELECT_4,
395 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
396 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
397 }
398};
399
400static struct platform_device cf0_device = {
401 .id = 0,
402 .dev = {
403 .platform_data = &cf0_data,
404 },
405 .resource = cf0_resources,
406 .num_resources = ARRAY_SIZE(cf0_resources),
407};
408
409static struct at91_cf_data cf1_data;
410
411static struct resource cf1_resources[] = {
412 [0] = {
413 .start = AT91_CHIPSELECT_5,
414 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
415 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
416 }
417};
418
419static struct platform_device cf1_device = {
420 .id = 1,
421 .dev = {
422 .platform_data = &cf1_data,
423 },
424 .resource = cf1_resources,
425 .num_resources = ARRAY_SIZE(cf1_resources),
426};
427
428void __init at91_add_device_cf(struct at91_cf_data *data)
429{
430 unsigned long ebi0_csa;
431 struct platform_device *pdev;
432
433 if (!data)
434 return;
435
436 /*
437 * assign CS4 or CS5 to SMC with Compact Flash logic support,
438 * we assume SMC timings are configured by board code,
439 * except True IDE where timings are controlled by driver
440 */
441 ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
442 switch (data->chipselect) {
443 case 4:
444 at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
445 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
446 cf0_data = *data;
447 pdev = &cf0_device;
448 break;
449 case 5:
450 at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
451 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
452 cf1_data = *data;
453 pdev = &cf1_device;
454 break;
455 default:
456 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
457 data->chipselect);
458 return;
459 }
460 at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
461
462 if (gpio_is_valid(data->det_pin)) {
463 at91_set_gpio_input(data->det_pin, 1);
464 at91_set_deglitch(data->det_pin, 1);
465 }
466
467 if (gpio_is_valid(data->irq_pin)) {
468 at91_set_gpio_input(data->irq_pin, 1);
469 at91_set_deglitch(data->irq_pin, 1);
470 }
471
472 if (gpio_is_valid(data->vcc_pin))
473 /* initially off */
474 at91_set_gpio_output(data->vcc_pin, 0);
475
476 /* enable EBI controlled pins */
477 at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
478 at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
479 at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
480 at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
481
482 pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
483 platform_device_register(pdev);
484}
485#else
486void __init at91_add_device_cf(struct at91_cf_data *data) {}
487#endif
488
489/* --------------------------------------------------------------------
490 * NAND / SmartMedia
491 * -------------------------------------------------------------------- */
492
493#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
494static struct atmel_nand_data nand_data;
495
496#define NAND_BASE AT91_CHIPSELECT_3
497
498static struct resource nand_resources[] = {
499 [0] = {
500 .start = NAND_BASE,
501 .end = NAND_BASE + SZ_256M - 1,
502 .flags = IORESOURCE_MEM,
503 },
504 [1] = {
505 .start = AT91SAM9263_BASE_ECC0,
506 .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
507 .flags = IORESOURCE_MEM,
508 }
509};
510
511static struct platform_device at91sam9263_nand_device = {
512 .name = "atmel_nand",
513 .id = -1,
514 .dev = {
515 .platform_data = &nand_data,
516 },
517 .resource = nand_resources,
518 .num_resources = ARRAY_SIZE(nand_resources),
519};
520
521void __init at91_add_device_nand(struct atmel_nand_data *data)
522{
523 unsigned long csa;
524
525 if (!data)
526 return;
527
528 csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
529 at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
530
531 /* enable pin */
532 if (gpio_is_valid(data->enable_pin))
533 at91_set_gpio_output(data->enable_pin, 1);
534
535 /* ready/busy pin */
536 if (gpio_is_valid(data->rdy_pin))
537 at91_set_gpio_input(data->rdy_pin, 1);
538
539 /* card detect pin */
540 if (gpio_is_valid(data->det_pin))
541 at91_set_gpio_input(data->det_pin, 1);
542
543 nand_data = *data;
544 platform_device_register(&at91sam9263_nand_device);
545}
546#else
547void __init at91_add_device_nand(struct atmel_nand_data *data) {}
548#endif
549
550
551/* --------------------------------------------------------------------
552 * TWI (i2c)
553 * -------------------------------------------------------------------- */
554
555/*
556 * Prefer the GPIO code since the TWI controller isn't robust
557 * (gets overruns and underruns under load) and can only issue
558 * repeated STARTs in one scenario (the driver doesn't yet handle them).
559 */
560#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
561
562static struct i2c_gpio_platform_data pdata = {
563 .sda_pin = AT91_PIN_PB4,
564 .sda_is_open_drain = 1,
565 .scl_pin = AT91_PIN_PB5,
566 .scl_is_open_drain = 1,
567 .udelay = 2, /* ~100 kHz */
568};
569
570static struct platform_device at91sam9263_twi_device = {
571 .name = "i2c-gpio",
572 .id = 0,
573 .dev.platform_data = &pdata,
574};
575
576void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
577{
578 at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */
579 at91_set_multi_drive(AT91_PIN_PB4, 1);
580
581 at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */
582 at91_set_multi_drive(AT91_PIN_PB5, 1);
583
584 i2c_register_board_info(0, devices, nr_devices);
585 platform_device_register(&at91sam9263_twi_device);
586}
587
588#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
589
590static struct resource twi_resources[] = {
591 [0] = {
592 .start = AT91SAM9263_BASE_TWI,
593 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
594 .flags = IORESOURCE_MEM,
595 },
596 [1] = {
597 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
598 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
599 .flags = IORESOURCE_IRQ,
600 },
601};
602
603static struct platform_device at91sam9263_twi_device = {
604 .name = "i2c-at91sam9260",
605 .id = 0,
606 .resource = twi_resources,
607 .num_resources = ARRAY_SIZE(twi_resources),
608};
609
610void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
611{
612 /* pins used for TWI interface */
613 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
614 at91_set_multi_drive(AT91_PIN_PB4, 1);
615
616 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
617 at91_set_multi_drive(AT91_PIN_PB5, 1);
618
619 i2c_register_board_info(0, devices, nr_devices);
620 platform_device_register(&at91sam9263_twi_device);
621}
622#else
623void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
624#endif
625
626
627/* --------------------------------------------------------------------
628 * SPI
629 * -------------------------------------------------------------------- */
630
631#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
632static u64 spi_dmamask = DMA_BIT_MASK(32);
633
634static struct resource spi0_resources[] = {
635 [0] = {
636 .start = AT91SAM9263_BASE_SPI0,
637 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
638 .flags = IORESOURCE_MEM,
639 },
640 [1] = {
641 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
642 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
643 .flags = IORESOURCE_IRQ,
644 },
645};
646
647static struct platform_device at91sam9263_spi0_device = {
648 .name = "atmel_spi",
649 .id = 0,
650 .dev = {
651 .dma_mask = &spi_dmamask,
652 .coherent_dma_mask = DMA_BIT_MASK(32),
653 },
654 .resource = spi0_resources,
655 .num_resources = ARRAY_SIZE(spi0_resources),
656};
657
658static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
659
660static struct resource spi1_resources[] = {
661 [0] = {
662 .start = AT91SAM9263_BASE_SPI1,
663 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
664 .flags = IORESOURCE_MEM,
665 },
666 [1] = {
667 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
668 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
669 .flags = IORESOURCE_IRQ,
670 },
671};
672
673static struct platform_device at91sam9263_spi1_device = {
674 .name = "atmel_spi",
675 .id = 1,
676 .dev = {
677 .dma_mask = &spi_dmamask,
678 .coherent_dma_mask = DMA_BIT_MASK(32),
679 },
680 .resource = spi1_resources,
681 .num_resources = ARRAY_SIZE(spi1_resources),
682};
683
684static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
685
686void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
687{
688 int i;
689 unsigned long cs_pin;
690 short enable_spi0 = 0;
691 short enable_spi1 = 0;
692
693 /* Choose SPI chip-selects */
694 for (i = 0; i < nr_devices; i++) {
695 if (devices[i].controller_data)
696 cs_pin = (unsigned long) devices[i].controller_data;
697 else if (devices[i].bus_num == 0)
698 cs_pin = spi0_standard_cs[devices[i].chip_select];
699 else
700 cs_pin = spi1_standard_cs[devices[i].chip_select];
701
702 if (!gpio_is_valid(cs_pin))
703 continue;
704
705 if (devices[i].bus_num == 0)
706 enable_spi0 = 1;
707 else
708 enable_spi1 = 1;
709
710 /* enable chip-select pin */
711 at91_set_gpio_output(cs_pin, 1);
712
713 /* pass chip-select pin to driver */
714 devices[i].controller_data = (void *) cs_pin;
715 }
716
717 spi_register_board_info(devices, nr_devices);
718
719 /* Configure SPI bus(es) */
720 if (enable_spi0) {
721 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
722 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
723 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
724
725 platform_device_register(&at91sam9263_spi0_device);
726 }
727 if (enable_spi1) {
728 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
729 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
730 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
731
732 platform_device_register(&at91sam9263_spi1_device);
733 }
734}
735#else
736void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
737#endif
738
739
740/* --------------------------------------------------------------------
741 * AC97
742 * -------------------------------------------------------------------- */
743
744#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
745static u64 ac97_dmamask = DMA_BIT_MASK(32);
746static struct ac97c_platform_data ac97_data;
747
748static struct resource ac97_resources[] = {
749 [0] = {
750 .start = AT91SAM9263_BASE_AC97C,
751 .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
752 .flags = IORESOURCE_MEM,
753 },
754 [1] = {
755 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
756 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
757 .flags = IORESOURCE_IRQ,
758 },
759};
760
761static struct platform_device at91sam9263_ac97_device = {
762 .name = "atmel_ac97c",
763 .id = 0,
764 .dev = {
765 .dma_mask = &ac97_dmamask,
766 .coherent_dma_mask = DMA_BIT_MASK(32),
767 .platform_data = &ac97_data,
768 },
769 .resource = ac97_resources,
770 .num_resources = ARRAY_SIZE(ac97_resources),
771};
772
773void __init at91_add_device_ac97(struct ac97c_platform_data *data)
774{
775 if (!data)
776 return;
777
778 at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
779 at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
780 at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
781 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
782
783 /* reset */
784 if (gpio_is_valid(data->reset_pin))
785 at91_set_gpio_output(data->reset_pin, 0);
786
787 ac97_data = *data;
788 platform_device_register(&at91sam9263_ac97_device);
789}
790#else
791void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
792#endif
793
794/* --------------------------------------------------------------------
795 * CAN Controller
796 * -------------------------------------------------------------------- */
797
798#if defined(CONFIG_CAN_AT91) || defined(CONFIG_CAN_AT91_MODULE)
799static struct resource can_resources[] = {
800 [0] = {
801 .start = AT91SAM9263_BASE_CAN,
802 .end = AT91SAM9263_BASE_CAN + SZ_16K - 1,
803 .flags = IORESOURCE_MEM,
804 },
805 [1] = {
806 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
807 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
808 .flags = IORESOURCE_IRQ,
809 },
810};
811
812static struct platform_device at91sam9263_can_device = {
813 .name = "at91_can",
814 .id = -1,
815 .resource = can_resources,
816 .num_resources = ARRAY_SIZE(can_resources),
817};
818
819void __init at91_add_device_can(struct at91_can_data *data)
820{
821 at91_set_A_periph(AT91_PIN_PA13, 0); /* CANTX */
822 at91_set_A_periph(AT91_PIN_PA14, 0); /* CANRX */
823 at91sam9263_can_device.dev.platform_data = data;
824
825 platform_device_register(&at91sam9263_can_device);
826}
827#else
828void __init at91_add_device_can(struct at91_can_data *data) {}
829#endif
830
831/* --------------------------------------------------------------------
832 * LCD Controller
833 * -------------------------------------------------------------------- */
834
835#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
836static u64 lcdc_dmamask = DMA_BIT_MASK(32);
837static struct atmel_lcdfb_pdata lcdc_data;
838
839static struct resource lcdc_resources[] = {
840 [0] = {
841 .start = AT91SAM9263_LCDC_BASE,
842 .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
843 .flags = IORESOURCE_MEM,
844 },
845 [1] = {
846 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
847 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
848 .flags = IORESOURCE_IRQ,
849 },
850};
851
852static struct platform_device at91_lcdc_device = {
853 .name = "at91sam9263-lcdfb",
854 .id = 0,
855 .dev = {
856 .dma_mask = &lcdc_dmamask,
857 .coherent_dma_mask = DMA_BIT_MASK(32),
858 .platform_data = &lcdc_data,
859 },
860 .resource = lcdc_resources,
861 .num_resources = ARRAY_SIZE(lcdc_resources),
862};
863
864void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data)
865{
866 if (!data)
867 return;
868
869 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
870 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
871 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
872 at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
873 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
874 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
875 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
876 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
877 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
878 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
879 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
880 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
881 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
882 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
883 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
884 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
885 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
886 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
887 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
888 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
889 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
890 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
891
892 lcdc_data = *data;
893 platform_device_register(&at91_lcdc_device);
894}
895#else
896void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data) {}
897#endif
898
899
900/* --------------------------------------------------------------------
901 * Image Sensor Interface
902 * -------------------------------------------------------------------- */
903
904#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
905
906struct resource isi_resources[] = {
907 [0] = {
908 .start = AT91SAM9263_BASE_ISI,
909 .end = AT91SAM9263_BASE_ISI + SZ_16K - 1,
910 .flags = IORESOURCE_MEM,
911 },
912 [1] = {
913 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
914 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
915 .flags = IORESOURCE_IRQ,
916 },
917};
918
919static struct platform_device at91sam9263_isi_device = {
920 .name = "at91_isi",
921 .id = -1,
922 .resource = isi_resources,
923 .num_resources = ARRAY_SIZE(isi_resources),
924};
925
926void __init at91_add_device_isi(struct isi_platform_data *data,
927 bool use_pck_as_mck)
928{
929 at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */
930 at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */
931 at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */
932 at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */
933 at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */
934 at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */
935 at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */
936 at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */
937 at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */
938 at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */
939 at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */
940 at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */
941 at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */
942 at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */
943 at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */
944
945 if (use_pck_as_mck) {
946 at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */
947
948 /* TODO: register the PCK for ISI_MCK and set its parent */
949 }
950}
951#else
952void __init at91_add_device_isi(struct isi_platform_data *data,
953 bool use_pck_as_mck) {}
954#endif
955
956
957/* --------------------------------------------------------------------
958 * Timer/Counter block
959 * -------------------------------------------------------------------- */
960
961#ifdef CONFIG_ATMEL_TCLIB
962
963static struct resource tcb_resources[] = {
964 [0] = {
965 .start = AT91SAM9263_BASE_TCB0,
966 .end = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
967 .flags = IORESOURCE_MEM,
968 },
969 [1] = {
970 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
971 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
972 .flags = IORESOURCE_IRQ,
973 },
974};
975
976static struct platform_device at91sam9263_tcb_device = {
977 .name = "atmel_tcb",
978 .id = 0,
979 .resource = tcb_resources,
980 .num_resources = ARRAY_SIZE(tcb_resources),
981};
982
983#if defined(CONFIG_OF)
984static struct of_device_id tcb_ids[] = {
985 { .compatible = "atmel,at91rm9200-tcb" },
986 { /*sentinel*/ }
987};
988#endif
989
990static void __init at91_add_device_tc(void)
991{
992#if defined(CONFIG_OF)
993 struct device_node *np;
994
995 np = of_find_matching_node(NULL, tcb_ids);
996 if (np) {
997 of_node_put(np);
998 return;
999 }
1000#endif
1001
1002 platform_device_register(&at91sam9263_tcb_device);
1003}
1004#else
1005static void __init at91_add_device_tc(void) { }
1006#endif
1007
1008
1009/* --------------------------------------------------------------------
1010 * RTT
1011 * -------------------------------------------------------------------- */
1012
1013static struct resource rtt0_resources[] = {
1014 {
1015 .start = AT91SAM9263_BASE_RTT0,
1016 .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
1017 .flags = IORESOURCE_MEM,
1018 }, {
1019 .flags = IORESOURCE_MEM,
1020 }, {
1021 .flags = IORESOURCE_IRQ,
1022 }
1023};
1024
1025static struct platform_device at91sam9263_rtt0_device = {
1026 .name = "at91_rtt",
1027 .id = 0,
1028 .resource = rtt0_resources,
1029};
1030
1031static struct resource rtt1_resources[] = {
1032 {
1033 .start = AT91SAM9263_BASE_RTT1,
1034 .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
1035 .flags = IORESOURCE_MEM,
1036 }, {
1037 .flags = IORESOURCE_MEM,
1038 }, {
1039 .flags = IORESOURCE_IRQ,
1040 }
1041};
1042
1043static struct platform_device at91sam9263_rtt1_device = {
1044 .name = "at91_rtt",
1045 .id = 1,
1046 .resource = rtt1_resources,
1047};
1048
1049#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
1050static void __init at91_add_device_rtt_rtc(void)
1051{
1052 struct platform_device *pdev;
1053 struct resource *r;
1054
1055 switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
1056 case 0:
1057 /*
1058 * The second resource is needed only for the chosen RTT:
1059 * GPBR will serve as the storage for RTC time offset
1060 */
1061 at91sam9263_rtt0_device.num_resources = 3;
1062 at91sam9263_rtt1_device.num_resources = 1;
1063 pdev = &at91sam9263_rtt0_device;
1064 r = rtt0_resources;
1065 break;
1066 case 1:
1067 at91sam9263_rtt0_device.num_resources = 1;
1068 at91sam9263_rtt1_device.num_resources = 3;
1069 pdev = &at91sam9263_rtt1_device;
1070 r = rtt1_resources;
1071 break;
1072 default:
1073 pr_err("at91sam9263: only supports 2 RTT (%d)\n",
1074 CONFIG_RTC_DRV_AT91SAM9_RTT);
1075 return;
1076 }
1077
1078 pdev->name = "rtc-at91sam9";
1079 r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
1080 r[1].end = r[1].start + 3;
1081 r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
1082 r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
1083}
1084#else
1085static void __init at91_add_device_rtt_rtc(void)
1086{
1087 /* Only one resource is needed: RTT not used as RTC */
1088 at91sam9263_rtt0_device.num_resources = 1;
1089 at91sam9263_rtt1_device.num_resources = 1;
1090}
1091#endif
1092
1093static void __init at91_add_device_rtt(void)
1094{
1095 at91_add_device_rtt_rtc();
1096 platform_device_register(&at91sam9263_rtt0_device);
1097 platform_device_register(&at91sam9263_rtt1_device);
1098}
1099
1100
1101/* --------------------------------------------------------------------
1102 * Watchdog
1103 * -------------------------------------------------------------------- */
1104
1105#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1106static struct resource wdt_resources[] = {
1107 {
1108 .start = AT91SAM9263_BASE_WDT,
1109 .end = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1110 .flags = IORESOURCE_MEM,
1111 }
1112};
1113
1114static struct platform_device at91sam9263_wdt_device = {
1115 .name = "at91_wdt",
1116 .id = -1,
1117 .resource = wdt_resources,
1118 .num_resources = ARRAY_SIZE(wdt_resources),
1119};
1120
1121static void __init at91_add_device_watchdog(void)
1122{
1123 platform_device_register(&at91sam9263_wdt_device);
1124}
1125#else
1126static void __init at91_add_device_watchdog(void) {}
1127#endif
1128
1129
1130/* --------------------------------------------------------------------
1131 * PWM
1132 * --------------------------------------------------------------------*/
1133
1134#if IS_ENABLED(CONFIG_PWM_ATMEL)
1135static struct resource pwm_resources[] = {
1136 [0] = {
1137 .start = AT91SAM9263_BASE_PWMC,
1138 .end = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
1139 .flags = IORESOURCE_MEM,
1140 },
1141 [1] = {
1142 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1143 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1144 .flags = IORESOURCE_IRQ,
1145 },
1146};
1147
1148static struct platform_device at91sam9263_pwm0_device = {
1149 .name = "at91sam9rl-pwm",
1150 .id = -1,
1151 .resource = pwm_resources,
1152 .num_resources = ARRAY_SIZE(pwm_resources),
1153};
1154
1155void __init at91_add_device_pwm(u32 mask)
1156{
1157 if (mask & (1 << AT91_PWM0))
1158 at91_set_B_periph(AT91_PIN_PB7, 1); /* enable PWM0 */
1159
1160 if (mask & (1 << AT91_PWM1))
1161 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
1162
1163 if (mask & (1 << AT91_PWM2))
1164 at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
1165
1166 if (mask & (1 << AT91_PWM3))
1167 at91_set_B_periph(AT91_PIN_PB29, 1); /* enable PWM3 */
1168
1169 platform_device_register(&at91sam9263_pwm0_device);
1170}
1171#else
1172void __init at91_add_device_pwm(u32 mask) {}
1173#endif
1174
1175
1176/* --------------------------------------------------------------------
1177 * SSC -- Synchronous Serial Controller
1178 * -------------------------------------------------------------------- */
1179
1180#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
1181static u64 ssc0_dmamask = DMA_BIT_MASK(32);
1182
1183static struct resource ssc0_resources[] = {
1184 [0] = {
1185 .start = AT91SAM9263_BASE_SSC0,
1186 .end = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
1187 .flags = IORESOURCE_MEM,
1188 },
1189 [1] = {
1190 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1191 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1192 .flags = IORESOURCE_IRQ,
1193 },
1194};
1195
1196static struct platform_device at91sam9263_ssc0_device = {
1197 .name = "at91rm9200_ssc",
1198 .id = 0,
1199 .dev = {
1200 .dma_mask = &ssc0_dmamask,
1201 .coherent_dma_mask = DMA_BIT_MASK(32),
1202 },
1203 .resource = ssc0_resources,
1204 .num_resources = ARRAY_SIZE(ssc0_resources),
1205};
1206
1207static inline void configure_ssc0_pins(unsigned pins)
1208{
1209 if (pins & ATMEL_SSC_TF)
1210 at91_set_B_periph(AT91_PIN_PB0, 1);
1211 if (pins & ATMEL_SSC_TK)
1212 at91_set_B_periph(AT91_PIN_PB1, 1);
1213 if (pins & ATMEL_SSC_TD)
1214 at91_set_B_periph(AT91_PIN_PB2, 1);
1215 if (pins & ATMEL_SSC_RD)
1216 at91_set_B_periph(AT91_PIN_PB3, 1);
1217 if (pins & ATMEL_SSC_RK)
1218 at91_set_B_periph(AT91_PIN_PB4, 1);
1219 if (pins & ATMEL_SSC_RF)
1220 at91_set_B_periph(AT91_PIN_PB5, 1);
1221}
1222
1223static u64 ssc1_dmamask = DMA_BIT_MASK(32);
1224
1225static struct resource ssc1_resources[] = {
1226 [0] = {
1227 .start = AT91SAM9263_BASE_SSC1,
1228 .end = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
1229 .flags = IORESOURCE_MEM,
1230 },
1231 [1] = {
1232 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1233 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1234 .flags = IORESOURCE_IRQ,
1235 },
1236};
1237
1238static struct platform_device at91sam9263_ssc1_device = {
1239 .name = "at91rm9200_ssc",
1240 .id = 1,
1241 .dev = {
1242 .dma_mask = &ssc1_dmamask,
1243 .coherent_dma_mask = DMA_BIT_MASK(32),
1244 },
1245 .resource = ssc1_resources,
1246 .num_resources = ARRAY_SIZE(ssc1_resources),
1247};
1248
1249static inline void configure_ssc1_pins(unsigned pins)
1250{
1251 if (pins & ATMEL_SSC_TF)
1252 at91_set_A_periph(AT91_PIN_PB6, 1);
1253 if (pins & ATMEL_SSC_TK)
1254 at91_set_A_periph(AT91_PIN_PB7, 1);
1255 if (pins & ATMEL_SSC_TD)
1256 at91_set_A_periph(AT91_PIN_PB8, 1);
1257 if (pins & ATMEL_SSC_RD)
1258 at91_set_A_periph(AT91_PIN_PB9, 1);
1259 if (pins & ATMEL_SSC_RK)
1260 at91_set_A_periph(AT91_PIN_PB10, 1);
1261 if (pins & ATMEL_SSC_RF)
1262 at91_set_A_periph(AT91_PIN_PB11, 1);
1263}
1264
1265/*
1266 * SSC controllers are accessed through library code, instead of any
1267 * kind of all-singing/all-dancing driver. For example one could be
1268 * used by a particular I2S audio codec's driver, while another one
1269 * on the same system might be used by a custom data capture driver.
1270 */
1271void __init at91_add_device_ssc(unsigned id, unsigned pins)
1272{
1273 struct platform_device *pdev;
1274
1275 /*
1276 * NOTE: caller is responsible for passing information matching
1277 * "pins" to whatever will be using each particular controller.
1278 */
1279 switch (id) {
1280 case AT91SAM9263_ID_SSC0:
1281 pdev = &at91sam9263_ssc0_device;
1282 configure_ssc0_pins(pins);
1283 break;
1284 case AT91SAM9263_ID_SSC1:
1285 pdev = &at91sam9263_ssc1_device;
1286 configure_ssc1_pins(pins);
1287 break;
1288 default:
1289 return;
1290 }
1291
1292 platform_device_register(pdev);
1293}
1294
1295#else
1296void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1297#endif
1298
1299
1300/* --------------------------------------------------------------------
1301 * UART
1302 * -------------------------------------------------------------------- */
1303
1304#if defined(CONFIG_SERIAL_ATMEL)
1305
1306static struct resource dbgu_resources[] = {
1307 [0] = {
1308 .start = AT91SAM9263_BASE_DBGU,
1309 .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1310 .flags = IORESOURCE_MEM,
1311 },
1312 [1] = {
1313 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1314 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1315 .flags = IORESOURCE_IRQ,
1316 },
1317};
1318
1319static struct atmel_uart_data dbgu_data = {
1320 .use_dma_tx = 0,
1321 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1322};
1323
1324static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1325
1326static struct platform_device at91sam9263_dbgu_device = {
1327 .name = "atmel_usart",
1328 .id = 0,
1329 .dev = {
1330 .dma_mask = &dbgu_dmamask,
1331 .coherent_dma_mask = DMA_BIT_MASK(32),
1332 .platform_data = &dbgu_data,
1333 },
1334 .resource = dbgu_resources,
1335 .num_resources = ARRAY_SIZE(dbgu_resources),
1336};
1337
1338static inline void configure_dbgu_pins(void)
1339{
1340 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
1341 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
1342}
1343
1344static struct resource uart0_resources[] = {
1345 [0] = {
1346 .start = AT91SAM9263_BASE_US0,
1347 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1348 .flags = IORESOURCE_MEM,
1349 },
1350 [1] = {
1351 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1352 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1353 .flags = IORESOURCE_IRQ,
1354 },
1355};
1356
1357static struct atmel_uart_data uart0_data = {
1358 .use_dma_tx = 1,
1359 .use_dma_rx = 1,
1360};
1361
1362static u64 uart0_dmamask = DMA_BIT_MASK(32);
1363
1364static struct platform_device at91sam9263_uart0_device = {
1365 .name = "atmel_usart",
1366 .id = 1,
1367 .dev = {
1368 .dma_mask = &uart0_dmamask,
1369 .coherent_dma_mask = DMA_BIT_MASK(32),
1370 .platform_data = &uart0_data,
1371 },
1372 .resource = uart0_resources,
1373 .num_resources = ARRAY_SIZE(uart0_resources),
1374};
1375
1376static inline void configure_usart0_pins(unsigned pins)
1377{
1378 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
1379 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
1380
1381 if (pins & ATMEL_UART_RTS)
1382 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
1383 if (pins & ATMEL_UART_CTS)
1384 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
1385}
1386
1387static struct resource uart1_resources[] = {
1388 [0] = {
1389 .start = AT91SAM9263_BASE_US1,
1390 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1391 .flags = IORESOURCE_MEM,
1392 },
1393 [1] = {
1394 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1395 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1396 .flags = IORESOURCE_IRQ,
1397 },
1398};
1399
1400static struct atmel_uart_data uart1_data = {
1401 .use_dma_tx = 1,
1402 .use_dma_rx = 1,
1403};
1404
1405static u64 uart1_dmamask = DMA_BIT_MASK(32);
1406
1407static struct platform_device at91sam9263_uart1_device = {
1408 .name = "atmel_usart",
1409 .id = 2,
1410 .dev = {
1411 .dma_mask = &uart1_dmamask,
1412 .coherent_dma_mask = DMA_BIT_MASK(32),
1413 .platform_data = &uart1_data,
1414 },
1415 .resource = uart1_resources,
1416 .num_resources = ARRAY_SIZE(uart1_resources),
1417};
1418
1419static inline void configure_usart1_pins(unsigned pins)
1420{
1421 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
1422 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
1423
1424 if (pins & ATMEL_UART_RTS)
1425 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
1426 if (pins & ATMEL_UART_CTS)
1427 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
1428}
1429
1430static struct resource uart2_resources[] = {
1431 [0] = {
1432 .start = AT91SAM9263_BASE_US2,
1433 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1434 .flags = IORESOURCE_MEM,
1435 },
1436 [1] = {
1437 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1438 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1439 .flags = IORESOURCE_IRQ,
1440 },
1441};
1442
1443static struct atmel_uart_data uart2_data = {
1444 .use_dma_tx = 1,
1445 .use_dma_rx = 1,
1446};
1447
1448static u64 uart2_dmamask = DMA_BIT_MASK(32);
1449
1450static struct platform_device at91sam9263_uart2_device = {
1451 .name = "atmel_usart",
1452 .id = 3,
1453 .dev = {
1454 .dma_mask = &uart2_dmamask,
1455 .coherent_dma_mask = DMA_BIT_MASK(32),
1456 .platform_data = &uart2_data,
1457 },
1458 .resource = uart2_resources,
1459 .num_resources = ARRAY_SIZE(uart2_resources),
1460};
1461
1462static inline void configure_usart2_pins(unsigned pins)
1463{
1464 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
1465 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
1466
1467 if (pins & ATMEL_UART_RTS)
1468 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
1469 if (pins & ATMEL_UART_CTS)
1470 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
1471}
1472
1473static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1474
1475void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1476{
1477 struct platform_device *pdev;
1478 struct atmel_uart_data *pdata;
1479
1480 switch (id) {
1481 case 0: /* DBGU */
1482 pdev = &at91sam9263_dbgu_device;
1483 configure_dbgu_pins();
1484 break;
1485 case AT91SAM9263_ID_US0:
1486 pdev = &at91sam9263_uart0_device;
1487 configure_usart0_pins(pins);
1488 break;
1489 case AT91SAM9263_ID_US1:
1490 pdev = &at91sam9263_uart1_device;
1491 configure_usart1_pins(pins);
1492 break;
1493 case AT91SAM9263_ID_US2:
1494 pdev = &at91sam9263_uart2_device;
1495 configure_usart2_pins(pins);
1496 break;
1497 default:
1498 return;
1499 }
1500 pdata = pdev->dev.platform_data;
1501 pdata->num = portnr; /* update to mapped ID */
1502
1503 if (portnr < ATMEL_MAX_UART)
1504 at91_uarts[portnr] = pdev;
1505}
1506
1507void __init at91_add_device_serial(void)
1508{
1509 int i;
1510
1511 for (i = 0; i < ATMEL_MAX_UART; i++) {
1512 if (at91_uarts[i])
1513 platform_device_register(at91_uarts[i]);
1514 }
1515}
1516#else
1517void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1518void __init at91_add_device_serial(void) {}
1519#endif
1520
1521
1522/* -------------------------------------------------------------------- */
1523/*
1524 * These devices are always present and don't need any board-specific
1525 * setup.
1526 */
1527static int __init at91_add_standard_devices(void)
1528{
1529 if (of_have_populated_dt())
1530 return 0;
1531
1532 at91_add_device_rtt();
1533 at91_add_device_watchdog();
1534 at91_add_device_tc();
1535 return 0;
1536}
1537
1538arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
deleted file mode 100644
index d76680f2a209..000000000000
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ /dev/null
@@ -1,493 +0,0 @@
1/*
2 * linux/arch/arm/mach-at91/board-sam9263ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/gpio.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h>
30#include <linux/platform_data/at24.h>
31#include <linux/fb.h>
32#include <linux/gpio_keys.h>
33#include <linux/input.h>
34#include <linux/leds.h>
35#include <linux/pwm.h>
36#include <linux/leds_pwm.h>
37
38#include <video/atmel_lcdc.h>
39
40#include <asm/setup.h>
41#include <asm/mach-types.h>
42#include <asm/irq.h>
43
44#include <asm/mach/arch.h>
45#include <asm/mach/map.h>
46#include <asm/mach/irq.h>
47
48#include <mach/hardware.h>
49#include <mach/at91sam9_smc.h>
50#include <mach/system_rev.h>
51
52#include "at91_aic.h"
53#include "board.h"
54#include "sam9_smc.h"
55#include "generic.h"
56#include "gpio.h"
57
58
59static void __init ek_init_early(void)
60{
61 /* Initialize processor: 16.367 MHz crystal */
62 at91_initialize(16367660);
63}
64
65/*
66 * USB Host port
67 */
68static struct at91_usbh_data __initdata ek_usbh_data = {
69 .ports = 2,
70 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
71 .vbus_pin_active_low = {1, 1},
72 .overcurrent_pin= {-EINVAL, -EINVAL},
73};
74
75/*
76 * USB Device port
77 */
78static struct at91_udc_data __initdata ek_udc_data = {
79 .vbus_pin = AT91_PIN_PA25,
80 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
81};
82
83
84/*
85 * ADS7846 Touchscreen
86 */
87#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
88static int ads7843_pendown_state(void)
89{
90 return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */
91}
92
93static struct ads7846_platform_data ads_info = {
94 .model = 7843,
95 .x_min = 150,
96 .x_max = 3830,
97 .y_min = 190,
98 .y_max = 3830,
99 .vref_delay_usecs = 100,
100 .x_plate_ohms = 450,
101 .y_plate_ohms = 250,
102 .pressure_max = 15000,
103 .debounce_max = 1,
104 .debounce_rep = 0,
105 .debounce_tol = (~0),
106 .get_pendown_state = ads7843_pendown_state,
107};
108
109static void __init ek_add_device_ts(void)
110{
111 at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */
112 at91_set_gpio_input(AT91_PIN_PA31, 1); /* Touchscreen BUSY signal */
113}
114#else
115static void __init ek_add_device_ts(void) {}
116#endif
117
118/*
119 * SPI devices.
120 */
121static struct spi_board_info ek_spi_devices[] = {
122#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
123 { /* DataFlash card */
124 .modalias = "mtd_dataflash",
125 .chip_select = 0,
126 .max_speed_hz = 15 * 1000 * 1000,
127 .bus_num = 0,
128 },
129#endif
130#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
131 {
132 .modalias = "ads7846",
133 .chip_select = 3,
134 .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
135 .bus_num = 0,
136 .platform_data = &ads_info,
137 .irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
138 },
139#endif
140};
141
142
143/*
144 * MCI (SD/MMC)
145 */
146static struct mci_platform_data __initdata mci1_data = {
147 .slot[0] = {
148 .bus_width = 4,
149 .detect_pin = AT91_PIN_PE18,
150 .wp_pin = AT91_PIN_PE19,
151 },
152};
153
154
155/*
156 * MACB Ethernet device
157 */
158static struct macb_platform_data __initdata ek_macb_data = {
159 .phy_irq_pin = AT91_PIN_PE31,
160 .is_rmii = 1,
161};
162
163
164/*
165 * NAND flash
166 */
167static struct mtd_partition __initdata ek_nand_partition[] = {
168 {
169 .name = "Partition 1",
170 .offset = 0,
171 .size = SZ_64M,
172 },
173 {
174 .name = "Partition 2",
175 .offset = MTDPART_OFS_NXTBLK,
176 .size = MTDPART_SIZ_FULL,
177 },
178};
179
180static struct atmel_nand_data __initdata ek_nand_data = {
181 .ale = 21,
182 .cle = 22,
183 .det_pin = -EINVAL,
184 .rdy_pin = AT91_PIN_PA22,
185 .enable_pin = AT91_PIN_PD15,
186 .ecc_mode = NAND_ECC_SOFT,
187 .on_flash_bbt = 1,
188 .parts = ek_nand_partition,
189 .num_parts = ARRAY_SIZE(ek_nand_partition),
190};
191
192static struct sam9_smc_config __initdata ek_nand_smc_config = {
193 .ncs_read_setup = 0,
194 .nrd_setup = 1,
195 .ncs_write_setup = 0,
196 .nwe_setup = 1,
197
198 .ncs_read_pulse = 3,
199 .nrd_pulse = 3,
200 .ncs_write_pulse = 3,
201 .nwe_pulse = 3,
202
203 .read_cycle = 5,
204 .write_cycle = 5,
205
206 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
207 .tdf_cycles = 2,
208};
209
210static void __init ek_add_device_nand(void)
211{
212 ek_nand_data.bus_width_16 = board_have_nand_16bit();
213 /* setup bus-width (8 or 16) */
214 if (ek_nand_data.bus_width_16)
215 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
216 else
217 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
218
219 /* configure chip-select 3 (NAND) */
220 sam9_smc_configure(0, 3, &ek_nand_smc_config);
221
222 at91_add_device_nand(&ek_nand_data);
223}
224
225
226/*
227 * I2C devices
228 */
229static struct at24_platform_data at24c512 = {
230 .byte_len = SZ_512K / 8,
231 .page_size = 128,
232 .flags = AT24_FLAG_ADDR16,
233};
234
235
236static struct i2c_board_info __initdata ek_i2c_devices[] = {
237 {
238 I2C_BOARD_INFO("24c512", 0x50),
239 .platform_data = &at24c512,
240 },
241 /* more devices can be added using expansion connectors */
242};
243
244/*
245 * LCD Controller
246 */
247#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
248static struct fb_videomode at91_tft_vga_modes[] = {
249 {
250 .name = "TX09D50VM1CCA @ 60",
251 .refresh = 60,
252 .xres = 240, .yres = 320,
253 .pixclock = KHZ2PICOS(4965),
254
255 .left_margin = 1, .right_margin = 33,
256 .upper_margin = 1, .lower_margin = 0,
257 .hsync_len = 5, .vsync_len = 1,
258
259 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
260 .vmode = FB_VMODE_NONINTERLACED,
261 },
262};
263
264static struct fb_monspecs at91fb_default_monspecs = {
265 .manufacturer = "HIT",
266 .monitor = "TX09D70VM1CCA",
267
268 .modedb = at91_tft_vga_modes,
269 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
270 .hfmin = 15000,
271 .hfmax = 64000,
272 .vfmin = 50,
273 .vfmax = 150,
274};
275
276#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
277 | ATMEL_LCDC_DISTYPE_TFT \
278 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
279
280static void at91_lcdc_power_control(struct atmel_lcdfb_pdata *pdata, int on)
281{
282 at91_set_gpio_value(AT91_PIN_PA30, on);
283}
284
285/* Driver datas */
286static struct atmel_lcdfb_pdata __initdata ek_lcdc_data = {
287 .lcdcon_is_backlight = true,
288 .default_bpp = 16,
289 .default_dmacon = ATMEL_LCDC_DMAEN,
290 .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
291 .default_monspecs = &at91fb_default_monspecs,
292 .atmel_lcdfb_power_control = at91_lcdc_power_control,
293 .guard_time = 1,
294};
295
296#else
297static struct atmel_lcdfb_pdata __initdata ek_lcdc_data;
298#endif
299
300
301/*
302 * GPIO Buttons
303 */
304#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
305static struct gpio_keys_button ek_buttons[] = {
306 { /* BP1, "leftclic" */
307 .code = BTN_LEFT,
308 .gpio = AT91_PIN_PC5,
309 .active_low = 1,
310 .desc = "left_click",
311 .wakeup = 1,
312 },
313 { /* BP2, "rightclic" */
314 .code = BTN_RIGHT,
315 .gpio = AT91_PIN_PC4,
316 .active_low = 1,
317 .desc = "right_click",
318 .wakeup = 1,
319 }
320};
321
322static struct gpio_keys_platform_data ek_button_data = {
323 .buttons = ek_buttons,
324 .nbuttons = ARRAY_SIZE(ek_buttons),
325};
326
327static struct platform_device ek_button_device = {
328 .name = "gpio-keys",
329 .id = -1,
330 .num_resources = 0,
331 .dev = {
332 .platform_data = &ek_button_data,
333 }
334};
335
336static void __init ek_add_device_buttons(void)
337{
338 at91_set_GPIO_periph(AT91_PIN_PC5, 1); /* left button */
339 at91_set_deglitch(AT91_PIN_PC5, 1);
340 at91_set_GPIO_periph(AT91_PIN_PC4, 1); /* right button */
341 at91_set_deglitch(AT91_PIN_PC4, 1);
342
343 platform_device_register(&ek_button_device);
344}
345#else
346static void __init ek_add_device_buttons(void) {}
347#endif
348
349
350/*
351 * AC97
352 * reset_pin is not connected: NRST
353 */
354static struct ac97c_platform_data ek_ac97_data = {
355 .reset_pin = -EINVAL,
356};
357
358
359/*
360 * LEDs ... these could all be PWM-driven, for variable brightness
361 */
362static struct gpio_led ek_leds[] = {
363 { /* "right" led, green, userled2 (could be driven by pwm2) */
364 .name = "ds2",
365 .gpio = AT91_PIN_PC29,
366 .active_low = 1,
367 .default_trigger = "nand-disk",
368 },
369 { /* "power" led, yellow (could be driven by pwm0) */
370 .name = "ds3",
371 .gpio = AT91_PIN_PB7,
372 .default_trigger = "heartbeat",
373 },
374#if !IS_ENABLED(CONFIG_LEDS_PWM)
375 {
376 .name = "ds1",
377 .gpio = AT91_PIN_PB8,
378 .active_low = 1,
379 .default_trigger = "none",
380 }
381#endif
382};
383
384/*
385 * PWM Leds
386 */
387static struct pwm_lookup pwm_lookup[] = {
388 PWM_LOOKUP("at91sam9rl-pwm", 1, "leds_pwm", "ds1",
389 5000, PWM_POLARITY_INVERSED),
390};
391
392#if IS_ENABLED(CONFIG_LEDS_PWM)
393static struct led_pwm pwm_leds[] = {
394 {
395 .name = "ds1",
396 .max_brightness = 255,
397 },
398};
399
400static struct led_pwm_platform_data pwm_data = {
401 .num_leds = ARRAY_SIZE(pwm_leds),
402 .leds = pwm_leds,
403};
404
405static struct platform_device leds_pwm = {
406 .name = "leds_pwm",
407 .id = -1,
408 .dev = {
409 .platform_data = &pwm_data,
410 },
411};
412#endif
413
414
415/*
416 * CAN
417 */
418static void sam9263ek_transceiver_switch(int on)
419{
420 if (on) {
421 at91_set_gpio_output(AT91_PIN_PA18, 1); /* CANRXEN */
422 at91_set_gpio_output(AT91_PIN_PA19, 0); /* CANRS */
423 } else {
424 at91_set_gpio_output(AT91_PIN_PA18, 0); /* CANRXEN */
425 at91_set_gpio_output(AT91_PIN_PA19, 1); /* CANRS */
426 }
427}
428
429static struct at91_can_data ek_can_data = {
430 .transceiver_switch = sam9263ek_transceiver_switch,
431};
432
433static struct platform_device *devices[] __initdata = {
434#if IS_ENABLED(CONFIG_LEDS_PWM)
435 &leds_pwm,
436#endif
437};
438
439static void __init ek_board_init(void)
440{
441 at91_register_devices();
442
443 /* Serial */
444 /* DBGU on ttyS0. (Rx & Tx only) */
445 at91_register_uart(0, 0, 0);
446
447 /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
448 at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
449 at91_add_device_serial();
450 /* USB Host */
451 at91_add_device_usbh(&ek_usbh_data);
452 /* USB Device */
453 at91_add_device_udc(&ek_udc_data);
454 /* SPI */
455 at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
456 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
457 /* Touchscreen */
458 ek_add_device_ts();
459 /* MMC */
460 at91_add_device_mci(1, &mci1_data);
461 /* Ethernet */
462 at91_add_device_eth(&ek_macb_data);
463 /* NAND */
464 ek_add_device_nand();
465 /* I2C */
466 at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
467 /* LCD Controller */
468 at91_add_device_lcdc(&ek_lcdc_data);
469 /* Push Buttons */
470 ek_add_device_buttons();
471 /* AC97 */
472 at91_add_device_ac97(&ek_ac97_data);
473 /* LEDs */
474 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
475 pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
476#if IS_ENABLED(CONFIG_LEDS_PWM)
477 at91_add_device_pwm(1 << AT91_PWM1);
478#endif
479 /* CAN */
480 at91_add_device_can(&ek_can_data);
481 /* Other platform devices */
482 platform_add_devices(devices, ARRAY_SIZE(devices));
483}
484
485MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
486 /* Maintainer: Atmel */
487 .init_time = at91_init_time,
488 .map_io = at91_map_io,
489 .handle_irq = at91_aic_handle_irq,
490 .init_early = ek_init_early,
491 .init_irq = at91_init_irq_default,
492 .init_machine = ek_board_init,
493MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 21:28:01 -0400