PCI: mediatek: Implement chained IRQ handling setup

Implement irq_chip based solution for IRQs management in order to
comply with IRQ framework.

Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>

2 files changed, 116 insertions, 91 deletions

diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index 0d0177ce436c..e2f323a52843 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -194,6 +194,7 @@ config PCIE_MEDIATEK
         depends on (ARM || ARM64) && (ARCH_MEDIATEK || COMPILE_TEST)
         depends on OF
         depends on PCI
+        depends on PCI_MSI_IRQ_DOMAIN
         select PCIEPORTBUS
         help
           Say Y here if you want to enable PCIe controller support on
diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
index c3dc5499d1b7..dabf10869bcd 100644
--- a/drivers/pci/host/pcie-mediatek.c
+++ b/drivers/pci/host/pcie-mediatek.c
@@ -11,8 +11,10 @@
 #include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <linux/irq.h>
+#include <linux/irqchip/chained_irq.h>
 #include <linux/irqdomain.h>
 #include <linux/kernel.h>
+#include <linux/msi.h>
 #include <linux/of_address.h>
 #include <linux/of_pci.h>
 #include <linux/of_platform.h>
@@ -130,14 +132,12 @@ struct mtk_pcie_port;
 /**
  * struct mtk_pcie_soc - differentiate between host generations
  * @need_fix_class_id: whether this host's class ID needed to be fixed or not
- * @has_msi: whether this host supports MSI interrupts or not
  * @ops: pointer to configuration access functions
  * @startup: pointer to controller setting functions
  * @setup_irq: pointer to initialize IRQ functions
  */
 struct mtk_pcie_soc {
         bool need_fix_class_id;
-        bool has_msi;
         struct pci_ops *ops;
         int (*startup)(struct mtk_pcie_port *port);
         int (*setup_irq)(struct mtk_pcie_port *port, struct device_node *node);
@@ -161,7 +161,9 @@ struct mtk_pcie_soc {
  * @lane: lane count
  * @slot: port slot
  * @irq_domain: legacy INTx IRQ domain
+ * @inner_domain: inner IRQ domain
  * @msi_domain: MSI IRQ domain
+ * @lock: protect the msi_irq_in_use bitmap
  * @msi_irq_in_use: bit map for assigned MSI IRQ
  */
 struct mtk_pcie_port {
@@ -179,7 +181,9 @@ struct mtk_pcie_port {
         u32 lane;
         u32 slot;
         struct irq_domain *irq_domain;
+        struct irq_domain *inner_domain;
         struct irq_domain *msi_domain;
+        struct mutex lock;
         DECLARE_BITMAP(msi_irq_in_use, MTK_MSI_IRQS_NUM);
 };
 
@@ -446,103 +450,130 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
         return 0;
 }
 
-static int mtk_pcie_msi_alloc(struct mtk_pcie_port *port)
+static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
 {
-        int msi;
+        struct mtk_pcie_port *port = irq_data_get_irq_chip_data(data);
+        phys_addr_t addr;
 
-        msi = find_first_zero_bit(port->msi_irq_in_use, MTK_MSI_IRQS_NUM);
-        if (msi < MTK_MSI_IRQS_NUM)
-                set_bit(msi, port->msi_irq_in_use);
-        else
-                return -ENOSPC;
+        /* MT2712/MT7622 only support 32-bit MSI addresses */
+        addr = virt_to_phys(port->base + PCIE_MSI_VECTOR);
+        msg->address_hi = 0;
+        msg->address_lo = lower_32_bits(addr);
+
+        msg->data = data->hwirq;
 
-        return msi;
+        dev_dbg(port->pcie->dev, "msi#%d address_hi %#x address_lo %#x\n",
+                (int)data->hwirq, msg->address_hi, msg->address_lo);
 }
 
-static void mtk_pcie_msi_free(struct mtk_pcie_port *port, unsigned long hwirq)
+static int mtk_msi_set_affinity(struct irq_data *irq_data,
+                                const struct cpumask *mask, bool force)
 {
-        clear_bit(hwirq, port->msi_irq_in_use);
+         return -EINVAL;
 }
 
-static int mtk_pcie_msi_setup_irq(struct msi_controller *chip,
-                                  struct pci_dev *pdev, struct msi_desc *desc)
+static void mtk_msi_ack_irq(struct irq_data *data)
 {
-        struct mtk_pcie_port *port;
-        struct msi_msg msg;
-        unsigned int irq;
-        int hwirq;
-        phys_addr_t msg_addr;
+        struct mtk_pcie_port *port = irq_data_get_irq_chip_data(data);
+        u32 hwirq = data->hwirq;
 
-        port = mtk_pcie_find_port(pdev->bus, pdev->devfn);
-        if (!port)
-                return -EINVAL;
+        writel(1 << hwirq, port->base + PCIE_IMSI_STATUS);
+}
 
-        hwirq = mtk_pcie_msi_alloc(port);
-        if (hwirq < 0)
-                return hwirq;
+static struct irq_chip mtk_msi_bottom_irq_chip = {
+        .name                   = "MTK MSI",
+        .irq_compose_msi_msg    = mtk_compose_msi_msg,
+        .irq_set_affinity       = mtk_msi_set_affinity,
+        .irq_ack                = mtk_msi_ack_irq,
+};
 
-        irq = irq_create_mapping(port->msi_domain, hwirq);
-        if (!irq) {
-                mtk_pcie_msi_free(port, hwirq);
-                return -EINVAL;
-        }
+static int mtk_pcie_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
+                                     unsigned int nr_irqs, void *args)
+{
+        struct mtk_pcie_port *port = domain->host_data;
+        unsigned long bit;
 
-        chip->dev = &pdev->dev;
+        WARN_ON(nr_irqs != 1);
+        mutex_lock(&port->lock);
 
-        irq_set_msi_desc(irq, desc);
+        bit = find_first_zero_bit(port->msi_irq_in_use, MTK_MSI_IRQS_NUM);
+        if (bit >= MTK_MSI_IRQS_NUM) {
+                mutex_unlock(&port->lock);
+                return -ENOSPC;
+        }
 
-        /* MT2712/MT7622 only support 32-bit MSI addresses */
-        msg_addr = virt_to_phys(port->base + PCIE_MSI_VECTOR);
-        msg.address_hi = 0;
-        msg.address_lo = lower_32_bits(msg_addr);
-        msg.data = hwirq;
+        __set_bit(bit, port->msi_irq_in_use);
+
+        mutex_unlock(&port->lock);
 
-        pci_write_msi_msg(irq, &msg);
+        irq_domain_set_info(domain, virq, bit, &mtk_msi_bottom_irq_chip,
+                            domain->host_data, handle_edge_irq,
+                            NULL, NULL);
 
         return 0;
 }
 
-static void mtk_msi_teardown_irq(struct msi_controller *chip, unsigned int irq)
+static void mtk_pcie_irq_domain_free(struct irq_domain *domain,
+                                     unsigned int virq, unsigned int nr_irqs)
 {
-        struct pci_dev *pdev = to_pci_dev(chip->dev);
-        struct irq_data *d = irq_get_irq_data(irq);
-        irq_hw_number_t hwirq = irqd_to_hwirq(d);
-        struct mtk_pcie_port *port;
+        struct irq_data *d = irq_domain_get_irq_data(domain, virq);
+        struct mtk_pcie_port *port = irq_data_get_irq_chip_data(d);
 
-        port = mtk_pcie_find_port(pdev->bus, pdev->devfn);
-        if (!port)
-                return;
+        mutex_lock(&port->lock);
+
+        if (!test_bit(d->hwirq, port->msi_irq_in_use))
+                dev_err(port->pcie->dev, "trying to free unused MSI#%lu\n",