Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
 "A fix for a regression on ARMv4T CPUs, and wiring up the new pkey
  syscalls for ARM"

* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: wire up new pkey syscalls
  ARM: fix oops when using older ARMv4T CPUs

4 files changed, 31 insertions, 11 deletions

diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 194b69923389..ada0d29a660f 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -19,7 +19,7 @@
  * This may need to be greater than __NR_last_syscall+1 in order to
  * account for the padding in the syscall table
  */
-#define __NR_syscalls  (396)
+#define __NR_syscalls  (400)
 
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_GETHOSTNAME
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 2cb9dc770e1d..314100a06ccb 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -420,6 +420,9 @@
 #define __NR_copy_file_range            (__NR_SYSCALL_BASE+391)
 #define __NR_preadv2                    (__NR_SYSCALL_BASE+392)
 #define __NR_pwritev2                   (__NR_SYSCALL_BASE+393)
+#define __NR_pkey_mprotect              (__NR_SYSCALL_BASE+394)
+#define __NR_pkey_alloc                 (__NR_SYSCALL_BASE+395)
+#define __NR_pkey_free                  (__NR_SYSCALL_BASE+396)
 
 /*
  * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 703fa0f3cd8f..08030b18f10a 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -403,6 +403,9 @@
                 CALL(sys_copy_file_range)
                 CALL(sys_preadv2)
                 CALL(sys_pwritev2)
+                CALL(sys_pkey_mprotect)
+/* 395 */       CALL(sys_pkey_alloc)
+                CALL(sys_pkey_free)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
 #define syscalls_counted
diff --git a/arch/arm/mm/abort-lv4t.S b/arch/arm/mm/abort-lv4t.S
index 6d8e8e3365d1..4cdfab31a0b6 100644
--- a/arch/arm/mm/abort-lv4t.S
+++ b/arch/arm/mm/abort-lv4t.S
@@ -7,7 +7,7 @@
  *         : r4 = aborted context pc
  *         : r5 = aborted context psr
  *
- * Returns : r4-r5, r10-r11, r13 preserved
+ * Returns : r4-r5, r9-r11, r13 preserved
  *
  * Purpose : obtain information about current aborted instruction.
  * Note: we read user space.  This means we might cause a data
@@ -48,7 +48,10 @@ ENTRY(v4t_late_abort)
 /* c */ b       do_DataAbort                    @ ldc   rd, [rn], #m    @ Same as ldr   rd, [rn], #m
 /* d */ b       do_DataAbort                    @ ldc   rd, [rn, #m]
 /* e */ b       .data_unknown
-/* f */
+/* f */ b       .data_unknown
+
+.data_unknown_r9:
+        ldr     r9, [sp], #4
 .data_unknown:  @ Part of jumptable
         mov     r0, r4
         mov     r1, r8
@@ -57,6 +60,7 @@ ENTRY(v4t_late_abort)
 .data_arm_ldmstm:
         tst     r8, #1 << 21                    @ check writeback bit
         beq     do_DataAbort                    @ no writeback -> no fixup
+        str     r9, [sp, #-4]!
         mov     r7, #0x11
         orr     r7, r7, #0x1100
         and     r6, r8, r7
@@ -75,12 +79,14 @@ ENTRY(v4t_late_abort)
         subne   r7, r7, r6, lsl #2              @ Undo increment
         addeq   r7, r7, r6, lsl #2              @ Undo decrement
         str     r7, [r2, r9, lsr #14]           @ Put register 'Rn'
+        ldr     r9, [sp], #4
         b       do_DataAbort
 
 .data_arm_lateldrhpre:
         tst     r8, #1 << 21                    @ Check writeback bit
         beq     do_DataAbort                    @ No writeback -> no fixup
 .data_arm_lateldrhpost:
+        str     r9, [sp, #-4]!
         and     r9, r8, #0x00f                  @ get Rm / low nibble of immediate value
         tst     r8, #1 << 22                    @ if (immediate offset)
         andne   r6, r8, #0xf00                  @ { immediate high nibble
@@ -93,6 +99,7 @@ ENTRY(v4t_late_abort)
         subne   r7, r7, r6                      @ Undo incrmenet
         addeq   r7, r7, r6                      @ Undo decrement
         str     r7, [r2, r9, lsr #14]           @ Put register 'Rn'
+        ldr     r9, [sp], #4
         b       do_DataAbort
 
 .data_arm_lateldrpreconst:
@@ -101,12 +108,14 @@ ENTRY(v4t_late_abort)
 .data_arm_lateldrpostconst:
         movs    r6, r8, lsl #20                 @ Get offset
         beq     do_DataAbort                    @ zero -> no fixup
+        str     r9, [sp, #-4]!
         and     r9, r8, #15 << 16               @ Extract 'n' from instruction
         ldr     r7, [r2, r9, lsr #14]           @ Get register 'Rn'
         tst     r8, #1 << 23                    @ Check U bit
         subne   r7, r7, r6, lsr #20             @ Undo increment
         addeq   r7, r7, r6, lsr #20             @ Undo decrement
         str     r7, [r2, r9, lsr #14]           @ Put register 'Rn'
+        ldr     r9, [sp], #4
         b       do_DataAbort
 
 .data_arm_lateldrprereg:
@@ -115,6 +124,7 @@ ENTRY(v4t_late_abort)
 .data_arm_lateldrpostreg:
         and     r7, r8, #15                     @ Extract 'm' from instruction
         ldr     r6, [r2, r7, lsl #2]            @ Get register 'Rm'
+        str     r9, [sp, #-4]!
         mov     r9, r8, lsr #7                  @ get shift count
         ands    r9, r9, #31
         and     r7, r8, #0x70                   @ get shift type
@@ -126,33 +136,33 @@ ENTRY(v4t_late_abort)
         b       .data_arm_apply_r6_and_rn
         b       .data_arm_apply_r6_and_rn       @ 1: LSL #0
         nop
-        b       .data_unknown                   @ 2: MUL?
+        b       .data_unknown_r9                @ 2: MUL?
         nop
-        b       .data_unknown                   @ 3: MUL?
+        b       .data_unknown_r9                @ 3: MUL?
         nop
         mov     r6, r6, lsr r9                  @ 4: LSR #!0
         b       .data_arm_apply_r6_and_rn
         mov     r6, r6, lsr #32                 @ 5: LSR #32
         b       .data_arm_apply_r6_and_rn
-        b       .data_unknown                   @ 6: MUL?
+        b       .data_unknown_r9                @ 6: MUL?
         nop
-        b       .data_unknown                   @ 7: MUL?
+        b       .data_unknown_r9                @ 7: MUL?
         nop
         mov     r6, r6, asr r9                  @ 8: ASR #!0
         b       .data_arm_apply_r6_and_rn
         mov     r6, r6, asr #32                 @ 9: ASR #32
         b       .data_arm_apply_r6_and_rn
-        b       .data_unknown                   @ A: MUL?
+        b       .data_unknown_r9                @ A: MUL?
         nop
-        b       .data_unknown                   @ B: MUL?
+        b       .data_unknown_r9                @ B: MUL?
         nop
         mov     r6, r6, ror r9                  @ C: ROR #!0
         b       .data_arm_apply_r6_and_rn
         mov     r6, r6, rrx                     @ D: RRX
         b       .data_arm_apply_r6_and_rn
-        b       .data_unknown                   @ E: MUL?
+        b       .data_unknown_r9                @ E: MUL?
         nop
-        b       .data_unknown                   @ F: MUL?
+        b       .data_unknown_r9                @ F: MUL?
 
 .data_thumb_abort:
         ldrh    r8, [r4]                        @ read instruction
@@ -190,6 +200,7 @@ ENTRY(v4t_late_abort)
 .data_thumb_pushpop:
         tst     r8, #1 << 10
         beq     .data_unknown
+        str     r9, [sp, #-4]!
         and     r6, r8, #0x55                   @ hweight8(r8) + R bit
         and     r9, r8, #0xaa
         add     r6, r6, r9, lsr #1
@@ -204,9 +215,11 @@ ENTRY(v4t_late_abort)
         addeq   r7, r7, r6, lsl #2              @ increment SP if PUSH
         subne   r7, r7, r6, lsl #2              @ decrement SP if POP
         str     r7, [r2, #13 << 2]
+        ldr     r9, [sp], #4
         b       do_DataAbort
 
 .data_thumb_ldmstm:
+        str     r9, [sp, #-4]!
         and     r6, r8, #0x55                   @ hweight8(r8)
         and     r9, r8, #0xaa
         add     r6, r6, r9, lsr #1
@@ -219,4 +232,5 @@ ENTRY(v4t_late_abort)
         and     r6, r6, #15                     @ number of regs to transfer
         sub     r7, r7, r6, lsl #2              @ always decrement
         str     r7, [r2, r9, lsr #6]
+        ldr     r9, [sp], #4
         b       do_DataAbort